CN103426817A - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN103426817A CN103426817A CN2013101967972A CN201310196797A CN103426817A CN 103426817 A CN103426817 A CN 103426817A CN 2013101967972 A CN2013101967972 A CN 2013101967972A CN 201310196797 A CN201310196797 A CN 201310196797A CN 103426817 A CN103426817 A CN 103426817A
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- interarea
- conductive layer
- hole
- semiconductor device
- coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (11)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012120284A JP6021441B2 (ja) | 2012-05-25 | 2012-05-25 | 半導体装置 |
JP2012-120284 | 2012-05-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103426817A true CN103426817A (zh) | 2013-12-04 |
CN103426817B CN103426817B (zh) | 2018-06-12 |
Family
ID=49620948
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310196797.2A Active CN103426817B (zh) | 2012-05-25 | 2013-05-24 | 半导体装置及其制造方法 |
Country Status (3)
Country | Link |
---|---|
US (4) | US9099536B2 (zh) |
JP (1) | JP6021441B2 (zh) |
CN (1) | CN103426817B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113016061A (zh) * | 2018-04-04 | 2021-06-22 | ams有限公司 | 形成贯穿衬底通孔的方法以及包括贯穿衬底通孔的半导体器件 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6021441B2 (ja) * | 2012-05-25 | 2016-11-09 | ラピスセミコンダクタ株式会社 | 半導体装置 |
JP5569831B1 (ja) * | 2013-05-15 | 2014-08-13 | 国立大学法人東北大学 | マイクロ空室の内壁面処理方法 |
JP6309243B2 (ja) * | 2013-10-30 | 2018-04-11 | ラピスセミコンダクタ株式会社 | 半導体装置およびその製造方法 |
US20150179580A1 (en) * | 2013-12-24 | 2015-06-25 | United Microelectronics Corp. | Hybrid interconnect structure and method for fabricating the same |
JP6359444B2 (ja) * | 2014-12-25 | 2018-07-18 | 東京エレクトロン株式会社 | 配線層形成方法、配線層形成システムおよび記憶媒体 |
US9704784B1 (en) * | 2016-07-14 | 2017-07-11 | Nxp Usa, Inc. | Method of integrating a copper plating process in a through-substrate-via (TSV) on CMOS wafer |
JP6963396B2 (ja) | 2017-02-28 | 2021-11-10 | キヤノン株式会社 | 電子部品の製造方法 |
JP6951219B2 (ja) * | 2017-11-29 | 2021-10-20 | 新光電気工業株式会社 | 配線基板、半導体装置、及び配線基板の製造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1658385A (zh) * | 2004-02-17 | 2005-08-24 | 三洋电机株式会社 | 半导体装置及其制造方法 |
US20080050911A1 (en) * | 2006-08-28 | 2008-02-28 | Micron Technology, Inc. | Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods |
US20110006303A1 (en) * | 2008-03-18 | 2011-01-13 | Canon Kabushiki Kaisha | Semiconductor apparatus manufacturing method and semiconductor apparatus |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06349952A (ja) | 1993-06-14 | 1994-12-22 | Oki Electric Ind Co Ltd | 配線形成方法 |
TW593731B (en) | 1998-03-20 | 2004-06-21 | Semitool Inc | Apparatus for applying a metal structure to a workpiece |
JP3217319B2 (ja) | 1998-12-11 | 2001-10-09 | 松下電器産業株式会社 | 半導体装置の製造方法 |
JP3820329B2 (ja) | 1999-09-14 | 2006-09-13 | 株式会社ルネサステクノロジ | 半導体基板のめっき方法 |
TWI227050B (en) * | 2002-10-11 | 2005-01-21 | Sanyo Electric Co | Semiconductor device and method for manufacturing the same |
JP2005062525A (ja) | 2003-08-13 | 2005-03-10 | Canon Inc | 光学素子および光学系 |
JP2005294320A (ja) | 2004-03-31 | 2005-10-20 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP4650117B2 (ja) * | 2005-06-21 | 2011-03-16 | パナソニック電工株式会社 | 半導体装置の製造方法 |
JP5026025B2 (ja) | 2006-08-24 | 2012-09-12 | 株式会社フジクラ | 半導体装置 |
JP5145000B2 (ja) | 2007-09-28 | 2013-02-13 | 株式会社フジクラ | 貫通配線基板、半導体パッケージ及び貫通配線基板の製造方法 |
JP2010114201A (ja) | 2008-11-05 | 2010-05-20 | Oki Semiconductor Co Ltd | 半導体装置の製造方法 |
JP2011003645A (ja) | 2009-06-17 | 2011-01-06 | Sharp Corp | 半導体装置およびその製造方法 |
JP5649805B2 (ja) * | 2009-08-12 | 2015-01-07 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP2011054805A (ja) | 2009-09-02 | 2011-03-17 | Toshiba Corp | 半導体装置、及び半導体装置の製造方法 |
CN102473639B (zh) * | 2010-03-09 | 2017-09-15 | 伊文萨思公司 | 半导体装置的制造方法及半导体装置 |
JP2012099548A (ja) * | 2010-10-29 | 2012-05-24 | Fujikura Ltd | 貫通配線基板の製造方法及び貫通配線基板 |
US8941222B2 (en) * | 2010-11-11 | 2015-01-27 | Advanced Semiconductor Engineering Inc. | Wafer level semiconductor package and manufacturing methods thereof |
JP6021441B2 (ja) * | 2012-05-25 | 2016-11-09 | ラピスセミコンダクタ株式会社 | 半導体装置 |
US8901435B2 (en) * | 2012-08-14 | 2014-12-02 | Bridge Semiconductor Corporation | Hybrid wiring board with built-in stopper, interposer and build-up circuitry |
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2012
- 2012-05-25 JP JP2012120284A patent/JP6021441B2/ja active Active
-
2013
- 2013-05-17 US US13/896,561 patent/US9099536B2/en active Active
- 2013-05-24 CN CN201310196797.2A patent/CN103426817B/zh active Active
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2015
- 2015-06-24 US US14/748,537 patent/US9892995B2/en active Active
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2018
- 2018-01-02 US US15/859,801 patent/US10153228B2/en active Active
- 2018-11-09 US US16/185,169 patent/US10580721B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1658385A (zh) * | 2004-02-17 | 2005-08-24 | 三洋电机株式会社 | 半导体装置及其制造方法 |
US20080050911A1 (en) * | 2006-08-28 | 2008-02-28 | Micron Technology, Inc. | Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods |
US20110006303A1 (en) * | 2008-03-18 | 2011-01-13 | Canon Kabushiki Kaisha | Semiconductor apparatus manufacturing method and semiconductor apparatus |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113016061A (zh) * | 2018-04-04 | 2021-06-22 | ams有限公司 | 形成贯穿衬底通孔的方法以及包括贯穿衬底通孔的半导体器件 |
Also Published As
Publication number | Publication date |
---|---|
CN103426817B (zh) | 2018-06-12 |
US20190080987A1 (en) | 2019-03-14 |
US20150348875A1 (en) | 2015-12-03 |
US10153228B2 (en) | 2018-12-11 |
US20130313688A1 (en) | 2013-11-28 |
US9892995B2 (en) | 2018-02-13 |
US20180151476A1 (en) | 2018-05-31 |
US9099536B2 (en) | 2015-08-04 |
US10580721B2 (en) | 2020-03-03 |
JP6021441B2 (ja) | 2016-11-09 |
JP2013247254A (ja) | 2013-12-09 |
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Effective date of registration: 20220705 Address after: Ontario Patentee after: Achilles technologies Address before: Tokyo, Japan Patentee before: LAPIS SEMICONDUCTOR Co.,Ltd. |
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Effective date of registration: 20230901 Address after: Taiwan, Hsinchu, China Science Industry Park, Hsinchu Road, force six, No. eight Patentee after: Taiwan Semiconductor Manufacturing Co.,Ltd. Address before: Ontario Patentee before: Achilles technologies |