CN103325828B - 氮化物半导体元件 - Google Patents

氮化物半导体元件 Download PDF

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CN103325828B
CN103325828B CN201210315907.8A CN201210315907A CN103325828B CN 103325828 B CN103325828 B CN 103325828B CN 201210315907 A CN201210315907 A CN 201210315907A CN 103325828 B CN103325828 B CN 103325828B
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nitride semiconductor
electrode
semiconductor layer
drain electrode
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CN103325828A (zh
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斋藤涉
齐藤泰伸
藤本英俊
吉冈启
大野哲也
仲敏行
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Toshiba Corp
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Abstract

根据1个实施方式，氮化物半导体元件具备：导电性基板；第1氮化物半导体层，直接或经由缓冲层设在导电性基板之上，由无掺杂的氮化物半导体构成；第2氮化物半导体层，设在第1氮化物半导体层之上，由具有比第1氮化物半导体层大的带隙的无掺杂或n型的氮化物半导体构成；异质结场效应晶体管，具有源电极、漏电极及栅电极；肖特基势垒二极管，具有阳电极及阴电极；第1及第2元件分离绝缘层；框架电极。该框架电极与源电极及导电性基板电连接，将异质结场效应晶体管及肖特基势垒二极管的外周包围。

Description

氮化物半导体元件
本申请基于2012年3月23日提出的日本专利申请第2012－68143号主张优先权，这里引用其全部内容。
技术领域
本发明涉及氮化物半导体元件。
背景技术
在开关电源或逆变器等电力变换电路中，使用开关元件或二极管等的功率半导体元件。对于该功率半导体元件要求高耐压、低导通电阻。并且，耐压与导通电阻的关系存在由元件材料决定的权衡的关系。通过到目前为止的技术开发的进步，在功率半导体元件中，将导通电阻的降低实现到了到作为主要的元件材料的硅的极限附近。
为了进一步降低导通电阻，需要元件材料的变更。在此，将氮化镓（GaN）或氮化铝镓（AlGaN）等氮化物半导体或碳化硅（SiC）等宽带隙（bandgap）半导体作为开关元件材料使用。由此，能够改善由材料决定的权衡的关系，能够将导通电阻飞跃性地降低。
在使用GaN或AlGaN等氮化物半导体的元件中，作为容易得到低导通电阻的元件，可以举出使用AlGaN/GaN异质构造的异质结场效应晶体管（HFET：Hetero-structureFieldEffectTransistor）。该HFET将在AlGaN/GaN异质界面上通过压电分极产生的高移动度且高浓度的二维电子气体（2DEG：twoDimensionalElectronGas）作为沟道来利用，从而实现低导通电阻。由此，即使芯片面积较小也能够得到低导通电阻的元件。此外，由于芯片面积较小，元件电容也下降，所以能够得到适合于高速的开关动作的元件。
但是，在实际使HFET以高速开关的情况下，容易发生起因于由寄生电感带来的浪涌电压、电流的开关噪声。并且，如果该开关噪声传输到栅极布线中，通过HFET的误动作而发生损失或元件的破坏的问题。
发明内容
本发明的目的是提供一种即使进行高速的开关动作也能够抑制开关噪声的发生的氮化物半导体元件。
在一技术方案中，氮化物半导体元件具备：导电性基板；第1氮化物半导体层，直接或经由缓冲层设在上述导电性基板的上表面上，并且由无掺杂的氮化物半导体构成；第2氮化物半导体层，设在上述第1氮化物半导体层之上，并且由具有比上述第1氮化物半导体层大的带隙的无掺杂或n型氮化物半导体构成；第1异质结场效应晶体管，具有：第1源电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；第1漏电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；和第1栅电极，设在上述第1源电极与上述第1漏电极之间，并且控制在上述第1氮化物半导体层与上述第2氮化物半导体层的界面处产生的二维电子气体的浓度；第1肖特基势垒二极管，具有：第1阳电极，设在上述第2氮化物半导体层之上，并与上述第2氮化物半导体层形成肖特基接合，并且与上述第1漏电极电连接；和第1阴电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；第1元件分离绝缘层，设在从上述第1漏电极与上述第1阳电极之间的上述第2氮化物半导体层的上表面到上述第1氮化物半导体层的中途为止；第2元件分离绝缘层，设在从上述第1源电极与上述第1阴电极之间的上述第2氮化物半导体层的上表面到上述第1氮化物半导体层的中途为止；以及框架电极，与上述第1源电极及上述导电性基板电连接，并且将上述第1异质结场效应晶体管及上述第1肖特基势垒二极管的外周包围。
根据本发明的技术方案，能够提供即使进行高速的开关动作也能够抑制开关噪声的发生的氮化物半导体元件。
附图说明
图1是本发明的第1实施方式的氮化物半导体元件的示意性剖视图。
图2是表示本发明的第1实施方式的氮化物半导体元件的电极的配置的俯视图。
图3是包括本发明的第1实施方式的氮化物半导体元件的升压斩波器的电路图。
图4是本发明的第1实施方式的第1变形例的氮化物半导体元件的示意性剖视图。
图5是表示本发明的第1实施方式的第2变形例的氮化物半导体元件的电极的配置的俯视图。
图6是表示本发明的第1实施方式的第3变形例的氮化物半导体元件的放大俯视图。
图7是表示本发明的第1实施方式的第4变形例的氮化物半导体元件的电极的配置的俯视图。
图8是本发明的第2实施方式的氮化物半导体元件的示意性剖视图。
图9是表示本发明的第2实施方式的氮化物半导体元件的电极的配置的俯视图。
图10是包括本发明的第2实施方式的氮化物半导体元件的反激式变换器的电路图。
图11是本发明的第3实施方式的氮化物半导体元件的示意性剖视图。
图12是表示本发明的第3实施方式的氮化物半导体元件的电极的配置的俯视图。
图13是包括本发明的第3实施方式的氮化物半导体元件的正激变换器的电路图。
具体实施方式
以下，参照附图说明本发明的实施方式的氮化物半导体元件。另外，在各图中对于具有同样的功能的构成要素赋予相同的标号，不重复相同标号的构成要素的详细说明。
（第1实施方式）
参照图1及图2对本发明的第1实施方式的氮化物半导体元件进行说明。图1是第1实施方式的氮化物半导体元件的示意性剖视图，图2是表示该氮化物半导体元件的电极的配置的俯视图。
本实施方式的氮化物半导体元件具备导电性基板1、缓冲层2、氮化物半导体层3、氮化物半导体层4、源电极5、漏电极6、栅电极7、阳电极8、阴电极9、背面电极10、元件分离绝缘层11a、11b、框架电极5A。
如图1所示，在导电性基板1上隔着缓冲层2形成有成为沟道层的氮化物半导体层3，在其上形成有作为隔离（barrier）层的氮化物半导体层4。进而，在氮化物半导体层4上，形成有HFET（异质结场效应晶体管）12的源电极5、漏电极6及栅电极7，并且形成有SBD（肖特基势垒二极管）13的阳电极8及阴电极9。
以下，对上述各构成要素详细地说明。
导电性基板1是导电性的基板，例如是p型的Si基板，但导电型及基板材料不限定于此。即，导电性基板1的导电型也可以是n型，作为基板材料也可以使用SiC等其他材料。
缓冲层2是为了在导电性基板1的上表面层叠高品质的氮化物半导体层而设置的层。该缓冲层2例如由AlGaN构成，但不限定于此，也可以通过将多种氮化物半导体的薄层交替地层叠的多层构造（AlGaN/GaN，AlN/GaN等）来构成。
氮化物半导体层（沟道层）3设在缓冲层2之上，由无掺杂的AlXGa1-XN（0≤X＜1）构成。另外，氮化物半导体层3也可以不隔着缓冲层2，而直接设在导电性基板1之上。
氮化物半导体层（隔离层）4设在氮化物半导体层3之上，由具有比氮化物半导体层3大的带隙的氮化物半导体、例如AlYGa1-YN（0＜Y≤1，X＜Y）构成。
在氮化物半导体层4由无掺杂的氮化物半导体构成的情况下，也由于压电分极在氮化物半导体层3与氮化物半导体层4的界面处产生高浓度的二维电子气体。但是，氮化物半导体层4不限于无掺杂，也可以由n型的氮化物半导体构成。
另外，成为隔离层的氮化物半导体层4及成为沟道层的氮化物半导体层3的材料的组合不限于AlGaN/GaN类，也可以是GaN/InGaN类、AlN/AlGaN类、InAlN/GaN类等其他的组合。
源电极5及漏电极6都设在氮化物半导体层4之上，与氮化物半导体层4形成欧姆接合。
此外，如图2所示，源电极5及漏电极6沿着规定的方向（在图2中是纵向）交替地设置多个。多个源电极5的一端都与源电极焊盘16连接。此外，多个漏电极6的一端都与漏电极/阳电极焊盘17连接。
栅电极7设在源电极5与漏电极6之间，控制在氮化物半导体层3与氮化物半导体层4的界面处产生的二维电子气体的浓度。该栅电极7如图2所示，在源电极5及漏电极6之间沿着源电极以锯齿状设置，其一端与栅电极焊盘18连接。在本实施方式中，栅电极7设在氮化物半导体层4之上，与氮化物半导体层4形成肖特基接合。
另外，栅电极7的构造不限于肖特基栅极，也可以采用所谓的绝缘栅极构造。在此情况下，栅电极7设在形成于氮化物半导体层4之上的绝缘层之上。此外，如在本实施方式的第1变形例中详细叙述那样，也可以在栅电极7与氮化物半导体层4之间夹装p型的氮化物半导体层。
阳电极8设在氮化物半导体层4之上，与氮化物半导体层4形成肖特基接合。此外，阳电极8与漏电极6电连接。在本实施方式中，如图2所示，漏电极6及阳电极8经由漏电极/阳电极焊盘17电连接。
阴电极9设在氮化物半导体层4之上，与氮化物半导体层4形成欧姆接合。
阳电极8及阴电极9如图2所示，沿着规定的方向交替地设有多个。多个阳电极8的一端都与漏电极/阳电极焊盘17连接。此外，多个阴电极9的一端都与阴电极焊盘19连接。
框架电极5A如图2所示，是包围HFET12及SBD13的外周的框状的电极。框架电极5A包括上述电极焊盘16～19，包围HFET12及SBD13的外周而设置。
此外，如图2所示，框架电极5A设在氮化物半导体层4之上，与源电极5电连接，并且如图1所示，与导电性基板1也电连接。
关于框架电极5A与导电性基板1的电连接，可以采用各种方式。如图1所示，在导电性基板1的下表面，以与导电性基板1形成欧姆接合的方式设有背面电极10。通过将本实施方式的氮化物半导体元件的芯片钎焊安装到由铜（Cu）等的金属构成的封装框架上，背面电极10与封装框架电连接。并且，通过将框架电极5A以引线接合连接到封装框架上，将框架电极5A与导电性基板1电连接。或者，也可以通过贯通氮化物半导体层3及4而设置的导通孔（未图示）将框架电极5A与导电性基板1电连接。
元件分离绝缘层11a由图1及图2可知，设在从漏电极6与阳电极8之间的氮化物半导体层4的表面到氮化物半导体层3的中途为止。如图2所示，元件分离绝缘层11a形成在包括漏电极/阳电极焊盘17的区域。由此，当对SBD13施加反方向电压时，不会从漏电极6流出漏电流。即，防止SBD13的逆向漏电流。
元件分离绝缘层11b由图1及图2可知，设在从源电极5、源电极焊盘16及框架电极5A、与阴电极9及阴电极焊盘19之间的氮化物半导体层4的表面到氮化物半导体层3的中途为止。该元件分离绝缘层11b设在源电极5、源电极焊盘16及框架电极5A与阴电极9及阴电极焊盘19之间，将两者绝缘。
另外，元件分离绝缘层11a及11b并不受其形成工艺限定，例如也可以对规定的区域进行离子注入而形成，或者也可以在规定的区域中通过蚀刻而形成台式晶体管。
本实施方式的氮化物半导体元件在功能上如图1所示，将HFET12与SBD13串联连接，以将漏电极6与阳电极8连接。图3表示包括本实施方式的氮化物半导体元件的升压斩波器的电路图。升压斩波器电路如图3所示，由HFET12、与该HFET12串联连接的SBD13、电容器14a及14b、和斩波线圈15构成。图3中用虚线包围的部分是能够由本实施方式的氮化物半导体元件构成的部分。
如上述那样，在本实施方式中，通过将HFET12和串联连接在该HFET12上的SBD13集成，降低了HFET12与SBD13之间的寄生电感。
进而，在本实施方式中，以包围HFET12及SBD13的外周的方式设置框架电极5A。该框架电极5A与作为升压斩波器电路等电力变换电路的接地线的源电极5电连接，并且也与导电性基板1电连接。由此，降低了接地线的寄生电感。
如上述那样，根据本实施方式，通过使寄生电感降低，即便使HFET12高速地进行开关动作，也能够尽量抑制开关噪声的产生。
进而，在本实施方式中，通过框架电极5A将HFET12及SBD13屏蔽，从而能够遮蔽来自外部的噪声。
由此，根据本实施方式，尽量抑制开关噪声及来自外部的噪声，防止起因于这些噪声的元件的误动作，由此，能够防止因误动作带来的损失及元件的破坏。
接着，对本实施方式的第1至第4变形例进行说明。任一变形例都能够得到上述效果。
（第1变形例）
图4表示第1变形例的氮化物半导体元件的示意性剖视图。如图4所示，在本变形例中，在栅电极7与氮化物半导体层4之间夹装有由p型的AlZGa1-ZN（0≤Z≤1）构成的p型栅极层31。由此，通过内置电势（built-inpotential）使p型栅极层31与氮化物半导体层4的界面耗尽，能够使HFET12成为常断（normallyoff）型。
此外，在本变形例中，如图4所示，在阳电极8的一部分与氮化物半导体层4之间，夹装有由p型的AlZGa1-ZN（0≤Z≤1）构成的p型阳电极层32。由此，当必须使SBD13流过过电流时，通过从p型阳电极层32注入空穴，能够防止急剧的导通电压的上升。此外，在对SBD13施加反向电压而发生雪崩击穿的情况下，也从p型阳电极层32迅速地将空穴排出，所以能够得到较高的雪崩耐量。另外，p型阳电极层32可以与p型栅极层31同时形成。
（第2变形例）
图5是表示第2变形例的氮化物半导体元件的电极的配置的俯视图。如图5所示，在本变形例中，框架电极5A与漏电极6（漏电极/阳电极焊盘17）间的距离A比框架电极5A与阴电极9（阴电极焊盘19）间的距离B长。
在升压斩波器电路中，漏电极6与阳电极8的连接点的电位通过HFET12的开关动作而变化。如果漏电极6与框架电极5A间的寄生电容较大，则开关动作变慢，电路的损失增加。
所以，在本变形例中，使漏电极6与框架电极5A间的距离比框架电极5A与阴电极9的距离（B）大。换言之，对于规定的大小的框架电极5A，使配置在其中的各种电极及电极焊盘的位置在图5的例子中靠近右下的方向。由此，使漏电极6与框架电极5A间的寄生电容降低。结果，使高速开关动作变得容易，能够减小电力变换电路的损失。
（第3变形例）
图6表示第3变形例的氮化物半导体元件的放大俯视图。
如图6所示，在本变形例中，相互对置的框架电极5A及阴电极9的边缘部的形状被加工为，在两者之间形成锯齿状的间隙。元件分离绝缘层11b在该锯齿状的间隙中露出。
由此，框架电极5A与阴电极9的对置面积变大，在两者之间产生寄生电容。该寄生电容能够作为连接在通过图3说明的升压斩波器电路的输出侧、即阴电极9与源电极5之间的平滑用的电容器14b发挥功能。
由此，根据本变形例，能够将电容器14b集成到氮化物半导体元件中。
（第4变形例）
图7是表示第4变形例的氮化物半导体元件的电极的配置的俯视图。如图7所示，在本变形例中，漏电极/阳电极焊盘17、源电极焊盘16及阴电极焊盘19配置在框架电极5A的相同的边（在图7的例子中是下边）侧。
如图7所示，源电极5的一端直接或经由源极布线20与源电极焊盘16连接。此外，漏电极6的一端直接或经由漏极布线21与漏电极/阳电极焊盘17连接。阳电极8的一端直接或经由阳极布线22与漏电极/阳电极焊盘17连接。阴电极9的一端直接或经由直接或阴极布线23与阴电极焊盘19连接。
这里，源极布线20设在与设有源电极5的层不同的层中，漏极布线21设在与设有漏电极6的层不同的层中。此外，阳极布线22设在与设有阳电极8的层不同的层中，阴极布线23设在与设有阴电极9的层不同的层中。这些布线使用多层布线技术形成。
在本变形例中，通过将漏电极/阳电极焊盘17、源电极焊盘16及阴电极焊盘19配置在框架电极5A的相同的边侧，使流到源电极5中的电流IS与流到漏电极6中的电流ID成为相反方向。此外，使流入阳电极8的电流IA与流入阴电极9的电流IC成为相反方向。由此，源电极5和漏电极6的电感被消除，同样，阳电极8和阴电极9的电感被消除。结果，能够进一步抑制开关噪声的发生，能够实现高速的开关动作。
（第2实施方式）
接着，参照图8及图9对本发明的第2实施方式的氮化物半导体元件进行说明。图8是第2实施方式的氮化物半导体元件的示意性剖视图，图9是表示该氮化物半导体元件的电极的配置的俯视图。
第2实施方式与第1实施方式的不同点之一，是在第2实施方式中形成有第2HFET。另外，在以下的本实施方式的说明中，对于与第1实施方式相同的构成要素赋予相同的标号并省略其说明。
如图8所示，本实施方式的氮化物半导体元件还具备与HFET12及SBD13相邻地设置的HFET12a。该HFET12a具有与HFET12类似的结构，具有源电极5a、漏电极6a、和栅电极7a。
源电极5a及漏电极6a都设在氮化物半导体层4之上，与氮化物半导体层4形成欧姆接合。
栅电极7a设在形成于氮化物半导体层4之上的p型栅极层31a之上。p型栅极层31a与上述p型栅极层31同样，由p型的AlZGa1-ZN（0≤Z≤1）构成。另外，栅电极7a也可以设置为，不经由p型栅极层31a地与氮化物半导体层4形成肖特基接合。
如图9所示，HFET12a的源电极5a经由源电极焊盘16a及框架电极5A与HFET12的源电极5电连接。此外，源电极5a通过元件分离绝缘层11a及11b与SBD13绝缘分离。
如图9所示，框架电极5A将HFET12及SBD13的外周包围，并且将HFET12a的外周包围。此外，框架电极5A经由源电极焊盘16a与HFET12a的源电极5a电连接。
在该源电极焊盘16a上电连接着源电极5a的一端。此外，在漏电极焊盘33上电连接着漏电极6a的一端，在栅极焊盘18a上电连接着栅电极7a的一端。
元件分离绝缘层11c设在包括漏电极焊盘33的区域中，将漏电极焊盘33与框架电极5A绝缘。
通过使用本实施方式的氮化物半导体元件，能够构成图10所示的反激式变换器电路。该反激式变换器电路由HFET12、与HFET12串联连接的SBD13、电容器14a及14b、斩波线圈15、变压器24、与变压器24的一次侧连接的HFET12a、与变压器24的二次侧连接的SBD25、电容器14c构成。图10中用虚线包围的部分是能够由本实施方式的氮化物半导体元件构成的部分。
如上述那样，在本实施方式中，除了第1实施方式的结构以外，还具备HFET12a，该HFET12a具有与HFET12的源电极5电连接的源电极5a。此外，与导电性基板1电连接的框架电极5A除了HFET12及SBD13的外周以外、还包围HFET12a的外周而设置。由此，能够尽量抑制HFET12及12a的开关噪声的发生，并且能够遮蔽来自外部的噪声的影响。因而，能够提供低损失且能够进行高频动作的反激式变换器电路。
（第3实施方式）
接着，参照图11及图12对本发明的第3实施方式的氮化物半导体元件进行说明。图11是第3实施方式的氮化物半导体元件的示意性剖视图，图12是表示该氮化物半导体元件的电极的配置的俯视图。
第3实施方式与第1实施方式的不同点之一，是在第3实施方式中形成有串联连接的第2HFET及第2SBD。另外，在以下的本实施方式的说明中，对于与第1及第2实施方式相同的构成要素赋予相同的标号，并省略其说明。
如图11所示，本实施方式的氮化物半导体元件还具备与HFET12及SBD13相邻地设置的HFET12a及SBD13a。HFET12a具有与HFET12类似的结构，具有源电极5a、漏电极6a、和栅电极7a。SBD13a具有与SBD13类似的结构，具有阳电极8a和阴电极9a。
阳电极8a设在氮化物半导体层4之上，与氮化物半导体层4形成肖特基接合。此外，阳电极8a经由漏电极/阳电极焊盘17a与漏电极HFET12a的漏电极6a电连接。
阴电极9a设在氮化物半导体层4之上，与氮化物半导体层4形成欧姆接合。
另外，与上述第1实施方式的第1变形例同样，如图11所示，也可以在阳电极8a的一部分与氮化物半导体层4之间夹装由p型的AlZGa1-ZN（0≤Z≤1）构成的p型阳电极层32a。
如图12所示，框架电极5A将HFET12及SBD13的外周包围，并且将HFET12a及SBD13a的外周包围。此外，框架电极5A经由源电极焊盘16a与HFET12a的源电极5a电连接。
在漏电极/阳电极焊盘17a上连接着漏电极6a的一端及阳电极8a的一端。在阴电极焊盘19a上连接阴电极9a的一端。
元件分离绝缘层11d由图11及图12可知，设在从漏电极6a与阳电极8a之间的氮化物半导体层4的表面到氮化物半导体层3的中途为止。该元件分离绝缘层11d设在包括漏电极/阳电极焊盘17a的区域中。由此，能够防止SBD13a的逆向漏电流。
元件分离绝缘层11e由图11及图12可知，设在源电极5a、源电极焊盘16a及框架电极5A、与阴电极9a及阴电极焊盘19之间的从氮化物半导体层4的表面到氮化物半导体层3的中途为止。
通过使用本实施方式的氮化物半导体元件，能够构成图13所示的正激变换器电路。该正激变换器电路由HFET12、与HFET12串联连接的SBD13、电容器14a及14b、斩波线圈15、变压器24、与变压器24的一次侧连接的HFET12a、与变压器24的二次侧连接的SBD25、电容器14c、SBD13a、电容器14d、电阻26构成。图13中用虚线包围的部分是能够由本实施方式的氮化物半导体元件构成的部分。
如上述那样，在本实施方式中，除了第1实施方式的结构以外，还具备串联连接的HFET12a及SBD13a。此外，与导电性基板1电连接的框架电极5A设置为，除了HFET12及SBD13的外周以外，还将HFET12a及SBD13a的外周包围。由此，能够尽量抑制HFET12及12a的开关噪声的发生，并且能够遮蔽来自外部的噪声的影响。因而，能够提供低损失且能够高频动作的正激变换器电路。
以上说明了一些实施方式，但这些实施方式只是作为例子提供的，并不意味着限定发明的范围。事实上，这里叙述的方法和系统可以通过各种各样的形态实施，而且，在不脱离本发明的主旨的范围内能够进行各种省略、替代及变更。权利要求书和其等价物涵盖这些本发明的主旨及技术范围内的形式或变更。

Claims (18)

1.一种氮化物半导体元件，具备：
导电性基板；
第1氮化物半导体层，直接或经由缓冲层设在上述导电性基板的上表面上，并且由无掺杂的氮化物半导体构成；
第2氮化物半导体层，设在上述第1氮化物半导体层之上，并且由具有比上述第1氮化物半导体层大的带隙的无掺杂或n型的氮化物半导体构成；
第1异质结场效应晶体管，具有：第1源电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；第1漏电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；和第1栅电极，设在上述第1源电极与上述第1漏电极之间，并且控制在上述第1氮化物半导体层与上述第2氮化物半导体层的界面处产生的二维电子气体的浓度；
第1肖特基势垒二极管，具有：第1阳电极，设在上述第2氮化物半导体层之上，并与上述第2氮化物半导体层形成肖特基接合，并且与上述第1漏电极电连接；和第1阴电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；
框架电极，与上述第1源电极及上述导电性基板电连接，并且设置在上述第2氮化物半导体层上，将上述第1源电极、上述第1漏电极、上述第1栅电极、上述第1阳电极及上述第1阴电极包围，
第1元件分离绝缘层，在上述第1漏电极和上述框架电极之间以及上述第1阳电极和上述框架电极之间从上述第2氮化物半导体层的表面到上述第1氮化物半导体层的中途地设置，将上述第1漏电极和上述框架电极绝缘并将上述第1阳电极和上述框架电极绝缘；以及
第2元件分离绝缘层，在上述第1源电极和上述第1阴电极之间以及上述第1阴电极和上述框架电极之间从上述第2氮化物半导体层的表面到上述第1氮化物半导体层的中途地设置，将上述第1源电极和上述第1阴电极绝缘并将上述第1阴电极和上述框架电极绝缘。
2.如权利要求1所述的氮化物半导体元件，
上述第1栅电极设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成肖特基接合。
3.如权利要求1所述的氮化物半导体元件，
上述缓冲层是将氮化物半导体的薄层交替地层叠的多层构造。
4.如权利要求1所述的氮化物半导体元件，
上述第1源电极和上述第1漏电极沿着规定的方向交替地设置多个，并且上述第1源电极的一端与源电极焊盘连接，上述第1漏电极的一端与漏电极/阳电极焊盘连接；
上述第1阳电极和上述第1阴电极沿着规定的方向交替地设置多个，并且上述第1阳电极的一端与上述漏电极/阳电极焊盘连接，上述第1阴电极的一端与阴电极焊盘连接。
5.如权利要求1所述的氮化物半导体元件，
具备设在上述导电性基板的下表面上的背面电极；
上述背面电极与上述导电性基板形成欧姆接合，并且与封装框架连接；
上述框架电极与上述封装框架连接。
6.如权利要求1所述的氮化物半导体元件，
在上述第1栅电极与上述第2氮化物半导体层之间，夹装有由p型的AlZGa1-ZN构成的p型栅极层，其中0≤Z≤1。
7.如权利要求1所述的氮化物半导体元件，
在上述第1阳电极的一部分与上述第2氮化物半导体层之间，夹装有由p型的AlZGa1-ZN构成的p型阳电极层，0≤Z≤1。
8.如权利要求1所述的氮化物半导体元件，
上述框架电极与上述第1漏电极之间的距离比上述框架电极与上述第1阴电极之间的距离长。
9.如权利要求1所述的氮化物半导体元件，
相互对置的上述框架电极及上述第1阴电极的边缘部的形状被加工为，在上述框架电极及上述第1阴电极之间形成锯齿状的间隙。
10.如权利要求1所述的氮化物半导体元件，
上述第1源电极和上述第1漏电极沿着规定的方向交替地设有多个，并且上述第1源电极的一端直接或经由设在与设有上述第1源电极的层不同的层中的源极布线而与源电极焊盘连接，上述第1漏电极的一端直接或经由设在与设有上述第1漏电极的层不同的层中的漏极布线而与漏电极/阳电极焊盘连接；
上述第1阳电极和上述第1阴电极沿着规定的方向交替地设有多个，并且上述第1阳电极的一端直接或经由设在与设有上述第1阳电极的层不同的层中的阳极布线而与上述漏电极/阳电极焊盘连接，上述第1阴电极的一端直接或经由设在与设有上述第1阴电极的层不同的层中的阴极布线而与阴电极焊盘连接；
上述漏电极/阳电极焊盘、上述源电极焊盘、及上述阴电极焊盘配置在上述框架电极的相同的边侧。
11.如权利要求1所述的氮化物半导体元件，
具备第2异质结场效应晶体管；
上述框架电极将上述第2异质结场效应晶体管的外周包围，并且与上述第2异质结场效应晶体管的第2源电极电连接。
12.如权利要求11所述的氮化物半导体元件，
上述第2异质结场效应晶体管具有：
上述第2源电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；
第2漏电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；以及
第2栅电极，设在上述第2源电极与上述第2漏电极之间，并且控制在上述第1氮化物半导体层与上述第2氮化物半导体层的界面处产生的二维电子气体的浓度。
13.如权利要求12所述的氮化物半导体元件，
上述第2栅电极设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成肖特基接合。
14.如权利要求12所述的氮化物半导体元件，
在上述第2栅电极与上述第2氮化物半导体层之间，夹装有由p型的AlZGa1-ZN构成的p型栅极层，其中0≤Z≤1。
15.如权利要求1所述的氮化物半导体元件，具备：
第2异质结场效应晶体管；以及
第2肖特基势垒二极管，具有与上述第2异质结场效应晶体管的第2漏电极电连接的第2阳电极；
上述框架电极将上述第2异质结场效应晶体管及上述第2肖特基势垒二极管的外周包围，并且与上述第2异质结场效应晶体管的第2源电极电连接。
16.如权利要求15所述的氮化物半导体元件，
上述第2异质结场效应晶体管具有：
上述第2源电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；
上述第2漏电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合；以及
第2栅电极，设在上述第2源电极与上述第2漏电极之间，并且控制在上述第1氮化物半导体层与上述第2氮化物半导体层的界面处产生的二维电子气体的浓度。
17.如权利要求15所述的氮化物半导体元件，
上述第2肖特基势垒二极管具有：
上述第2阳电极，设在上述第2氮化物半导体层之上，并与上述第2氮化物半导体层形成肖特基接合，并且与上述第2漏电极电连接；以及
第2阴电极，设在上述第2氮化物半导体层之上，并且与上述第2氮化物半导体层形成欧姆接合。
18.如权利要求15所述的氮化物半导体元件，
在上述第2阳电极的一部分与上述第2氮化物半导体层之间，夹装有由p型的AlZGa1-ZN构成的p型阳电极层，0≤Z≤1。
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