CN1029274C - 具有平面构图表面的多片组件和集成电路衬底 - Google Patents

具有平面构图表面的多片组件和集成电路衬底 Download PDF

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Publication number
CN1029274C
CN1029274C CN92101596A CN92101596A CN1029274C CN 1029274 C CN1029274 C CN 1029274C CN 92101596 A CN92101596 A CN 92101596A CN 92101596 A CN92101596 A CN 92101596A CN 1029274 C CN1029274 C CN 1029274C
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CN
China
Prior art keywords
conductor
pattern
substrate
layer
conductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN92101596A
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English (en)
Chinese (zh)
Other versions
CN1070287A (zh
Inventor
杰伊·马丁·凯什
安德鲁·弗兰克·伯奈特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing Co
Original Assignee
Boeing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Boeing Co filed Critical Boeing Co
Publication of CN1070287A publication Critical patent/CN1070287A/zh
Application granted granted Critical
Publication of CN1029274C publication Critical patent/CN1029274C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H10W20/01—
    • H10W70/095—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/467—Adding a circuit layer by thin film methods
    • H10W20/062—
    • H10W70/05—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0041—Etching of the substrate by chemical or physical means by plasma etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/16—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation by cathodic sputtering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
CN92101596A 1991-02-11 1992-02-11 具有平面构图表面的多片组件和集成电路衬底 Expired - Fee Related CN1029274C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/654,880 US5187119A (en) 1991-02-11 1991-02-11 Multichip module and integrated circuit substrates having planarized patterned surfaces
US654,880 1996-05-29

Publications (2)

Publication Number Publication Date
CN1070287A CN1070287A (zh) 1993-03-24
CN1029274C true CN1029274C (zh) 1995-07-05

Family

ID=24626612

Family Applications (1)

Application Number Title Priority Date Filing Date
CN92101596A Expired - Fee Related CN1029274C (zh) 1991-02-11 1992-02-11 具有平面构图表面的多片组件和集成电路衬底

Country Status (8)

Country Link
US (1) US5187119A (enExample)
EP (1) EP0571547A1 (enExample)
JP (1) JPH06505833A (enExample)
KR (1) KR930703699A (enExample)
CN (1) CN1029274C (enExample)
CA (1) CA2101426A1 (enExample)
TW (1) TW226052B (enExample)
WO (1) WO1992014261A1 (enExample)

Cited By (1)

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CN1327292C (zh) * 1998-10-30 2007-07-18 国际商业机器公司 制作自对准部件的方法

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US5384281A (en) * 1992-12-29 1995-01-24 International Business Machines Corporation Non-conformal and oxidizable etch stops for submicron features
US5397741A (en) * 1993-03-29 1995-03-14 International Business Machines Corporation Process for metallized vias in polyimide
JP2947054B2 (ja) * 1994-03-04 1999-09-13 ヤマハ株式会社 配線形成法
US5494854A (en) * 1994-08-17 1996-02-27 Texas Instruments Incorporated Enhancement in throughput and planarity during CMP using a dielectric stack containing HDP-SiO2 films
KR0171069B1 (ko) * 1994-10-27 1999-03-30 문정환 반도체 장치의 접촉부 형성방법
US5851899A (en) * 1996-08-08 1998-12-22 Siemens Aktiengesellschaft Gapfill and planarization process for shallow trench isolation
JPH10163319A (ja) * 1996-11-29 1998-06-19 Hitachi Ltd 半導体集積回路装置の製造方法
US6127721A (en) * 1997-09-30 2000-10-03 Siemens Aktiengesellschaft Soft passivation layer in semiconductor fabrication
US6706623B1 (en) * 1997-12-10 2004-03-16 Texas Instruments Incorporated Method and system for avoiding plasma etch damage
US6093656A (en) * 1998-02-26 2000-07-25 Vlsi Technology, Inc. Method of minimizing dishing during chemical mechanical polishing of semiconductor metals for making a semiconductor device
TW407342B (en) * 1998-06-17 2000-10-01 United Microelectronics Corp Planarization method of damascene structure
US6225210B1 (en) * 1998-12-09 2001-05-01 Advanced Micro Devices, Inc. High density capping layers with improved adhesion to copper interconnects
JP3708732B2 (ja) * 1998-12-25 2005-10-19 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
US6803327B1 (en) 1999-04-05 2004-10-12 Taiwan Semiconductor Manufacturing Company Cost effective polymide process to solve passivation extrusion or damage and SOG delminates
US6358119B1 (en) 1999-06-21 2002-03-19 Taiwan Semiconductor Manufacturing Company Way to remove CU line damage after CU CMP
US6800548B2 (en) * 2002-01-02 2004-10-05 Intel Corporation Method to avoid via poisoning in dual damascene process
CN1176488C (zh) * 2002-03-15 2004-11-17 台湾积体电路制造股份有限公司 测试金属层间介电层强度的方法
JP2005191408A (ja) * 2003-12-26 2005-07-14 Matsushita Electric Ind Co Ltd コイル導電体とその製造方法およびこれを用いた電子部品
US7462317B2 (en) 2004-11-10 2008-12-09 Enpirion, Inc. Method of manufacturing an encapsulated package for a magnetic device
US7426780B2 (en) 2004-11-10 2008-09-23 Enpirion, Inc. Method of manufacturing a power module
JP4578254B2 (ja) * 2005-01-26 2010-11-10 京セラ株式会社 多層配線基板
US7688172B2 (en) * 2005-10-05 2010-03-30 Enpirion, Inc. Magnetic device having a conductive clip
US8631560B2 (en) * 2005-10-05 2014-01-21 Enpirion, Inc. Method of forming a magnetic device having a conductive clip
US8139362B2 (en) * 2005-10-05 2012-03-20 Enpirion, Inc. Power module with a magnetic device having a conductive clip
US8701272B2 (en) 2005-10-05 2014-04-22 Enpirion, Inc. Method of forming a power module with a magnetic device having a conductive clip
US20070138405A1 (en) * 2005-12-16 2007-06-21 3M Innovative Properties Company Corona etching
US8133529B2 (en) * 2007-09-10 2012-03-13 Enpirion, Inc. Method of forming a micromagnetic device
US8018315B2 (en) * 2007-09-10 2011-09-13 Enpirion, Inc. Power converter employing a micromagnetic device
US7920042B2 (en) 2007-09-10 2011-04-05 Enpirion, Inc. Micromagnetic device and method of forming the same
US7955868B2 (en) * 2007-09-10 2011-06-07 Enpirion, Inc. Method of forming a micromagnetic device
US7952459B2 (en) * 2007-09-10 2011-05-31 Enpirion, Inc. Micromagnetic device and method of forming the same
US8541991B2 (en) 2008-04-16 2013-09-24 Enpirion, Inc. Power converter with controller operable in selected modes of operation
US8686698B2 (en) * 2008-04-16 2014-04-01 Enpirion, Inc. Power converter with controller operable in selected modes of operation
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US9246390B2 (en) * 2008-04-16 2016-01-26 Enpirion, Inc. Power converter with controller operable in selected modes of operation
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US8153473B2 (en) * 2008-10-02 2012-04-10 Empirion, Inc. Module having a stacked passive element and method of forming the same
US9054086B2 (en) * 2008-10-02 2015-06-09 Enpirion, Inc. Module having a stacked passive element and method of forming the same
US8266793B2 (en) * 2008-10-02 2012-09-18 Enpirion, Inc. Module having a stacked magnetic device and semiconductor device and method of forming the same
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Also Published As

Publication number Publication date
KR930703699A (ko) 1993-11-30
CA2101426A1 (en) 1992-08-12
EP0571547A1 (en) 1993-12-01
EP0571547A4 (enExample) 1994-02-09
CN1070287A (zh) 1993-03-24
JPH06505833A (ja) 1994-06-30
US5187119A (en) 1993-02-16
TW226052B (enExample) 1994-07-01
WO1992014261A1 (en) 1992-08-20

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