CN102593046B - 制造半导体器件封装件的方法 - Google Patents

制造半导体器件封装件的方法 Download PDF

Info

Publication number
CN102593046B
CN102593046B CN201110463335.3A CN201110463335A CN102593046B CN 102593046 B CN102593046 B CN 102593046B CN 201110463335 A CN201110463335 A CN 201110463335A CN 102593046 B CN102593046 B CN 102593046B
Authority
CN
China
Prior art keywords
layer
semiconductor device
patterning
metal layer
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201110463335.3A
Other languages
English (en)
Chinese (zh)
Other versions
CN102593046A (zh
Inventor
P·A·麦康内李
A·V·高达
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of CN102593046A publication Critical patent/CN102593046A/zh
Application granted granted Critical
Publication of CN102593046B publication Critical patent/CN102593046B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/013Manufacture or treatment of die-attach connectors
    • H10W72/01331Manufacture or treatment of die-attach connectors using blanket deposition
    • H10W72/01333Manufacture or treatment of die-attach connectors using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/013Manufacture or treatment of die-attach connectors
    • H10W72/01331Manufacture or treatment of die-attach connectors using blanket deposition
    • H10W72/01336Manufacture or treatment of die-attach connectors using blanket deposition in solid form, e.g. by using a powder or by laminating a foil
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07337Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07337Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H10W72/07338Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy hardening the adhesive by curing, e.g. thermosetting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/353Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/853On the same surface
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/926Multiple bond pads having different sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9413Dispositions of bond pads on encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/944Dispositions of multiple bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/142Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
CN201110463335.3A 2010-12-22 2011-12-22 制造半导体器件封装件的方法 Active CN102593046B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/975,466 2010-12-22
US12/975,466 US8114712B1 (en) 2010-12-22 2010-12-22 Method for fabricating a semiconductor device package
US12/975466 2010-12-22

Publications (2)

Publication Number Publication Date
CN102593046A CN102593046A (zh) 2012-07-18
CN102593046B true CN102593046B (zh) 2015-08-26

Family

ID=45218549

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110463335.3A Active CN102593046B (zh) 2010-12-22 2011-12-22 制造半导体器件封装件的方法

Country Status (6)

Country Link
US (2) US8114712B1 (enExample)
EP (1) EP2469591B1 (enExample)
JP (1) JP5873323B2 (enExample)
CN (1) CN102593046B (enExample)
BR (1) BRPI1105202A2 (enExample)
CA (1) CA2762470C (enExample)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9117813B2 (en) * 2012-06-15 2015-08-25 General Electric Company Integrated circuit package and method of making same
US8941208B2 (en) * 2012-07-30 2015-01-27 General Electric Company Reliable surface mount integrated power module
US9299630B2 (en) * 2012-07-30 2016-03-29 General Electric Company Diffusion barrier for surface mount modules
US8872338B2 (en) * 2012-11-13 2014-10-28 Freescale Semiconductor, Inc. Trace routing within a semiconductor package substrate
US9449944B2 (en) 2012-12-21 2016-09-20 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing same
JP5624699B1 (ja) * 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
US9595651B2 (en) * 2012-12-21 2017-03-14 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing same
JP5624698B1 (ja) * 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
US9425122B2 (en) 2012-12-21 2016-08-23 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing the same
US9041226B2 (en) * 2013-03-13 2015-05-26 Infineon Technologies Ag Chip arrangement and a method of manufacturing a chip arrangement
US9209151B2 (en) 2013-09-26 2015-12-08 General Electric Company Embedded semiconductor device package and method of manufacturing thereof
US9806051B2 (en) 2014-03-04 2017-10-31 General Electric Company Ultra-thin embedded semiconductor device package and method of manufacturing thereof
JP6457206B2 (ja) * 2014-06-19 2019-01-23 株式会社ジェイデバイス 半導体パッケージ及びその製造方法
US9613843B2 (en) * 2014-10-13 2017-04-04 General Electric Company Power overlay structure having wirebonds and method of manufacturing same
US9666516B2 (en) * 2014-12-01 2017-05-30 General Electric Company Electronic packages and methods of making and using the same
US10141251B2 (en) * 2014-12-23 2018-11-27 General Electric Company Electronic packages with pre-defined via patterns and methods of making and using the same
JP2016171199A (ja) * 2015-03-12 2016-09-23 イビデン株式会社 発光素子搭載基板
WO2017003820A1 (en) * 2015-06-30 2017-01-05 3M Innovative Properties Company Patterned overcoat layer
US10217691B2 (en) * 2015-08-17 2019-02-26 Nlight, Inc. Heat spreader with optimized coefficient of thermal expansion and/or heat transfer
JP6862087B2 (ja) * 2015-12-11 2021-04-21 株式会社アムコー・テクノロジー・ジャパン 配線基板、配線基板を有する半導体パッケージ、およびその製造方法
JP2017126688A (ja) * 2016-01-15 2017-07-20 株式会社ジェイデバイス 半導体パッケージの製造方法及び半導体パッケージ
US10333493B2 (en) 2016-08-25 2019-06-25 General Electric Company Embedded RF filter package structure and method of manufacturing thereof
US9966371B1 (en) 2016-11-04 2018-05-08 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
US10312194B2 (en) 2016-11-04 2019-06-04 General Electric Company Stacked electronics package and method of manufacturing thereof
US9966361B1 (en) 2016-11-04 2018-05-08 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
US10700035B2 (en) 2016-11-04 2020-06-30 General Electric Company Stacked electronics package and method of manufacturing thereof
JP6863574B2 (ja) * 2017-02-22 2021-04-21 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
EP3413342A1 (de) 2017-06-08 2018-12-12 Dyconex AG Elektronische baugruppe und verfahren zur herstellung einer solchen
US10522423B2 (en) 2017-08-30 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect structure for fin-like field effect transistor
US10497648B2 (en) 2018-04-03 2019-12-03 General Electric Company Embedded electronics package with multi-thickness interconnect structure and method of making same
US11398445B2 (en) * 2020-05-29 2022-07-26 General Electric Company Mechanical punched via formation in electronics package and electronics package formed thereby
CN113161306B (zh) * 2021-04-15 2024-02-13 浙江集迈科微电子有限公司 芯片的高效散热结构及其制备工艺

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4933743A (en) * 1989-03-11 1990-06-12 Fairchild Semiconductor Corporation High performance interconnect system for an integrated circuit
CN1352804A (zh) * 1999-05-18 2002-06-05 阿梅拉西亚国际技术公司 高密度电子封装及其制造方法

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4764485A (en) 1987-01-05 1988-08-16 General Electric Company Method for producing via holes in polymer dielectrics
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5637922A (en) 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
US5906310A (en) 1994-11-10 1999-05-25 Vlt Corporation Packaging electrical circuits
US5841193A (en) * 1996-05-20 1998-11-24 Epic Technologies, Inc. Single chip modules, repairable multichip modules, and methods of fabrication thereof
JP3577421B2 (ja) * 1999-01-25 2004-10-13 新光電気工業株式会社 半導体装置用パッケージ
US6306680B1 (en) 1999-02-22 2001-10-23 General Electric Company Power overlay chip scale packages for discrete power devices
US6452117B2 (en) * 1999-08-26 2002-09-17 International Business Machines Corporation Method for filling high aspect ratio via holes in electronic substrates and the resulting holes
US6242282B1 (en) 1999-10-04 2001-06-05 General Electric Company Circuit chip package and fabrication method
US6232151B1 (en) 1999-11-01 2001-05-15 General Electric Company Power electronic module packaging
JP3582645B2 (ja) * 2000-05-16 2004-10-27 日立エーアイシー株式会社 立体形配線板の製造方法
JP3818124B2 (ja) * 2001-10-25 2006-09-06 凸版印刷株式会社 半導体集積回路装置およびその製造方法
JP4183500B2 (ja) * 2002-12-20 2008-11-19 三洋電機株式会社 回路装置およびその製造方法
KR100499006B1 (ko) * 2002-12-30 2005-07-01 삼성전기주식회사 도금 인입선이 없는 패키지 기판의 제조 방법
US7164197B2 (en) * 2003-06-19 2007-01-16 3M Innovative Properties Company Dielectric composite material
TWI236113B (en) * 2003-08-28 2005-07-11 Advanced Semiconductor Eng Semiconductor chip package and method for making the same
US7335608B2 (en) * 2004-09-22 2008-02-26 Intel Corporation Materials, structures and methods for microelectronic packaging
US7262444B2 (en) 2005-08-17 2007-08-28 General Electric Company Power semiconductor packaging method and structure
US7518236B2 (en) 2005-10-26 2009-04-14 General Electric Company Power circuit package and fabrication method
US20070202655A1 (en) * 2005-12-08 2007-08-30 Intel Corporation Method of providing a via opening in a dielectric film of a thin film capacitor
KR100722625B1 (ko) * 2005-12-12 2007-05-28 삼성전기주식회사 미소 홀랜드를 갖는 비아홀 및 그 형성 방법
TWI292684B (en) * 2006-02-09 2008-01-11 Phoenix Prec Technology Corp Method for fabricating circuit board with conductive structure
JP4840769B2 (ja) * 2006-07-04 2011-12-21 セイコーインスツル株式会社 半導体パッケージの製造方法
SG139594A1 (en) * 2006-08-04 2008-02-29 Micron Technology Inc Microelectronic devices and methods for manufacturing microelectronic devices
TWI352406B (en) * 2006-11-16 2011-11-11 Nan Ya Printed Circuit Board Corp Embedded chip package with improved heat dissipati
US7629892B1 (en) * 2006-12-12 2009-12-08 Demott Charles E Restraining device and method of use
US20080190748A1 (en) 2007-02-13 2008-08-14 Stephen Daley Arthur Power overlay structure for mems devices and method for making power overlay structure for mems devices
US7626249B2 (en) 2008-01-10 2009-12-01 Fairchild Semiconductor Corporation Flex clip connector for semiconductor device
US20090212420A1 (en) * 2008-02-22 2009-08-27 Harry Hedler integrated circuit device and method for fabricating same
US8358000B2 (en) 2009-03-13 2013-01-22 General Electric Company Double side cooled power module with power overlay

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4933743A (en) * 1989-03-11 1990-06-12 Fairchild Semiconductor Corporation High performance interconnect system for an integrated circuit
CN1352804A (zh) * 1999-05-18 2002-06-05 阿梅拉西亚国际技术公司 高密度电子封装及其制造方法

Also Published As

Publication number Publication date
EP2469591A3 (en) 2018-01-31
US8114712B1 (en) 2012-02-14
CA2762470C (en) 2019-01-15
EP2469591A2 (en) 2012-06-27
CN102593046A (zh) 2012-07-18
US8334593B2 (en) 2012-12-18
BRPI1105202A2 (pt) 2013-04-09
JP2012134500A (ja) 2012-07-12
JP5873323B2 (ja) 2016-03-01
US20120161325A1 (en) 2012-06-28
CA2762470A1 (en) 2012-06-22
EP2469591B1 (en) 2021-01-27

Similar Documents

Publication Publication Date Title
CN102593046B (zh) 制造半导体器件封装件的方法
CN107622989B (zh) 半导体封装装置及其制造方法
CN101572239B (zh) 半导体模组
US20220375833A1 (en) Substrate structures and methods of manufacture
CN101290930B (zh) 包含半导体芯片叠层的半导体器件及其制造方法
TW201631722A (zh) 功率轉換電路的封裝模組及其製造方法
TW200302529A (en) Flip chip type semiconductor device and method of manufacturing the same
JP6868455B2 (ja) 電子部品パッケージおよびその製造方法
CN101295683A (zh) 改善散热与接地屏蔽功能的半导体装置封装结构及其方法
EP3198640A1 (en) Substrate structures and methods of manufacture
TW202107578A (zh) 具散熱功能的晶片封裝模組及其製造方法
US20210143103A1 (en) Power module and method for manufacturing power module
US11895780B2 (en) Manufacturing method of package structure
US7163841B2 (en) Method of manufacturing circuit device
WO2018137280A1 (zh) 芯片封装器件及封装方法
US20200068721A1 (en) Package structure and manufacturing method thereof
CN114334854A (zh) 芯片及其制造方法、电子设备
CN102376677B (zh) 半导体封装结构及半导体封装结构的制作方法
CN110649002A (zh) 一种集成天线的扇出型封装结构及其制造方法
TW200843063A (en) Structure of semiconductor chip and package structure having semiconductor chip embedded therein
TWI816267B (zh) 內埋式封裝結構
JP2016046430A (ja) 回路基板、および電子装置
US20240266237A1 (en) A semiconductor transistor package having electrical contact layers and a method for fabricating the same
US20250358936A1 (en) Circuit board with embedded elements and method for fabricating the same
CN121191993A (zh) 功率器件嵌埋结构及其制作方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant