CA2762470C - Method for fabricating a semiconductor device package - Google Patents

Method for fabricating a semiconductor device package Download PDF

Info

Publication number
CA2762470C
CA2762470C CA2762470A CA2762470A CA2762470C CA 2762470 C CA2762470 C CA 2762470C CA 2762470 A CA2762470 A CA 2762470A CA 2762470 A CA2762470 A CA 2762470A CA 2762470 C CA2762470 C CA 2762470C
Authority
CA
Canada
Prior art keywords
metal layer
semiconductor device
patterned
layer
vias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA2762470A
Other languages
English (en)
French (fr)
Other versions
CA2762470A1 (en
Inventor
Paul Alan Mcconnelee
Arun Virupaksha Gowda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of CA2762470A1 publication Critical patent/CA2762470A1/en
Application granted granted Critical
Publication of CA2762470C publication Critical patent/CA2762470C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H10W70/093
    • H10W70/095
    • H10W90/00
    • H10W70/60
    • H10W72/01333
    • H10W72/01336
    • H10W72/073
    • H10W72/07337
    • H10W72/07338
    • H10W72/354
    • H10W72/853
    • H10W72/874
    • H10W72/926
    • H10W72/9413
    • H10W72/944
    • H10W74/142
    • H10W90/734

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
CA2762470A 2010-12-22 2011-12-15 Method for fabricating a semiconductor device package Expired - Fee Related CA2762470C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/975,466 US8114712B1 (en) 2010-12-22 2010-12-22 Method for fabricating a semiconductor device package
US12/975,466 2010-12-22

Publications (2)

Publication Number Publication Date
CA2762470A1 CA2762470A1 (en) 2012-06-22
CA2762470C true CA2762470C (en) 2019-01-15

Family

ID=45218549

Family Applications (1)

Application Number Title Priority Date Filing Date
CA2762470A Expired - Fee Related CA2762470C (en) 2010-12-22 2011-12-15 Method for fabricating a semiconductor device package

Country Status (6)

Country Link
US (2) US8114712B1 (enExample)
EP (1) EP2469591B1 (enExample)
JP (1) JP5873323B2 (enExample)
CN (1) CN102593046B (enExample)
BR (1) BRPI1105202A2 (enExample)
CA (1) CA2762470C (enExample)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9117813B2 (en) 2012-06-15 2015-08-25 General Electric Company Integrated circuit package and method of making same
US8941208B2 (en) * 2012-07-30 2015-01-27 General Electric Company Reliable surface mount integrated power module
US9299630B2 (en) * 2012-07-30 2016-03-29 General Electric Company Diffusion barrier for surface mount modules
US8872338B2 (en) * 2012-11-13 2014-10-28 Freescale Semiconductor, Inc. Trace routing within a semiconductor package substrate
US9825209B2 (en) 2012-12-21 2017-11-21 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing the same
JP5624696B1 (ja) * 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
WO2014097643A1 (ja) * 2012-12-21 2014-06-26 パナソニック株式会社 電子部品パッケージおよびその製造方法
WO2014097641A1 (ja) * 2012-12-21 2014-06-26 パナソニック株式会社 電子部品パッケージおよびその製造方法
US20150206819A1 (en) * 2012-12-21 2015-07-23 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing the same
US9041226B2 (en) * 2013-03-13 2015-05-26 Infineon Technologies Ag Chip arrangement and a method of manufacturing a chip arrangement
US9209151B2 (en) 2013-09-26 2015-12-08 General Electric Company Embedded semiconductor device package and method of manufacturing thereof
US9806051B2 (en) * 2014-03-04 2017-10-31 General Electric Company Ultra-thin embedded semiconductor device package and method of manufacturing thereof
JP6457206B2 (ja) * 2014-06-19 2019-01-23 株式会社ジェイデバイス 半導体パッケージ及びその製造方法
US9613843B2 (en) 2014-10-13 2017-04-04 General Electric Company Power overlay structure having wirebonds and method of manufacturing same
US9666516B2 (en) * 2014-12-01 2017-05-30 General Electric Company Electronic packages and methods of making and using the same
US10141251B2 (en) * 2014-12-23 2018-11-27 General Electric Company Electronic packages with pre-defined via patterns and methods of making and using the same
JP2016171199A (ja) * 2015-03-12 2016-09-23 イビデン株式会社 発光素子搭載基板
CN107850958B (zh) * 2015-06-30 2021-08-31 3M创新有限公司 图案化外覆层
CN108028240B (zh) * 2015-08-17 2020-06-09 恩耐公司 具有优化的热膨胀和/或热传递系数的热扩散器
JP6862087B2 (ja) * 2015-12-11 2021-04-21 株式会社アムコー・テクノロジー・ジャパン 配線基板、配線基板を有する半導体パッケージ、およびその製造方法
JP2017126688A (ja) * 2016-01-15 2017-07-20 株式会社ジェイデバイス 半導体パッケージの製造方法及び半導体パッケージ
US10333493B2 (en) 2016-08-25 2019-06-25 General Electric Company Embedded RF filter package structure and method of manufacturing thereof
US10700035B2 (en) 2016-11-04 2020-06-30 General Electric Company Stacked electronics package and method of manufacturing thereof
US9966361B1 (en) 2016-11-04 2018-05-08 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
US10312194B2 (en) 2016-11-04 2019-06-04 General Electric Company Stacked electronics package and method of manufacturing thereof
US9966371B1 (en) 2016-11-04 2018-05-08 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
JP6863574B2 (ja) * 2017-02-22 2021-04-21 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
EP3413342A1 (de) 2017-06-08 2018-12-12 Dyconex AG Elektronische baugruppe und verfahren zur herstellung einer solchen
US10522423B2 (en) 2017-08-30 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect structure for fin-like field effect transistor
US10497648B2 (en) 2018-04-03 2019-12-03 General Electric Company Embedded electronics package with multi-thickness interconnect structure and method of making same
US11398445B2 (en) * 2020-05-29 2022-07-26 General Electric Company Mechanical punched via formation in electronics package and electronics package formed thereby
CN113161306B (zh) * 2021-04-15 2024-02-13 浙江集迈科微电子有限公司 芯片的高效散热结构及其制备工艺

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4764485A (en) 1987-01-05 1988-08-16 General Electric Company Method for producing via holes in polymer dielectrics
US4933743A (en) * 1989-03-11 1990-06-12 Fairchild Semiconductor Corporation High performance interconnect system for an integrated circuit
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5637922A (en) 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
US5906310A (en) 1994-11-10 1999-05-25 Vlt Corporation Packaging electrical circuits
US5841193A (en) * 1996-05-20 1998-11-24 Epic Technologies, Inc. Single chip modules, repairable multichip modules, and methods of fabrication thereof
JP3577421B2 (ja) * 1999-01-25 2004-10-13 新光電気工業株式会社 半導体装置用パッケージ
US6306680B1 (en) 1999-02-22 2001-10-23 General Electric Company Power overlay chip scale packages for discrete power devices
US6376769B1 (en) * 1999-05-18 2002-04-23 Amerasia International Technology, Inc. High-density electronic package, and method for making same
US6452117B2 (en) * 1999-08-26 2002-09-17 International Business Machines Corporation Method for filling high aspect ratio via holes in electronic substrates and the resulting holes
US6242282B1 (en) 1999-10-04 2001-06-05 General Electric Company Circuit chip package and fabrication method
US6232151B1 (en) 1999-11-01 2001-05-15 General Electric Company Power electronic module packaging
JP3582645B2 (ja) * 2000-05-16 2004-10-27 日立エーアイシー株式会社 立体形配線板の製造方法
JP3818124B2 (ja) * 2001-10-25 2006-09-06 凸版印刷株式会社 半導体集積回路装置およびその製造方法
JP4183500B2 (ja) * 2002-12-20 2008-11-19 三洋電機株式会社 回路装置およびその製造方法
KR100499006B1 (ko) * 2002-12-30 2005-07-01 삼성전기주식회사 도금 인입선이 없는 패키지 기판의 제조 방법
US7164197B2 (en) * 2003-06-19 2007-01-16 3M Innovative Properties Company Dielectric composite material
TWI236113B (en) * 2003-08-28 2005-07-11 Advanced Semiconductor Eng Semiconductor chip package and method for making the same
US7335608B2 (en) * 2004-09-22 2008-02-26 Intel Corporation Materials, structures and methods for microelectronic packaging
US7262444B2 (en) 2005-08-17 2007-08-28 General Electric Company Power semiconductor packaging method and structure
US7518236B2 (en) 2005-10-26 2009-04-14 General Electric Company Power circuit package and fabrication method
US20070202655A1 (en) * 2005-12-08 2007-08-30 Intel Corporation Method of providing a via opening in a dielectric film of a thin film capacitor
KR100722625B1 (ko) * 2005-12-12 2007-05-28 삼성전기주식회사 미소 홀랜드를 갖는 비아홀 및 그 형성 방법
TWI292684B (en) * 2006-02-09 2008-01-11 Phoenix Prec Technology Corp Method for fabricating circuit board with conductive structure
JP4840769B2 (ja) * 2006-07-04 2011-12-21 セイコーインスツル株式会社 半導体パッケージの製造方法
SG139594A1 (en) * 2006-08-04 2008-02-29 Micron Technology Inc Microelectronic devices and methods for manufacturing microelectronic devices
TWI352406B (en) * 2006-11-16 2011-11-11 Nan Ya Printed Circuit Board Corp Embedded chip package with improved heat dissipati
US7629892B1 (en) * 2006-12-12 2009-12-08 Demott Charles E Restraining device and method of use
US20080190748A1 (en) 2007-02-13 2008-08-14 Stephen Daley Arthur Power overlay structure for mems devices and method for making power overlay structure for mems devices
US7626249B2 (en) 2008-01-10 2009-12-01 Fairchild Semiconductor Corporation Flex clip connector for semiconductor device
US20090212420A1 (en) * 2008-02-22 2009-08-27 Harry Hedler integrated circuit device and method for fabricating same
US8358000B2 (en) 2009-03-13 2013-01-22 General Electric Company Double side cooled power module with power overlay

Also Published As

Publication number Publication date
CA2762470A1 (en) 2012-06-22
US8114712B1 (en) 2012-02-14
US20120161325A1 (en) 2012-06-28
CN102593046A (zh) 2012-07-18
EP2469591A3 (en) 2018-01-31
CN102593046B (zh) 2015-08-26
US8334593B2 (en) 2012-12-18
JP2012134500A (ja) 2012-07-12
JP5873323B2 (ja) 2016-03-01
EP2469591B1 (en) 2021-01-27
EP2469591A2 (en) 2012-06-27
BRPI1105202A2 (pt) 2013-04-09

Similar Documents

Publication Publication Date Title
CA2762470C (en) Method for fabricating a semiconductor device package
US8507320B2 (en) Electronic device including a carrier and a semiconductor chip attached to the carrier and manufacturing thereof
US10497648B2 (en) Embedded electronics package with multi-thickness interconnect structure and method of making same
US8637341B2 (en) Semiconductor module
US7799614B2 (en) Method of fabricating a power electronic device
US9059083B2 (en) Semiconductor device
CN101290930B (zh) 包含半导体芯片叠层的半导体器件及其制造方法
CN110998834B (zh) 包括集成电磁干扰屏蔽件的电子封装件及其制造方法
US20090261468A1 (en) Semiconductor module
US20220230930A1 (en) Package with encapsulated electronic component between laminate and thermally conductive carrier
CN105103272A (zh) 半导体装置的制造方法
JP2017220663A (ja) 電子部品パッケージおよびその製造方法
US9966371B1 (en) Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
WO2018084955A1 (en) Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
WO2018084980A1 (en) Stacked electronics package and method of manufacturing thereof
WO2018137280A1 (zh) 芯片封装器件及封装方法
US7163841B2 (en) Method of manufacturing circuit device
US20180240779A1 (en) Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
CN106206540A (zh) 半导体装置及其制造方法
TW200843063A (en) Structure of semiconductor chip and package structure having semiconductor chip embedded therein
TW202318929A (zh) 內埋式封裝結構
US20240266237A1 (en) A semiconductor transistor package having electrical contact layers and a method for fabricating the same
WO2018085030A1 (en) Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
HK1218991B (en) An interconnect system comprising an interconnect having a plurality of metal cores at least partially surrounded by a dielectric layer

Legal Events

Date Code Title Description
EEER Examination request

Effective date: 20161014

MKLA Lapsed

Effective date: 20201215