CN102396057A - 用于通过温度碰撞过程而在半导体部件和半导体模块之间产生耐高温和耐温度变化的连接的方法 - Google Patents

用于通过温度碰撞过程而在半导体部件和半导体模块之间产生耐高温和耐温度变化的连接的方法 Download PDF

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CN102396057A
CN102396057A CN2010800164425A CN201080016442A CN102396057A CN 102396057 A CN102396057 A CN 102396057A CN 2010800164425 A CN2010800164425 A CN 2010800164425A CN 201080016442 A CN201080016442 A CN 201080016442A CN 102396057 A CN102396057 A CN 102396057A
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temperature
sintering
semiconductor
connection
semiconductor module
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CN102396057B (zh
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M.科克
R.艾希尔
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Danfoss Silicon Power GmbH
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Danfoss Silicon Power GmbH
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Abstract

本发明涉及一种用于通过温度碰撞过程产生在半导体部件和半导体模块之间耐高温和温度变化的连接的方法，其中金属粉末悬浮体应用到半导体模块区域以连接半导体模块；悬浮体层被干燥，排出挥发成分气体并且产生多孔层；多孔层是预密封的而没有完全烧结发生穿过悬浮体层；并且，为了实现半导体模块从基底，进一步的半导体或者相互连接装置的组到连接配合件的坚固的，电地和热地传导连接，该连接是通过温度增加没有压缩产生的烧结的连接并且由干燥的金属粉末悬浮体构成，该金属粉末悬浮体已经经历与连接配合件在预压缩步骤中的第一移动安全接触和利用温度烧结在0压下固化。

Description

用于通过温度碰撞过程而在半导体部件和半导体模块之间产生耐高温和耐温度变化的连接的方法
技术领域
本发明涉及一种用于通过温度碰撞过程而在半导体部件和半导体模块之间产生耐高温和耐温度变化的连接的方法。
背景技术
对于电力电子设备需求的增长，特别是对于电动车(混合动力车)，明显地增加了待制造的电力半导体部件的件数。为了跟上成本的要求，与电动车生产相关的成本当然必须保持尽可能低，制造方法需要进行持续地优化。
例如描述在申请人的DE 10 2006 033 073 B3中的制造烧结连接器的昂贵的步骤包括，为了实现正确的烧结(已知为结尾烧结)需要超过30MPa的压力，其必须通过专用装置提供几秒到几分钟的一段时间。
此外，从提到的文档中可知在干燥和加热步骤之后以及仅施加小压力之后，耐锯金属粉末悬浮体以“适合被锯”的方式预固结。
此外，从已知的焊接过程，可知工件的合适的加热能够使设置在工件上的焊接材料实现融化，形成牢固的焊接连接。
发明内容
本发明现在以新的改进为基础，通过选择合适的金属粉末悬浮体并且将其驱动，或者通过施加例如5MPa的局部低压，或者通过加热到例如250℃，烧结过程可以被初始化为下述程度，即，进行可传递的固定，使得通过进一步的制造步骤实现处理。
为了这个目的，在若干制造步骤中，具有金属接触面的电工技术部件通过结合(bonding)而被连接到基底材料的银或者金的表面，而不需要使用临界的烧结压力。
这样可执行根据本发明的方法，而不使用昂贵的压制装置，使得周期率能够明显提高，还可制作具有烧结连接的部件组。
在这种连接中，电路板可用作基底材料，例如有机导体板(PCB，陶瓷导体板，DCB，金属芯导体板，IMS或者导体引导框架，引导框架，陶瓷混合电路板等)。电工技术部件可采用未封装的半导体部件或者封装的模制半导体部件。电接触连接、SMD部件和类似部件还可以通过根据本发明的结合方法进行连接。
在已知为低温烧结的过程中，具有20至30MPa的几乎等压的压制并且同时加热待结合的部件到大概220℃可产生连接，与该过程相关的差异在于，目前的连接可采用快速循环的方式以明显更低的压力实现，也就是，通过加热的方式持续几秒的时间段。
同时，可以避免现有技术的下列劣势：
先前使用的高压和温度增加了结合配合件的材料中所引起的静态和动态应力，例如关联于不封装的硅半导体部件和陶瓷导体板，其可以导致这些非常易碎的材料形成裂纹。
那些材料的天然脆性甚至会由于典型的工作方法而变得更差。在锯断的过程中，硅芯片遭受初始的微裂纹(公知为碎裂)。此外，陶瓷导体板通过激光切割之后的断开而局部地受到预先损坏。
采用经典的低温烧结，在执行随后的高压处理之前，导致破坏的损坏裂纹增加不会被观察到。对于一些非平面的部件，由于部件的脆性和具有难度的三维设计(例如，SMD电阻和SMD电容)，低温烧结直接导致破坏，因此在这些施加区域中进行烧结至今是不可能的。
因此，根据本发明的方法带来优于现有技术的三个优势。
■通过仅足够用于将所述部件保持到电路板上的期望点的小力而对电子部件进行放置和固定。
■固定和烧结是两个分离的过程。固定主要通过粘合所述银粘接层或者结合配合件的表面而进行。
■随后的烧结在没有压制的情况下发生在温度处于170℃到300℃之间的加热炉中。这意味着，如果需要的话，其能够被简单地插入用于部件的生产线中。
■为了使烧结质量得以支持，对于特定金属悬浮层，大气可通过惰性气体或者活性气体被替换。例如，氮气是适合的惰性气体，饱和有甲酸的惰性气体或组成气体可用作活性气体。
固定期间的粘合可以类似于形成雪球时雪花晶体的粘合。粗糙表面和压缩的可能性导致在基本上不减小层厚度的情况下进行粘结。
附图说明
本发明的进一步的优势和特征根据附图可以从优选实施例的随后说明呈现，图示为：
图1为设置在预涂覆和干燥的金属悬浮体层上的喷镀金属的部件；
图2为借助低压进行结合的图1的元件；
图3为在确保有利的完整的容积(volume)烧结的无压温度步骤之后的图2的元件；
图4为如图1中的预先施加和干燥的金属悬浮体层上的上侧和下侧涂覆金属的部件；
图5为借助低压结合的图4的元件，以及接触片-分离地布置-在元件上；
图6为图5的元件，所述接触片也使用低压结合到其它元件；以及
图7为在确保所有结合接触位置的有利的完整的容积烧结的无压温度步骤之后的图6的元件。
具体实施方式
步骤1：
基底材料或者芯片后侧，或者，在一项优选实施例中，待结合的两个表面设置有包含银粒子并且具有均匀的层厚度的层，优选通过丝网印刷。这种设置有选择地发生在部件将被放置的点中或者当施加在芯片上时，在整个表面上。可以使用其它施加技术，特别是喷雾技术。但是，浸涂入或者旋涂于(spin-on)银粒子溶液将导致层的厚度发生改变的问题。
步骤2：
在该施加过程之后，层被干燥并且因此释放易挥发的有机成分。高至150℃的温度会支持该过程从而确保高循环率。以这种方式产生的干燥的层具有多孔性和高粗糙度。
如果省略该步骤并且进行“湿式施加”，恐怕在溶液悬浮体中仍然移动的银粒子在排气过程中仍然进行运动，并且将在该层中形成用于排放该溶液的通道。这些通道是非常不期望的，因为它们会造成微裂纹。因此，该层的完全干燥是该方法的必需部分，无论金属悬浮体是否设置有热激活组分。但是，优选地，选择下述成分，其中150℃的干燥温度不会释放额外的发热能量，但是这种释放仅在明显高于例如250℃的温度时被激活。
根据金属粉末悬浮体的选定成分，并且为了加速该过程，可将干燥温度选择为高温从而正好避免未成熟的烧结。
步骤3：
通过元件拾取和放置装置，电工技术部件被放到预定位置，施加到所述部件的一面或两面银层通过施加过程中使用的力被压入并且彼此粘结。这是一个短的放置过程，0.1到3秒，需要的力仅仅是大到使粗糙表面变形和彼此粘结。借助于粘结的保持不需必须满足后面使用的需要，但是仅需要足够的强度以在生产期间在运输过程中阻止所述部件移动。
通过上面借助雪花实例所述的，银或金表面中粗糙的干燥的金属层的二维粘合提供简单的粘合。采用同样的方式，当雪球形成时，雪球粘合到混凝土墙或者简单结合到雪花其本身。
如果在这一阶段，在室温下粘结进行得不充分，那么温度升高到例如150℃能够改善所述粘合。与“雪花”实例相关地，这将对应于使雪花减弱。
步骤4：
在第四步骤，固定的部件最终暴露于随后的加热过程，而不经受进一步的压力，在该过程中，银原子扩散进入结合配合件的接触表面，反之亦然，使得形成期望的耐高温和耐温度变化的连接，当使用于电动车时，其会持续许多年。
图1示出了通过通常方法预先喷镀金属的部件，所述部件设置在金属悬浮体层上方，该金属悬浮体层预先涂覆近似50微米和在低于140℃的温度下干燥几分钟(优选1到3分钟)。保证更好的支撑以及避免灰尘的层的合适的预压缩可以在固定部件之前形成在所述层上。
此外，在变形方案中，其中一个结合配合件可以设置有以相同或类似的方式形成的层，并且仅为了使用该层作为预先涂覆金属的目的，也被烧结。如果这一层包括仅干燥的但是没有烧结的糊/悬浮体，那么也足够。
然后，元件(见图2)通过轻压彼此固定。在这一连接中，可以施加1到10MPa的压力，优选2到6MPa，进一步优选低于5MPa持续1秒。
图3示出在无压加热步骤之后的图2的元件，处于通常超过230℃的粘糊依赖温度，该加热步骤提供优选的完整容积(volume)烧结。活性过程气体能够加速烧结。
图4至7示出代表许多可能元件的接触片如何通过轻压以同样的方式固定到部件组。
采用一种非常有利的方式，在接触片上的轻压以可传递的方式将其固定到其它元件，并且最终，采用确保所有固定接触位置(也例如许多接触片)的优选完整的容积烧结的无压加热步骤，期望的耐高温和耐温度变化的连接得以实现，其将持续许多年(图7)。
在一项优选实施例中，根据本发明的用于借助温度碰撞过程在半导体部件和半导体模块之间产生耐高温和耐温度变化的连接的方法，其中待连接的单独的半导体模块的区域涂覆有金属粉末悬浮体，悬浮体层随着排出挥发性的成分并且产生多孔的层而被干燥，多孔的层随后被预压而不需要完全烧结渗透穿过整个悬浮体层，凭此，为了获得将半导体模块牢固的、电和热连接到下述组中的连接配合件：基底，其它半导体或者电路板，该连接是借助温度增加而在没有压力的情况下产生的烧结连接，该烧结连接包括干燥的金属粉末悬浮体，该金属粉末悬浮体在预压步骤中，接收与连接配合件作用的第一可传递的接触并且在温度烧结过程中被无压地固定，能够被延展，连接配合件的不止一侧设置有金属悬浮体涂层。
此外，为了改善烧结质量，空气(在封闭腔内)可以在加热过程中使用惰性或者活性气体而加料。惰性气体的主要成分可以优选是氮气。活性气体可以采用主要成分为组成气体的气体。

Claims (5)

1.用于借助温度碰撞过程而在半导体部件和半导体模块之间产生耐高温和耐温度变化的连接的方法，其中
待连接的单独的半导体模块的区域被涂覆有金属粉末悬浮体，
所述悬浮体层通过排放挥发性组分、产生多孔层而被干燥，
所述多孔层随后受到预压缩而不需要穿过整个悬浮体层的完整烧结，
其特征在于，
为了实现将半导体元件牢固的、电和热传导连接在下述组的连接配合件上：基底，其它半导体或者电路板上，所述连接为借助温度增加而在没有压力的情况下产生的烧结连接，所述烧结连接包括干燥的金属粉末悬浮体，其已经在预压缩步骤中实现与所述连接配合件进行的第一可传递接触并且在温度烧结过程中无压地被固定。
2.根据权利要求1所述的方法，其特征在于，连接配合件的不止一侧设置有金属悬浮体涂层。
3.根据权利要求1或2所述的方法，其特征在于，为了改善烧结质量，所述空气使用惰性或活性气体加料。
4.根据前述任一权利要求所述的方法，其特征在于，为了改善烧结质量，所述温度烧结发生在氮气中。
5.根据前述任一权利要求所述的方法，其特征在于，为了改善烧结质量，所述干燥发生在组成气体中。
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Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011114558A1 (de) * 2011-09-30 2013-04-04 Osram Opto Semiconductors Gmbh Bauelement und Verfahren zum Herstellen dieses Bauelementes
DE102012207652A1 (de) 2012-05-08 2013-11-14 Robert Bosch Gmbh Zweistufiges Verfahren zum Fügen eines Halbleiters auf ein Substrat mit Verbindungsmaterial auf Silberbasis
US8835299B2 (en) 2012-08-29 2014-09-16 Infineon Technologies Ag Pre-sintered semiconductor die structure
JP5664625B2 (ja) * 2012-10-09 2015-02-04 三菱マテリアル株式会社 半導体装置、セラミックス回路基板及び半導体装置の製造方法
JP2015115481A (ja) * 2013-12-12 2015-06-22 株式会社東芝 半導体部品および半導体部品の製造方法
DE102014104272A1 (de) 2014-03-26 2015-10-01 Heraeus Deutschland GmbH & Co. KG Träger und Clip jeweils für ein Halbleiterelement, Verfahren zur Herstellung, Verwendung und Sinterpaste
DE102014206606A1 (de) * 2014-04-04 2015-10-08 Siemens Aktiengesellschaft Verfahren zum Montieren eines elektrischen Bauelements auf einem Substrat
DE102014114096A1 (de) 2014-09-29 2016-03-31 Danfoss Silicon Power Gmbh Sinterwerkzeug für den Unterstempel einer Sintervorrichtung
DE102014114097B4 (de) 2014-09-29 2017-06-01 Danfoss Silicon Power Gmbh Sinterwerkzeug und Verfahren zum Sintern einer elektronischen Baugruppe
DE102014114093B4 (de) * 2014-09-29 2017-03-23 Danfoss Silicon Power Gmbh Verfahren zum Niedertemperatur-Drucksintern
DE102015210061A1 (de) 2015-06-01 2016-12-01 Siemens Aktiengesellschaft Verfahren zur elektrischen Kontaktierung eines Bauteils und Bauteilmodul
DE102016108000B3 (de) 2016-04-29 2016-12-15 Danfoss Silicon Power Gmbh Verfahren zum stoffschlüssigen Verbinden einer ersten Komponente eines Leistungshalbleitermoduls mit einer zweiten Komponente eines Leistungshalbleitermoduls
TWI655693B (zh) * 2017-02-28 2019-04-01 日商京瓷股份有限公司 半導體裝置之製造方法
DE102017113153B4 (de) * 2017-06-14 2022-06-15 Infineon Technologies Ag Elektronisches Gerät mit Chip mit gesintertem Oberflächenmaterial
JP7143156B2 (ja) 2018-04-27 2022-09-28 日東電工株式会社 半導体装置製造方法
EP3787012A4 (en) * 2018-04-27 2022-05-11 Nitto Denko Corporation MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
FR3121278A1 (fr) * 2021-03-26 2022-09-30 Safran Electronics & Defense Procédé pour assembler un composant électronique à un substrat par pressage
DE102021116053A1 (de) 2021-06-22 2022-12-22 Danfoss Silicon Power Gmbh Elektrischer Leiter, elektronische Baugruppe mit elektrischem Leiter und Verfahren zum Herstellen einer elektronischen Baugruppe mit einem elektrischen Leiter
DE102021121625B3 (de) * 2021-08-20 2022-11-03 Danfoss Silicon Power Gmbh Verfahren zum Herstellen einer wenigstens ein aktives elektronisches Bauelement und wenigstens ein passives Bauelement aufweisenden elektronischen Baugruppe
EP4224521A1 (de) 2022-02-07 2023-08-09 Siemens Aktiengesellschaft Halbleiteranordnung mit einem halbleiterelement mit einem durch thermisches spritzen hergestellten kontaktierungselement sowie ein verfahren zur herstellung desselben

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6077178A (ja) * 1983-09-30 1985-05-01 株式会社東芝 窒化物セラミックス接合体およびその製造方法
IN168174B (zh) 1986-04-22 1991-02-16 Siemens Ag
DE3777995D1 (de) * 1986-12-22 1992-05-07 Siemens Ag Verfahren zur befestigung von elektronischen bauelementen auf einem substrat, folie zur durchfuehrung des verfahrens und verfahren zur herstellung der folie.
JPS6412404A (en) * 1987-07-06 1989-01-17 Hitachi Ltd Conductor material
US4902648A (en) * 1988-01-05 1990-02-20 Agency Of Industrial Science And Technology Process for producing a thermoelectric module
US6069380A (en) * 1997-07-25 2000-05-30 Regents Of The University Of Minnesota Single-electron floating-gate MOS memory
US6930451B2 (en) * 2001-01-16 2005-08-16 Samsung Sdi Co., Ltd. Plasma display and manufacturing method thereof
US7296727B2 (en) * 2001-06-27 2007-11-20 Matsushita Electric Industrial Co., Ltd. Apparatus and method for mounting electronic components
EP1280196A1 (de) * 2001-07-18 2003-01-29 Abb Research Ltd. Verfahren zum Befestigen von elektronischen Bauelementen auf Substraten
WO2005038912A1 (en) * 2002-10-11 2005-04-28 Chien-Min Sung Carbonaceous heat spreader and associated methods
US7247588B2 (en) * 2002-11-22 2007-07-24 Saint-Gobain Ceramics & Plastics, Inc. Zirconia toughened alumina ESD safe ceramic composition, component, and methods for making same
US20050127134A1 (en) 2003-09-15 2005-06-16 Guo-Quan Lu Nano-metal composite made by deposition from colloidal suspensions
JP2007527102A (ja) 2004-02-18 2007-09-20 バージニア テック インテレクチュアル プロパティーズ インコーポレーテッド 相互接続用のナノスケールの金属ペーストおよび使用方法
JP2006202586A (ja) * 2005-01-20 2006-08-03 Nissan Motor Co Ltd 接合方法及び接合構造
JP4770533B2 (ja) 2005-05-16 2011-09-14 富士電機株式会社 半導体装置の製造方法および半導体装置
JP4638382B2 (ja) * 2006-06-05 2011-02-23 田中貴金属工業株式会社 接合方法
JP2008010703A (ja) * 2006-06-30 2008-01-17 Fuji Electric Holdings Co Ltd 半導体装置の部品間接合方法
DE102006033073B3 (de) * 2006-07-14 2008-02-14 Danfoss Silicon Power Gmbh Verfahren zur Schaffung einer hitze- und stoßfesten Verbindung des Baugruppen-Halbleiters und zur Drucksinterung vorbereiteter Halbleiterbaustein
JP2008153470A (ja) 2006-12-18 2008-07-03 Renesas Technology Corp 半導体装置および半導体装置の製造方法
WO2008081758A1 (ja) 2006-12-28 2008-07-10 Tokuyama Corporation 窒化アルミニウムメタライズド基板の製造方法
JP4872663B2 (ja) * 2006-12-28 2012-02-08 株式会社日立製作所 接合用材料及び接合方法
JP5151150B2 (ja) * 2006-12-28 2013-02-27 株式会社日立製作所 導電性焼結層形成用組成物、これを用いた導電性被膜形成法および接合法
JP4873160B2 (ja) * 2007-02-08 2012-02-08 トヨタ自動車株式会社 接合方法
US8555491B2 (en) 2007-07-19 2013-10-15 Alpha Metals, Inc. Methods of attaching a die to a substrate
DE102007035788A1 (de) 2007-07-31 2009-02-05 Robert Bosch Gmbh Waferfügeverfahren, Waferverbund sowie Chip

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JP2012517704A (ja) 2012-08-02
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EP2396814A2 (de) 2011-12-21
WO2010091660A3 (de) 2011-06-03
US20120037688A1 (en) 2012-02-16
WO2010091660A2 (de) 2010-08-19
CN102396057B (zh) 2014-04-02
DE102009008926A1 (de) 2010-08-19

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