CN102115329A - 介电陶瓷组合物及具有该组合物的多层陶瓷电容器 - Google Patents

介电陶瓷组合物及具有该组合物的多层陶瓷电容器 Download PDF

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CN102115329A
CN102115329A CN2010105353637A CN201010535363A CN102115329A CN 102115329 A CN102115329 A CN 102115329A CN 2010105353637 A CN2010105353637 A CN 2010105353637A CN 201010535363 A CN201010535363 A CN 201010535363A CN 102115329 A CN102115329 A CN 102115329A
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annexing ingredient
metal
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washing powder
100mol
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姜晟馨
许康宪
权祥勋
赵俊烨
金相赫
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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Priority to CN201510405411.3A priority Critical patent/CN105152648B/zh
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Abstract

本发明提供了一种介电陶瓷组合物及利用该组合物的多层陶瓷电容器。该介电陶瓷组合物包括由组合物式Bam(Ti1-xZrx)O3表示的基粉及第一附加组分至第五附加组分,其中,0.995≤m≤1.010且0<x≤0.10。具有该介电陶瓷附加组分的多层陶瓷电容器具有高介电常数及优异的高温可靠性。

Description

介电陶瓷组合物及具有该组合物的多层陶瓷电容器
本申请要求与2009年12月31日提交到韩国知识产权局的第10-2009-0135118号韩国专利申请的优先权,该申请的公开通过引用包含于此。
技术领域
本发明涉及一种介电陶瓷组合物及具有该介电陶瓷组合物的多层陶瓷电容器,更具体地讲,本发明涉及一种具有高介电常数和超高温可靠性的介电陶瓷组合物及具有该介电陶瓷组合物的多层陶瓷电容器。
背景技术
通常,例如电容器、感应器、压电装置、变阻器或电热调节器的利用陶瓷材料的陶瓷电子组件包括由陶瓷材料制成的陶瓷烧结体、设置在陶瓷烧结体内部的内电极和设置在陶瓷烧结体的表面上以与内电极接触的外电极。
作为各种陶瓷电子组件的一种组件,多层陶瓷电容器包括多层堆叠的介电层、彼此面对的内电极和电连接到内电极的外电极,其中,每对内电极具有设置在其间的一层介电层。
由于多层陶瓷电容器紧凑、电容高且易于安装,所以它们被广泛地用在诸如膝上型计算机、PDA移动电话等的移动通讯装置中。
通常通过利用制片方法(sheet method)、印刷方法等堆叠内电极的料浆和外电极的料浆并共烧该堆叠的结构来制造多层陶瓷电容器。
在还原气氛中烧制(firing)传统多层陶瓷电容器中使用的介电材料时,介电材料被还原从而具有半导体性质。出于该原因,内电极的材料使用诸如Pb的贵金属,诸如Pb的贵金属在介电材料的烧结温度不熔化且即使在高氧分压条件下烧制的情况下也不会被氧化,在该条件下介电材料不会成为半导体。
然而,由于诸如Pb的贵金属昂贵,所以难以实现多层陶瓷电容器的低制造成本。因此,主要将相对便宜的诸如Ni或Ni合金的贱金属用作内电极的材料。然而,在将贱金属用作内电极的导电材料的情况下,当在环境温度下执行烧制时,内电极被氧化。因此,介电层和内电极的共烧需要在还原气氛中执行。
然而,在还原气氛中执行烧制的情况下,介电层被还原从而降低了绝缘电阻(IR)。因此,一直提议使用抗还原的介电材料。另外,对具有小的电容温度系数(TCC)且在约-150ppm/℃至+150ppm/℃范围内可控的温度补偿的介电陶瓷组合物的需求增加。
发明内容
本发明的方面提供了一种具有高介电常数和优异的高温可靠性的介电陶瓷组合物及具有该介电陶瓷组合物的多层陶瓷电容器。
根据本发明的一方面,提供了一种介电陶瓷组合物,该介电陶瓷组合物包括:基粉,由组合物式Bam(Ti1-xZrx)O3表示,其中,0.995≤m≤1.010且0<x≤0.10;第一附加组分,为包括Mg、Sr、Ba和Zr中的至少一种金属的氧化物或碳氧化物,第一附加组分中金属的含量在每100mol的基粉大约0.05mol至6.00mol范围内;第二附加组分,为包括Sc、Y、La、Ac、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb和Lu中的至少一种金属的氧化物,第二附加组分中金属的含量在每100mol的基粉大约0.20mol至3.00mol的范围内;第三附加组分,为包括Cr、Mo、W、Mn、Fe、Co和Ni中的至少一种金属的氧化物,第三附加组分中金属的含量在每100mol的基粉大约0.05mol至0.50mol的范围内;第四附加组分,为包括V、Nb和Ta中的至少一种金属的氧化物,第四附加组分中金属的含量在每100mol的基粉大约0.05mol至0.35mol的范围内;第五附加组分,为包括Si和Al中的至少一种的氧化物,第五附加组分中Si和Al的含量在每100mol的基粉大约0.50mol至4.00mol的范围内。
第一附加组分中的金属与第五附加组分中的Si和/或Al的含量比可以在大约0.75至1.50的范围内。
第三附加组分和第四附加组分中的金属的总含量可以是大约每100mol基粉为0.1mol至0.8mol。
第一附加组分至第五附加组分中的至少一种可以具有等于或大于2.0m2/g的比表面积。
第一附加组分和第五附加组分可以以化合物的形式添加。
根据本发明的另一方面,提供了一种多层陶瓷电容器,该多层陶瓷电容器包括陶瓷烧结体及第一外电极和第二外电极,陶瓷烧结体具有介电层及交替地堆叠在陶瓷烧结体中的第一内电极和第二内电极,第一外电极和第二外电极设置在陶瓷烧结体的两端并电连接到第一内电极和第二内电极,其中,介电层包含:基粉,由组合物式Bam(Ti1-xZrx)O3表示,其中,0.995≤m≤1.010且0<x≤0.10;第一附加组分,为包括Mg、Sr、Ba和Zr中的至少一种的氧化物或碳氧化物,第一附加组分中金属的含量在每100mol的基粉大约0.05mol至6.00mol的范围内;第二附加组分,为包括Sc、Y、La、Ac、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb和Lu中的至少一种金属的氧化物,第二附加组分中金属的含量在每100mol的基粉大约0.20mol至3.00mol的范围内;第三附加组分,为包括Cr、Mo、W、Mn、Fe、Co和Ni中至少一种金属的氧化物,第三附加组分中的金属的含量在每100mol的基粉大约0.05mol至0.50mol的范围内;第四附加组分,为包括V、Nb和Ta中的至少一种金属的氧化物,第四附加组分中金属的含量在每100mol的基粉大约0.05mol至0.35mol的范围内;第五附加组分,为包括Si和Al中至少一种的氧化物,第五附加组分中Si和Al的含量在每100mol的基粉大约0.50mol至4.00mol的范围内。
第一内电极和第二内电极可以包含Ni或Ni合金。
第一附加组分中的金属与第五附加组分中的Si和/或Al的含量比可以在大约0.75至1.50的范围内。
第三附加组分和第四附加组分中的金属的总含量可以是大约每100mol的基粉为0.1mol至0.8mol。
第一附加组分至第五附加组分中的至少一种可以具有等于或大于2.0m2/g的比表面积。
第一附加组分和第五附加组分可以以化合物的形式添加。
附图说明
通过下面结合附图的详细描述,本发明的上面和其他方面、特征和其他优点将被更清楚地理解,在附图中:
图1为示出根据本发明示例性实施例的多层陶瓷电容器的示意性透视图;
图2为示出图1的沿着线A-A`截取的多层陶瓷电容器的示意性剖视图。
具体实施方式
现在将参照附图详细地描述本发明的示例性实施例。
然而,本发明可以以多种不同的形式实施而不应解释为局限于这里提出的实施例。相反,提供这些实施例从而使本公开将是彻底和完整的,并将向本领域的技术人员充分地传达本发明的范围。应该考虑到,为了清晰起见会夸大附图中元件的形状和尺寸。在整个附图中,相同的标号将用来代表相同或相似的元件。
本发明的一方面提供了一种介电陶瓷组合物。具有介电陶瓷组合物的电子组件的示例包括电容器、感应器、压电装置、变阻器或电热调节器等。在下文中,作为这些电子组件的示例,将详细地描述多层陶瓷电容器。
图1为示出根据本发明示例性实施例的多层陶瓷电容器的示意性透视图。图2为示出图1的沿着线A-A`截取的多层陶瓷电容器的示意性剖视图。
参照图1和图2,根据本发明示例性实施例的多层陶瓷电容器100包括:具有介电层111的陶瓷烧结体110;第一内电极130a和第二内电极130b,交替地堆叠在陶瓷烧结体110中;第一外电极120a和第二外电极120b,形成在陶瓷烧结体110的两端,使得它们连接到交替地设置在陶瓷烧结体110内部的第一内电极130a和第二内电极130b。
陶瓷烧结体110的形状不被具体地限定,通常可以为长方体。也不具体地限定陶瓷烧结体110的尺寸,根据应用可以适当地确定陶瓷烧结体110的尺寸。例如,陶瓷烧结体110的尺寸可以为(0.6mm~5.6mm)×(0.3mm~5.0mm)×(0.3mm~1.9mm)。
介电层111的厚度可以根据多层陶瓷电容器100的期望电容的设计而改变。在本实施例中,介电层111被烧制之后的厚度可以为0.2μm或更大。由于非常薄的有源层具有少量存在于单层中的晶粒并且对可靠性有负面的影响,所以介电层111的厚度可以为0.2μm或更大。
第一内电极130a和第二内电极130b以它们各自的端部交替地暴露于陶瓷烧结体110的相对端部的表面的方式堆叠。第一外电极120a和第二外电极120b以电连接到交替布置的第一内电极130a和第二内电极130b的暴露端的方式形成在陶瓷烧结体110的两端。以该方式,电容器电路形成。
由于介电层111的材料具有抗还原特性,所以第一内电极130a和第二内电极130b中包含的导电材料可以为贱金属或贱金属合金,但不特别地局限于此。
用作导电材料的贱金属的示例可以为Ni,用作导电材料的贱金属合金的示例可以为Ni合金。Ni合金可以为Ni与至少一种选自于由Mn、Cr、Co和Al组成的组中的元素的合金。在Ni合金中,Ni的含量以重量计可以为95%或更高。
第一内电极130a和第二内电极130b的厚度可以根据应用来适当地确定。例如,第一内电极130a的厚度可以在0.1μm至5μm或0.1μm至2.5μm的范围内,第二内电极130b的厚度可以在0.1μm至5μm或0.1μm至2.5μm的范围内。
第一外电极120a和第二外电极120b中包含的导电材料可以为Ni、Cu或它们的合金,但不特别地局限于此。第一外电极120a和第二外电极120b的厚度可以根据应用适当地确定。例如,第一外电极120a和第二外电极120b的厚度可以在10μm至50μm的范围内。
陶瓷烧结体110中包括的介电层111可以包含根据本发明实施例的介电陶瓷组合物。
根据本发明示例性实施例的介电陶瓷组合物包括由Bam(Ti1-xZrx)O3表示的基粉(base powder)及第一附加组分至第五附加组分,其中,满足0.995≤m≤1.010,且0<x≤0.10。
根据该实施例的介电陶瓷组合物具有高介电常数和高温可靠性,同时具有在还原气氛中低温烧制的能力,由此可以使用Ni内电极。
在下文中,将详细地描述根据本发明示例性实施例的介电陶瓷组合物中含有的每种组分。
a)Bam(Ti1-xZrx)O3
在本发明的示例性实施例中,提供了一种包含由Bam(Ti1-xZrx)O3表示的基粉的介电陶瓷组合物,其中,满足0.995≤m≤1.010和0<x≤0.10。在上面的组合物式中,在m小于0.995的情况下,在还原气氛中的烧制工艺过程中易导致还原,由此介电陶瓷组合物会转变成半导体材料。在m超过1.010的情况下,烧制温度会升高。在该组合物式中,在x超过0.10的情况下,期望的温度特性不会得到满足。
b)第一附加组分
在本发明的示例性实施例中,提供了一种包括含有Mg、Sr、Ba和Zr中的至少一种金属的氧化物或碳氧化物来作为第一附加组分的介电陶瓷组合物。第一附加组分有助于介电陶瓷组合物的抗还原特性、晶粒生长控制和烧结稳定性。
第一附加组分中金属的含量是大约每100mol的基粉为0.05mol至6.00mol。在第一附加组分中金属的含量小于每100mol基粉0.05mol的情况下,在还原气氛中的烧制工艺过程中会易导致还原且晶粒生长的控制会困难。在第一附加组分中金属的含量超过每100mol基粉6.00mol的情况下,烧结温度会升高且会难以获得期望的介电常数值。
c)第二附加组分
在本发明的示例性实施例中,提供了一种包括含有Sc、Y、La、Ac、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb和Lu中的至少一种金属的氧化物来作为第二附加组分的介电陶瓷组合物。第二附加组分有助于在等于或高于居里温度Tc的温度下的电容变化的稳定性及高温加速寿命性能的改善,由此可以满足期望的温度特性。
第二附加组分中金属的含量是大约每100mol的基粉为0.2mol至3.0mol。在第二附加组分中金属的含量小于每100mol基粉0.2mol的情况下,高温加速寿命性能会劣化且电容温度系数(TCC)会不稳定。在第二附加组分中金属的含量超过每100mol的基粉3.0mol的情况下,烧结温度会增加且会难以获得期望的介电常数值。另外,因二级相变,可靠性会降低。
d)第三附加组分
在根据本发明的示例性实施例中,提供了一种包括含有Cr、Mo、W、Mn、Fe、Co和Ni中的至少一种金属的氧化物来作为第三附加组分的介电陶瓷组合物。第三附加组分有助于增加绝缘电阻IR且有助于改善高温加速寿命性能。
第三附加组分中金属的含量是大约每100mol的基粉为0.05mol至0.50mol。在第三附加组分中金属的含量小于每100mol基粉0.05mol的情况下,高温加速寿命性能会劣化且TCC会不稳定。在第三附加组分中金属的含量超过每100mol基粉0.50mol的情况下,电容×电阻(C×R)的值会减小且根据时间的电容变化会增加。
e)第四附加组分
在根据本发明的示例性实施例中,提供了一种包括含有V、Nb和Ta中的至少一种金属的氧化物来作为第四附加组分的介电陶瓷组合物。第四附加组分有助于在等于或高于居里温度Tc的温度下的电容变化的稳定性及高温加速寿命性能的改善。
第四附加组分中金属的含量是大约每100mol的基粉为0.05mol至0.35mol。在第四附加组分中金属的含量小于每100mol基粉0.05mol的情况下,高温加速寿命性能会劣化。在第四附加组分中金属的含量超过每100mol基粉0.35mol的情况下,C×R值会减小。
另外,第三附加组分和第四附加组分中金属的总含量可以是每100mol基粉为0.1mol至0.8mol。在第三附加组分和第四附加组分中金属的总含量小于每100mol基粉0.1mol的情况下,晶粒生长控制会困难且高温加速寿命性能会劣化。在第三附加组分和第四附加组分中金属的总含量超过每100mol基粉0.8mol的情况下,根据时间的电容变化会增加且C×R值会减小。
f)第五附加组分
在发明的示例性实施例中,提供了一种包括含有Si和Al中的至少一种的氧化物来作为第五附加组分的介电陶瓷组合物。第五附加组分通过与其他组分,尤其是第一附加组分或基粉反应而有助于烧结性能。
第五附加组分中Si和/或Al的含量是大约每100mol的基粉为0.5mol至4.0mol。在第五附加组分中Si和/或Al的含量小于每100mol基粉0.5mol的情况下,烧制温度会升高。在第五附加组分中Si和/或Al的含量超过每100mol基粉4.0mol的情况下,晶粒生长的控制会困难且期望的介电常数值会难以获得。
另外,第一附加组分中金属与第五附加组分中Si和/或Al的含量比可以在0.75至1.50的范围内。在第一附加组分中金属与第五附加组分中Si和/或Al的含量比小于0.75的情况下,烧结温度会降低,但高温加速寿命性能会劣化且烧结温度会变得不稳定。另外,在第一附加组分中金属与第五附加组分中Si和/或的含量比超过1.5的情况下,烧结温度会升高。
另外,可以以化合物的形式来添加第一附加组分和第五附加组分。在第一附加组分表示为MOa或MCOb(M为Mg、Sr、Ba和Zr中的至少一种),第五附加组分表示为NOc(N为Si或Al中的至少一种)的情况下,可以以诸如M-NOc或MOa-NOc的玻璃的形式来添加它们。这里,该化合物中的第一附加组分中金属与第五附加组分中Si和/或Al的含量比可以在0.75至1.50的范围内。
另外,在第一附加组分至第五附加组分与基粉一起混合的情况下,它们各自的比表面积可以等于或大于2.0m2/g。
在下文中,将更充分地描述本发明的发明示例和对比示例。提供这些示例有助于充分地理解本发明,且不应将本发明解释为局限于这里提出的示例。
[发明示例]
通过利用氧化锆球作为混合/分散媒介将材料粉体(基于下面的表1中描述的组合物和含量)与乙醇/甲苯、分散剂和粘合剂混合,然后执行球磨工艺二十小时来制备料浆。然后采用刮板法利用小的涂机将混合的料浆制成厚度为大约2.0μm的片以及厚度为大约10μm至13μm的片。
将Ni内电极印刷在大约2.0μm的片上,从而形成有源层。对于上覆盖层和下覆盖层,将大约10μm至13μm的片堆叠成具有二十五层的厚度。将这些片堆叠来形成条(bar)。利用切割机将压缩条切割成具有3216尺寸的芯片。使芯片成为可塑体,接下来,在还原气氛中在大约1100℃至1250℃的温度下烧制两小时,然后在大约1000℃的温度下进行热处理三小时以再氧化。将烧制的芯片放置二十四小时。然后按下面所描述的来测量芯片的特性。
表1是针对100mol的基粉。
表1
Figure BSA00000337788700081
Figure BSA00000337788700091
  Mo 0.05
[评价]
在1KHz和1V的条件下利用LCR测量仪测量芯片的介电损耗和室温电容C。选取十个样品,在施加50V的直流电六十秒之后测量芯片的室温绝缘电阻。在大约-55℃至125℃的范围内测量TCC。通过在125℃和1Vr=7.5V/μm的条件下执行高温IR电压升压测试来评价高温可靠性。下面的表2中列出了结果。
表2
Figure BSA00000337788700101
参照发明示例1至发明示例4,在第一附加组分中金属的含量小于每100mol基粉0.05mol的情况下,在还原气氛中的烧制工艺过程中易引起还原,且难以控制晶粒生长。在第一附加组分中金属的含量超过每100mol基粉6.00mol的情况下,烧制温度升高且得不到期望的介电常数。在第二附加组分中金属的含量小于每100mol基粉0.20mol的情况下,高温加速寿命性能劣化且TCC不稳定。在第二附加组分中金属的含量超过每100mol基粉3.00mol的情况下,烧结温度升高且不能获得期望的介电常数。在第三附加组分中金属的小于每100mol基粉0.05mol的情况下,高温加速寿命性能劣化且TCC不稳定。在第三附加组分中金属的含量超过每100mol基粉0.5mol的情况下,C×R值减小。在第四附加组分中金属的含量小于每100mol基粉0.05mol的情况下,高温加速寿命性能劣化。在第四附加组分中金属的含量超过每100mol基粉0.35mol的情况下,C×R值减小。在第五附加组分中Si和/或Al的含量小于每100mol基粉0.5mol的情况下,要在高于期望温度的温度下执行烧制工艺。在第五附加组分中Si和/或Al的含量超过每100mol基粉4.0mol的情况下,难以控制晶粒的生长。
如上面所阐述的,根据本发明的示例性实施例,介电陶瓷组合物具有高介电常数和高温可靠性,同时能够在还原气氛中以低温烧制,由此可以使用Ni内电极。
根据本发明的示例性实施例的介电陶瓷组合物可以应用到诸如电容器、感应器、压电装置、变阻器或电热调节器的电子组件。
虽然已结合示例性实施例示出并描述了本发明,对本领域技术人员明显的是,在不脱离由权利要求限定的本发明的精神和范围的情况下,可以做修改和改变。

Claims (11)

1.一种介电陶瓷组合物,所述介电陶瓷组合物包括:
基粉,由组合物式Bam(Ti1-xZrx)O3表示,其中,0.995≤m≤1.010且0<x≤0.10;
第一附加组分,为包括Mg、Sr、Ba和Zr中的至少一种金属的氧化物或碳氧化物,第一附加组分中金属的含量在每100mol的基粉0.05mol至6.00mol的范围内;
第二附加组分,为包括Sc、Y、La、Ac、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb和Lu中的至少一种金属的氧化物,第二附加组分中金属的含量在每100mol的基粉0.20mol至3.00mol的范围内;
第三附加组分,为包括Cr、Mo、W、Mn、Fe、Co和Ni中的至少一种金属的氧化物,第三附加组分中金属的含量在每100mol的基粉0.05mol至0.50mol的范围内;
第四附加组分,为包括V、Nb和Ta中的至少一种金属的氧化物,第四附加组分中金属的含量在每100mol的基粉0.05mol至0.35mol的范围内;
第五附加组分,为包括Si和Al中的至少一种的氧化物,第五附加组分中Si和/或Al的含量在每100mol的基粉0.50mol至4.00mol的范围内。
2.如权利要求1所述的介电陶瓷组合物,其中,第一附加组分中的金属与第五附加组分中的Si和/或Al的含量比在0.75至1.50的范围内。
3.如权利要求1所述的介电陶瓷组合物,其中,第三附加组分和第四附加组分中的金属的总含量是每100mol基粉为0.1mol至0.8mol。
4.如权利要求1所述的介电陶瓷组合物,其中,第一附加组分至第五附加组分中的至少一种具有等于或大于2.0m2/g的比表面积。
5.如权利要求1所述的介电陶瓷组合物,其中,第一附加组分和第五附加组分以化合物的形式添加。
6.一种多层陶瓷电容器,所述多层陶瓷电容器包括陶瓷烧结体及第一外电极和第二外电极,陶瓷烧结体具有介电层及交替地堆叠在陶瓷烧结体中的第一内电极和第二内电极,第一外电极和第二外电极设置在陶瓷烧结体的两端并电连接到第一内电极和第二内电极,其中,介电层包含:
基粉,由组分式Bam(Ti1-xZrx)O3表示,其中,0.995≤m≤1.010且0<x≤0.10;
第一附加组分,为包括Mg、Sr、Ba和Zr中的至少一种金属的氧化物或碳氧化物,第一附加组分中金属的含量在每100mol的基粉0.05mol至6.00mol的范围内;
第二附加组分,为包括Sc、Y、La、Ac、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb和Lu中的至少一种金属的氧化物,第二附加组分中金属的含量在每100mol的基粉0.20mol至3.00mol的范围内;
第三附加组分,为包括Cr、Mo、W、Mn、Fe、Co和Ni中的至少一种金属的氧化物,第三附加组分中金属的含量在每100mol的基粉0.05mol至0.50mol的范围内;
第四附加组分,为包括V、Nb和Ta中的至少一种金属的氧化物,第四附加组分中金属的含量在每100mol的基粉0.05mol至0.35mol的范围内;
第五附加组分,为包括Si和Al中的至少一种的氧化物,第五附加组分中Si和/或Al的含量在每100mol的基粉0.50mol至4.00mol的范围内。
7.如权利要求6所述的多层陶瓷电容器,其中,第一内电极和第二内电极包含Ni或Ni合金。
8.如权利要求6所述的多层陶瓷电容器,其中,第一附加组分中的金属与第五附加组分中的Si和/或Al的含量比在0.75至1.50的范围内。
9.如权利要求6所述的多层陶瓷电容器,其中,第三附加组分和第四附加组分中的金属的总含量是每100mol的基粉为0.1mol至0.8mol。
10.如权利要求6所述的多层陶瓷电容器,其中,第一附加组分至第五附加组分中的至少一种具有等于或大于2.0m2/g的比表面积。
11.如权利要求6所述的多层陶瓷电容器,其中,第一附加组分和第五附加组分以化合物的形式添加。
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CN103093959A (zh) * 2011-11-04 2013-05-08 三星电机株式会社 多层陶瓷电子元件的制造方法
CN104045339A (zh) * 2013-03-14 2014-09-17 三星电机株式会社 介电陶瓷组合物和含有该介电陶瓷组合物的多层陶瓷电容器
CN107082636A (zh) * 2013-03-14 2017-08-22 三星电机株式会社 介电陶瓷组合物和含有该介电陶瓷组合物的多层陶瓷电容器
CN104072126A (zh) * 2013-03-29 2014-10-01 三星电机株式会社 电介质陶瓷组合物及包括其的多层陶瓷电容器
CN111362694A (zh) * 2014-12-08 2020-07-03 三星电机株式会社 陶瓷介电组合物以及包含其的多层陶瓷电容器
CN112885603A (zh) * 2017-10-13 2021-06-01 三星电机株式会社 多层陶瓷电容器
CN112079634A (zh) * 2019-06-13 2020-12-15 三星电机株式会社 介电陶瓷组合物和包括其的多层陶瓷电容器
CN112079634B (zh) * 2019-06-13 2023-05-26 三星电机株式会社 介电陶瓷组合物和包括其的多层陶瓷电容器
US11735361B2 (en) 2019-06-13 2023-08-22 Samsung Electro-Mechanics Co., Ltd. Dielectric ceramic composition and multilayer ceramic capacitor comprising the same
CN112079635A (zh) * 2019-06-14 2020-12-15 三星电机株式会社 介电陶瓷组合物及包括其的多层陶瓷电容器
CN112079635B (zh) * 2019-06-14 2023-06-02 三星电机株式会社 介电陶瓷组合物及包括其的多层陶瓷电容器
US11776748B2 (en) 2019-06-14 2023-10-03 Samsung Electro-Mechanics Co., Ltd. Dielectric ceramic composition and multilayer ceramic capacitor comprising the same

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CN105152648A (zh) 2015-12-16
KR101113441B1 (ko) 2012-02-29
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US8164880B2 (en) 2012-04-24

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