CN101965636A - 使用光滑无聚集的铜种层进行凹入特征的无空隙填充 - Google Patents

使用光滑无聚集的铜种层进行凹入特征的无空隙填充 Download PDF

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Publication number
CN101965636A
CN101965636A CN2009801080320A CN200980108032A CN101965636A CN 101965636 A CN101965636 A CN 101965636A CN 2009801080320 A CN2009801080320 A CN 2009801080320A CN 200980108032 A CN200980108032 A CN 200980108032A CN 101965636 A CN101965636 A CN 101965636A
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China
Prior art keywords
metal
film
substrate
metallic copper
seed layer
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Pending
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CN2009801080320A
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Chinese (zh)
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铃木健二
五味淳
定免美保
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/043—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/052—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by treatments not introducing additional elements therein
    • H10W20/0526—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by treatments not introducing additional elements therein by thermal treatment thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/0425—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers comprising multiple stacked seed or nucleation layers

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Physical Vapour Deposition (AREA)
CN2009801080320A 2008-03-07 2009-03-05 使用光滑无聚集的铜种层进行凹入特征的无空隙填充 Pending CN101965636A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/044,191 2008-03-07
US12/044,191 US8247030B2 (en) 2008-03-07 2008-03-07 Void-free copper filling of recessed features using a smooth non-agglomerated copper seed layer
PCT/IB2009/050910 WO2009109934A1 (en) 2008-03-07 2009-03-05 Void-free copper filling of recessed features using a smooth non-agglomerated copper seed layer

Publications (1)

Publication Number Publication Date
CN101965636A true CN101965636A (zh) 2011-02-02

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2009801080320A Pending CN101965636A (zh) 2008-03-07 2009-03-05 使用光滑无聚集的铜种层进行凹入特征的无空隙填充

Country Status (6)

Country Link
US (1) US8247030B2 (https=)
JP (1) JP5702154B2 (https=)
KR (1) KR101553424B1 (https=)
CN (1) CN101965636A (https=)
TW (1) TWI545653B (https=)
WO (1) WO2009109934A1 (https=)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI550800B (zh) * 2013-11-11 2016-09-21 力成科技股份有限公司 具強固型晶背凸塊之矽穿孔結構
CN106575626A (zh) * 2014-08-27 2017-04-19 雅达公司 改进的硅通孔
CN110690166A (zh) * 2019-10-31 2020-01-14 上海华力集成电路制造有限公司 接触孔结构的形成方法及该接触孔结构
CN110752183A (zh) * 2019-10-31 2020-02-04 上海华力集成电路制造有限公司 接触孔结构的形成方法及该接触孔结构
CN111834331A (zh) * 2019-04-16 2020-10-27 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US12004342B2 (en) 2021-02-09 2024-06-04 Changxin Memory Technologies, Inc. Method for manufacturing semiconductor structure and semiconductor structure

Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US8076241B2 (en) * 2009-09-30 2011-12-13 Tokyo Electron Limited Methods for multi-step copper plating on a continuous ruthenium film in recessed features
US9257274B2 (en) 2010-04-15 2016-02-09 Lam Research Corporation Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
US8661664B2 (en) * 2010-07-19 2014-03-04 International Business Machines Corporation Techniques for forming narrow copper filled vias having improved conductivity
JP5392215B2 (ja) * 2010-09-28 2014-01-22 東京エレクトロン株式会社 成膜方法及び成膜装置
US9142508B2 (en) 2011-06-27 2015-09-22 Tessera, Inc. Single exposure in multi-damascene process
KR20130056014A (ko) * 2011-11-21 2013-05-29 삼성전자주식회사 듀얼 다마신 배선 구조체를 포함하는 반도체 소자
US8754531B2 (en) * 2012-03-14 2014-06-17 Nanya Technology Corp. Through-silicon via with a non-continuous dielectric layer
US8772158B2 (en) 2012-07-20 2014-07-08 Globalfoundries Inc. Multi-layer barrier layer stacks for interconnect structures
US9269615B2 (en) * 2012-07-20 2016-02-23 Globalfoundries Inc. Multi-layer barrier layer for interconnect structure
US20140134351A1 (en) * 2012-11-09 2014-05-15 Applied Materials, Inc. Method to deposit cvd ruthenium
JP6013901B2 (ja) * 2012-12-20 2016-10-25 東京エレクトロン株式会社 Ｃｕ配線の形成方法
US9558997B2 (en) * 2012-12-28 2017-01-31 Globalfoundries Inc. Integration of Ru wet etch and CMP for beol interconnects with Ru layer
US8859419B2 (en) 2013-02-01 2014-10-14 Globalfoundries Inc. Methods of forming copper-based nitride liner/passivation layers for conductive copper structures and the resulting device
KR20140104778A (ko) 2013-02-21 2014-08-29 삼성전자주식회사 관통전극을 갖는 반도체 소자의 제조방법
JP6257217B2 (ja) 2013-08-22 2018-01-10 東京エレクトロン株式会社 Ｃｕ配線構造の形成方法
TWI649803B (zh) * 2013-09-30 2019-02-01 蘭姆研究公司 具有電漿輔助式原子層沉積及電漿輔助式化學氣相沉積合成法之深寬比可變的特徵物之間隙填充
US9397040B2 (en) 2014-03-07 2016-07-19 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device comprising metal plug having substantially convex bottom surface
US9646854B2 (en) * 2014-03-28 2017-05-09 Intel Corporation Embedded circuit patterning feature selective electroless copper plating
US9595464B2 (en) * 2014-07-19 2017-03-14 Applied Materials, Inc. Apparatus and method for reducing substrate sliding in process chambers
US9349691B2 (en) 2014-07-24 2016-05-24 International Business Machines Corporation Semiconductor device with reduced via resistance
TWI567919B (zh) * 2014-08-29 2017-01-21 烏翠泰克股份有限公司 經改良之直通矽貫穿孔
KR102321209B1 (ko) * 2014-11-03 2021-11-02 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US9806252B2 (en) 2015-04-20 2017-10-31 Lam Research Corporation Dry plasma etch method to pattern MRAM stack
US9870899B2 (en) 2015-04-24 2018-01-16 Lam Research Corporation Cobalt etch back
WO2017009948A1 (ja) * 2015-07-14 2017-01-19 リサーチ コーオペレーション ファウンデーション オブ ヨンナム ユニバーシティ 原子層蒸着法によるルテニウム薄膜の形成方法
WO2017009947A1 (ja) * 2015-07-14 2017-01-19 リサーチ コーオペレーション ファウンデーション オブ ヨンナム ユニバーシティ 原子層蒸着法によるルテニウム薄膜の形成方法
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US10096487B2 (en) 2015-08-19 2018-10-09 Lam Research Corporation Atomic layer etching of tungsten and other metals
US9984858B2 (en) 2015-09-04 2018-05-29 Lam Research Corporation ALE smoothness: in and outside semiconductor industry
US10121655B2 (en) 2015-11-20 2018-11-06 Applied Materials, Inc. Lateral plasma/radical source
US10658487B2 (en) * 2015-12-09 2020-05-19 Intel Corporation Semiconductor devices having ruthenium phosphorus thin films
US10727073B2 (en) 2016-02-04 2020-07-28 Lam Research Corporation Atomic layer etching 3D structures: Si and SiGe and Ge smoothness on horizontal and vertical surfaces
US10229837B2 (en) 2016-02-04 2019-03-12 Lam Research Corporation Control of directionality in atomic layer etching
US9991128B2 (en) 2016-02-05 2018-06-05 Lam Research Corporation Atomic layer etching in continuous plasma
US10269566B2 (en) 2016-04-29 2019-04-23 Lam Research Corporation Etching substrates using ale and selective deposition
US9837312B1 (en) * 2016-07-22 2017-12-05 Lam Research Corporation Atomic layer etching for enhanced bottom-up feature fill
US10566212B2 (en) 2016-12-19 2020-02-18 Lam Research Corporation Designer atomic layer etching
US10103056B2 (en) * 2017-03-08 2018-10-16 Lam Research Corporation Methods for wet metal seed deposition for bottom up gapfill of features
US10892186B2 (en) 2017-10-14 2021-01-12 Applied Materials, Inc. Integration of ALD copper with high temperature PVD copper deposition for BEOL interconnect
WO2019190781A1 (en) 2018-03-30 2019-10-03 Lam Research Corporation Atomic layer etching and smoothing of refractory metals and other high surface binding energy materials
KR20240160679A (ko) 2019-05-01 2024-11-11 램 리써치 코포레이션 변조된 원자 층 증착
US12431349B2 (en) 2019-06-07 2025-09-30 Lam Research Corporation In-situ control of film properties during atomic layer deposition
US11152325B2 (en) * 2019-08-22 2021-10-19 Cree, Inc. Contact and die attach metallization for silicon carbide based devices and related methods of sputtering eutectic alloys
US12444648B2 (en) 2019-10-08 2025-10-14 Eugenus, Inc. Conformal titanium silicon nitride-based thin films and methods of forming same
US12431388B2 (en) 2019-10-08 2025-09-30 Eugenus, Inc. Conformal titanium silicon nitride-based thin films and methods of forming same
US11361992B2 (en) * 2019-10-08 2022-06-14 Eugenus, Inc. Conformal titanium nitride-based thin films and methods of forming same
JP2023504257A (ja) 2019-12-02 2023-02-02 ラム リサーチ コーポレーション Ｉｎ－ｓｉｔｕでのｐｅｃｖｄによるキャップ層
WO2021178399A1 (en) 2020-03-06 2021-09-10 Lam Research Corporation Atomic layer etching of molybdenum
KR20250053452A (ko) * 2023-10-13 2025-04-22 주성엔지니어링(주) 기판 처리 방법, 기판 처리 장치 및 반도체 장치

Family Cites Families (74)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4851895A (en) 1985-05-06 1989-07-25 American Telephone And Telegraph Company, At&T Bell Laboratories Metallization for integrated devices
US4929468A (en) 1988-03-18 1990-05-29 The United States Of America As Represented By The United States Department Of Energy Formation of amorphous metal alloys by chemical vapor deposition
US4938999A (en) 1988-07-11 1990-07-03 Jenkin William C Process for coating a metal substrate by chemical vapor deposition using a metal carbonyl
US5171610A (en) 1990-08-28 1992-12-15 The Regents Of The University Of Calif. Low temperature photochemical vapor deposition of alloy and mixed metal oxide films
US5314727A (en) 1992-07-28 1994-05-24 Minnesota Mining & Mfg. Co./Regents Of The University Of Minnesota Chemical vapor deposition of iron, ruthenium, and osmium
US5359787A (en) 1993-04-16 1994-11-01 Air Products And Chemicals, Inc. High purity bulk chemical delivery system
JPH1064902A (ja) 1996-07-12 1998-03-06 Applied Materials Inc アルミニウム材料の成膜方法及び成膜装置
CA2206217C (en) 1997-05-27 2003-01-07 Miroslav Milinkovic Nickel carbonyl vapour deposition process
US6077780A (en) 1997-12-03 2000-06-20 Advanced Micro Devices, Inc. Method for filling high aspect ratio openings of an integrated circuit to minimize electromigration failure
US6287435B1 (en) 1998-05-06 2001-09-11 Tokyo Electron Limited Method and apparatus for ionized physical vapor deposition
US6074945A (en) 1998-08-27 2000-06-13 Micron Technology, Inc. Methods for preparing ruthenium metal films
US6063705A (en) 1998-08-27 2000-05-16 Micron Technology, Inc. Precursor chemistries for chemical vapor deposition of ruthenium and ruthenium oxide
EP1131475A1 (en) 1998-11-03 2001-09-12 Chemical Vapour Deposition Systems Inc. Nickel carbonyl vapour deposition apparatus and process
US6242349B1 (en) 1998-12-09 2001-06-05 Advanced Micro Devices, Inc. Method of forming copper/copper alloy interconnection with reduced electromigration
US6232230B1 (en) 1999-01-05 2001-05-15 Advanced Micro Devices, Inc. Semiconductor interconnect interface processing by high temperature deposition
US6319832B1 (en) 1999-02-19 2001-11-20 Micron Technology, Inc. Methods of making semiconductor devices
US6627542B1 (en) 1999-07-12 2003-09-30 Applied Materials, Inc. Continuous, non-agglomerated adhesion of a seed layer to a barrier layer
JP2001144089A (ja) * 1999-11-11 2001-05-25 Sony Corp 半導体装置の製造方法
US6399486B1 (en) 1999-11-22 2002-06-04 Taiwan Semiconductor Manufacturing Company Method of improved copper gap fill
US6303809B1 (en) 1999-12-10 2001-10-16 Yun Chi Organometallic ruthenium and osmium source reagents for chemical vapor deposition
US6440495B1 (en) 2000-08-03 2002-08-27 Applied Materials, Inc. Chemical vapor deposition of ruthenium films for metal electrode applications
JP2002053971A (ja) * 2000-08-03 2002-02-19 Sony Corp めっき方法及びめっき構造、並びに半導体装置の製造方法及び半導体装置
JP2002076000A (ja) * 2000-09-05 2002-03-15 Sony Corp 半導体装置の製造方法
US6444263B1 (en) 2000-09-15 2002-09-03 Cvc Products, Inc. Method of chemical-vapor deposition of a material
US6508919B1 (en) 2000-11-28 2003-01-21 Tokyo Electron Limited Optimized liners for dual damascene metal wiring
US6440854B1 (en) 2001-02-02 2002-08-27 Novellus Systems, Inc. Anti-agglomeration of copper seed layers in integrated circuit metalization
JP4065670B2 (ja) * 2001-08-09 2008-03-26 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
KR100727372B1 (ko) 2001-09-12 2007-06-12 토소가부시키가이샤 루테늄착체, 그 제조방법 및 박막의 제조방법
US6420583B1 (en) 2001-09-27 2002-07-16 Praxair Technology, Inc Methods of synthesizing ruthenium and osmium compounds
KR100805843B1 (ko) * 2001-12-28 2008-02-21 에이에스엠지니텍코리아 주식회사 구리 배선 형성방법, 그에 따라 제조된 반도체 소자 및구리 배선 형성 시스템
US6713373B1 (en) 2002-02-05 2004-03-30 Novellus Systems, Inc. Method for obtaining adhesion for device manufacture
US7294567B2 (en) 2002-03-11 2007-11-13 Micron Technology, Inc. Semiconductor contact device and method
US7115498B1 (en) 2002-04-16 2006-10-03 Advanced Micro Devices, Inc. Method of ultra-low energy ion implantation to form alloy layers in copper
US7910165B2 (en) 2002-06-04 2011-03-22 Applied Materials, Inc. Ruthenium layer formation for copper film deposition
US7264846B2 (en) 2002-06-04 2007-09-04 Applied Materials, Inc. Ruthenium layer formation for copper film deposition
DE20221990U1 (de) 2002-06-06 2010-06-10 Varta Microbattery Gmbh Galvanisches Element
KR100482180B1 (ko) 2002-12-16 2005-04-14 동부아남반도체 주식회사 반도체 소자 제조방법
US7078341B2 (en) 2003-09-30 2006-07-18 Tokyo Electron Limited Method of depositing metal layers from metal-carbonyl precursors
US6989321B2 (en) 2003-09-30 2006-01-24 Tokyo Electron Limited Low-pressure deposition of metal layers from metal-carbonyl precursors
US7107998B2 (en) 2003-10-16 2006-09-19 Novellus Systems, Inc. Method for preventing and cleaning ruthenium-containing deposits in a CVD apparatus
JP4154729B2 (ja) * 2003-11-12 2008-09-24 Ｊｓｒ株式会社 導電性積層膜およびその導電性積層膜形成方法
US20050110142A1 (en) 2003-11-26 2005-05-26 Lane Michael W. Diffusion barriers formed by low temperature deposition
US7285308B2 (en) 2004-02-23 2007-10-23 Advanced Technology Materials, Inc. Chemical vapor deposition of high conductivity, adherent thin films of ruthenium
JP3792239B2 (ja) 2004-08-02 2006-07-05 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
US7476618B2 (en) * 2004-10-26 2009-01-13 Asm Japan K.K. Selective formation of metal layers in an integrated circuit
JP2006128288A (ja) 2004-10-27 2006-05-18 Tokyo Electron Ltd 成膜方法、半導体装置の製造方法、半導体装置、プログラムおよび記録媒体
US7270848B2 (en) 2004-11-23 2007-09-18 Tokyo Electron Limited Method for increasing deposition rates of metal layers from metal-carbonyl precursors
US7279421B2 (en) 2004-11-23 2007-10-09 Tokyo Electron Limited Method and deposition system for increasing deposition rates of metal layers from metal-carbonyl precursors
US7638002B2 (en) 2004-11-29 2009-12-29 Tokyo Electron Limited Multi-tray film precursor evaporation system and thin film deposition system incorporating same
US20060113675A1 (en) 2004-12-01 2006-06-01 Chung-Liang Chang Barrier material and process for Cu interconnect
JP2006179599A (ja) 2004-12-21 2006-07-06 Toshiba Corp 半導体装置およびその製造方法
US20060240187A1 (en) 2005-01-27 2006-10-26 Applied Materials, Inc. Deposition of an intermediate catalytic layer on a barrier layer for copper metallization
US7265048B2 (en) 2005-03-01 2007-09-04 Applied Materials, Inc. Reduction of copper dewetting by transition metal deposition
JP4889227B2 (ja) * 2005-03-23 2012-03-07 東京エレクトロン株式会社 基板処理方法および成膜方法
US7288479B2 (en) * 2005-03-31 2007-10-30 Tokyo Electron Limited Method for forming a barrier/seed layer for copper metallization
US7396766B2 (en) 2005-03-31 2008-07-08 Tokyo Electron Limited Low-temperature chemical vapor deposition of low-resistivity ruthenium layers
US20070059502A1 (en) * 2005-05-05 2007-03-15 Applied Materials, Inc. Integrated process for sputter deposition of a conductive barrier layer, especially an alloy of ruthenium and tantalum, underlying copper or copper alloy seed layer
US7396755B2 (en) 2005-05-11 2008-07-08 Texas Instruments Incorporated Process and integration scheme for a high sidewall coverage ultra-thin metal seed layer
US7402519B2 (en) 2005-06-03 2008-07-22 Intel Corporation Interconnects having sealing structures to enable selective metal capping layers
US7713876B2 (en) 2005-09-28 2010-05-11 Tokyo Electron Limited Method for integrating a ruthenium layer with bulk copper in copper metallization
US20070099422A1 (en) * 2005-10-28 2007-05-03 Kapila Wijekoon Process for electroless copper deposition
KR100729933B1 (ko) 2005-12-19 2007-06-18 동부일렉트로닉스 주식회사 구리 시드층의 증착 온도 측정 방법 및 이를 이용한 구리층형성 방법
US20070237895A1 (en) 2006-03-30 2007-10-11 Tokyo Electron Limited Method and system for initiating a deposition process utilizing a metal carbonyl precursor
US7439624B2 (en) 2006-05-18 2008-10-21 International Business Machines Corporation Enhanced mechanical strength via contacts
TW200743676A (en) 2006-05-30 2007-12-01 Jinn P Chu Copper seed layer for barrier-free metallization and the method for making the same
US7694413B2 (en) 2006-06-30 2010-04-13 Intel Corporation Method of making a bottomless via
JP2008016697A (ja) * 2006-07-07 2008-01-24 Renesas Technology Corp 半導体装置の製造方法
US20080081464A1 (en) 2006-09-29 2008-04-03 Tokyo Electron Limited Method of integrated substrated processing using a hot filament hydrogen radical souce
US20080190760A1 (en) * 2007-02-08 2008-08-14 Applied Materials, Inc. Resputtered copper seed layer
US7659204B2 (en) 2007-03-26 2010-02-09 Applied Materials, Inc. Oxidized barrier layer
US20080264774A1 (en) 2007-04-25 2008-10-30 Semitool, Inc. Method for electrochemically depositing metal onto a microelectronic workpiece
US7592257B2 (en) 2007-05-14 2009-09-22 Tokyo Electron Limited Semiconductor contact structure containing an oxidation-resistant diffusion barrier and method of forming
US7704879B2 (en) 2007-09-27 2010-04-27 Tokyo Electron Limited Method of forming low-resistivity recessed features in copper metallization
US7772110B2 (en) 2007-09-28 2010-08-10 Tokyo Electron Limited Electrical contacts for integrated circuits and methods of forming using gas cluster ion beam processing

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI550800B (zh) * 2013-11-11 2016-09-21 力成科技股份有限公司 具強固型晶背凸塊之矽穿孔結構
CN106575626A (zh) * 2014-08-27 2017-04-19 雅达公司 改进的硅通孔
CN111834331A (zh) * 2019-04-16 2020-10-27 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
CN111834331B (zh) * 2019-04-16 2022-09-13 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
CN110690166A (zh) * 2019-10-31 2020-01-14 上海华力集成电路制造有限公司 接触孔结构的形成方法及该接触孔结构
CN110752183A (zh) * 2019-10-31 2020-02-04 上海华力集成电路制造有限公司 接触孔结构的形成方法及该接触孔结构
US12004342B2 (en) 2021-02-09 2024-06-04 Changxin Memory Technologies, Inc. Method for manufacturing semiconductor structure and semiconductor structure

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US8247030B2 (en) 2012-08-21
US20090226611A1 (en) 2009-09-10
WO2009109934A1 (en) 2009-09-11
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JP2011513983A (ja) 2011-04-28
TW200947559A (en) 2009-11-16

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