CN101908501A - 扩散阻挡及其形成方法 - Google Patents

扩散阻挡及其形成方法 Download PDF

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Publication number
CN101908501A
CN101908501A CN2010101960734A CN201010196073A CN101908501A CN 101908501 A CN101908501 A CN 101908501A CN 2010101960734 A CN2010101960734 A CN 2010101960734A CN 201010196073 A CN201010196073 A CN 201010196073A CN 101908501 A CN101908501 A CN 101908501A
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CN
China
Prior art keywords
layer
barrier
iridium
sacrificial
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2010101960734A
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English (en)
Chinese (zh)
Inventor
帕特里克·W·德黑文
丹尼尔·C·埃德尔斯坦
菲利普·L·弗莱茨
野上毅
斯蒂芬·M·罗斯纳格尔
杨智超
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
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International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CN101908501A publication Critical patent/CN101908501A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/034—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics bottomless barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/083—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
CN2010101960734A 2009-06-03 2010-06-03 扩散阻挡及其形成方法 Pending CN101908501A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/477,389 US7951708B2 (en) 2009-06-03 2009-06-03 Copper interconnect structure with amorphous tantalum iridium diffusion barrier
US12/477,389 2009-06-03

Publications (1)

Publication Number Publication Date
CN101908501A true CN101908501A (zh) 2010-12-08

Family

ID=43263917

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010101960734A Pending CN101908501A (zh) 2009-06-03 2010-06-03 扩散阻挡及其形成方法

Country Status (4)

Country Link
US (1) US7951708B2 (https=)
JP (1) JP5444124B2 (https=)
KR (1) KR101581050B1 (https=)
CN (1) CN101908501A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114373714A (zh) * 2020-10-15 2022-04-19 长鑫存储技术有限公司 半导体结构的制作方法

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JP6013901B2 (ja) * 2012-12-20 2016-10-25 東京エレクトロン株式会社 Ｃｕ配線の形成方法
KR20160086757A (ko) * 2014-12-09 2016-07-20 인텔 코포레이션 구리 합금 도전성 루트 구조체를 갖는 마이크로전자 기판
US9875958B1 (en) 2016-11-09 2018-01-23 International Business Machines Corporation Trace/via hybrid structure and method of manufacture
KR102624631B1 (ko) 2016-12-02 2024-01-12 삼성전자주식회사 반도체 장치
US10211052B1 (en) * 2017-09-22 2019-02-19 Lam Research Corporation Systems and methods for fabrication of a redistribution layer to avoid etching of the layer
US11195748B2 (en) 2017-09-27 2021-12-07 Invensas Corporation Interconnect structures and methods for forming same
KR102747527B1 (ko) 2018-06-30 2024-12-31 램 리써치 코포레이션 라이너 패시베이션 및 접착 개선을 위한 금속 라이너의 징케이팅 (zincating) 및 도핑
WO2021108252A1 (en) 2019-11-25 2021-06-03 Lam Research Corporation Doping processes in metal interconnect structures
JP2021144969A (ja) * 2020-03-10 2021-09-24 キオクシア株式会社 磁気記憶装置
US11107731B1 (en) 2020-03-30 2021-08-31 International Business Machines Corporation Self-aligned repaired top via

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US5234775A (en) * 1988-11-11 1993-08-10 U.S. Philips Corporation Soft magnetic multilayer film and magnetic head provided with such a soft magnetic multilayer film
US6294836B1 (en) * 1998-12-22 2001-09-25 Cvc Products Inc. Semiconductor chip interconnect barrier material and fabrication method
CN1722425A (zh) * 2004-05-28 2006-01-18 台湾积体电路制造股份有限公司 半导体结构
US20070117308A1 (en) * 2005-06-24 2007-05-24 Hu Yongjun J Semiconductor constructions, and methods of forming semiconductor constructions
CN101389784A (zh) * 2006-02-22 2009-03-18 日矿金属株式会社 含有高熔点金属的烧结体溅射靶

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GB8303298D0 (en) * 1983-02-07 1983-03-09 Gen Electric Co Plc Temperature sensors
NL8800857A (nl) * 1988-04-05 1989-11-01 Philips Nv Inrichting en werkwijze voor het vervaardigen van een inrichting.
EP0428730B1 (en) * 1989-02-28 1995-07-12 Canon Kabushiki Kaisha Ink jet head having heat-generating resistor constituted of non-monocrystalline substance containing iridium, tantalum and aluminum, and ink jet device equipped with said head
JP2757797B2 (ja) * 1994-11-10 1998-05-25 日本電気株式会社 配線層形成方法およびその装置
US6181012B1 (en) * 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
US6812143B2 (en) * 2002-04-26 2004-11-02 International Business Machines Corporation Process of forming copper structures
US6787912B2 (en) * 2002-04-26 2004-09-07 International Business Machines Corporation Barrier material for copper structures
US7205662B2 (en) * 2003-02-27 2007-04-17 Symmorphix, Inc. Dielectric barrier layer films
JP4832807B2 (ja) * 2004-06-10 2011-12-07 ルネサスエレクトロニクス株式会社 半導体装置
US20060251872A1 (en) * 2005-05-05 2006-11-09 Wang Jenn Y Conductive barrier layer, especially an alloy of ruthenium and tantalum and sputter deposition thereof
US7727888B2 (en) * 2005-08-31 2010-06-01 International Business Machines Corporation Interconnect structure and method for forming the same
JP5285898B2 (ja) * 2007-12-17 2013-09-11 Ｊｘ日鉱日石金属株式会社 銅拡散防止用バリア膜、同バリア膜の形成方法、ダマシン銅配線用シード層の形成方法及びダマシン銅配線を備えた半導体ウェハー

Patent Citations (5)

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Publication number Priority date Publication date Assignee Title
US5234775A (en) * 1988-11-11 1993-08-10 U.S. Philips Corporation Soft magnetic multilayer film and magnetic head provided with such a soft magnetic multilayer film
US6294836B1 (en) * 1998-12-22 2001-09-25 Cvc Products Inc. Semiconductor chip interconnect barrier material and fabrication method
CN1722425A (zh) * 2004-05-28 2006-01-18 台湾积体电路制造股份有限公司 半导体结构
US20070117308A1 (en) * 2005-06-24 2007-05-24 Hu Yongjun J Semiconductor constructions, and methods of forming semiconductor constructions
CN101389784A (zh) * 2006-02-22 2009-03-18 日矿金属株式会社 含有高熔点金属的烧结体溅射靶

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114373714A (zh) * 2020-10-15 2022-04-19 长鑫存储技术有限公司 半导体结构的制作方法

Also Published As

Publication number Publication date
KR101581050B1 (ko) 2015-12-30
US7951708B2 (en) 2011-05-31
JP2010283347A (ja) 2010-12-16
KR20100130551A (ko) 2010-12-13
JP5444124B2 (ja) 2014-03-19
US20100311236A1 (en) 2010-12-09

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Application publication date: 20101208