KR101581050B1 - 무정형 탄탈륨 이리듐 확산 장벽을 갖는 구리 인터커넥트 구조 - Google Patents

무정형 탄탈륨 이리듐 확산 장벽을 갖는 구리 인터커넥트 구조 Download PDF

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KR101581050B1
KR101581050B1 KR1020100046447A KR20100046447A KR101581050B1 KR 101581050 B1 KR101581050 B1 KR 101581050B1 KR 1020100046447 A KR1020100046447 A KR 1020100046447A KR 20100046447 A KR20100046447 A KR 20100046447A KR 101581050 B1 KR101581050 B1 KR 101581050B1
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layer
forming
iridium
barrier
ild
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KR20100130551A (ko
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타케시 노가미
다니엘 씨. 에델스타인
스테픈 엠. 로스나젤
필립 리 플라이츠
패트릭 윌리암 디헤이븐
치-챠오 양
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인터내셔널 비지네스 머신즈 코포레이션
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44Physical vapour deposition [PVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/034Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics bottomless barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/083Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1020100046447A 2009-06-03 2010-05-18 무정형 탄탈륨 이리듐 확산 장벽을 갖는 구리 인터커넥트 구조 Expired - Fee Related KR101581050B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/477,389 US7951708B2 (en) 2009-06-03 2009-06-03 Copper interconnect structure with amorphous tantalum iridium diffusion barrier
US12/477,389 2009-06-03

Publications (2)

Publication Number Publication Date
KR20100130551A KR20100130551A (ko) 2010-12-13
KR101581050B1 true KR101581050B1 (ko) 2015-12-30

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KR1020100046447A Expired - Fee Related KR101581050B1 (ko) 2009-06-03 2010-05-18 무정형 탄탈륨 이리듐 확산 장벽을 갖는 구리 인터커넥트 구조

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Country Link
US (1) US7951708B2 (https=)
JP (1) JP5444124B2 (https=)
KR (1) KR101581050B1 (https=)
CN (1) CN101908501A (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6013901B2 (ja) * 2012-12-20 2016-10-25 東京エレクトロン株式会社 Cu配線の形成方法
KR20160086757A (ko) * 2014-12-09 2016-07-20 인텔 코포레이션 구리 합금 도전성 루트 구조체를 갖는 마이크로전자 기판
US9875958B1 (en) 2016-11-09 2018-01-23 International Business Machines Corporation Trace/via hybrid structure and method of manufacture
KR102624631B1 (ko) 2016-12-02 2024-01-12 삼성전자주식회사 반도체 장치
US10211052B1 (en) * 2017-09-22 2019-02-19 Lam Research Corporation Systems and methods for fabrication of a redistribution layer to avoid etching of the layer
US11195748B2 (en) 2017-09-27 2021-12-07 Invensas Corporation Interconnect structures and methods for forming same
KR102747527B1 (ko) 2018-06-30 2024-12-31 램 리써치 코포레이션 라이너 패시베이션 및 접착 개선을 위한 금속 라이너의 징케이팅 (zincating) 및 도핑
WO2021108252A1 (en) 2019-11-25 2021-06-03 Lam Research Corporation Doping processes in metal interconnect structures
JP2021144969A (ja) * 2020-03-10 2021-09-24 キオクシア株式会社 磁気記憶装置
US11107731B1 (en) 2020-03-30 2021-08-31 International Business Machines Corporation Self-aligned repaired top via
CN114373714A (zh) * 2020-10-15 2022-04-19 长鑫存储技术有限公司 半导体结构的制作方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070049007A1 (en) * 2005-08-31 2007-03-01 International Business Machines Corporation Interconnect structure and method for forming the same

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8303298D0 (en) * 1983-02-07 1983-03-09 Gen Electric Co Plc Temperature sensors
NL8800857A (nl) * 1988-04-05 1989-11-01 Philips Nv Inrichting en werkwijze voor het vervaardigen van een inrichting.
NL8802873A (nl) * 1988-11-22 1990-06-18 Philips Nv Zachtmagnetische multilaagfilm en magneetkop voorzien van een dergelijke zachtmagnetische multilaagfilm.
EP0428730B1 (en) * 1989-02-28 1995-07-12 Canon Kabushiki Kaisha Ink jet head having heat-generating resistor constituted of non-monocrystalline substance containing iridium, tantalum and aluminum, and ink jet device equipped with said head
JP2757797B2 (ja) * 1994-11-10 1998-05-25 日本電気株式会社 配線層形成方法およびその装置
US6181012B1 (en) * 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
US6294836B1 (en) * 1998-12-22 2001-09-25 Cvc Products Inc. Semiconductor chip interconnect barrier material and fabrication method
US6812143B2 (en) * 2002-04-26 2004-11-02 International Business Machines Corporation Process of forming copper structures
US6787912B2 (en) * 2002-04-26 2004-09-07 International Business Machines Corporation Barrier material for copper structures
US7205662B2 (en) * 2003-02-27 2007-04-17 Symmorphix, Inc. Dielectric barrier layer films
US20050263891A1 (en) * 2004-05-28 2005-12-01 Bih-Huey Lee Diffusion barrier for damascene structures
JP4832807B2 (ja) * 2004-06-10 2011-12-07 ルネサスエレクトロニクス株式会社 半導体装置
US20060251872A1 (en) * 2005-05-05 2006-11-09 Wang Jenn Y Conductive barrier layer, especially an alloy of ruthenium and tantalum and sputter deposition thereof
US7999330B2 (en) * 2005-06-24 2011-08-16 Micron Technology, Inc. Dynamic random access memory device and electronic systems
EP2003226B1 (en) * 2006-02-22 2013-04-24 JX Nippon Mining & Metals Corporation Sintered sputtering target made of high-melting metals
JP5285898B2 (ja) * 2007-12-17 2013-09-11 Jx日鉱日石金属株式会社 銅拡散防止用バリア膜、同バリア膜の形成方法、ダマシン銅配線用シード層の形成方法及びダマシン銅配線を備えた半導体ウェハー

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070049007A1 (en) * 2005-08-31 2007-03-01 International Business Machines Corporation Interconnect structure and method for forming the same

Also Published As

Publication number Publication date
US7951708B2 (en) 2011-05-31
JP2010283347A (ja) 2010-12-16
KR20100130551A (ko) 2010-12-13
JP5444124B2 (ja) 2014-03-19
US20100311236A1 (en) 2010-12-09
CN101908501A (zh) 2010-12-08

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