CN101388387B - 电子装置和制造电子装置的方法 - Google Patents

电子装置和制造电子装置的方法 Download PDF

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Publication number
CN101388387B
CN101388387B CN2008101610589A CN200810161058A CN101388387B CN 101388387 B CN101388387 B CN 101388387B CN 2008101610589 A CN2008101610589 A CN 2008101610589A CN 200810161058 A CN200810161058 A CN 200810161058A CN 101388387 B CN101388387 B CN 101388387B
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semiconductor device
chip
salient point
flip
sealing resin
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CN101388387A (zh
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栗田洋一郎
大内利枝佳
宫崎崇志
山田俊之
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Renesas Technology Corp
Renesas Electronics Corp
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Renesas Electronics Corp
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Abstract

一种电子装置，包括：具有第一电极终端的第一半导体器件；第二半导体器件，所述第二半导体器件具有第二电极终端并且通过使用密封树脂层安装在第一半导体器件上，使得第一电极终端和第二电极终端穿入密封树脂层，以通过密封树脂层密封第一半导体器件和第二半导体器件之间的空间。密封树脂层的一部分被挤压在第一电极终端和各个第二电极终端之间的结合面里。

Description

电子装置和制造电子装置的方法
本申请是申请日为2004年8月19日、申请号为“200410057788.6”，发明名称为“倒装芯片型半导体器件及其制造工艺和电子产品制造工艺”之申请的分案申请。 
技术领域
本发明涉及一种倒装芯片型半导体器件，其用于制作电子产品，如紧凑半导体封装，主板等。而且，本发明涉及制造此倒装芯片型半导体器件的制作工艺。此外，本发明涉及采用倒装芯片型半导体器件制造的，如紧凑半导体封装，主板等的电子产品的制作工艺。 
背景技术
在用于制造倒装芯片型半导体器件的典型的常规制作方法中，举例来说，准备一个硅片，硅片的一个表面通过在硅片中形成网格状细槽(即划线)将硅片表面分成多个半导体芯片区。然后，通过各种已知的方法处理硅片，使每个半导体芯片区制作成为一个半导体芯片或器件。接着，在每个半导体器件上形成并排列多个导电焊盘，并且如果需要，在导电焊盘上结合各个金属凸点(bumps)。每个金属凸点可以由焊料或金构成，并且作为电极终端或引线。之后，硅片经过划片处理使硅片沿着限定半导体器件的网格状槽被分割，从而使半导体器件相互分开。 
已经研制倒装芯片型半导体器件来满足对电子设备的更高性能、更小而轻的体积、和更高的速度的需求。例如，倒装芯片型半导体器件可以用来制造紧凑半导体封装，如BGA(焊球网格阵列)类型半导体封装，芯片堆叠(chip-on-chip)类型半导体封装等。 
在BGA类型半导体封装制作中，准备一块布线板，通常称作封装板或内插板(interposer)。布线板或内插板在其上表面排列多个导电焊盘，并且在内插板的导电焊盘的排列和倒装芯片型的半导体器件的金属凸点的排列之间有镜像关系。内插板也有多个排列在其下表面上的导电焊盘和多个结合到焊盘上的焊球，由焊球形成焊球网格阵列(BGA)。倒装芯片型半导体器件被倒置并安装在内插板的上表面，使倒装芯片型半导体器件的金属凸点结合在内插板上表面的导电焊盘上，因此在二者之间建立了的电气连接。 
在芯片堆叠半导体封装制作中，准备一个半导体器件，其特征是比倒装芯片型半导体器件的尺寸更大的尺寸。该较大的半导体器件有多个导电焊盘排列在其上表面，并且较大的半导体器件的导电焊盘的排列和倒装芯片型半导体器件的金属凸点的排列有镜像关系。倒装芯片型半导体器件被倒置并安装在较大半导体器件的上表面，使倒装芯片型半导体器件的金属凸点结合到较大半导体器件的导电焊盘上，由此在二者之间建立电气连接。 
而且，倒装芯片型半导体器件可以直接安装在电子设备的主板上，这样倒装芯片型半导体器件的各个金属凸点被连接并结合到形成并排列于主板上的导电焊盘上。 
在任何情况下，安装倒装芯片型半导体器件后，必须进行树脂填充(resin-underfilling)工艺，使倒装芯片型半导体器件和内插板、半导体器件或主板间的空间用合适的树脂填充，因此密封金属凸点和导电焊盘的排列(arrangements)。 
常规地，已经提出了各种树脂填充工艺，但很难有效地进行常规的树脂填充工艺，如下面详细论述的，导致降低了使用倒装芯片型半导体器件的电子产品的生产率。而且，在进一步使倒装芯片型半导体器件小型化的当前趋势中，有效地进行常规树脂填充工艺基本不可能。
发明内容
因此，本发明的一个主要目的是提供一种倒装芯片型半导体器件，其构成使倒装芯片型半导体器件安装之后，可以完全省略树脂填充工艺，从而使采用倒装芯片型半导体器件的电子产品的生产率提高。 
本发明的另一个目的是提供一种制造此倒装芯片型半导体器件的制作工艺。 
本发明还有另一个目的是提供一种制造包括此倒装芯片型半导体器件的电子产品的制作工艺，如芯片堆叠半导体封装，焊球网格阵列半导体封装，主板等等。 
根据本发明的第一方面，提供一种倒装芯片型半导体器件，其包括：半导体衬底；多个电极终端，其位于并排列在半导体衬底的上表面；以及密封树脂层，其形成在半导体衬底的上表面，使电极终端完全被密封树脂层覆盖。 
倒装芯片型半导体器件还可包括保护层，其形成于半导体衬底的上表面，使电极终端暴露在外面，且保护层被密封树脂层完全覆盖。 
在倒装芯片型半导体器件中，每个电极终端都形成为导电焊盘，其形成于半导体衬底上表面。备选地，每个电极终端还可包括结合在导电焊盘上的金属凸点。优选地，金属凸点形成为柱状金属凸点。 
而且，优选地，密封树脂层包括包含多个导电的固体颗粒的填充物。 
根据本发明的第二方面，提供一种制作工艺，其步骤包括：准备半导体晶片，其具有多个制作于其上表面的半导体器件，每个半导体 器件具有多个位于并排列在其上表面的电极终端；在半导体晶片上表面形成密封树脂层，使电极终端被密封树脂层完全覆盖；以及对半导体晶片划片，使半导体器件分为多个单独分开的半导体器件。 
在本制作工艺中，半导体晶片包括形成于其上表面的保护层，使所述电极终端暴露在外面，且保护层被密封树脂层完全覆盖。 
而且，每个电极终端可以形成为导电焊盘，其形成于每个半导体体器件的上表面。备选地，每个电极终端还包括结合在导电焊盘上的金属凸点。优选地，金属凸点形成为柱状金属凸点。 
根据本发明的制作工艺，密封树脂层的形成可以由以下步骤进行：将液态树脂材料放置到半导体晶片的上表面；以及旋转半导体晶片，使液态树脂材料向外展开遍及半导体晶片上表面，从而形成密封树脂层。 
备选地，密封树脂层的形成可由以下步骤进行：准备一个粘性树脂片；以及将粘性树脂片层压到半导体晶片的上表面，从而形成密封树脂层。粘性树脂片可以具有层压在其表面的划片树脂片。这种情况下，可以通过将半导体晶片面向下并应用到与划片片相反的粘性树脂片另一个表面上，将粘性树脂片的层压到半导体晶片上表面上。 
根据本发明的制作工艺还包括如下步骤：准备一个衬底，其具有位于并排列在其上表面上的多个电极终端，衬底的电极终端的排列与每个单独分开的半导体器件的电极终端的排列有镜像关系；以及安装一个单独分开的半导体器件到衬底上，使衬底的电极终端穿入单独分开的半导体器件的密封树脂层，并且结合到其各个电极终端。 
在此制作工艺中，衬底的每个电极终端可包括形成于其上表面的导电焊盘和结合于其上的芽状金属凸点，并且单独分开的半导体器件 的每个电极终端可包括形成于其上表面的导电焊盘。在这种情况下，将单独分开的半导体器件安装到衬底上可包括如下步骤：将所述单独分开的半导体器件倒置并放在衬底上，使单独分开的半导体器件的各个导电焊盘与衬底的芽状凸点对齐；以及将单独分开的半导体器件压到衬底上，从而衬底的芽状凸点穿入密封树脂层中并且衬底的芽状凸点结合到单独分开的半导体器件的导电焊盘上。 
备选地，衬底的每个电极终端可包括形成于其上表面的导电焊盘和结合于其上的柱状金属凸点，并且单独分开的半导体器件的每个电极终端可包括形成于其上表面的导电焊盘和结合于其上的柱状金属凸点。在这种情况下，将单独分开的半导体器件安装到衬底上可包括如下步骤：将单独分开的半导体器件倒置并放在衬底上，使单独分开的半导体器件的各个柱状金属凸点与衬底的柱状金属凸点对齐；以及将单独分开的半导体器件压到衬底上，从而衬底的柱状凸点穿入密封树脂层中并且衬底的柱状凸点结合到单独分开的半导体器件的柱状凸点上。而且，密封树脂层可包括包含多个固体颗粒的填充物。在这种情况下，固体颗粒的一部分被挤压并留在单独分开的半导体器件的柱状金属凸点与衬底的柱状金属凸点的结合面间。 
在根据本发明的制作工艺中，衬底可包括另一个半导体器件，从而产生一个芯片堆叠半导体器件。而且，衬底可包括用于制作电子产品的电子内插板。此外，衬底可包括用于制作电子设备的布线板。 
在根据本发明的制作工艺中，当前述半导体晶片定义为第一半导体晶片时，制作工艺还可包括如下步骤：准备第二半导体晶片，其具有多个制作于其上表面的半导体器件，每个半导体器件具有多个位于并排列在其上表面的电极终端，第二半导体晶片的每个半导体器件的电极终端的排列与每个单独分开的半导体器件的电极终端的排列有镜像关系；安装各个单独分开的半导体器件到第二半导体晶片的半导体器件上，使第二半导体晶片的每个半导体器件的电极终端穿入到密封 树脂层中，并且结合到相应的单独分开的半导体器件的各个电极终端，从而制得多个芯片堆叠半导体封装；以及对第二半导体晶片划片，使芯片堆叠半导体封装相互分离。 
根据本发明的第三方面，提供半导体晶片，其具有多个在其中制作的半导体器件，其包括：多个位于并排列在每个半导体器件的上表面的电极终端；以及密封树脂层，其形成于半导体器件所有上表面上，使电极终端被密封树脂层完全覆盖。 
根据本发明的第四方面，提供一种制作工艺，包括如下步骤：准备半导体晶片，其具有多个制作在其中的半导体器件，每个半导体器件具有多个位于并排列在其上表面的电极终端；在半导体晶片上形成密封树脂层，使所有电极终端被密封树脂层完全覆盖。 
附图说明
参考附图，下面进行的描述将能更清楚地理解上述目的和其他目的，其中： 
图1A是用于制造芯片堆叠半导体封装的常规制作工艺的第一个典型步骤的剖面图； 
图1B是常规制作工艺的第二个典型步骤的剖面图； 
图1C是常规制作工艺的第三个典型步骤的剖面图； 
图1D是常规制作工艺的第四个典型步骤的剖面图； 
图2A是用于制造芯片堆叠半导体封装的另一常规制作工艺的第一个典型步骤的剖面图； 
图2B是另一常规制作工艺的第二个典型步骤的剖面图； 
图2C是另一常规制作工艺的第三个典型步骤的剖面图； 
图2D是另一常规制作工艺的第四个典型步骤的剖面图； 
图3A是硅片的透视图，用以说明根据本发明制造倒装芯片型半导体器件的制作工艺的第一实施例的第一个典型步骤； 
图3B是图3A所示的硅片的部分放大的剖面图；
图3C是其上放置了未固化的液态树脂材料的硅片的透视图，用以说明根据本发明制造倒装芯片型半导体器件的制作工艺的第一实施例的第二个典型步骤； 
图3D是经过旋涂工艺的硅片的透视图，用以说明根据本发明制造倒装芯片型半导体器件的制作工艺的第一实施例的第二个典型步骤； 
图3E是图3D所示的硅片的部分放大的剖面图； 
图3F是安装在划片树脂片(dicing resin sheet)上的硅片的透视图，用以说明根据本发明的制造倒装芯片型半导体器件的制作工艺的第一实施例的第三个典型步骤； 
图3G是图3F所示的硅片的部分放大的剖面图； 
图3H是与图3G相似的部分放大的剖面图，表示经过划片工艺的硅片； 
图4A是粘性树脂片的透视图，说明图3A到图3H所示制作工艺修改的典型步骤； 
图4B是其上置有粘性树脂片(adhesive resin sheet)的硅片的透视图，用以说明图3A到图3H所示制作工艺的修改的另一典型步骤； 
图4C是图4B所示的硅片的部分放大剖面图； 
图5A是安装在衬底上的第一半导体器件的剖面图，用以说明采用根据本发明倒装芯片型半导体器件，制造芯片堆叠半导体封装的制作工艺的第一个典型步骤； 
图5B是制作为根据本发明的倒装芯片型半导体器件的第二半导体器件的剖面图，用以说明制造芯片堆叠半导体封装的制作工艺的第二个典型步骤； 
图5C是相互对齐的第一和第二半导体器件的剖面图，用以说明制造芯片堆叠半导体封装的制作工艺的第三个典型步骤； 
图5D是第一和第二半导体器件的组合的剖面图，用以说明制造芯片堆叠半导体封装的制作工艺的第四个典型步骤； 
图6是使用根据本发明的倒装芯片型半导体器件的BGA(焊球网格阵列)类型半导体封装的剖面图； 
图7是主板的剖面图，该主板上直接安装根据本发明的倒装芯片 型半导体器件； 
图8A是硅片的部分剖面图，用于说明根据本发明制造倒装芯片型半导体器件的制作工艺的第二实施例的第一典型步骤； 
图8B是在其上形成密封树脂片的硅片的部分剖面图，用于说明根据本发明制造倒装芯片型半导体器件的制作工艺的第二实施例的第二典型步骤； 
图8C是安装在划片树脂片上的硅片的部分剖面图，用于说明根据本发明制造倒装芯片型半导体器件的制作工艺的第二实施例的第三典型步骤； 
图8D是与图8C相似的部分剖面图，表示经过划片工艺的硅片； 
图9A是安装在衬底上的第一半导体器件的剖面图，用于说明采用根据本发明制作工艺的第二实施例制造的倒装芯片型半导体，制造芯片堆叠半导体封装的另一个制作工艺的第一典型步骤； 
图9B是第二半导体器件的剖面图，其是作为根据本发明制作工艺的第二实施例制造的倒装芯片型半导体器件，用于说明制造芯片堆叠半导体封装的制作工艺的第二典型步骤； 
图9C是相互对齐的第一和第二半导体器件的剖面图，用于说明用于制作芯片堆叠半导体封装的制作工艺的第三典型步骤； 
图9D是第一和第二半导体器件组合的剖面图，用于说明用于制作芯片堆叠半导体封装的制作工艺的第四典型步骤； 
图10A是根据本发明制作工艺的第二实施例制作的倒装芯片型半导体器件的修改的放大剖面图； 
图10B是采用如图10A所示倒装芯片型半导体器件的修改的芯片堆叠半导体器件的放大剖面图； 
图11A是硅片的部分剖面图，用于说明制造根据本发明的倒装芯片型半导体器件的制作工艺的第三实施例的第一典型步骤； 
图11B是划片树脂片的部分剖面图，其上层压有密封树脂层，用于说明制造根据本发明的倒装芯片型半导体器件的制作工艺的第三实施例的第二典型步骤； 
图11C是硅片的部分剖面图，其面向下施加到划片树脂片上，用 于说明制造根据本发明的倒装芯片型半导体器件的制作工艺的第三实施例的第三典型步骤； 
图11D是与图11C相似的部分剖面图，表示经过划片工艺的硅片； 
图12A硅片的示意性剖面图，用以说明采用根据本发明制作的倒装芯片型半导体器件，制造芯片堆叠半导体封装的另一个制作工艺的第一典型步骤； 
图12B是其上安装有倒装芯片型半导体器件的硅片的示意性剖面图，用于说明制造芯片堆叠半导体封装的制作工艺的第二典型步骤；以及 
图12C是经过划片工艺的硅片的示意性剖面图，用于说明制造芯片堆叠半导体封装的制作工艺的第三典型步骤。 
具体实施方式
为更好的理解本发明，在对本发明实施例说明之前，将参考图1A到图1D说明制造芯片堆叠半导体封装的常规制作工艺。 
在此常规制作工艺中，如图1A所示，准备第一半导体器件10F，然后将其安装并用合适的粘合剂14粘附到衬底12上。尽管没有画图示出，但第一半导体器件10F有多个导电焊盘位于其上表面，并且排列在其上表面中心区域的导电焊盘上结合有各个金属凸点16。每个导电焊盘可以用合适的金属材料形成，如铝，金，铜等等。而且，每个金属凸点16可以形成为芽状(sprout-like)金凸点，其可用众所周知的线焊(wire-bonding)机由金线制成。 
注意，在本例中，尽管衬底12是作为布线板或内插板，但它可以包含包括在金属引线架中的安装台。 
另一方面，如图1B所示，准备倒装芯片型半导体器件作为第二半导体器件10S，其特征是比第一半导体器件10F有更小的尺寸。尽管没有画图示出，但第二半导体器件10S有多个位于其上表面的导电焊盘。 注意，第二半导体器件10S的导电焊盘的排列与芽状金属凸点16的排列有镜像关系。 
在准备第一和第二半导体器件10F和10S后，将第二半导体器件10S倒转并置于第一半导体器件10F上，使第二半导体器件10S上各个导电焊盘与第一半导体器件10F上表面中心区域的芽状金属凸点16对齐。 
然后，如图1C所示，第二半导体器件10S通过超声压焊(ultrasonic-pressure bonding)法或热压焊(heat-pressure bonding)法压在第一半导体器件10F的上表面上，使第二半导体器件10S各个导电焊盘紧靠并结合到第一半导体器件10F上表面的芽状金属凸点16上。 
接下来，如图1D所示，树脂供给喷嘴17被移到第一与第二半导体器件10F和10S的空隙，并且由标记URM表示的未固化的液态树脂材料被从树脂供给喷嘴17利用毛细现象引入到空隙中。也就是，第二半导体器件10S用未固化的液态树脂材料URM填充，使芽状金属凸点16与导电焊盘用液态树脂材料URM密封到一起。然后，液态树脂材料URM被完全硬化成为在第一和第二半导体器件10F和10S之间的密封树脂层18。 
此后，位于第一半导体器件10F上表面周边区域的每个导电焊盘用连接导线电气连接到位于内插板12上的相应的导电焊盘上。因而，图1D所示组合是采用传递模塑(transfer molding)方法进行树脂密封的，实现了芯片堆叠半导体封装的制作。 
在这种常规的制作方法中，用来输入未固化的液态树脂到第一和第二半导体器件10F和10S的空隙的入口位置，必须被预先确定在第一半导体器件10F上表面的周边，并且在入口位置不能有任何导电焊 盘，导致了芯片堆叠半导体器件设计的自由度受到限制。 
而且，当倒装芯片型半导体器件进一步小型化时，很难或不可能合适地用未固化的液态树脂材料URM填充第一和第二半导体器件10F和10S之间的空隙，这是因为由于倒装芯片型半导体器件进一步小型化使空隙变得更窄了。 
参考附图2A到2D，说明另一个用来制造芯片堆叠半导体封装的常规的典型制作工艺。 
在此常规制作工艺中，如图2A所示，准备第一半导体器件20F，然后将其安放并用合适的粘合剂24粘附到衬底22上。尽管没有画图示出，但第一半导体器件20F有多个导电焊盘位于其上表面，并且每个导电焊盘可以用合适的金属材料形成，如铝，金，铜等等。尽管衬底22是作为布线板或内插板，但它可以包含包括在金属引线架中的安装台。 
另一方面，如图2B所示，准备倒装芯片型半导体器件作为第二半导体器件20S，其特征是比第一半导体器件20F有更小的尺寸。第二半导体器件20S有多个位于其上表面的导电焊盘(未画出)和结合于导电焊盘上的相应的金属凸点26。如图所示，与上述凸点16相似，每个金属凸点26都形成为芽状金凸点。注意，第二半导体器件20S的芽状金属凸点26的排列与位于第一半导体器件20F上表面中心区域的导电焊盘的排列有镜像关系。 
在准备第一和第二半导体器件20F和20S后，如图2C所示，用标记URM表示的未固化的液态树脂材料，通过灌封(potting)方法放置到第一半导体器件20F的上表面上。然后，将第二半导体器件20S倒转并置于第一半导体器件20F上，使相应的芽状金属凸点26与位于第一半导体器件20F上表面中心区域的导电焊盘对齐。
接下来，如图2D所示，第二半导体器件20S通过超声压焊法或热压焊法压在第一半导体器件20F的上表面上，使各个芽状金属凸点26紧靠并与第一导体器件20F上表面中心区域上的导电焊盘相结合。同时，芽状金属凸点26用未固化的液态树脂材料URM与导电焊盘密封在一起。然后，液态树脂材料URM完全硬化成为第一和第二半导体器件20F和20S间的密封树脂层28(图2D)。 
此后，与提到的第一常规制作工艺相似，位于第一半导体器件20F上表面周边区域的每个周边导电焊盘用连接导线电气连接到位于内插板22上的相应的导电焊盘上(未画出)。因而，图2D所示组合是采用传递模塑方法树脂密封的，实现了芯片堆叠半导体封装的制作。 
在此另一常规制作方法中，很难精确控制使用灌封方法放置到第一半导体器件20F上表面的未固化液态树脂材料URM的量。 
如果放置到第一半导体器件20F上表面的未固化液态树脂材料URM的量太多，将使一部分液态树脂材料URM从第一和第二半导体器件20F和20S间的空隙胀出，并因此使第一半导体器件20F上的周边导电焊盘被胀出的树脂材料污染。如果第一半导体器件20F上的周边导电焊盘被树脂材料污染，就不可能将结合导线适当地结合到被污染的导电焊盘上。而且，如果第二半导体器件20S的厚度太薄，用于移动第二半导体器件20S的可动工具，将会被胀出的树脂材料污染。因此，很难降低芯片堆叠半导体封装的整体厚度。 
另一方面，如果放置到第一半导体器件20F上表面的未固化液态树脂材料URM的量太少，在密封树脂层28中将产生气孔和孔洞。 
在如图2A到2D所示的常规制作工艺中，已经提出例如用半固化密封树脂片代替未固化液态树脂材料URM。特别地，密封树脂片被放 到第一半导体器件20F上表面，使其上表面中央区域的导电焊盘被密封树脂片覆盖。然后，第二半导体器件20S被压到密封树脂片上，使芽状金属凸点穿透密封树脂片并继而结合到第一半导体器件20F的导电焊盘上。此后，半固化密封树脂片被完全硬化，由此在第一半导体器件20F与第二半导体器件20S间形成密封树脂层。 
由于可能对密封树脂片的厚度，并进而对形成密封树脂层的树脂材料的量精确控制，可以避免一部分密封树脂片从在第一和第二半导体器件20F和20S间空隙胀出。然而，很难正确和精确地将密封树脂片定位于第一半导体器件20F的上表面。实际上，密封树脂层的定位伴随500微米量级的误差。 
JP-A-(HEI)11-297750公开了密封树脂层预先形成在硅片表面，该硅片中已经制作有多个倒装芯片型半导体器件，每个器件上有多个金属凸点。采用传递模塑方法完成了密封树脂层的形成，使金属凸点的顶端从密封树脂层中凸出。此后，硅片经过划片工艺，使倒装芯片型半导体器件相互分离。当每个分开的倒装芯片型半导体器件被倒置并安装在内插板或另一个半导体器件上时，密封树脂层作为密封金属凸点和与其相连的导电焊盘的填充树脂层。 
在JP-A-(HEI)11-297750公开的制作工艺中，尽管能够精确控制密封树脂层的厚度，但密封树脂层的形成工艺比较麻烦，因为柔软的树脂片必须被并入到传递铸模中，以使金属凸点的顶端能从密封树脂层中凸出。特别地，每个金属凸点的顶端被穿入到柔软的片中，并且被模制的树脂材料引入到硅片的上表面和柔软树脂片之间的空隙。简而言之，不能够说JP-A-(HEI)11-297750公开的制作工艺是有效的。 
而且，JP-A-(HEI)11-274241公开了密封树脂层预先形成在硅片的表面，该硅片中已经制作了多个倒装芯片型半导体器件，每个器件上都有多个金属凸点。实现密封树脂层的形成使金属凸点完全埋在了密 封树脂层中，然后密封树脂层经过抛光工艺，使金属凸点暴露到外面。此后，硅片经过划片工艺使倒装芯片型半导体器件相互分离。当每个分开的倒装芯片型半导体器件被倒置并安装在内插板或另一个半导体器件上时，密封树脂层作为密封金属凸点和与之相连的导电焊盘的填充树脂层。 
而且，不能够说JP-A-(HEI)11-274241公开的制作工艺是有效的，这是因为抛光工艺很麻烦。 
第一实施例 
参考图3A到3H，下面说明根据本发明用于制造多个倒装芯片型半导体器件的制作工艺的第一实施例。 
首先，如图3A所示，准备硅片30。硅片30的上表面通过形成用虚线表示的网格状细槽(即划线)，被划分为多个半导体芯片区32。硅片30已经用各种已知的方法处理过，以使每个半导体芯片区32制作成为一个半导体芯片或器件。 
而且，如图3B中所示的每个半导体器件的范围用标记32表示，在每个半导体器件32上已经排列有多个电极终端34，并且每个电极终端34形成为导电焊盘。此外，在硅片30的上表面形成二氧化硅层36和钝化层38，使每个电极终端或导电焊盘34暴露到外面。二氧化硅层36和钝化层38都起保护层的作用。有机的保护层，如聚酰亚胺层，可以替代二氧化硅层36和钝化层38。 
注意，每个导电焊盘34由合适的金属材料构成，如铝、金、铜等等。而且注意，在本实施例中，导电焊盘34必须以40微米或大于40微米的特定间距排列，其原因将在下面详细阐述。 
然后，硅片30经过旋涂工艺，如图3C到3D所示。特别地，如 图3C所示，特定量的合适的用标记URM表示的未固化液态树脂材料，放置到硅片30的上表面。接下来，硅片30按图3C中箭头指示旋转，由于图3D中径向箭头所示的离心力作用于未固化液态树脂材料，未固化液态树脂材料URM向外展开遍及硅片30的上表面。此后，向外展开的树脂材料URM不完全地硬化到其不能成为流体的程度。因此，不完全硬化的树脂材料URM在硅片30的上表面形成为密封树脂层40，使导电焊盘34和钝化层38完全被密封树脂层40覆盖，如图3D到图3E所示。 
形成密封树脂层40之后，如图3F到图3G所示，具有粘性层44的划片树脂片42(图3G)被使用并将其粘到硅片30的下表面。然后，如图3H所示，硅片30经过划片工艺，使其沿网格状槽(未画出)被切开，图3H中用标记46代表性地表示出两个切割槽。也就是，硅片30被分割成多个倒装芯片型半导体器件32′，硅片30本身的每个被分割部分，形成相应的倒装芯片型半导体器件32′的半导体衬底30′。 
处理过的硅片30和分割的半导体器件32′可以在电子市场中出货和流通，用来制造紧凑半导体器件封装，如BGA(焊球网格阵列)类型半导体封装，芯片堆叠类型半导体封装等等。 
在旋涂工艺中，能够对密封树脂层40的厚度，并进而对形成密封树脂层40的树脂材料的量精确控制。 
参考图4A，4B和4C，下面说明上述根据本发明的制作工艺的第一实施例的修改。注意，在图4A，4B和4C中，与图3A到3H中相同的标记代表相同的技术特征。 
在此修改中，如图4A所示，准备硅片30的同时准备一块有粘性的树脂片ARS。然后，如图4B所示，粘性树脂片ARS被置于硅片30的上表面，并进行层压工艺，用例如膜式真空层压机(diaphragm type vacuum laminating machine)，其可从MEIKI SEISHAKUSHO K.K得到。这样，粘性树脂片ARS成为硅片30上表面的密封树脂层48，以使电极终端或导电焊盘34和钝化层38完全被密封树脂层48所覆盖，如图4C所示。此后，具有密封树脂层48的硅片30，按照如图3F到3H所说明进行处理，制得倒装芯片型半导体器件(32′)。 
与上面提到的根据本发明制作工艺第一实施例相似，在本实施例中，能够对粘性树脂片ARS的厚度，并进而对形成密封树脂层48的树脂材料的量精确控制。 
例如，根据本发明的倒装芯片型半导体器件32′可以用来制造芯片堆叠半导体封装。 
参考图5A到5D，下面说明根据本发明采用倒装芯片型半导体器件32′，制造芯片堆叠半导体封装的制作工艺。 
如图5A所示，准备第一半导体器件50F，并且将其安装并用合适的粘合剂54粘在衬底52上。第一半导体器件50F在其上表面有多个导电焊盘55，并且每个导电焊盘55可以由合适的金属材料构成，如铝、金、铜等等。尽管没有画图示出，二氧化硅层和钝化层可以在第一半导体器件50F上表面形成，使每个导电焊盘55暴露在外面。而且，有机保护层如聚酰亚胺层可以替代二氧化硅层和钝化层。 
注意，在本实施例中，尽管衬底52是作为布线板或内插板，但它可以包含包括在金属引线架中的安装台。 
如图5A所示，第一半导体器件50F也有多个金属凸点56，它们结合在排列其上表面中心区域的导电焊盘55上。优选地，每个金属凸点56形成为芽状金凸点，其可用众所周知线焊机由金线制成。
特别地，众所周知，线焊机有可移动细管，极细的金线穿过细管。从细管尖端伸出的金线前端或自由端，以一个细小的珠结束，防止金线拉入到细管中。而且，细管有针状电极，叫做焊炬，针状电极位于细管尖端旁边。 
为形成芽状凸点56，移动可移动细管，以使小珠在受到紫外振动时被压到导电焊盘55上，并且小珠由于紫外振动和压力的共同作用被焊接并结合到相关的导电焊盘55上。然后，当向上移动细管以使金线拉出细管时，针状电极被加以高压，在被拉的金线和针状电极间产生火花。 
因此，细金线被火花切断而形成芽状凸点56。也就是说，被结合的小珠作为相关导电焊盘55上的芽状凸点56留下来了。另一方面，金线被切断的一端由于火花而熔化，因此产生用于下次形成芽状凸点56的细小的珠。 
简而言之，在第一半导体器件50F中，每个芽状凸点56与相应的导电焊盘55相关，由此定义了一个电极终端。 
另一方面，如图5B所示，依照根据本发明制作工艺的第一实施例制造的倒装芯片型半导体器件(32′)被作为第二半导体器件50S，其特征是比第一半导体器件50F有更小的尺寸。注意，在图5B中，为避免说明的复杂性，二氧化硅层36和钝化层38都被省略。而且注意，第一半导体器件50F的芽状金属凸点56的排列与第二半导体器件50S的导电焊盘34的排列有镜像关系。 
如图5C所示，在准备好第一和第二半导体器件50F和50S后，第二半导体器件50S被倒置并置于第一半导体器件50F上，以使第二半导体器件50S上各个导电焊盘34与第一半导体器件50F上表面中心区域的芽状金属凸点56对齐。
接下来，如图5D所示，第二半导体器件50S通过超声压焊法或热压焊法被压在第一半导体器件50F的上表面，以使第二半导体器件50S上各个导电焊盘34邻接并结合到第一半导体器件50F上表面中心区域的芽状金属凸点56上。也就是说，每个芽状金属凸点56都穿入密封树脂层(40或48)中，并且所说芽状金属凸点56的尖端挤压并结合到相应的导电焊盘34上。然后，密封树脂层(40或48)完全硬化，使芽状金属凸点56和与其相连的导电焊盘34和55一起被树脂密封。 
此后，位于第一半导体器件50F上表面周边区域的每个导电焊盘(未示出)，通过结合线被电气连接到位于内插板52上相应的导电焊盘(未示出)上。那么，图5D所示组合是使采用传递模塑法被树脂密封，实现了芯片堆叠半导体封装的制作。 
在上述芽状凸点56的形成工艺中，非常困难或者说不可能将芽状凸点56以小于40微米的间距排列，因此如上所述的第二半导体器件50S的导电焊盘34必须以40微米或大于40微米的间距排列。 
当各个芽状金属凸点56结合到导电焊盘34时，会有这样一种情况：形成密封树脂层(40或48)的树脂材料中很小部分会留在二者中间。然而，如果选择形成密封树脂层(40或48)的树脂材料，使得其在将芽状金属凸点56结合到导电焊盘34上的结合温度下具有的粘度小于1,000Pa·s，那么将树脂层从结合面间完全去除是可能的。 
在第二半导体器件50S能被精确放置在第一半导体器件50F上之前，优选地给出35微米的厚度作为密封树脂层(40或48)的最大厚度。特别地，第二半导体器件50S有被密封树脂层(40或48)覆盖的定位标记，并且将第二半导体器件50S放置到第一半导体器件50F上是通过定位相机检测定位标记完成。因此，优选地，在定位标记被定 位相机精确检测之前，密封树脂层(40或48)应该有小于35微米的厚度。 
如图6所示，根据本发明的倒装芯片型半导体器件32′可以用作制造BGA(焊球网格阵列)类型半导体封装。 
特别地，在制造BGA类型半导体封装中，准备封装板或内插板58。内插板58有多个排列在其上表面的导电焊盘60，和形成在导电焊盘60上的各个芽状金属凸点62。每个芽状金属凸点62以与前述完全相同的方式制得，并且芽状金属凸点62的排列与倒装芯片型半导体器件32′的导电焊盘34的排列有镜像关系。简而言之，每个芽状金属凸点62与相应的导电焊盘60相关，由此定义了一个电极终端。 
而且，内插板58具有多个排列在其下表面的导电焊盘64和结合在导电焊盘64上的各个焊球65，焊球65形成了焊球网格阵列(BGA)。用与前面参考图5C和5D所述的完全相同的方式，将倒装芯片型半导体器件32′安装在内插板58上。 
此外，如图7所示，根据本发明的倒装芯片型半导体器件32′可以直接安装在主板66上。 
特别地，主板66上有多个排列于其上表面的导电焊盘67和形成于导电焊盘67上的各个芽状金属凸点68。每个芽状凸点68都用与前述完全相同的方式制得，并且芽状金属凸点68的排列与倒装芯片型半导体器件32′的导电焊盘34的排列有镜像关系。简而言之，每个芽状金属凸点68与相应的导电焊盘67相关，由此定义了一个电极终端。用与前面参考图5C和5D所述的完全相同的方式，将倒装芯片型半导体器件32′安装在主板66上。 
如前所述，很明显，不论在什么情况下，采用根据本发明的倒装 芯片型半导体器件32′，都可在倒装芯片型半导体器件32′位于另一个半导体器件(50F)、内插板(58)、或主板(66)上的同时，进行填充工艺或树脂密封工艺。换句话说，根据本发明，倒装芯片型半导体器件32′安装之后可以完全省略填充工艺或树脂密封工艺。 
同时，根据本发明，由于可以精确控制形成密封树脂层40的树脂材料的量，可以避免密封树脂层(40或48)的胀出或密封树脂层(40或48)中产生气孔或孔洞，从而增加电子产品如芯片堆叠半导体封装，BGA类型半导体封装或主板的生产率。 
第二实施例 
参考图8A到8D，下面说明根据本发明的制造多个倒装芯片型半导体器件的制作工艺的第二实施例。 
首先，如图8A所示，准备硅片70。与前述第一实施例相似，硅片70的上表面通过形成网格状细槽(即划线)分割成很多半导体芯片区。注意，在图8A中，每个半导体芯片区的范围用标记72表示。硅片70已经经过各种已知方法处理过，从而每个半导体芯片区72制成一个半导体芯片或器件。 
而且，在每个半导体器件72上已经制成并排列了多个导电焊盘73。尽管没有画图示出，在硅片70的上表面可以形成二氧化硅层和钝化层，以使每个导电焊盘73暴露到外面。有机保护层，如聚酰亚胺层，可以替代二氧化硅层和钝化层。 
注意，每个导电焊盘73由合适的金属材料制成，如铝，金，铜等等。而且注意，在本实施例中，导电焊盘73可以以50微米或者小于50微米的间距排列。 
此外，如图8A所示，在各个导电焊盘73上已经形成多个柱状金 属凸点74。优选地，柱状金属凸点74由金制成，但合适的焊料也可以用来制作柱状金属凸点74。在导电焊盘73上的柱状金属凸点74的形成，可以采用例如光刻工艺和电镀工艺来执行。 
简而言之，在每个半导体器件72中，每个柱状金属凸点74与相应的导电焊盘73相关，由此定义了一个电极终端。 
如图8B所示，当准备好硅片70后，采用与上述第一实施例完全相同的方法在硅片70上形成密封树脂层75。也就是说，密封树脂层75的形成，可以通过如图3C、3D和3E的旋涂工艺或如图4A、4B和4C的层压工艺来执行。不论何种情况下，导电焊盘73和柱状金属凸点74都被密封树脂层75完全覆盖，如图8B所示。 
如图8C所示，在形成密封树脂层75后，具有粘性层77的划片树脂层76被应用并粘贴在硅片70下表面上。然后，如图8D所示，硅片70经过划片工艺，使之沿着网格状槽(未画出)被切开，在图8D中有分别用标记78所表示的三个切割槽。也就是说，硅片70被分割成多个倒装芯片型半导体器件72A，硅片70本身的每个分割部分形成了相应的倒装芯片型半导体器件72A的半导体衬底70′。 
与前述硅片30或被分割的半导体器件32′相似，处理过的硅片70或被分割的半导体器件72A可以在电子市场中出货和流通，用来制造紧凑半导体封装，如BGA(焊球网格阵列)类型半导体封装，芯片堆叠类型半导体封装等等。 
参考图9A到9D，下面说明使用根据本发明的倒装芯片型半导体器件72A制造芯片堆叠半导体封装的制作工艺。 
如图9A所示，准备第一半导体器件80F，然后使用合适的粘合剂84将其安置并粘贴到衬底82上。第一半导体器件80F有多个位于其上 表面的导电焊盘85，且每个导电焊盘85可以由合适的金属材料构成，如铝、金、铜等等。尽管没有画图示出，二氧化硅层和钝化层可以在第一半导体器件80F上表面形成，使每个导电焊盘85暴露在外面。有机保护层如聚酰亚胺层可以替代二氧化硅层和钝化层。 
注意，在本实施例中，尽管衬底82是作为布线板或内插板，但它可以包含包括在金属引线架中的安装台。 
如图9A所示，第一半导体器件80F也有多个柱状金属凸点86，它们形成在排列在其上表面中心区域的导电焊盘85上。与上述柱状金属凸点74相似，优选地，柱状金属凸点86可以由金制成，但合适的焊料，也可以用来形成柱状金属凸点86。而且，在导电焊盘85上的柱状金属凸点86的形成，可以由与上述柱状金属凸点74完全相同的方式执行。 
简而言之，在第一半导体器件80F中，每个柱状凸点86与相应的导电焊盘85相关，由此定义了一个电极终端。 
另一方面，如图9B所示，依照根据本发明制作工艺的第二实施例制造的倒装芯片型半导体器件(72A)被作为第二半导体器件80S，其特征是比第一半导体器件80F有更小的尺寸。注意，第一半导体器件80F的柱状金属凸点86的排列与第二半导体器件80S的柱状金属凸点74的排列有镜像关系。 
如图9C所示，在准备好第一和第二半导体器件80F和80S后，第二半导体器件80S被倒置并置于第一半导体器件80F上，以使第二半导体器件80S上各个柱状金属凸点74与第一半导体器件80F上表面中心区域的柱状金属凸点86对齐。 
接下来，如图9D所示，第二半导体器件80S通过超声压焊法或 热压焊法被压在第一半导体器件80F的上表面，以使第二半导体器件80S上各个柱状金属凸点74邻接并结合到第一半导体器件80F上表面中心区域的柱状金属凸点86上。也就是说，每个柱状金属凸点86都穿入密封树脂层75中，并且结合到相应的柱状金属凸点74上。然后，密封树脂层75完全硬化，由此柱状金属凸点74和86同与其相连的导电焊盘73和85一起被树脂密封。 
此后，位于第一半导体器件80F上表面周边区域的每个导电焊盘(未示出)，通过结合线，被电气连接到位于内插板82上相应的导电焊盘(未示出)上。那么，图9D所示组合是采用传递模塑法进行树脂密封的，实现了芯片堆叠半导体封装的制作。 
与上述倒装芯片型半导体器件32′相似，倒装芯片型半导体器件72A也可以用作制造BGA(焊球网格阵列)类型半导体封装。此外，倒装芯片型半导体器件72A可以直接安装到主板上。 
而且，与上述倒装芯片型半导体器件32′相似，通过使用根据本发明的倒装芯片半导体器件72A，都可在倒装芯片型半导体器件72A安装在另一个半导体器件、内插板、或主板上的同时，执行填充工艺或树脂密封工艺。换句话说，根据本发明，倒装芯片型半导体器件72A安装之后可以完全省略填充工艺或树脂密封工艺。 
此外，与上述倒装芯片型半导体器件32′相似，由于可以精确控制形成密封树脂层75的树脂材料的量，可以避免密封树脂层75的胀出或密封树脂层75中产生气孔或孔洞，从而增加电子产品如芯片堆叠半导体封装，BGA类型半导体封装或主板的生产率。 
与上述第一实施例相似，在第二实施例中，应该选择形成密封树脂层75的树脂材料，使其在将柱状金属凸点74结合到柱状金属凸点86上的结合温度下具有的粘度小于1,000Pa·s，以使形成密封树脂层 75的树脂材料能够从结合面间完全去除。 
而且，与上述第一实施例相似，优选地给出35微米的厚度作为密封树脂层75的最大厚度，以使在第二半导体器件80S上的定位标记能够被定位相机精确检测到，该相机用于将第二半导体器件80S放置到第一半导体器件80F上。 
参考图10A，说明采用根据本发明制作工艺的第二实施例制造的倒装芯片型半导体器件72A的修改。注意，在图10A中，修改的倒装芯片型半导体器件一般用标记72B表示，而且在图8A到8D中相同的标记代表相同的技术特征。 
在修改的倒装芯片型半导体器件72B中，密封树脂层75′包括包含多个平均直径小于10微米的导电固体颗粒88的填充物，其代替了密封树脂层75。密封树脂层75′可以通过各向异性导电膜(ACF)层压到硅片70′上表面来获得。注意，作为包含多个导电固体颗粒的树脂膜的各项异性导电膜从市场获得。而且，密封树脂层75′可以通过在硅片70′的上表面旋涂含有导电填充物(88)的未固化液态树脂材料来获得。 
如图10B所示，修改的倒装芯片型半导体器件72B也可以用来制造芯片堆叠半导体封装。特别地，以与参考图9C和9D所述完全相同的方式，通过将修改的倒装类型半导体器件72B作为第二半导体器件80S安装在如图9A所示的第一半导体器件80F上，来制造芯片堆叠半导体封装。 
从图10B明显看出，当第二半导体器件(80S或72B)的每个柱状凸点74被压到并结合到第一半导体器件80F的相应的柱状凸点86时，一小部分填充物或导电固体颗粒88被挤压在二者的结合面之间，从而柱状凸点74和86的氧化表面会被夹着的固体颗粒88磨破，使两个柱状凸点74和86间建立良好的电气连接。
在该修改的倒装芯片型半导体器件72B中，尽管密封树脂75′包含导电填充物(88)，但导电填充物(88)也可以由陶瓷颗粒或硬树脂颗粒构成的非导电填充物代替。 
第三实施例 
参考图11A到11D，下面说明根据本发明用于制造多个芯片倒装类型半导体器件的制作工艺的第三实施例。 
首先，如图11A所示，准备一个与上述第二实施例中使用的完全相同的硅片。注意，在图11A中，与图8A中相同的标记代表相同的技术特征。 
如图11B所示，准备硅片70的同时，准备一个划片树脂片90，其有层压在其上的粘性树脂片92。 
如图11C所示，在准备了硅片70和具有粘性树脂片92的划片树脂片90后，硅片70面向下施加到划片树脂片90的粘性树脂片92上，由此粘性树脂片92形成为硅片70上表面的密封树脂层，从而使导电焊盘73和柱状金属凸点74被密封树脂层92完全覆盖，如图11C所示。 
此后，如图11D所示，硅片70经过划片工艺，沿着网格状槽(未画出)被切开，有三个切割槽分别用标记94表示。也就是说，硅片70被分割成多个倒装芯片型半导体器件72C，硅片70本身的每个分割部分形成了相应的倒装芯片型半导体器件72C的半导体衬底70′。 
与上述的情况相似，处理过的硅片70或被分割的倒装芯片型半导体器件72C可以在电子市场中出货和流通，用来制造紧凑半导体封装，如BGA(焊球网格阵列)类型半导体封装，芯片堆叠类型半导体封装等等。
在第三实施例中，由于能够精确控制粘性树脂片或密封树脂层92的厚度，进而精确控制形成密封树脂层92的树脂材料的量，可以避免密封树脂层92的胀出或密封树脂层92中产生气孔或孔洞。从而增加电子产品如芯片堆叠半导体封装，BGA类型半导体封装或主板的生产率。 
而且，在第三实施例中，密封树脂层92可以包括由多个导电或非导电颗粒组成的填充物，如图10A和10B所述。 
在采用根据本发明的倒装芯片型半导体器件制造芯片堆叠半导体封装的上述制作工艺中，尽管倒装芯片型半导体器件安装于另一个独立的半导体器件上，但其也可以安装在制作于硅片中的半导体器件上，如图12A、12B和12C的示例性说明。 
特别地，在图12A中，标记96表示由根据本发明的制作工艺的第二实施例或第三实施例制造的倒装芯片型半导体器件，并且每个半导体器件96有在其上表面上形成的密封树脂层98。尽管在图12A中没有画出，但是当然，每个半导体器件96有多个位于并排列在其上表面的电极终端。这些电极终端的每一个都包括在每个半导体器件上表面上形成的导电焊盘和结合在导电焊盘上的柱状金属凸点，并且导电焊盘和柱状金属凸点被密封树脂层98所覆盖。 
另一方面，标号100表示硅片，其中制作有多个半导体器件，并且每个半导体器件有多个电极终端，每个电极终端包括形成在每个半导体器件上表面的导电焊盘(未画出)和结合在焊盘上的柱状金属凸点102。当然，硅片100上的每个半导体器件的柱状金属凸点102的排列与每个芯片倒装类型半导体器件96的柱状金属凸点(未画出)的排列有镜像关系。
如图12A代表性的表示，每个倒装芯片型半导体器件96被倒置并放置在硅片100的半导体器件上，以便所述倒装芯片型半导体器件96的柱状金属凸点与硅片100的相应的半导体器件的柱状金属凸点对齐。然后，所述倒装芯片型半导体器件96使用超声压焊法或热压焊法被压在相应的半导体器件上，从而倒装芯片型半导体器件96的柱状金属凸点结合到相应的半导体器件的各个柱状金属凸点102上，实现在硅片100上制得多个芯片堆叠半导体封装。 
如图12B所示，在倒装芯片型半导体器件96安装到硅片100的所有半导体器件上后，也就是说，在硅片100上完成芯片堆叠封装的制作后，采用合适的粘合剂将划片树脂片104粘到硅片100的下表面。然后，如图12C所示，硅片100经过划片工艺，使其沿网格状槽(未画出)切开，图12C中的标记106代表性地表示出三个切割槽。也就是，芯片堆叠封装被相互分开。此后，每个被分开的芯片堆叠封装用传递模塑法树脂密封，实现芯片堆叠半导体封装的制作。 
尤其，当根据本发明的倒装芯片型半导体器件具有相当小尺寸的特征时，即当倒装芯片型半导体器件的导电焊盘以小于50微米的间距排列时，同例如图9C所示的芯片倒装类型半导体器件并列放置在独立半导体器件的上表面的情况比较，如图12A、12B和12C的芯片堆叠半导体封装的制作工艺更优越处在于倒装芯片型半导体器件可以更容易地并列放置在硅片(100)的上表面。 
当然，如图12A、12B和12C所示的芯片堆叠半导体封装的制作工艺更适合制作这样的芯片堆叠半导体器件，即以图5B所示的相当大的尺寸为特征的倒装芯片型半导体器件(32′)制作的芯片堆叠半导体器件，其中导电焊盘以40微米或大于40微米的间距排列。 
最后，本领域技术人员应该理解，前面的说明是器件和工艺的优选实施例，而且对本发明的各种变化和修改都不偏离本发明的精神和范围。

Claims (8)

1.一种电子装置，包括：
具有第一电极终端的第一半导体器件；
第二半导体器件，所述第二半导体器件具有第二电极终端并且通过使用具有填充物的密封树脂层安装在所述第一半导体器件上，使得所述第一电极终端和所述第二电极终端穿入所述密封树脂层，以通过所述密封树脂层密封所述第一半导体器件和所述第二半导体器件之间的空间，
所述密封树脂层的所述填充物被挤压在所述第一电极终端和各个所述第二电极终端之间的结合面里，
所述填充物包括多个硬树脂颗粒。
2.根据权利要求1所述的电子装置，其中所述第一电极终端是金属凸点。
3.根据权利要求2所述的电子装置，其中所述金属凸点由金制成。
4.根据权利要求2所述的电子装置，其中所述金属凸点由焊接材料制成。
5.一种用于制造电子装置的方法，包括以下步骤：
制备第一半导体器件和第二半导体器件，所述第一半导体器件具有第一电极终端，所述第二半导体器件具有与各个所述第一电极终端电连接的第二电极终端；
在所述第二半导体器件的、所述第二电极终端侧的表面上形成含有填充物的密封树脂层；
在所述第一半导体器件上安装所述第二半导体器件，使得所述第一电极终端和所述第二电极终端穿入所述密封树脂层，以通过所述密封树脂层密封所述第一半导体器件和所述第二半导体器件之间的空间，
所述密封树脂层的所述填充物被挤压在所述第一电极终端和各个所述第二电极终端之间的结合面里，
所述填充物包括硬树脂颗粒。
6.根据权利要求5所述的方法，其中所述第一电极终端是金属凸点。
7.根据权利要求6所述的方法，其中所述金属凸点由金制成。
8.根据权利要求6所述的方法，其中所述金属凸点由焊接材料制成。
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