CN101188231A - 半导体器件和半导体晶片及其制造方法 - Google Patents
半导体器件和半导体晶片及其制造方法 Download PDFInfo
- Publication number
- CN101188231A CN101188231A CN200710199542.6A CN200710199542A CN101188231A CN 101188231 A CN101188231 A CN 101188231A CN 200710199542 A CN200710199542 A CN 200710199542A CN 101188231 A CN101188231 A CN 101188231A
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- Prior art keywords
- semiconductor chip
- semiconductor
- diaphragm
- wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Pressure Sensors (AREA)
Abstract
Description
Claims (11)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004194667A JP4383274B2 (ja) | 2004-06-30 | 2004-06-30 | 半導体装置および半導体ウエハの製造方法 |
JP2004-194667 | 2004-06-30 | ||
JP2004194667 | 2004-06-30 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100810989A Division CN100463172C (zh) | 2004-06-30 | 2005-06-29 | 半导体器件和半导体晶片及其制造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101188231A true CN101188231A (zh) | 2008-05-28 |
CN101188231B CN101188231B (zh) | 2010-04-14 |
Family
ID=35600009
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100810989A Active CN100463172C (zh) | 2004-06-30 | 2005-06-29 | 半导体器件和半导体晶片及其制造方法 |
CN200710199542.6A Active CN101188231B (zh) | 2004-06-30 | 2005-06-29 | 半导体器件和半导体晶片及其制造方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100810989A Active CN100463172C (zh) | 2004-06-30 | 2005-06-29 | 半导体器件和半导体晶片及其制造方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US7663244B2 (zh) |
JP (1) | JP4383274B2 (zh) |
CN (2) | CN100463172C (zh) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4383274B2 (ja) * | 2004-06-30 | 2009-12-16 | Necエレクトロニクス株式会社 | 半導体装置および半導体ウエハの製造方法 |
KR100809696B1 (ko) * | 2006-08-08 | 2008-03-06 | 삼성전자주식회사 | 사이즈가 상이한 복수의 반도체 칩이 적층된 멀티 칩패키지 및 그 제조방법 |
WO2010116694A2 (en) | 2009-04-06 | 2010-10-14 | Canon Kabushiki Kaisha | Method of manufacturing semiconductor device |
JP5489512B2 (ja) * | 2009-04-06 | 2014-05-14 | キヤノン株式会社 | 半導体装置の製造方法 |
JP5409084B2 (ja) | 2009-04-06 | 2014-02-05 | キヤノン株式会社 | 半導体装置の製造方法 |
JP5353628B2 (ja) * | 2009-10-15 | 2013-11-27 | 住友ベークライト株式会社 | 半導体装置の製造方法 |
JP2011108770A (ja) * | 2009-11-16 | 2011-06-02 | Sumitomo Bakelite Co Ltd | 半導体装置の製造方法、半導体装置、および電子部品の製造方法、電子部品 |
JP5601079B2 (ja) * | 2010-08-09 | 2014-10-08 | 三菱電機株式会社 | 半導体装置、半導体回路基板および半導体回路基板の製造方法 |
JP5717502B2 (ja) * | 2011-03-30 | 2015-05-13 | 信越ポリマー株式会社 | 半導体チップ用保持具及びその使用方法 |
US8916421B2 (en) | 2011-08-31 | 2014-12-23 | Freescale Semiconductor, Inc. | Semiconductor device packaging having pre-encapsulation through via formation using lead frames with attached signal conduits |
US9142502B2 (en) * | 2011-08-31 | 2015-09-22 | Zhiwei Gong | Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits |
CN103931063B (zh) * | 2011-11-10 | 2017-04-19 | 西铁城时计株式会社 | 光集成设备 |
US8597983B2 (en) | 2011-11-18 | 2013-12-03 | Freescale Semiconductor, Inc. | Semiconductor device packaging having substrate with pre-encapsulation through via formation |
KR102225809B1 (ko) | 2013-09-27 | 2021-03-11 | 주식회사 다이셀 | 반도체 소자 삼차원 실장용 충전재 |
JP2020013911A (ja) * | 2018-07-19 | 2020-01-23 | 東京エレクトロン株式会社 | 基板処理システム及び基板処理方法 |
KR102498148B1 (ko) * | 2018-09-20 | 2023-02-08 | 삼성전자주식회사 | 반도체 장치의 제조 방법 |
CN114121845A (zh) * | 2020-09-01 | 2022-03-01 | Jmj韩国株式会社 | 半导体封装 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3770631B2 (ja) | 1994-10-24 | 2006-04-26 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
US5861666A (en) * | 1995-08-30 | 1999-01-19 | Tessera, Inc. | Stacked chip assembly |
JP3920399B2 (ja) * | 1997-04-25 | 2007-05-30 | 株式会社東芝 | マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置 |
JP3563604B2 (ja) * | 1998-07-29 | 2004-09-08 | 株式会社東芝 | マルチチップ半導体装置及びメモリカード |
JP2000114206A (ja) | 1998-10-05 | 2000-04-21 | Sony Corp | 半導体パッケージの製造方法 |
JP2000208702A (ja) | 1999-01-14 | 2000-07-28 | Hitachi Ltd | 半導体装置およびその製造方法 |
US6307270B1 (en) * | 1999-08-05 | 2001-10-23 | Ming-Tung Shen | Electro-optic device and method for manufacturing the same |
JP4137328B2 (ja) | 1999-12-28 | 2008-08-20 | 光正 小柳 | 3次元半導体集積回路装置の製造方法 |
JP2001250913A (ja) | 1999-12-28 | 2001-09-14 | Mitsumasa Koyanagi | 3次元半導体集積回路装置及びその製造方法 |
US6627983B2 (en) * | 2001-01-24 | 2003-09-30 | Hsiu Wen Tu | Stacked package structure of image sensor |
US6559539B2 (en) * | 2001-01-24 | 2003-05-06 | Hsiu Wen Tu | Stacked package structure of image sensor |
SG111919A1 (en) * | 2001-08-29 | 2005-06-29 | Micron Technology Inc | Packaged microelectronic devices and methods of forming same |
US6611052B2 (en) * | 2001-11-16 | 2003-08-26 | Micron Technology, Inc. | Wafer level stackable semiconductor package |
TWI234253B (en) | 2002-05-31 | 2005-06-11 | Fujitsu Ltd | Semiconductor device and manufacturing method thereof |
JP2004140037A (ja) * | 2002-10-15 | 2004-05-13 | Oki Electric Ind Co Ltd | 半導体装置、及びその製造方法 |
JP3908146B2 (ja) | 2002-10-28 | 2007-04-25 | シャープ株式会社 | 半導体装置及び積層型半導体装置 |
JP3566957B2 (ja) * | 2002-12-24 | 2004-09-15 | 沖電気工業株式会社 | 半導体装置及びその製造方法 |
JP4383274B2 (ja) * | 2004-06-30 | 2009-12-16 | Necエレクトロニクス株式会社 | 半導体装置および半導体ウエハの製造方法 |
-
2004
- 2004-06-30 JP JP2004194667A patent/JP4383274B2/ja not_active Expired - Lifetime
-
2005
- 2005-06-02 US US11/142,417 patent/US7663244B2/en active Active
- 2005-06-29 CN CNB2005100810989A patent/CN100463172C/zh active Active
- 2005-06-29 CN CN200710199542.6A patent/CN101188231B/zh active Active
-
2007
- 2007-08-06 US US11/834,094 patent/US7812457B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN100463172C (zh) | 2009-02-18 |
JP2006019429A (ja) | 2006-01-19 |
US7812457B2 (en) | 2010-10-12 |
CN1716601A (zh) | 2006-01-04 |
JP4383274B2 (ja) | 2009-12-16 |
US20060014364A1 (en) | 2006-01-19 |
US7663244B2 (en) | 2010-02-16 |
CN101188231B (zh) | 2010-04-14 |
US20070278698A1 (en) | 2007-12-06 |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: SHENZHEN FANGDA AUTOMATION SYSTEM CO., LTD. Free format text: FORMER OWNER: FANGDA GROUP CO., LTD. Effective date: 20101102 |
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C56 | Change in the name or address of the patentee | ||
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Address after: Kanagawa, Japan Patentee after: Renesas Electronics Corporation Address before: Kanagawa, Japan Patentee before: NEC Corp. |
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ASS | Succession or assignment of patent right |
Owner name: DESAILA ADVANCED TECHNOLOGY COMPANY Free format text: FORMER OWNER: RENESAS ELECTRONICS CORPORATION Effective date: 20141013 |
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Effective date of registration: 20141013 Address after: American California Patentee after: Desella Advanced Technology Company Address before: Kanagawa, Japan Patentee before: Renesas Electronics Corporation |