CN101176200B - 倒装片安装方法、倒装片安装装置及倒装片安装体 - Google Patents
倒装片安装方法、倒装片安装装置及倒装片安装体 Download PDFInfo
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- CN101176200B CN101176200B CN2006800170449A CN200680017044A CN101176200B CN 101176200 B CN101176200 B CN 101176200B CN 2006800170449 A CN2006800170449 A CN 2006800170449A CN 200680017044 A CN200680017044 A CN 200680017044A CN 101176200 B CN101176200 B CN 101176200B
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Abstract
本发明涉及倒装片安装方法,保持电路基板(213)和半导体芯片(206),按规定间隔保持并对准位置,加热到由钎料粉(214)和树脂(215)构成的钎料树脂组成物(216)熔融的温度,利用毛细管现象供给钎料树脂组成物(216)使树脂(215)硬化时,使钎料树脂组成物(216)中的熔融的钎料粉(214)在保持电路基板(213)和半导体芯片(206)的规定间隔之间移动,通过自聚合及生长而电连接连接端子(211)和电极端子(207)。由此,能够将下一代半导体芯片安装在电路基板上,提供生产性及可靠性高的倒装片安装方法、其安装体及其安装装置。
Description
技术领域
本发明涉及将半导体芯片搭载在电路基板上的倒装片安装方法,特别是涉及还可以对应于窄节距的半导体芯片的、生产性高且连接的可靠性优良的倒装片安装方法、倒装片安装装置及倒装片安装体。
背景技术
近年来,伴随用于电子设备的半导体集成电路(以下,记为“半导体”)芯片的高密度、高集成化,半导体芯片的电极端子的多管脚、窄节距化迅速发展。这些半导体芯片安装到电路基板时,为了减少布线延迟,广泛采用倒装片安装。
并且,在倒装片安装中,一般是在半导体芯片的电极端子上形成钎料凸块,将该钎料凸块和形成在电路基板上的连接端子一起接合。
但是,为了将电极端子数超过5000那样的下一代半导体芯片安装在电路基板上,需要形成对应于100μm以下的窄节距的钎料凸块。但是,以现有的钎料凸块形成技术难以与此对应。
此外,需要形成对应于电极端子数的多个钎料凸块,所以要求降低成本的同时,还要求由搭载每个芯片的生产节拍的缩短带来的高的生产性。
同样,半导体芯片为了对应于电极端子数的增大,电极端子从周边配置变化为面(area)配置。
此外,从高密度化、高集成化的要求出发,预想半导体工艺从90nm向65nm、45nm发展。为了与此对应,强烈期望具有低介电常数的绝缘材料,为了实现这个,图谋导入多孔性的绝缘材料。但是,为了使用多孔性的绝缘材料,要减少对绝缘材料或各有源电路的损伤,而需要低载荷下的安装。进而,为了防止由半导体芯片的薄型化导致的处理时的破坏,期望低载荷的安装。特别是,面配置的情况下,需要在有源电路上构成电极,因此要求更低载荷下的安装方法。
因此,要求能应用于今后的半导体工艺的进展带来的薄型、高密度化的倒装片安装方法。
过去,作为钎料凸块的形成技术开发出镀敷法或丝网印刷法等。但是,镀敷法虽然适合于窄节距,却有工序变复杂等生产性的问题。此外,丝网印刷法的生产性优良,但是使用掩模这一点不适合窄节距。
在这种状况中,最近开发出几种在半导体芯片的电极端子或电路基板的连接端子上选择性地形成钎料凸块的技术。这些技术不仅适合形成微细的钎料凸块,还可以一起形成钎料凸块,所以生产性优良,作为可应用于下一代半导体芯片安装到电路基板的技术受注目。
其中一种是,将由钎料粉和助熔剂的混合物组成的焊料糊整面涂敷在表面形成有连接端子的电路基板上,通过加热电路基板,从而使钎料粉熔融,在浸润性高的连接端子上选择性地形成钎料凸块(例如,参照专利文献1)。
此外,有称为超级焊接法的技术。该技术是将以有机酸铅盐和金属锡为主要成分的糊状组成物(化学反应析出型焊锡)整面涂敷在形成有连接端子的电路基板上,通过加热电路基板,从而引起Pb和Sn的置换反应,将Pb和Sn的合金选择性地析出到电路基板的连接端子上(例如,参照专利文献2)。
此外,在过去的倒装片安装中,在形成有钎料凸块的电路基板上搭载半导体芯片之后,为了在电路基板上固定半导体芯片,还需要在半导体芯片和电路基板之间注入称为下底填充材料的树脂的工序。因此,存在增加工序数量或降低合格率的问题。
因此,作为同时进行相对置的半导体芯片的电极端子和电路基板的连接端子的电连接、和向电路基板固定半导体芯片的方法,开发出使用了各向异性导电材料的倒装片安装技术。这是如下的技术:向电路基板和半导体芯片之间供给包含导电粒子的热硬化性树脂,对半导体芯片加压的同时加热热硬化性树脂,从而同时实现半导体芯片和电路基板的电连接和在电路基板上固定半导体芯片(例如,参照专利文献3)。
但是,在如专利文献1所示的钎料凸块的形成方法和如专利文献2所示的超级焊接方法中,单纯地在电路基板上涂敷并供给糊状组成物时,产生局部的厚度和浓度的不均匀,每个电极端子和连接端子的钎料析出量不同,所以不能得到高度均匀的钎料凸块。并且,这些方法是在表面形成有连接端子的、有凹凸的电路基板上通过涂敷糊状组成物来供给,所以在成为凸部的连接端子上不能供给充分的钎料量,所以难以得到在倒装片中安装所需的期望的钎料凸块的高度。
并且,在专利文献3所示的方法中,在生产性和可靠性方面有如下所示的应解决的较多的问题。
这些问题中,第一是通过经由导电粒子的机械性接触得到各端子之间的电导通,所以难以实现稳定的导通状态。第二是间隔因在半导体芯片的电极端子和电路基板的连接端子之间存在的导电粒子的量而不固定,电接合变得不稳定。第三是为了实现稳定的电连接,需要以较高的压力载荷加压压合,存在由此容易产生半导体芯片的破坏的问题。
专利文献1:(日本)特开2000-94179号公报
专利文献2:(日本)特开平1-157796号公报
专利文献3:(日本)特开2000-332055号公报
发明内容
本发明为了解决上述课题,提供一种能够将具有多个电极端子的半导体芯片安装在电路基板上、且生产性及可靠性高的倒装片安装方法、倒装片安装装置及倒装片安装体。
本发明的倒装片安装方法,与具有多个连接端子的电路基板相对置而配置具有多个电极端子的半导体芯片,将上述电路基板的连接端子和上述半导体芯片的电极端子电连接;其特征在于,包括:保持工序,保持上述电路基板和上述半导体芯片;配置工序,将上述电路基板的上述连接端子和上述半导体芯片的电极端子,以接触状态保持并对准位置,或者以规定间隔保持并对准位置;加热工序,至少将上述电路基板或上述半导体芯片,加热到由钎料粉和树脂构成的钎料树脂组成物熔融的温度;供给工序,利用毛细管现象,从上述半导体芯片的至少一个端面方向,对保持上述电路基板和上述半导体芯片的上述规定间隔供给上述钎料树脂组成物;及硬化工序,使上述钎料树脂组成物中的上述树脂硬化;在上述供给工序中,使上述钎料树脂组成物中的熔融的上述钎料粉在保持了上述电路基板和上述半导体芯片的上述规定间隔之间移动,使上述钎料粉自聚合及生长,从而电连接上述连接端子和上述电极端子。
本发明的倒装片安装装置,用于将半导体芯片倒装片安装在电路基板上,其特征在于,包括:保持机构,保持上述电路基板和上述半导体芯片;配置机构,将上述电路基板的上述连接端子和上述半导体芯片的电极端子,以接触状态保持并对准位置,或者以规定间隔保持并对准位置;加热机构,至少将上述电路基板或上述半导体芯片,加热到由钎料粉和树脂构成的钎料树脂组成物熔融的温度;供给机构,利用毛细管现象,从上述半导体芯片的至少一个端面方向,对保持上述电路基板和上述半导体芯片的上述规定间隔供给上述钎料树脂组成物;及硬化机构,使上述钎料树脂组成物中的上述树脂硬化。
本发明的倒装片安装体,其特征在于,具有:具有多个连接端子的电路基板;具有与上述连接端子对置配置的多个电极端子的半导体芯片;及电连接上述电路基板的连接端子和上述半导体芯片的电极端子的钎料层;并包括:至少覆盖上述钎料层的第一绝缘性树脂;和覆盖上述第一绝缘性树脂、并固定上述电路基板和上述半导体芯片的第二绝缘性树脂。
附图说明
图1A~C是表示本发明的倒装片安装方法的基本机理的工序截面图。
图2A~E是说明本发明的实施方式1的倒装片安装方法的概略工序截面图。
图3A~B是说明本发明的实施方式1的钎料树脂组成物的供给方法的平面图。
图4A~B是说明本发明的实施方式1的钎料树脂组成物的供给方法的平面图。
图5A~E是说明本发明的实施方式2的倒装片安装方法的概略工序截面图。
图6A~E是说明本发明的实施方式3的倒装片安装方法的概略工序截面图。
图7A~E是说明本发明的实施方式3的倒装片安装方法的概略工序截面图。
图8A~C是说明本发明的实施方式3的倒装片安装方法的变形例的概略工序截面图。
图9A~E是说明本发明的实施方式4的倒装片安装方法的概略工序截面图。
图10A~B是说明本发明的实施方式4的倒装片安装方法的主要部分主要部分放大截面图。
图11是用于本发明的各实施方式的倒装片安装装置的主要部分结构截面图。
具体实施方式
本发明的倒装片安装方法如下:将电路基板的连接端子和半导体芯片的电极端子,以接触状态保持并对准位置,或者以规定间隔保持并对准位置;从半导体芯片的至少一个端面方向利用毛细管现象供给熔融的钎料树脂组成物;在使钎料树脂组成物中的树脂硬化时,上述供给时,使钎料树脂组成物中的熔融的钎料粉在保持了电路基板和半导体芯片的规定间隔之间移动,通过使钎料粉自聚合及生长,从而电连接连接端子和电极端子。
在本发明中,至少从一个方向供给的钎料树脂组成物的树脂成分可以从这以外的方向排出。
此外,在供给工序中,可以从半导体芯片的至少一个端面方向供给的钎料树脂组成物,沿着端面移动的同时供给。
此外,在保持工序中,电路基板及半导体芯片也可以通过吸引来保持。
此外,在保持工序中,可以是保持多个上述半导体芯片。
此外,具有半导体芯片搭载在具有多个外部连接端子的内插板上并将电路基板的连接端子和外部连接端子电连接的结构。
通过这些方法,能够以低载荷安装,所以可以使用薄型、面配置等的半导体芯片和低介电常数的绝缘材料。进而,由于使半导体芯片的电极端子和电路基板的连接端子的间隙保持在最适合的距离,所以通过电极端子和连接端子之间的均匀的接合,难以产生断线或高电阻接合等,能够提高合格率。并且,电连接而且以低载荷且同时进行通过树脂固定电路基板和半导体芯片,所以能够实现生产性及可靠性优良的倒装片安装体。
并且,本发明的倒装片安装方法,与具有多个连接端子的电路基板相对置而配置具有多个电极端子的半导体芯片,将电路基板的连接端子和半导体芯片的电极端子电连接;其特征在于,包括:保持工序,保持电路基板和半导体芯片;配置工序,将电路基板的连接端子和半导体芯片的电极端子,以接触状态保持并对准位置,或者以规定间隔保持并对准位置;第一加热工序,至少将电路基板或半导体芯片,加热到由钎料粉和树脂构成的钎料树脂组成物熔融的温度;第一供给工序,利用毛细管现象,从半导体芯片的至少一个端面方向,对保持了电路基板和半导体芯片的规定间隔供给钎料树脂组成物;及连接工序,使钎料树脂组成物中的熔融的钎料粉在保持了电路基板和半导体芯片的规定间隔之间移动,通过使上述钎料粉自聚合及生长而形成钎料层,电连接连接端子和电极端子;排出工序,排出钎料层以外的树脂组成物;第二加热工序,至少将电路基板或半导体芯片加热到钎料层不熔融而第二树脂熔融的温度第二供给工序,利用毛细管现象,从半导体芯片的至少一个端面方向,对保持电路基板和半导体芯片的规定间隔供给第二树脂;及硬化工序,使第二树脂硬化。
并且,在第一供给工序中,至少从一个方向供给的钎料树脂组成物可以从这以外的方向排出。
并且,在供给第二树脂的第二供给工序中,可以是包括:供给至少覆盖钎料层的侧面的第一绝缘性树脂的第一工序;及供给覆盖第一绝缘性树脂并填充电路基板和半导体芯片的规定间隔之间的第二绝缘性树脂的第二工序;第二树脂由第一绝缘性树脂和第二绝缘性树脂构成。
并且,可以是第一工序之后还包括暂时硬化第一绝缘性树脂的工序。
并且,可以是第一绝缘性树脂通过表面张力至少覆盖在钎料层的侧面。
并且,可以是第一绝缘性树脂由弹性模量低于第二绝缘性树脂的材料构成。
并且,可以是钎料树脂组成物是粘性体。
并且,可以是粘性体由树脂、高沸点溶剂或油构成。
通过这些方法,进一步减小在钎料层之间残留钎料粉的可能性,所以能够实现提高绝缘耐压、防止短路等电特性和对应力等机械特性优良的倒装片安装体。
本发明的倒装片安装装置,用于将半导体芯片倒装片安装在电路基板上,其特征在于,包括:保持机构,保持电路基板和半导体芯片;配置机构,将电路基板的连接端子和半导体芯片的电极端子,以接触状态保持并对准位置,或者以规定间隔保持并对准位置;加热机构,至少将电路基板或半导体芯片,加热到由钎料粉和树脂构成的钎料树脂组成物熔融的温度;供给机构,利用毛细管现象,从半导体芯片的至少一个端面方向,对保持电路基板和半导体芯片的规定间隔供给钎料树脂组成物;及硬化机构,使钎料树脂组成物中的树脂硬化。
进而,供给机构可以是分配器。
并且,保持机构可以是吸引机构。
并且,保持机构可以倾斜保持上述电路基板和上述半导体芯片。并且,加热机构还可以具有冷却机构。
并且,上述倒装片安装装置还包括检查半导体芯片和电路基板的电连接的检查机构。
通过该装置,可以制作可靠性优良、低成本且生产性优良的倒装片安装体。
本发明的倒装片安装体,其特征在于,具有:具有多个连接端子的电路基板;具有与连接端子对置配置的多个电极端子的半导体芯片;及电连接电路基板的连接端子和半导体芯片的电极端子的钎料层;并包括:至少覆盖钎料层的第一绝缘性树脂;和覆盖第一绝缘性树脂并固定电路基板和半导体芯片的第二绝缘性树脂。
并且,第一绝缘性树脂可以由弹性模量低于第二绝缘性树脂的材料构成。
通过该结构,能够实现连接等的可靠性和机械强度优良的倒装片安装体。
根据本发明的倒装片安装方法及其安装装置,能够使半导体芯片的电极端子和电路基板的连接端子的接合状态均匀,所以连接可靠性优良,并能够实现较高的生产效率。并且,不仅对倒装片、内插板的连接有效,对电路基板或布线基板等基板之间的连接也有效。
钎料粒子可以选择任一种来使用。例如,可以举出下面的表1所示的粒子。作为一例所举的表1所示的材料,可以单独使用,也可以适当组合使用。并且,若使用钎料粒子的熔点低于热硬化性树脂的硬化温度的材料,则使树脂流动并自聚合之后,再加热树脂使其硬化,可以进行电连接和利用树脂进行密封这一点较好。
[表1]
钎料粒子的组成 | 熔点(固相线)(℃) |
Sn-58Bi | 139 |
Sn-37Pb | 183 |
Sn-9Zn | 199 |
Sn-3.0Ag-0.5Cu | 217 |
Sn-3.5Ag | 221 |
钎料粒子的组成 | 熔点(固相线)(℃) |
Sn-0.7Cu | 228 |
12Sn-2.0Ag-10Sb-Pb | 240 |
钎料粒子优选的熔点是100~300℃,更好是如表1所示为139~240℃。熔点低于100℃时有耐久性产生问题的倾向。若熔点超过300℃,则树脂的选择变得困难。
钎料粒子优选的平均粒子直径是1~30μm的范围,更好是5~20μm的范围。平均粒子直径小于1μm时,由于钎料粒子的表面氧化,熔融变得困难,并且,具有过多地将时间花费在形成电连接体的倾向。若平均粒子直径超过30μm时,由于沉降,难以得到电连接体。并且,平均粒子直径可以用市售的粒度分布仪来测量。例如,可以使用堀场制作所激光衍射粒度测量仪(LA920)、岛津制作所激光衍射粒度测量仪(SALD2100)等进行测量。
接着,对树脂进行说明。作为树脂的代表性的例子,可以使用环氧树脂、苯酚树脂、硅树脂、邻苯二甲酸二烯丙基酯、呋喃树脂、三聚氰酰胺树脂等热硬化性树脂,聚酯弹性体、含氟树脂、聚酰亚胺树脂、聚酰胺树脂、芳香族聚酰胺树脂等热可塑性树脂、或光(紫外线)硬化树脂等,或者使用组合它们的材料。
钎料粒子和树脂的配合比例,按重量比最好是导电粒子∶树脂=76~4∶24~96的范围,更好是钎料粒子∶树脂=50~20∶50~80。钎料粒子和树脂最好是均匀混合之后使用。例如,钎料粒子30%重量比、环氧树脂70%重量比,利用混合器形成均匀的混合状态,在仍保持钎料粒子的分散状态的情况下形成糊状。该糊状物的优选粘度是20~100Pa·S(帕斯卡秒)的范围。
并且,在本发明的优选例子中,作为钎料粒子例如可以使用无铅且融点200~250℃的Sn·3Ag·0.5Cu钎料合金粒子。并且,树脂是热硬化性树脂的情况下,最好是树脂的硬化温度高于钎料的融点。这样,可以形成电连接体、或者在形成金属凸块的工序中硬化树脂,可以缩短作业工序。
以下,利用图1A-C说明得到本发明的构想的一例倒装片安装方法的基本机理。首先,如图1A所示,向形成有多个连接端子11的电路基板10上,供给含有钎料粉12、对流添加剂13及树脂14的钎料树脂组成物15。
接着,如图1B所示,夹着供给到电路基板10和半导体芯片20之间的钎料树脂组成物15,使电路基板10和半导体芯片20抵接。这时,具有多个电极端子21的半导体芯片20配置成与具有多个连接端子11的电路基板10相对置。并且,该状态下,加热电路基板10,使钎料树脂组成物15熔融。这里,电路基板10的加热温度在高于钎料粉12的熔点的温度下进行。熔融的钎料粉12在熔解的树脂14中相互结合,如图1C所示,通过在浸润性高的连接端子11和电极端子21之间自聚合而形成钎料接合体22。
并且,通过使树脂14硬化,将半导体芯片20固定在电路基板10上。
该方法的特征在于,在含有钎料粉12的钎料树脂组成物15中,还含有钎料粉12熔融的温度下沸腾的对流添加剂13。即,在钎料粉12熔融的温度下,包含在钎料树脂组成物15中的对流添加剂13沸腾。并且,通过沸腾的对流添加剂13在树脂14中对流,从而促进在树脂14中浮游的熔融的钎料粉12的移动。其结果,通过均匀生长的熔融钎料粉在浸润性较高的电路基板10的连接端子11和半导体芯片20的电极端子21之间自聚合,从而在连接端子11和电极端子21之间通过均匀且微小的钎料接合体22电连接。
即,上述方法在含有钎料粉的钎料树脂组成物中还包含对流添加剂,从而谋求附加强制移动熔融的钎料粉的手段。并且,对流添加剂可以是因加热而沸腾或蒸发的溶剂,在工序结束后几乎不残留在树脂中。
站在与此相同的技术观点,本发明不使用对流添加剂而使熔融的钎料粉利用毛细管现象供给并移动,从而实现了可靠性较高的新的倒装片安装方法及倒装片安装装置。并且,通过本发明的实施,能够实现高生产性和可靠性优良的倒装片安装体。
以下,参照附图详细说明本发明的实施方式。并且,为了容易理解,任意放大表示了附图。
(实施方式1)
以下,用图2A-E说明本发明的实施方式1的倒装片安装方法。图2A-E是说明本发明的实施方式1的倒装片安装方法的概略工序截面图。首先,如图2A所示,用拾取工具201对具有多个电极端子207的半导体芯片206进行保持。并且,通过设置在拾取工具201上的、例如由小孔构成的吸气通道203和吸气管202,利用真空吸附等吸引并保持半导体芯片206。
接着,如图2B所示,例如,在通过吸引等保持在工作台等保持台204上的具有多个连接端子211的电路基板213上,配置保持着半导体芯片206的拾取工具201。在配置中,例如通过摄像机等图像识别装置进行位置对准,以便半导体芯片206的电极端子207和电路基板213的连接端子211相对置。并且,通过将电路基板213收纳在设置于保持台204上的凹部(未图示)中,还能够限制电路基板213的位置并进行固定。
并且,在使半导体芯片206和电路基板213对准位置的状态下,使保持台204或拾取工具201移动到使半导体芯片206的电极端子207和电路基板213的连接端子211为规定间隔的位置。这时,所谓“规定间隔”是指以下所述的钎料树脂组成物能够利用毛细管现象浸入的同时,电极端子207和连接端子211不接触、且熔融的钎料粉能够浸入其间的程度。例如,考虑半导体芯片206的厚度等,调节到半导体芯片206的电极端子207和电路基板213的连接端子211的距离成为10μm~50μm左右。
并且,通过外部的加热器(未图示)或者组装在拾取工具201或保持台204上的加热器(未图示)等加热装置,例如将半导体芯片206或电路基板213加热到钎料粉熔融的温度(150℃~250℃)。
接着,如图2C所示,利用分配器等涂敷装置217,至少从半导体芯片206的一个端面方向,对具有规定间隔的间隙218,利用毛细管现象供给含有钎料粉214和树脂215的钎料树脂组成物216。这时,供给到间隙218中的钎料树脂组成物216一边在间隙218中流动,一边从相反方向(用空心箭头所示)排出至少树脂成分。这里,作为钎料粉例如使用Sn-Ag系列的钎料粉。
然后,在供给钎料树脂组成物216及一边流动一边排出的过程中,包含在钎料树脂组成物216中的钎料粉214通过加热而熔融。并且,熔融的钎料粉214在电路基板213的连接端子211和半导体芯片206的电极端子207之间自聚合及生长,从而形成将连接端子211和电极端子207电连接的钎料层219。即,伴随钎料树脂组成物216的流动,在其中浮游的熔融的钎料粉214选择性地自聚合在浸润性高的连接端子211及电极端子207上,从而最终在连接端子211和电极端子207之间形成钎料层219。
并且,考虑到熔融的钎料粉214的结合及连接端子211和电极端子207上的自聚合,在钎料树脂组成物216中极为局部且短时间地进行。因此,为了使自聚合在半导体芯片206的整个区域均匀进行并形成没有差异的均匀的钎料层219,需要强制移动在钎料树脂组成物216中浮游的熔融的钎料粉214的装置。
因此,根据本发明的实施方式1,加热状态下利用毛细管现象供给到间隙2 18中的钎料树脂组成物216,在间隙218中流动,树脂成分被排出到外部。在该过程中,具有与熔融的钎料粉214宛如在供给到间隙218中的钎料树脂组成物216内强制移动相同的作用效果。即,产生与图1A-C所示的由对流添加剂促进熔融的钎料粉移动同样的作用效果。
接着,如图2D所示,随着钎料树脂组成物216在间隙218中流动,依次在电极端子207和连接端子211之间形成钎料层219。并且,形成钎料层219之后,供给到间隙218中的树脂组成物216之中的树脂215例如是热塑性树脂的情况下,通过利用组装到拾取工具201或保持台204中的、例如水的循环或珀尔帖(ペルチエ)元件等冷却装置(未图示)的强制冷却或自然冷却等进行硬化。由此,半导体芯片206的电极端子207和电路基板213的连接端子211通过钎料层219电连接的同时,与下底填充件同样地通过树脂215固接或固定。并且,如果钎料树脂组成物216中的树脂215例如是热硬化性树脂,则可以将拾取工具201或保持台204暂时加热到树脂215硬化的温度以上使其硬化后,进行上述冷却。这时,当树脂215硬化收缩时,最好是将间隙218缩小到硬化收缩的程度。由此,可以防止由树脂215和半导体芯片206的剥离造成的固接强度的下降。
并且,如图2E所示,通过从拾取工具201取下,能够制作半导体芯片206倒装片安装在电路基板213上的倒装片安装体200。
若说明具体的一例,在图2B中,将半导体芯片206的电极端子207和玻璃钎维强化环氧含浸树脂电路基板213的连接端子211的间隔调节成为20μm。该状态下,利用分配器,如图2C-D所示那样从一个方向,对电路基板和半导体芯片表面之间,利用毛细管现象,浸入将双酚F型环氧树脂(ジヤパンエポキシレジン公司制的エピコ一ト806)70重量部、平均粒子直径12μm的Sn·3Ag·0.5Cu粉(熔点217℃)30重量部均匀地混合的钎料树脂糊料(加热到250℃),并向另一方向排出。这时的加热温度为250℃。然后冷却到室温,观察截面时,能够确认图2E的状态。
根据本发明的实施方式1,利用毛细管现象供给、通过熔融的钎料粉的自聚合形成的均匀的钎料层,能够可靠地进行半导体芯片的电极端子和电路基板的连接端子间的连接。
并且,通过使填充在电路基板和半导体芯片的间隙中的树脂硬化,能够将半导体芯片固定在电路基板上。
因此,可以同时进行半导体芯片的电极端子和电路基板的连接端子之间的电连接和半导体芯片向电路基板的固定,所以能够制作可靠性优良、生产性较高的倒装片安装体。
并且,利用毛细管现象供给钎料树脂组成物,并使其在间隙之间流动,所以在钎料树脂组成物中可以不含有对流添加剂。其结果,可以扩大钎料树脂组成物的选择范围。
并且,通过在以规定间隔保持的半导体芯片的电极端子和电路基板的连接端子之间的钎料树脂组成物中流动的熔融的钎料粉自聚合而形成钎料层,所以可以减小施加在半导体芯片及电路基板上的载荷。其结果,对于薄型化的半导体芯片等,也可以防止由安装时的载荷引起的变形,可以实现可靠性较高的倒装片安装体。
并且,在本发明的实施方式1中,作为钎料树脂组成物优选钎料粉熔融的温度下为液状或粘度下降的树脂。例如,作为在钎料粉熔融的温度下为液状的热硬化性树脂,可以使用环氧树脂、聚酰亚胺树脂、聚苯撑醚树脂、苯酚树脂、含氟树脂、异氰酸盐树脂等。并且,作为熔融的温度下粘度下降的热塑性树脂可以使用所有芳香族聚酯、含氟树脂、聚苯醚氧化物树脂、间规聚苯乙烯树脂、聚酰亚胺树脂、聚酰胺树脂、芳香族聚酰胺树脂、聚苯硫醚树脂等。
此外,钎料树脂组成物的供给不限于图3A所示的本发明的实施方式1的方法。例如,如图3B所示,可以一边沿半导体芯片206的一个端面方向移动一边供给。并且,如图4A所示,可以一边沿半导体芯片206的2个方向的端面移动一边供给,或者如图4B所示,可以从半导体芯片206的3个方向的端面供给钎料树脂组成物216。由此,能够使钎料树脂组成物216向间隙的供给变得均匀,并且,降低由气泡等造成的在半导体芯片和电路基板的间隙形成没有钎料树脂组成物的区域的可能性。
并且,通过图4及图5所示的供给方法,将多个半导体芯片206同时倒装片安装在电路基板213上时,可以大幅度削减倒装片安装体的制造时间和制造成本等,所以其效果较大。
并且,根据本发明的实施方式1,作为半导体芯片不限于由硅构成的半导体芯片,例如可以应用于硅-锗或镓-砷构成的半导体芯片等化合物半导体的倒装片安装。即,在由薄型的硅构成的半导体芯片或机械强度较弱的化合物构成的半导体芯片中,能够以较小的载荷倒装片安装半导体芯片,所以能够实现可靠性高的倒装片安装体。
并且,如图2B所示,示出在使半导体芯片206和电路基板213对准位置的状态下,将半导体芯片206的电极端子207和电路基板213的连接端子211形成为规定间隔的例子,但是,也可以在使半导体芯片206和电路基板213对准位置的状态下,使半导体芯片206的电极端子207和电路基板213的连接端子211接触。半导体芯片206上的电极大致平坦,相对于此,电路基板213的连接端子相对于基板表面形成为凸状,即使不留出规定间隔,半导体芯片206和电路基板213也产生与电路基板连接端子的厚度部分相当的间隙。通过该间隙,可以在半导体芯片206的电极端子207和电路基板213的连接端子211的周边自聚合。
并且,在本发明的实施方式1中,用水平地配置拾取工具和保持台的图进行了说明,但是不限于此。例如,可以倾斜配置成利用毛细管现象供给钎料树脂组成物的端面方向较高。由此,利用毛细管现象供给的同时,利用钎料树脂组成物的自重沿着倾斜落下,从而提高供给速度。其结果,提高钎料树脂组成物的间隙内的流动性,可以在短时间内进行倒装片安装。并且,在排出钎料树脂组成物的树脂成分的情况下,也可以在短时间内排出。因此,能够实现生产性优良的倒装片安装。
(实施方式2)
以下,利用图5A-E说明本发明的实施方式2的倒装片安装方法。
图5A-E是说明本发明的实施方式2的倒装片安装方法的概略工序截面图。本发明的实施方式2和实施方式1的不同点在于,在半导体芯片搭载于内插板上的状态下倒装片安装在电路基板上。在图5A-E中,对与图2A-E相同的构成要素附加相同的符号进行说明。
首先,如图5A所示,用拾取工具201保持至少搭载于内插板301上的半导体芯片206。这里,半导体芯片206通过倒装片安装法或引线接合法等安装在内插板301上。并且,半导体芯片206的多个电极端子(未图示)分别与形成在内插板301的表面的多个外部连接端子电连接。并且,内插板301通过设置在拾取工具201上的、例如经由小孔构成的吸气通道203和吸气管202被真空吸附并保持。
接着,如图5B所示,例如在通过吸引等保持于工作台等保持台204上的、具有多个连接端子211的电路基板213上,配置对搭载有半导体芯片206的内插板301进行保持的拾取工具201。在配置中,例如通过摄像机等图像识别装置等进行位置对准,以使得内插板301的外部连接端子302和电路基板213的连接端子211相对置。并且,通过将电路基板213收纳在设置于保持台204上的凹部(未图示)中,限制电路基板213的位置并进行固定。
然后,在将内插板301和电路基板213对准位置的状态下,将保持台204或拾取工具201移动到内插板301的外部连接端子302和电路基板213的连接端子211为规定间隔的位置。这时,所谓“规定间隔”是指以下所述的钎料树脂组成物利用毛细管现象浸入的同时,外部连接端子302和连接端子211不接触、且熔融的钎料粉能浸入其中的程度。例如为30μm~300μm左右。
进而,隔着半导体芯片206,利用外部的加热器(未图示)或组装在拾取工具201或保持台204上的加热器(未图示)等加热装置,例如加热到钎料粉熔融的温度(150℃~250℃)。
接着,如图5C所示,利用分配器等涂敷装置217,至少从内插板301的一个端面方向,对具有规定间隔的间隙218,利用毛细管现象供给含有钎料粉214和树脂215的钎料树脂组成物216。这时,供给到间隙218中的钎料树脂组成物216,在间隙218中流动,并且,至少树脂成分从与供给的方向相反的方向(用空心箭头表示)排出。这里,作为钎料粉例如使用Sn-Ag系的钎料粉。
并且,在供给钎料树脂组成物216及一边流动一边排出树脂成分的过程中,包含在钎料树脂组成物216中的钎料粉214通过加热而熔融。并且,熔融的钎料粉214在电路基板213的连接端子211和内插板301的外部连接端子302之间自聚合及生长,从而形成将连接端子211和外部连接端子302电连接的钎料层219。即,伴随钎料树脂组成物216的流动,在其中浮游的熔融的钎料粉214选择性地自聚合在浸润性高的连接端子211和外部连接端子302上,从而最终在连接端子211和外部连接端子302之间形成钎料层219。
接着,如图5D所示,随着钎料树脂组成物216在间隙218中流动,依次在外部连接端子302和连接端子211之间形成钎料层219。并且,形成钎料层219之后,通过例如组装在拾取工具201或保持台204中的、例如水循环或珀尔帖元件等冷却装置(未图示)进行的强制冷却或自然冷却等,使供给到间隙218中的钎料树脂组成物216中的、例如由热塑性树脂构成的树脂215硬化。由此,内插板301的外部连接端子302和电路基板213的连接端子211通过钎料层219电连接的同时,与下底填充材料同样地通过树脂215固接或固定。并且,如果钎料树脂组成物216中的树脂215例如是热硬化性树脂,则可以将拾取工具201或保持台204暂时加热到树脂215硬化的温度以上、使其硬化。这时,在树脂215硬化收缩的情况下,使间隙218缩小到硬化收缩的程度。由此,能够防止由树脂215和半导体芯片206的由剥离造成的固接强度的下降。
并且,如图5E所示,通过从拾取工具201上取下,能够制作搭载了半导体芯片206的内插板301倒装片安装在电路基板213上的倒装片安装体300。
根据本发明的实施方式2,得到与实施方式1同样的效果。
(实施方式3)
以下,利用图6A-E和图7A-E,说明本发明的实施方式3的倒装片安装方法。图6A-E和图7A-E是说明本发明的实施方式3的倒装片安装方法的概略工序截面图。并且,在图6A-E和图7A-E中,对于与图2A-E相同的构成要素附加相同的符号进行说明。
首先,如图6A所示,用拾取工具201保持具有多个电极端子207的半导体芯片206。并且,通过设置于拾取工具201上的、例如由小孔构成的吸气通道203和吸气管202,真空吸附并保持半导体芯片206。
接着,如图6B所示,例如在通过吸引等保持于工作台等保持台204上的、具有多个连接端子211的电路基板213上,配置保持了半导体芯片206的拾取工具201。在配置中,例如通过摄像机等图像识别装置进行位置对准,以使得半导体芯片206的电极端子207和电路基板213的连接端子211相对置。并且,通过将电路基板213收纳在设置于保持台204上的凹部(未图示)中,从而限制电路基板213的位置并进行固定。
然后,在将半导体芯片206和电路基板213对准位置的状态下,将保持台204或拾取工具201移动到半导体芯片206的电极端子207和电路基板213的连接端子211为规定间隔的位置。这时,所谓“规定间隔”是指以下所述的钎料树脂组成物能够利用毛细管现象浸入的同时,电极端子207和连接端子211不接触、且熔融的钎料粉能浸入其中的程度。例如为30μm~300μm左右。
进而,利用外部的加热器(未图示)或组装在拾取工具201或保持台204上的加热器(未图示)等加热装置,例如将半导体芯片206和电路基板213加热到钎料粉熔融的温度(150℃~250℃)。
接着,如图6C所示,利用分配器等涂敷装置217,至少从半导体芯片206的一个端面方向,对具有规定间隔的间隙218,利用毛细管现象供给含有钎料粉214和第一树脂401的钎料树脂组成物402。这时,供给到间隙218中的钎料树脂组成物402,在间隙218中流动,并且,树脂成分从与供给的方向相反的方向(用空心箭头表示)排出。这里,作为钎料粉例如使用Sn-Ag系的钎料粉。
并且,在供给钎料树脂组成物402及一边流动一边排出树脂成分的过程中,包含在钎料树脂组成物402中的钎料粉214通过加热而熔融。并且,熔融的钎料粉214在电路基板213的连接端子211和半导体芯片206的电极端子207之间自聚合及生长,从而形成将连接端子211和电极端子207电连接的钎料层219。即,在钎料树脂组成物402中浮游的熔融的钎料粉214选择性地自聚合在浸润性高的连接端子211或电极端子207上,从而最终在连接端子211和电极端子207之间形成钎料层219。
接着,如图6D所示,随着钎料树脂组成物402在间隙218中流动,依次在电极端子207和连接端子211之间形成钎料层219。并且,如图6E所示,在整个半导体芯片206的电极端子207和电路基板213的连接端子211之间形成均匀且没有差异的钎料层219。这时,间隙218在第一树脂401未硬化的状态下被填充。400是得到的倒装片安装体。
以上的工序与实施方式1相同,以后的工序不同。
接着,如图7A所示,排出填充在间隙218中的第一树脂401。这里,第一树脂401的排出例如通过从喷嘴403注入惰性气体或空气等,利用注入的空气的挤压来执行。并且,注入气体等的同时,也可以通过减压的吸气管404吸引排出第一树脂401。这些可以同时进行。并且,在排出第一树脂401时,为了在通过气体的挤压或减压引起的吸引中不破坏钎料层219的形状,最好是将拾取工具201和保持台204的温度设定为钎料层219的硬化温度以下、且第一树脂401的熔融温度以上,使钎料层219固化。由此,如图7B所示,成为半导体芯片206和电路基板213仅由钎料层219结合的状态。
接着,如图7C所示,从间隙218排出第一树脂401之后,利用分配器等涂敷装置217至少从半导体芯片206的一个端面方向,对具有规定间隔的间隙218,利用毛细管现象供给第二树脂405。
由此,如图7D所示,半导体芯片206和电路基板213的间隙再次由第二树脂405填充。并且,通过使第二树脂405硬化,将半导体芯片206固接在电路基板213上。这里,例如如果第二树脂405是热硬化性树脂,则将拾取工具201或保持台204加热到第二树脂405硬化的温度以上来进行第二树脂405的硬化。
接着,如图7E所示,通过从拾取工具201及保持台204取下,完成半导体芯片206倒装片安装在电路基板213上的倒装片安装体400。
根据本发明的实施方式3的方法,通过改变在连接电路基板213的连接端子211的半导体芯片206的电极端子207的钎料层219的形成过程中使用的第二树脂405的材料,从而能够制作可靠性更高的倒装片安装体400。
即,在形成钎料层219的连接工序中,作为第一树脂401可以使用具有适合于确保熔融的钎料粉214的流动性的粘度的树脂。并且,在将半导体芯片206固接在电路基板213的硬化工序中,作为第二树脂405可以使用具有下底填充材料的作用的同时缓和热膨胀差的、例如添加了无机添加剂等树脂。并且,分别独立地以最佳的组合选择这些树脂,从而更可靠地执行半导体芯片206与电路基板213的电连接及机械固接。
并且,第一树脂401不需要具有硬化性,所以不限于实施方式1例示的热硬化性树脂或热塑性树脂等树脂材料,可以使用具有适当粘度的粘性体。
此外,作为粘性体的材料可以使用在钎料粉熔融的温度下不沸腾的高沸点溶剂或油等。
例如,作为高沸点溶剂可以使用丁基卡必醇、丁基卡必醇乙酸酯等,作为油可以使用硅油等。这些粘性体的粘度不特别限制,但是,作为熔融的钎料粉容易移动且可以利用毛细管现象向半导体芯片206和电路基板213之间的间隙供给的粘度,最好是10Pa·s以下的粘度。
此外,根据本发明的实施方式3,在形成了钎料层219时,即使熔融的钎料粉214未自聚合而少量残留在第一树脂401中,在形成了钎料层219后,残留了钎料粉214的第一树脂401从间隙218排出,所以能够回避钎料层219之间的泄漏、绝缘耐压的下降等发生。
以下,利用图8A-C说明本发明的实施方式3的倒装片安装方法的应用例。并且,到实施方式3中说明的图6A-E的各工序为止相同,与图7A-E所示的工序不同。即,用图8A-C的工序代替了图7A-E的工序。
图8A-C是说明本发明的实施方式3的倒装片安装方法的变形例的概略工序截面图。
首先,如图8A所示,在间隙218中填充钎料树脂组成物402、形成钎料层219之后,利用分配器等涂敷装置217,至少从半导体芯片206的一个端面方向,对具有规定间隙的间隙218,利用毛细管现象供给第二树脂405。这时,残留在钎料树脂组成物402中的钎料粉214和第一树脂401通过第二树脂405的供给而排出。
然后,如图8B所示,半导体芯片206和电路基板213的间隙218再次由第二树脂405填充。并且,通过使第二树脂405硬化,将半导体芯片206固接在电路基板213上。这里,例如当第二树脂405是热硬化性树脂时,可以通过将拾取工具201或保持台204加热到第二树脂405硬化的温度的以上来进行第二树脂405的硬化。
接着,如图8C所示,通过从拾取工具201及保持台204上取下,来完成半导体芯片206倒装片安装在电路基板213上的倒装片安装体500。
通过该方法,得到与实施方式3同样的效果,并且简化工序,所以能够进一步提高生产性。
(实施方式4)
以下,利用图9A-E和图10A-E,说明本发明的实施方式4的倒装片安装方法及倒装片安装体。并且,实施方式4与实施方式3中说明的到图7B为止的工序相同,其以后的工序不同。
本发明的实施方式4进一步提高了实施方式3的倒装片安装体的钎料层间的绝缘耐压等电特性,以下详细地进行说明。
图9A-E是说明本发明的实施方式4的倒装片安装方法的概略工序截面图,图10A-B是放大表示图9A-E的主要工序的主要部分放大截面图。
首先,图9A与实施方式3的图7B同样,是表示将含有熔融的钎料粉和第一树脂的钎料树脂组成物供给到间隙218中形成钎料层219之后,从间隙218排出树脂的状态的图。
接着,如图9B所示,从间隙排出钎料层219以外的树脂后,利用分配器等涂敷装置217,至少从半导体芯片206的一个端面方向,对具有规定间隔的间隙,利用毛细管现象供给第一绝缘性树脂501。
这里,作为第一绝缘性树脂501例如可以使用环氧树脂和挠性环氧树脂的混合物等的低弹性模量的热硬化性树脂。并且,第一绝缘性树脂501以低弹性模量为特征,所以最好不含有一般在用作下底填充材料的树脂中含有的无机添加剂等。
并且,供给到间隙中的第一绝缘性树脂501不需要一定完全填充间隙,当第一绝缘性树脂501在间隙内流动排出时,最好是以至少与钎料层219的侧面接触的方式供给。
接着,如图9C所示,进而排出填充在间隙218中的第一绝缘性树脂。这里,如实施方式3的图7A所示,例如通过从喷嘴注入惰性气体或空气等,利用注入的空气的挤压来执行第一绝缘性树脂的排出。
由此,如图10A所示,成为在钎料层219的侧面覆盖了第一绝缘性树脂501的状态。这被认为是第一绝缘性树脂501因表面张力而覆盖在钎料层219的侧面。
并且,钎料层219的侧面以外的半导体芯片206或电路基板213的表面,可以由第一绝缘性树脂501覆盖。
接着,如图9D所示,利用分配器等涂敷装置217至少从半导体芯片206的一个端面方向,对具有规定间隔的间隙,利用毛细管现象供给第二绝缘性树脂502。
这里,第二绝缘性树脂502作为下底填充材料可以使用固接半导体芯片206和电路基板213的、例如能够使用含有无机添加剂的绝缘耐压高的树脂等。这时,如图10B所示,第二绝缘性树脂502填充在间隙218中,以便覆盖第一绝缘性树脂501。即,实施方式3的第二树脂由第一绝缘性树脂501和第二绝缘性树脂502构成。
并且,在供给第二绝缘性树脂502时,在供给了第一绝缘性树脂501之后,最好是暂时硬化第一绝缘性树脂501,以便覆盖钎料层219的侧面的第一绝缘性树脂501不会熔融而脱落。暂时硬化例如可以通过加热拾取工具201或保持台204来进行。
并且,如图9E所示,半导体芯片206的电极端子207和电路基板213的连接端子211由钎料层219电连接,钎料层219由第一绝缘性树脂501覆盖。并且,通过用第二绝缘性树脂502固接半导体芯片206和电路基板213而制作倒装片安装体600。
一般,下底填充材料通过添加无机添加剂,来匹配半导体芯片206和电路基板213的热膨胀系数并增大弹性模量、硬化收缩,从而确保半导体芯片206的电极端子207和电路基板213的连接端子211的连接性。
但是,若为了具有较高的弹性模量和较高的收缩性,例如施加温度循环等,则应力集中在半导体芯片206的电极端子207及电路基板213的连接端子211上,由剥离等造成可靠性下降。
根据本发明的实施方式4,钎料层隔着低弹性模量的第一绝缘性树脂被第二绝缘性树脂(相当于下底填充材料)覆盖,所以可以利用第一绝缘性树脂来缓和由第二绝缘性树脂产生的应力。由此,防止钎料层间的绝缘耐压的下降,并且能够缓和由温度循环等发生的应力,所以能够实现电特性和可靠性优良的倒装片安装体。
并且,利用各实施方式说明了本发明,但是,这样的记述不是限定事项,可以进行各种变形,并且,可以相互应用各实施方式。
并且,在本发明的实施方式中,用Sn-Ag系的焊锡说明了钎料粉,但不限于此。例如也可以是Sn-Zn系、Sn-Bi系等无Pb焊锡。
并且,用图11说明用于本发明的各实施方式的倒装片安装装置。
图11是用于本发明的各实施方式的倒装片安装装置的主要部分结构截面图。
如图11所示,倒装片安装装置的主要构成要素有保持半导体芯片的拾取工具201和保持电路基板的保持台204。并且,拾取工具201和保持台204具有用于保持半导体芯片或电路基板的吸引用的吸气管202、用于加热的加热器等加热装置700。
并且,加热装置可以设置在外部。并且,具有供给钎料树脂组成物的分配器等涂敷装置217。此外,虽未图示,为了半导体芯片和电路基板的位置对准,具有摄像机等图像识别装置、及根据其信息能够三维地对准拾取工具201和保持台204的位置来配置的移动装置。并且,各装置的详细的说明已在实施方式中说明,所以省略。
此外,在上述倒装片安装装置中,也可以搭载具有与电路基板连接来检查电特性的探针等检查装置。由此,能够一边监视半导体芯片和电路基板的基于钎料层的连接状态,一边检查倒装片安装。其结果,能够制作合格率高、可靠性优良的倒装片安装体。
工业可利用性
根据本发明,不仅可以应用于窄节距化发展的下一代半导体芯片的倒装片安装,并且能用于期望生产性和可靠性优良的倒装片安装的领域。
Claims (38)
1.一种倒装片安装方法,与具有多个连接端子的电路基板相对置而配置具有多个电极端子的半导体芯片,将上述电路基板的连接端子和上述半导体芯片的电极端子电连接;其特征在于,包括
保持工序,保持上述电路基板和上述半导体芯片;
配置工序,将上述电路基板的上述连接端子和上述半导体芯片的电极端子,以接触状态保持并对准位置;
加热工序,至少将上述电路基板或上述半导体芯片,加热到由钎料粉和树脂构成的钎料树脂组成物熔融的温度;
供给工序,从上述半导体芯片的至少一个端面方向,对以接触状态保持的上述电路基板和上述半导体芯片之间,利用毛细管现象供给上述钎料树脂组成物;及
硬化工序,使上述钎料树脂组成物中的上述树脂硬化;
在将上述钎料树脂组成物供给到以接触状态保持的上述电路基板和上述半导体芯片之间后,使上述钎料树脂组成物中的熔融的上述钎料粉移动,使上述钎料粉自聚合及生长,从而电连接上述连接端子和上述电极端子。
2.如权利要求1所述的倒装片安装方法,其特征在于,
在上述供给工序中,从至少一个端面方向供给的上述钎料树脂组成物的树脂成分从上述至少一个端面方向以外的方向排出。
3.如权利要求1所述的倒装片安装方法,其特征在于,
在上述供给工序中,从上述半导体芯片的至少一个端面方向供给的上述钎料树脂组成物,沿着上述端面移动的同时供给。
4.如权利要求1所述的倒装片安装方法,其特征在于,在上述保持工序中,上述电路基板及上述半导体芯片通过吸引来保持。
5.如权利要求1所述的倒装片安装方法,其特征在于,
在上述保持工序中,同时保持多个上述半导体芯片。
6.如权利要求1所述的倒装片安装方法,其特征在于,
上述半导体芯片搭载在具有多个连接端子的内插板上,并且将搭载了上述半导体芯片的上述内插板和上述电路基板电连接。
7.如权利要求1所述的倒装片安装方法,其特征在于,
在通过上述钎料树脂组成物电连接了上述连接端子和上述电极端子之后,
进而排出上述钎料层以外的树脂成分,
至少将上述电路基板或上述半导体芯片加热到上述钎料层不熔融而第二树脂熔融的温度;
从上述半导体芯片的至少一个端面方向,对以接触状态保持的上述电路基板和上述半导体芯片之间,利用毛细管现象供给上述第二树脂;
使上述第二树脂硬化。
8.如权利要求7所述的倒装片安装方法,其特征在于,
上述钎料树脂组成物的树脂成分从上述至少一个端面方向以外的方向排出。
9.如权利要求8所述的倒装片安装方法,其特征在于,
在供给上述第二树脂时,包括:
供给至少覆盖上述钎料层的侧面的第一绝缘性树脂的第一工序;及
供给覆盖上述第一绝缘性树脂、并对上述电路基板和上述半导体芯片之间进行填充的第二绝缘性树脂的第二工序;
上述第二树脂由上述第一绝缘性树脂和上述第二绝缘性树脂构成。
10.如权利要求9所述的倒装片安装方法,其特征在于,
上述第一工序之后还包括暂时硬化上述第一绝缘性树脂的工序。
11.如权利要求9所述的倒装片安装方法,其特征在于,
上述第一绝缘性树脂通过表面张力至少覆盖在上述钎料层的侧面。
12.如权利要求9所述的倒装片安装方法,其特征在于,上述第一绝缘性树脂由弹性模量低于上述第二绝缘性树脂的材料构成。
13.如权利要求1所述的倒装片安装方法,其特征在于,
上述钎料树脂组成物是粘性体。
14.一种倒装片安装方法,与具有多个连接端子的电路基板相对置而配置具有多个电极端子的半导体芯片,将上述电路基板的连接端子和上述半导体芯片的电极端子电连接;其特征在于,包括
保持工序,保持上述电路基板和上述半导体芯片;
配置工序,将上述电路基板的上述连接端子和上述半导体芯片的电极端子,以规定间隔保持并对准位置;
加热工序,至少将上述电路基板或上述半导体芯片,加热到由钎料粉和树脂构成的钎料树脂组成物熔融的温度;
供给工序,从上述半导体芯片的至少一个端面方向,对保持上述电路基板和上述半导体芯片的上述规定间隔,利用毛细管现象供给上述钎料树脂组成物;及
硬化工序,使上述钎料树脂组成物中的上述树脂硬化;
在将上述钎料树脂组成物供给到保持上述电路基板和上述半导体芯片的上述规定间隔之间后,使上述钎料树脂组成物中的熔融的上述钎料粉移动,使上述钎料粉自聚合及生长,从而电连接上述连接端子和上述电极端子。
15.如权利要求14所述的倒装片安装方法,其特征在于,
在上述供给工序中,从至少一个端面方向供给的上述钎料树脂组成物的树脂成分从上述至少一个端面方向以外的方向排出。
16.如权利要求14所述的倒装片安装方法,其特征在于,
在上述供给工序中,从上述半导体芯片的至少一个端面方向供给的上述钎料树脂组成物,沿着上述端面移动的同时供给。
17.如权利要求14所述的倒装片安装方法,其特征在于,在上述保持工序中,上述电路基板及上述半导体芯片通过吸引来保持。
18.如权利要求14所述的倒装片安装方法,其特征在于,
在上述保持工序中,同时保持多个上述半导体芯片。
19.如权利要求14所述的倒装片安装方法,其特征在于,
上述半导体芯片搭载在具有多个连接端子的内插板上,并且将搭载了上述半导体芯片的上述内插板和上述电路基板电连接。
20.如权利要求14所述的倒装片安装方法,其特征在于,
在通过上述钎料树脂组成物电连接了上述连接端子和上述电极端子之后,
进而排出上述钎料层以外的树脂成分,
至少将上述电路基板或上述半导体芯片加热到上述钎料层不熔融而第二树脂熔融的温度;
从上述半导体芯片的至少一个端面方向,对保持上述电路基板和上述半导体芯片的上述规定间隔,利用毛细管现象供给上述第二树脂;
使上述第二树脂硬化。
21.如权利要求20所述的倒装片安装方法,其特征在于,
上述钎料树脂组成物的树脂成分从上述至少一个端面方向以外的方向排出。
22.如权利要求21所述的倒装片安装方法,其特征在于,
在供给上述第二树脂时,包括:
供给至少覆盖上述钎料层的侧面的第一绝缘性树脂的第一工序;及
供给覆盖上述第一绝缘性树脂、并对上述电路基板和上述半导体芯片的规定间隔之间进行填充的第二绝缘性树脂的第二工序;
上述第二树脂由上述第一绝缘性树脂和上述第二绝缘性树脂构成。
23.如权利要求22所述的倒装片安装方法,其特征在于,
上述第一工序之后还包括暂时硬化上述第一绝缘性树脂的工序。
24.如权利要求22所述的倒装片安装方法,其特征在于,
上述第一绝缘性树脂通过表面张力至少覆盖在上述钎料层的侧面。
25.如权利要求22所述的倒装片安装方法,其特征在于,上述第一绝缘性树脂由弹性模量低于上述第二绝缘性树脂的材料构成。
26.如权利要求14所述的倒装片安装方法,其特征在于,
上述钎料树脂组成物是粘性体。
27.一种倒装片安装装置,用于将半导体芯片倒装片安装在电路基板上,其特征在于,包括
保持机构,保持上述电路基板和上述半导体芯片;
配置机构,将上述电路基板的上述连接端子和上述半导体芯片的电极端子以接触状态保持并对准位置;
加热机构,至少将上述电路基板或上述半导体芯片,加热到由钎料粉和树脂构成的钎料树脂组成物熔融的温度;
供给机构,从上述半导体芯片的至少一个端面方向,利用毛细管现象供给上述钎料树脂组成物;及
硬化机构,使上述钎料树脂组成物中的上述树脂硬化;
在将上述钎料树脂组成物供给到以接触状态保持的上述电路基板和上述半导体芯片之间后,使上述钎料树脂组成物中的熔融的上述钎料粉移动,使上述钎料粉自聚合及生长,从而电连接上述连接端子和上述电极端子。
28.如权利要求27所述的倒装片安装装置,其特征在于,
上述供给机构是分配器。
29.如权利要求27所述的倒装片安装装置,其特征在于,
上述保持机构是吸引机构。
30.如权利要求27所述的倒装片安装装置,其特征在于,
上述保持机构倾斜保持上述电路基板和上述半导体芯片。
31.如权利要求27所述的倒装片安装装置,其特征在于,
上述加热机构还具有冷却机构。
32.如权利要求27所述的倒装片安装装置,其特征在于,
还包括检查上述半导体芯片和上述电路基板的电连接的检查机构。
33.一种倒装片安装装置,用于将半导体芯片倒装片安装在电路基板上,其特征在于,包括
保持机构,保持上述电路基板和上述半导体芯片;
配置机构,将上述电路基板的上述连接端子和上述半导体芯片的电极端子以规定间隔保持并对准位置;
加热机构,至少将上述电路基板或上述半导体芯片,加热到由钎料粉和树脂构成的钎料树脂组成物熔融的温度;
供给机构,从上述半导体芯片的至少一个端面方向,利用毛细管现象供给上述钎料树脂组成物;及
硬化机构,使上述钎料树脂组成物中的上述树脂硬化;
在将上述钎料树脂组成物供给到保持上述电路基板和上述半导体芯片的规定间隔之间后,使上述钎料树脂组成物中的熔融的上述钎料粉移动,使上述钎料粉自聚合及生长,从而电连接上述连接端子和上述电极端子。
34.如权利要求33所述的倒装片安装装置,其特征在于,
上述供给机构是分配器。
35.如权利要求33所述的倒装片安装装置,其特征在于,
上述保持机构是吸引机构。
36.如权利要求33所述的倒装片安装装置,其特征在于,
上述保持机构倾斜保持上述电路基板和上述半导体芯片。
37.如权利要求33所述的倒装片安装装置,其特征在于,
上述加热机构还具有冷却机构。
38.如权利要求33所述的倒装片安装装置,其特征在于,
还包括检查上述半导体芯片和上述电路基板的电连接的检查机构。
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JP4495158B2 (ja) * | 2005-03-15 | 2010-06-30 | パナソニック株式会社 | フリップチップ実装方法、バンプ形成方法、フリップチップ実装装置、およびバンプ形成装置 |
KR101181140B1 (ko) * | 2005-03-29 | 2012-09-14 | 파나소닉 주식회사 | 플립칩 실장방법 및 기판간 접속방법 |
US20090085227A1 (en) * | 2005-05-17 | 2009-04-02 | Matsushita Electric Industrial Co., Ltd. | Flip-chip mounting body and flip-chip mounting method |
EP1996002B1 (en) * | 2006-03-16 | 2017-07-05 | Panasonic Intellectual Property Management Co., Ltd. | Bump forming method and bump forming apparatus |
US8772087B2 (en) | 2009-10-22 | 2014-07-08 | Infineon Technologies Ag | Method and apparatus for semiconductor device fabrication using a reconstituted wafer |
US8609462B2 (en) | 2011-10-12 | 2013-12-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for forming 3DIC package |
JP5912741B2 (ja) * | 2012-03-27 | 2016-04-27 | 日東電工株式会社 | 接合シート、電子部品およびその製造方法 |
KR101955335B1 (ko) * | 2012-11-14 | 2019-03-07 | 삼성전자주식회사 | 스탬프 구조체 및 이를 이용한 전사 방법 |
US20140291834A1 (en) * | 2013-03-27 | 2014-10-02 | Micron Technology, Inc. | Semiconductor devices and packages including conductive underfill material and related methods |
JP6519407B2 (ja) * | 2015-08-26 | 2019-05-29 | 日亜化学工業株式会社 | 発光装置及び発光装置の製造方法 |
US10957672B2 (en) * | 2017-11-13 | 2021-03-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method of manufacturing the same |
CN107932418A (zh) * | 2017-12-20 | 2018-04-20 | 东莞市勇兴富五金塑胶有限公司 | 屏类板类产品辅助安装工具 |
JP7108492B2 (ja) * | 2018-08-06 | 2022-07-28 | 株式会社ディスコ | 保護部材形成装置 |
JP2022020286A (ja) * | 2020-07-20 | 2022-02-01 | 株式会社ディスコ | 保護部材形成装置で用いるシート、及び保護部材形成方法 |
US11961817B2 (en) * | 2021-02-26 | 2024-04-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Apparatus and method for forming a package structure |
CN117464113B (zh) * | 2023-12-27 | 2024-04-02 | 淄博美林电子有限公司 | 一种igbt模块的端子焊接方法 |
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