CN100573840C - 安装体及其制造方法 - Google Patents

安装体及其制造方法 Download PDF

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Publication number
CN100573840C
CN100573840C CNB2006800133295A CN200680013329A CN100573840C CN 100573840 C CN100573840 C CN 100573840C CN B2006800133295 A CNB2006800133295 A CN B2006800133295A CN 200680013329 A CN200680013329 A CN 200680013329A CN 100573840 C CN100573840 C CN 100573840C
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mentioned
solder
resin
fixing body
electrode
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CN101164151A (zh
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小岛俊之
中谷诚一
山下嘉久
北江孝史
小松慎五
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

本发明的安装体(100)包括半导体元件(10)和安装基板(30)，该半导体元件(10)具备形成有元件电极(12)的表面(10a)和与表面(10a)相对的背面(10b)，该安装基板(30)形成有具备电极端子(32)的布线图案(35)；半导体元件(10)的背面(10b)与安装基板(30)相接；半导体元件(10)的元件电极(12)和形成在安装基板(30)上的布线图案(35)的电极端子(32)通过钎料粒子聚合而成形为桥形状的钎料接合体(20)电连接。由此，半导体元件的元件电极和安装基板的电极端子能够以微细节距连接。

Description

安装体及其制造方法
技术领域
本发明涉及安装体及其制造方法，特别是涉及半导体元件安装在安装基板上的安装体及其制造方法。
背景技术
随着近年的电子设备的小型化、高功能化，推进构成电子设备的半导体元件的多针脚化及各种部件的小型化，搭载它们的印制基板的布线数量和密度飞快地增加。特别是，从半导体元件(半导体芯片)引出的引脚数、端子数快速增加，从而印制基板(布线基板)的微细化发展，其结果，微细节距连接技术变得重要。
若对微细节距连接技术大致进行区分，有引线接合(WB)法、倒装片接合法(FC)法、带式自动接合(tape automated bonding，TAB)法，以下简单地进行说明。
在引线接合(WB)法中，主要使用金线(直径20～25μm)，连接半导体芯片的电极和引脚框的电极，赋予热和超声波，通过固相扩散进行金线和两者的电极的连接。WB法例如在专利文献1中公开。在倒装片接合(FC)法中，在半导体芯片上形成凸块(突起电极)，将该凸块连接在布线基板的电极上。其特征是形成半导体芯片的电极形成面和布线基板的电极形成面相对置的形态。FC法例如在专利文献2中公开。在TAB法中，将半导体芯片暂时连接在带引脚布线的长形带上，然后，在带引脚芯片的状态下从带上脱离，将其引脚连接在基板上。在TAB法中，基本上是以卷到卷的方式自动地进行该工艺。TAB法例如在专利文献3中公开。
专利文献1：(日本)特开平4-286134号公报
专利文献2：(日本)特开2000-36504号公报
专利文献3：(日本)特开平8-88245号公报
参照图21A及21B说明专利文献1公开的WB法。并且，图21A是表示引线接合状态的俯视图，图21B是沿着图21A中的I-I线的截面图。
在WB法中，将半导体芯片501管芯接合(粘片)在引脚框504的一部分(管芯焊盘)上之后，通过利用接合线503而将半导体芯片501的引线接合焊盘502和引脚框504的外部端子505(内引脚部)进行引线接合来执行。然后，包含半导体芯片501及外部端子505的内引脚部的区域通过密封树脂506进行树脂密封，例如，制作如图22所示那样的树脂密封体(半导体模块)500。从密封树脂506露出的外部端子505连接在布线基板(未图示)上，由此，半导体芯片501和布线基板被电连接。
但是，WB法中存在如下的问题。首先，有半导体元件部件(这里是包含半导体芯片501的模块500)的安装面积增大的问题。即，在WB法中，不是将半导体芯片501直接安装在布线基板上，而是通过接合线503在引脚框504的外部端子505上连接半导体芯片501，因此，不管半导体模块500的尺寸(元件尺寸或部件尺寸)怎样，都比半导体芯片501大，因此，半导体模块500的安装面积增大。
并且，将半导体芯片501的引线接合焊盘502和引线框504的外部端子505一个一个用接合线503连接，存在端子数量越多，越费作业工夫的问题。而且，根据排列在引脚框504上的外部端子505的节距，规定半导体元件500的节距，因此限制节距变窄。
接着，参照图23说明专利文献2所示的FC法。图23示出了利用FC法安装的半导体器件600的截面结构。
FC法是在设置于基板601的布线图案602上隔着凸块603连接半导体芯片605的电极604的方法。若详细描述，在设置于基板601的规定的布线图案602上，隔着凸块603连接具备形成有晶体管等的灵敏区606的半导体芯片605的电极604，从而安装成在基板601和半导体芯片605之间具有间隙。然后，在基板601和半导体芯片605之间的间隙以埋设布线图案602、凸块603、电极604的方式充入树脂进行树脂密封，从而形成密封树脂607。这样，构成利用FC法形成的半导体器件600。
但是，FC法存在如下的问题。首先，有半导体芯片605的位置对准困难的问题。这是因为，在FC法中，使半导体芯片605的电极形成面朝向下方，将半导体芯片605安装在基板601上，不能从外面直接看到半导体芯片605的凸块603，因此，位置对准变得非常严格。进而，FC法中的半导体芯片605的电极604的节距比WB法中的外部端子505的节距狭窄，这种情况也成为位置对准变得困难的主要原因之一。
并且，存在基板601容易变得高价格的问题。其原因是需要形成有与半导体芯片605的电极604的节距对应的精细图案的布线图案602的基板601，除此之外，半导体芯片605的电极604排列成分区阵列式的情况下，基板601容易形成多层。并且，在FC法中，由于是半导体芯片605和基板601通过凸块603连接的结构，若不尽力使半导体芯片605和基板601的线膨胀系数一致，则会对凸块603等施加应力。因此，需要使两者的线膨胀系数一致，并且，该线膨胀系数的匹配变得严格，从这样的观点出发，也会提高基板601的成本。
并且，半导体芯片605通过凸块603与基板601连接，因此，散热性恶化。即，半导体芯片605不是通过如WB法时那样的面配置在基板601上，而是通过点配置在基板601上，因此，散热性差。因此，需要最初不得不形成凸块603的工夫。
接着，参照图24及图25说明专利文献3所示的TAB法。图24表示利用TAB法的半导体器件700的截面结构，图25表示将该半导体器件700安装在安装基板709上的结构。
图24所示的半导体器件700包括薄膜载带的基膜702和配置在基膜702上开孔的器件孔702b中的半导体IC芯片701。在基膜702上形成有铜箔布线703，并且，半导体IC芯片701的电极701a与设置在铜箔布线703的内侧前端部的内引脚703a连接。铜箔布线703中的内引脚703a的外侧部分设有外部连接用焊接区703b，在焊接区703b上形成有钎料凸块706。在基膜702上开设有器件孔702a，在焊接区703b的中央部设有通孔703c。在除了焊接区703b以外的薄膜载带上形成有涂覆阻焊层704，在器件孔702b中形成有保护半导体IC芯片701的密封树脂705。
在该半导体器件700中，钎料凸块706具有外引脚的作用，如图25所示，钎料凸块706连接在安装基板709上的焊盘709a上，通过成批回流焊方式，由TAB法得到的半导体器件700安装在安装基板709上。
但是，TAB法中存在如下的问题。首先，内引脚接合(ILB)工序和外引脚接合(OLB)工序是不同的工序，所以，执行TAB法需要人工。即，在图24所示的例子中，在半导体IC芯片701的电极701a上连接内引脚703a的工序和在焊接区703b上形成半导体凸块706的工序是不同类型的工序，很复杂。并且，需要用密封树脂705密封配置在器件孔702b中的半导体IC芯片701，这也需要人工。进而，使用面积大于半导体IC芯片701的基膜702，所以有扩大安装面积那样的其它方面的问题。
发明内容
本发明是鉴于上述各点而做出的，提供一种使用了不同于引线接合(WB)法、倒装片接合(FC)法、带式自动接合(TAB)法的新的微细节距连接技术的安装体及其制造方法。
本发明的安装体包括半导体元件和安装基板，该半导体元件具备形成有元件电极的表面和与上述表面相对的背面，该安装基板形成有具备电极端子的布线图案；其特征在于，上述半导体元件的背面与上述安装基板相接；上述半导体元件的上述元件电极和形成在上述安装基板上的上述布线图案的上述电极端子，通过钎料粒子聚合而成形为桥形状的钎料接合体电连接。
本发明的安装体的制造方法，其特征在于，包括：工序(a)，将半导体元件的背面配置在安装基板上，其中，该半导体元件具备形成有元件电极的表面和与上述表面相对的上述背面，该安装基板形成有具备电极端子的布线图案；工序(b)，将树脂中含有钎料粉和该树脂被加热时沸腾的对流添加剂的钎料树脂膏，提供给包含上述元件电极及上述电极端子的区域；工序(c)，在具有形成电极图案的第一面和与上述第一面相对的第二面的基板中，使上述基板的第一面夹着上述钎料树脂膏与上述半导体元件的上述表面及上述安装基板对置，以便上述基板的上述电极图案覆盖上述元件电极及上述电极端子；以及工序(d)，通过加热上述钎料树脂膏，使上述对流添加剂沸腾，从而在上述树脂中产生对流，使上述钎料树脂膏中的上述钎料粉自聚合，形成至少连结上述元件电极和上述电极图案之间、及上述电极端子和电极图案之间的钎料部件。
附图说明
图1是示意地表示本发明实施方式1涉及的安装体的结构的截面图。
图2是示意地表示本发明实施方式1涉及的安装体结构的平面图。
图3A～图3E是用于说明本发明实施方式1涉及的安装体的制造方法的工序截面图。
图4是示意地表示本发明实施方式2涉及的安装体的截面图。
图5是示意地表示本发明实施方式3涉及的安装体的截面图。
图6A是示意地表示本发明实施方式3涉及的安装体的应用例的截面图，图6B是该电极图案的平面结构图，图6C是该电极图案42的平面结构图。
图7是示意地表示本发明实施方式4涉及的安装体的截面图。
图8是示意地表示本发明实施方式5涉及的安装体的截面图。
图9是示意地表示本发明实施方式5涉及的安装体的应用例的截面图。
图10是示意地表示本发明实施方式5涉及的安装体的应用例的截面图。
图11是示意地表示本发明实施方式5涉及的安装体的应用例的截面图。
图12是示意地表示本发明实施方式6涉及的安装体的截面图。
图13是示意地表示本发明实施方式6涉及的安装体的应用例的截面图。
图14是示意地表示本发明实施方式6涉及的安装体的应用例的截面图。
图15A～图15E是用于说明本发明实施方式6涉及的安装体的制造方法的工序截面图。
图16是示意地表示本发明实施方式6涉及的安装体的应用例的截面图。
图17是示意地表示本发明实施方式6涉及的安装体的应用例的截面图。
图18是示意地表示本发明实施方式6涉及的安装体的应用例的平面图。
图19是用于说明本发明实施方式7涉及的安装体的钎料接合体的自聚合形成状态的截面的显微镜照片。
图20是用于说明图19所示的钎料接合体的自聚合形成状态的结构的截面图。
图21A是表示现有的引线接合(WB)状态的俯视图、图21B是沿图21A中的I-I线的截面图。
图22是现有的树脂密封体(半导体模块)的截面图。
图23是利用现有的倒装片接合(FC)法安装的半导体器件的截面图。
图24是利用了现有的带式自动接合(TAB)法的半导体器件的截面图。
图25是将现有的半导体器件安装在安装基板上的结构的截面图。
图26A-C是说明本发明的一实施例中的钎料接合体的形成机理的截面图。
具体实施方式
本发明的安装体的半导体元件的元件电极和形成在安装基板上的布线图案的电极端子通过钎料粒子聚合成形为桥状的钎料接合体电连接。成形为该桥状的钎料接合体通过加热包含钎料粒子、树脂和对流添加剂的钎料树脂膏，使对流添加剂沸腾，从而在树脂中产生对流，使钎料粒子聚合，通过将元件电极和电极端子之间连接成桥状而形成。即，通过加热，膏中的对流添加剂产生沸腾，随着该沸腾，钎料粒子聚合(以下称为“自聚合”)，在电极间形成桥状的钎料接合体。这时，若钎料粒子也已熔融，则钎料粒子自聚合在浸润性高的元件电极和电极端子上，可形成钎料接合体。
在本发明中，还包括形成了电极图案的对置基板，优选电极图案夹着钎料接合体配置在半导体元件上。优选对置基板是透光性基板。这是因为，能够在观察钎料接合体的接合状态的同时形成。
此外，对置基板可以是挠性基板。并且，还可以在对置基板的相反面也形成有电极图案。并且，还可以在上述对置基板的相反面上形成有屏蔽层。
此外，在安装基板的一部分形成有凹部，半导体元件的背面与凹部的底面相接。
此外，安装基板的上表面和半导体元件的上述表面最好是位于大致相同面上。并且，上述半导体元件最好是厚度10μm以上100μm以下的薄型半导体芯片。这样，可以减小整体的厚度。
并且，钎料接合体最好是埋设在树脂中。上述树脂由在包含于上述钎料树脂膏中的树脂中减少钎料成分的树脂构成。该树脂最好也是透光性树脂。这是因为，可以一边观察钎料接合体的接合状态，一边形成。
接着，在本发明方法中，可以在形成连结成桥状的钎料接合体之后，再除去对置基板。由此，可以通过电极图案进行电检测。
并且，最好在元件电极、电极端子、或电极图案的表面预先实施提高钎料浸润性的涂覆处理。这样，容易形成钎料接合体。所谓提高钎料浸润性的涂覆处理是指例如形成厚度为0.05～30μm的钎料镀层、镀金层等的处理。
此外，钎料接合体可以具有沿着电极图案延伸的部位。
钎料树脂膏由树脂、钎料粒子、及上述树脂被加热时沸腾的对流添加剂构成，作为树脂使用热硬化性树脂(例如环氧树脂)，作为钎料粒子使用无Pb钎料粒子。作为对流添加剂可以使用溶剂(例如有机溶剂)，若举出一例，可以使用异丙醇(沸点82.4℃)、醋酸丁酯(沸点125～126℃)、丁基卡必醇(沸点201.9℃)、乙二醇(沸点197.6℃)等。对流添加剂在树脂中的含量没有特别限制，但最好是以0.1～20重量％的比例包含在树脂中。
此外，对流添加剂的“对流”是指作为运动方式的对流，通过使沸腾的对流添加剂在钎料树脂膏中运动，从而只要是对分散在树脂中的金属粒子(钎料粒子)赋予运动能量、提供促进金属粒子的移动的作用的运动，是哪种方式都没有关系。并且，对流添加剂除了其本身沸腾产生对流之外，还可以使用通过树脂的加热而产生气体(H2O、CO2、N2等气体)的对流添加剂，作为这样的例子可以举出包含结晶水的化合物、通过加热分解的化合物、或发泡剂。
钎料粒子可以选择任一种来使用。例如，可以举出下面的表1所示的粒子。作为一个例子举出的表1所示的材料可以单独使用，也可以适当组合来使用。此外，若使用钎料粒子的融点低于热硬化性树脂的硬化温度的材料，则使树脂流动进行自聚合之后，再加热树脂使其硬化，进行电连接和树脂的密封这一点较好。
(表1)
  钎料粒子的组成   融点(固相线)(℃)
  Sn-58Bi   139
  Sn-37Pb   183
  Sn-9Zn   199
  Sn-3.0Ag-0.5Cu   217
  Sn-3.5Ag   221
  Sn-0.7Cu   228
  12Sn-2.0Ag-10Sb-Pb   240
钎料粒子的较好的融点是100～300℃，更好是如表1所示那样为139～240℃。融点低于100℃时，有耐久性产生问题的倾向。若融点超过300℃，树脂的选择变得困难。
钎料粒子的较好的平均粒子直径是1～30μm的范围，更好是5～20μm的范围。平均粒子直径小于1μm时，由于钎料粒子的表面氧化，熔融变得困难，并且，具有过多地将时间花费在形成电连接体的倾向。若平均粒子直径超过30μm时，由于沉降，难以得到电连接体。并且，平均粒子直径可以用市售的粒度分布仪来测量。例如，可以使用堀场制作所激光衍射粒度测量仪(LA920)、岛津制作所激光衍射粒度测量仪(SALD2100)等进行测量。
接着，对树脂进行说明。作为树脂的代表性的例子，可以使用环氧树脂、苯酚树脂、硅树脂、邻苯二甲酸二烯丙酯、呋喃树脂、三聚氰酰胺树脂等热硬化性树脂，聚酯弹性体、含氟树脂、聚酰亚胺树脂、聚酰胺树脂、芳香族聚酰胺树脂等热塑性树脂、或光(紫外线)硬化树脂等，或者使用组合它们的材料。
钎料粒子和树脂的配合比例，按重量比最好是导电粒子∶树脂＝70～30∶30～70的范围，更好是钎料粒子∶树脂＝60～40∶40～60。钎料粒子和树脂最好是均匀混合之后使用。例如，钎料粒子50％重量比、环氧树脂50％重量比，利用混合器形成均匀的混合状态，对其添加对流添加剂，在仍保持钎料粒子的分散状态的情况下形成膏状。
并且，在本发明的优选例子中，作为钎料粒子例如可以使用无铅且融点200～230℃的钎料合金粒子。并且，树脂是热硬化性树脂的情况下，最好是树脂的硬化温度比钎料的融点高。这样，可以形成电连接体，在形成金属凸块的工序中硬化树脂，可以缩短作业工序。
并且，在形成钎料接合体之后，清洗未硬化状态的钎料树脂膏，填充其它树脂(也可以是相同种类的树脂)进行硬化。该情况下，作为包含在用于形成钎料接合体的钎料树脂膏中的树脂，不需要使用热硬化性或光硬化性的树脂。并且，从后面填充的树脂是热硬化性树脂的情况下，最好是树脂的硬化温度比钎料的融点低。这是因为钎料接合体在树脂硬化时不再变形的缘故。
根据本发明，半导体元件的元件电极和安装基板的电极端子通过自聚合形成的钎料接合体电连接，因此，可以提供不同于引线接合(WB)法、倒装片接合(FC)法、带式自动接合(TAB)法的新的微细节距连接技术。
接着，利用附图对本发明的一个实施例中的形成钎料接合体的机理进行说明。
首先，如图26A所示，在形成有多个连接端子211的电路基板210上供给包含金属粒子(例如钎料粉)212及对流添加剂213和树脂214的钎料树脂膏215。对流添加剂213是钎料树脂膏215被加热时沸腾而产生对流的添加剂。
接着，如图26B所示，在钎料树脂膏215的表面抵接具有多个电极端子221的半导体芯片220。这时，半导体芯片220的电极端子221配置成与电路基板210的连接端子211对置。并且，在该状态下加热钎料树脂膏215。在此，钎料树脂膏215的加热温度设为比金属粒子212的融点及对流添加剂213的沸点高的温度。
通过加热而熔融的金属粒子212在钎料树脂膏215中相互结合，如图26C所示，在浸润性高的连接端子211和电极端子221之间进行自聚合。由此，形成将半导体芯片220的电极端子221和电路基板210的连接端子211之间进行电连接的钎料接合体222。然后，使树脂214硬化或固化，在电路基板210上固定半导体芯片220。
该技术的特征在于，在加热了钎料树脂膏215时，对流添加剂213沸腾，通过沸腾的对流添加剂213在钎料树脂膏215中产生对流，促进分散在钎料树脂膏215中的金属粒子212的移动。由此，均匀地进行金属粒子212的结合，自聚合地形成钎料接合体(钎料凸块)222。在此，钎料树脂膏215中的树脂214进一步考虑了金属粒子能够自由地浮游、移动的“海”的作用，但是金属粒子212彼此的结合过程在极短的时间内结束，因此无论设置多少金属粒子212可自由移动的“海”，也只能进行局部的结合，所以成为该“海”的树脂214和对流添加剂212的对流促进是重要的。通过该树脂214和对流添加剂212的组合，自聚合地形成钎料凸块222。并且，钎料凸块222在自聚合地形成的同时，作为钎料凸块的性质自聚合地形成。
本发明者们得到上述那样的设想，进一步进行应用展开，完成了本发明。
以下，参照附图说明本发明实施方式。在以下的附图中，为了简化说明，对于实质上具有相同功能的构成要素用相同的参照符号表示。并且，本发明不限于以下的实施方式。
(实施方式1)
首先，参照图1说明本发明实施方式涉及的安装体。图1示意地表示本实施方式的安装体100的截面结构。
本实施方式的安装体100由具有元件电极12的半导体元件10和形成有具备电极端子32的布线图案35的安装基板30构成。半导体元件10具备形成有元件电极12的表面10a和与表面10a相对的背面10b，半导体元件10的背面10b与安装基板30相接。并且，半导体元件10的元件电极12和布线图案35的电极端子32通过自聚合形成的钎料接合体20电连接。这里，自聚合地形成的钎料接合体20不是预先制作图1所示的钎料制的部件并将其配置在元件电极12、电极端子32上，而是经过规定的工艺，在元件电极12及电极端子32上生长形成的。其工艺的内容后面叙述。
在本实施方式的结构中，具有形成了电极图案42的基板40，基板40夹着树脂25配置在半导体元件10上，以便使形成有电极图案42的面40a与半导体元件10的表面10a相对置。并且，钎料接合体20与基板40的电极图案42相接的同时形成在树脂25中。基板40优选为透光性基板，例如可以使用玻璃基板、透光性树脂基板。在本实施方式中使用玻璃基板。
图1所示的安装基板30是硬性基板(典型的印制基板)，在安装基板30的一部分形成有凹部37。并且，半导体元件10的背面10b与凹部37的底面相接。在该例子中，安装基板30的上表面30a和半导体元件10的表面10a位于大致相同面(作为一例±50μm)上，因此，元件电极12的上表面和电极端子32的上表面也大致位于相同的高度。
半导体元件10例如是裸片。并且，半导体芯片(裸片)10的厚度例如是50～500μm。在图1所示的例子中，元件电极12排列(周边排列)在芯片表面10a的周边区域。具有外围排列的元件电极12的半导体元件10通过本实施方式的钎料接合体20连接在安装基板30上的平面结构例表示在图2中。
如图1及图2所示，半导体芯片10的元件电极12通过钎料接合体20与电极端子32电连接。电极端子32形成在布线图案35的一端，最好是形成岛状。钎料接合体20从元件电极12向上方延伸，沿着基板40的电极图案42形成，到达电极端子32。树脂25位于钎料接合体20的周围，邻接的钎料接合体20通过树脂25彼此绝缘。并且，形成桥状。
钎料接合体20自聚合形成的同时，对元件电极12及电极端子32自聚合地形成。因此，元件电极12及电极端子32与钎料接合体20之间的位置偏移实质上不存在，自动地对应于元件电极12及电极端子32的图案形成钎料接合体20.并且，钎料接合体20在元件电极12和电极端子32之间接合成桥状。
在本实施方式中，构成钎料接合体20的金属(钎料)是低融点金属，例如，使用Sn-Ag类钎料(还包括添加了Cu等的钎料)。并且，不限于Sn-Ag类钎料(还包括添加了Cu等的钎料)，只要是融点在100～300℃的范围的低融点金属，就可以利用。例如，作为其它钎料粒子，可以使用Sn-Zn类、Sn-Bi类钎料等无Pb钎料、Pb-Sn共晶钎料、或Cu-Ag合金等低融点金属等。在本实施方式中，使用了材料为Sn-Ag-Cu、平均粒子直径为20μm的钎料粒子。
此外，作为树脂25使用了环氧树脂等热硬化性树脂。在本实施方式的结构中，树脂25优选使用透光性的树脂(例如环氧树脂)。树脂25的厚度(即，从芯片表面10a到基板40的下表面40a的距离)例如是500μm以下，更好是10μm以上100μm以下。树脂25至少覆盖钎料接合体20的周围、元件电极12的周围、及电极图案42的周围。形成在安装基板30上的布线图案35及形成在基板40上的电极图案42例如由铜构成，其厚度例如是5μm～35μm。
本实施方式的结构的连接方法是不同于上述的引线接合法、倒装片接合法、TAB法的新的连接方法，如下所述，具有各种特点及优点。
首先，根据本实施方式的结构，能够将半导体元件10的背面配置在基板30上，与WB法同样地利用管芯接合，可以将半导体元件10设置在安装基板30的凹部37内。并且，半导体元件10的背面10b与安装基板30接触，可以使散热性变得优良。
而且，通过沿着基板40的电极图案42形成的钎料接合体20，可以将半导体元件10和基板30电连接。即，能够通过钎料接合体20将元件电极12和电极端子32成批电连接。换言之，不需要像WB法那样一个一个连线。因此，与WB法相比，可以减轻作业的人工。并且，该钎料接合体20的电连接可以自聚合地进行，如果将条件设定得准确，与WB法相比可以非常简便地进行，并且设备投资较少就能完成。并且，钎料接合体20自聚合地形成，所以可以避免伴随电连接的高精度的对准调节或基于公差的位置偏移的问题，因此，技术意义重大。
除此之外，可以通过电极图案42及电极端子32规定节距，与WB法相比，趋向进一步的微细节距连接。并且，如上所述，该钎料接合体20自聚合且自整合地形成，所以若是这样的微细节距，则进一步增大其优点。并且，与WB法比较，还可以减小安装面积。
并且，本实施方式的结构的情况下，可以通过基板40确认半导体元件10的元件电极12的位置，因此，与FC法比较，位置对准容易。并且，树脂25是透明树脂的情况下，涂敷由透明树脂构成的膏之后，也可以容易地进行位置对准。同样地，安装基板30上的电极端子32的位置对准也容易。FC法的情况下，半导体元件10的电极形成面10a会朝向安装基板30的方向，因此，观察半导体元件10和基板30的连接状况进行确认是困难的，但是，本实施方式的结构的情况下，不仅能够进行位置对准，还能够容易地确认连接。除此之外，本实施方式的结构的情况下，钎料接合体20自整合地形成，从而根本上避免伴随多个位置对准产生的问题。
并且，精细图案形成在基板40的电极图案42上即可，所以与FC法相比，可以抑制安装基板30的成本上升。并且，半导体元件是分区阵列型的情况下，在FC法中，伴随在特定的区域(即，半导体元件面向的基板的区域)集中数量较多的端子，需要增加布线基板的层数的情况较多，但是，本实施方式的结构的情况下，通过基板40的电极图案42进行布线的绕回，与FC法的情况比较，可以减少安装基板30的层数。所以，由此也可以抑制安装基板30的成本上升。
并且，在本实施方式的结构中，可以通过基板40及树脂25保护半导体元件10的表面，并且，保护半导体元件10的连接部及/或安装基板30的连接部，因此，连接可靠性也优良。并且，钎料接合体20也由树脂25及基板40保护。
本实施方式的安装体100的情况下，对于半导体元件10的元件电极12可以使用没有形成钎料凸块的电极，因此，可以抑制这部分的成本上升。特别是，在多针脚、窄节距的元件电极12上形成凸块要求高度的技术，并且，与成本上升有关，因此能够省略该部分的优点也较大。即，与FC法的情况不同，有不事先在元件电极12上形成凸块而可以电连接半导体元件10和安装基板30的优点。
并且，在TAB法的情况下，需要分别执行内引脚工序和外引脚工序，在本实施方式的结构中，通过钎料接合体20的一端和另一端，能够进行半导体元件10和基板30的电连接，所以简便。进而，与TAB法比较，还可以减小安装面积。
进而，图1所示的结构100的情况下，半导体元件10的背面10b与形成在安装基板30上的凹部37的底面相接，所以可以除去或减薄外观上的半导体元件10的厚度，所以可以实现安装体100的薄型化。并且，在该例子中，半导体元件10的表面10a和安装基板30的上表面30a位于大致相同面上，所以比较容易形成钎料接合体20。但是，虽然后面叙述，半导体元件10的表面10a和安装基板30的上表面30a位于不同的面，也可以自聚合且自整合地形成钎料接合体20。
此外，基板40的上表面40b变得平坦，所以可以在其上安装电子部件(例如芯片部件)。并且，可以在基板40的上表面40b上形成布线图案，或者，也可以形成屏蔽(shield)层。屏蔽层例如可以用由导电材料构成的整面层形成。并且，如上所述，基板40不限于玻璃基板，还可以使用其它基板(树脂基板)。并且，不限于透光性基板，也可以使用除此之外的基板(例如，半导体基板等)。
接着，参照图3A～图3E对本实施方式的安装体100的制造方法进行说明。图3A～图3E是用于说明本实施方式的制造方法的工序截面图。
首先，如图3A所示，将半导体元件(例如裸片)10放置在安装基板(例如硬性印制基板30)上。在该例子中，形成安装基板30的凹部37来配置半导体元件10，以便半导体元件10的底面10b位于该凹部37的底面。在半导体元件10的上表面10a上形成有元件电极12。另一方面，在安装基板30的上表面30a上形成有包含电极端子(焊接区)32的布线图案35。
接着，如图3B所示，在包含元件电极12及电极端子32的区域涂敷钎料树脂膏21。在实施方式中，以覆盖半导体元件10的电极形成面(上表面)10a的整个面和安装基板30的一部分(包含电极端子32的部位)的方式提供钎料树脂膏21。
钎料树脂膏21由树脂、分散在树脂中的钎料粒子(未图示)、及该树脂被加热时沸腾的对流添加剂(未图示)构成。在实施方式中，作为树脂使用热硬化性树脂(例如环氧树脂)，作为钎料粒子使用无Pb钎料粒子。作为对流添加剂可以使用溶剂(例如有机溶剂)，若举出一例，可以使用异丙醇、醋酸丁酯、丁基卡必醇、乙二醇。对流添加剂在树脂中的含有量没有特别限制，最好是以0.1～20重量％的比例包含在树脂中。
此外，对流添加剂的“对流”是指作为运动方式的对流，通过沸腾的对流添加剂在树脂中运动，从而只要是对分散在树脂中的金属粒子(钎料粒子)赋予运动能量、提供促进金属粒子的移动的作用的运动，是哪种方式都没有关系。并且，对流添加剂除了其本身沸腾产生对流之外，还可以使用通过树脂的加热产生气体(H2O、CO2、N2等气体)的对流添加剂，作为这样的例子可以举出包含结晶水的化合物、通过加热分解的化合物、或发泡剂。
接着，如图3C所示，在涂敷的钎料树脂膏21上放置基板40。基板40最好是透光性基板，在本实施方式中使用玻璃基板作为基板40。而且，也可以使用树脂基板或半导体基板。在基板40的下表面40a形成有电极图案42，电极图案42的一部分位于元件电极12的至少一部分的上方，而且，电极图案42的其它部分位于电极端子32的至少一部分的上方。
接着，如图3D所示，通过加热钎料树脂膏21，使对流添加剂(未图示)沸腾，在树脂中产生对流27。由于对流添加剂的沸腾而从基板40和安装基板30之间喷出蒸气的情况较多。该加热按照钎料粒子的融点以上、且产生对流添加剂的沸腾的温度以上的曲线来执行。通过由该对流添加剂产生的对流27，钎料树脂膏中的钎料粒子自聚合在元件电极12、电极图案42及电极端子32上。并且，若没有由对流添加剂产生的对流27(沸腾)，就不能实现促进钎料粒子的生长，成为残留钎料粒子的凝聚块(球)的状态。
若进行钎料粒子的自聚合，如图3E所示，形成连结元件电极12和电极图案42之间、以及电极端子32和电极图案42之间的钎料接合体20。在实施方式中，钎料接合体20具有沿着电极图案42延伸的部位，而且，元件电极12和电极端子32通过钎料接合体20直接连接。从图3D到3E中的钎料接合体20的形成时间随着条件不同，但是，例如是5秒～30秒程度(优选例中是大致5秒)。并且，在形成钎料接合体20时，可以导入事先加热钎料树脂膏21的预热工序。
钎料接合体20是钎料树脂膏21中的钎料粒子自聚合而形成的，所以形成钎料接合体20之后，在构成钎料树脂膏21的树脂中，实质上不包含导电粒子，邻接的钎料接合体20之间通过树脂25绝缘。
并且，在形成钎料接合体20之后，清洗未硬化状态的钎料树脂膏21，填充其它树脂(也可以是相同种类的树脂)，进行硬化。这时，作为用于形成钎料接合体20的钎料树脂膏21中包含的树脂不需要一定使用热硬化性或光硬化性树脂。此外，从后面填充的树脂是热硬化性树脂的情况下，树脂的硬化温度比钎料的融点低较好。这是因为钎料接合体20不在树脂硬化时再变形。
若说明具体的一例，钎料树脂膏21使用将透明环氧树脂(ジヤパンエポキシレジン公司制，商品名称为“エピコ一ト806”)57重量部、上述钎料粒子40重量部、由异丙醇构成的溶剂3重量部均匀地混合的膏，形成了钎料接合体20。然后清洗钎料树脂膏21，填充其它热硬化性环氧树脂(ナミツクス公司制，商品名称为“8422”)之后，进行了加热硬化。
当使构成钎料树脂膏21的树脂(或其它树脂)硬化，则得到本实施方式的安装体100。在填充该其它树脂的情况下，作为构成钎料树脂膏21的树脂，可以使用热硬化性树脂以外的树脂(热塑性树脂、光硬化性树脂等)。
这时，在FC法的情况下，在半导体元件和安装基板的间隙填入树脂(底填充材料)的情况较多，会增加工序数量，但是本实施方式的制造方法的情况下，能够将硬化的树脂25作为底填充材料那样使用，能够回避该增大工序数的问题。
在本实施方式中，基板40使用透光性基板，因此通过基板40可以进行钎料接合体20的连接确认。并且，树脂25也可以使用透光性树脂，进而连接确认变得更加容易。
图3E所示的状态之后除去基板40即可。若除去基板40，使电极图案42或钎料接合体20从树脂25的上表面露出，则利用该露出的导电部，可以执行电检测。例如，除去基板40，使电极图案42露出，使测试机的端子(例如探针)接触该电极图案42执行电检测。
(实施方式2)
在图4所示的安装体100中，在基板40的电极图案42的表面形成有提高钎料浸润性的层43。即，在该例子中，在电极图案42的表面实施了提高钎料浸润性的涂覆处理。通过提高电极图案42的表面的钎料浸润性，从而可以容易且更加稳定地执行钎料接合体20的自聚合形成。作为提高钎料浸润性的涂覆，例如可以举出作为钎料镀层的SnBi层的形成。
(实施方式3)
在图5所示的安装体100中，在电极图案42的表面的一部分形成有遮蔽(mask)层45，钎料接合体20由连结元件电极12和电极图案42之间的钎料凸块部20a和连结电极端子32和电极图案42之间的钎料凸块部20b构成。即使钎料接合体20不直接连结元件电极12和电极端子32，如该例子那样，也可以通过电极图案42将元件电极12和电极端子32电连接。遮蔽层45由钎料浸润性比电极图案42差的材料构成，例如由阻焊剂构成。在电极图案42的表面中的对应于元件电极12的部位和对应于电极端子32的部位之间形成遮蔽层45，从而如图5所示，钎料接合体20分为2个部位(20a、20b)，由此，可以享有钎料接合体20的形状的预测性上升、其特性(电阻、应力、强度等)的预测变得乐观这样的好处。
此外，即使不形成遮蔽层45，也可以改变钎料接合体20的形状。在图6A所示的安装体100中，对电极图案42的形状加以设计，例如，如图6B所示，与电极图案42中的对应于元件电极12的部位42a和对应于电极端子32的部位42b比较，减小了连结两者(42a、42b)的部位42c的面积。通过这样，通过自聚合形成过程中的钎料接合体20的最初的触点，容易在部位42a、42b侧产生。此外，连结部42c如图6C所示，可以具有倾斜地形成。并且，使对应于电极端子32的部位42b的面积大于对应于元件电极12的部位42a的面积这一点，是对应于元件电极12的面积及电极端子32的面积。
(实施方式4)
在图7所示的安装体100中，除去了基板40，电极图案42露出于表面。基板40的除去可以剥离基板40来执行，也可以研磨基板40来执行。通过露出电极图案42，可以将其用作检测用端子。此外，除去图7所示的安装体100的树脂25，形成图8所示的结构。
进而，如图9所示，从图7所示的安装体100除去电极图案42来露出钎料接合体20。除此之外，从这里除去树脂25，从而做成图10所示的结构。
(实施方式5)
在图8及图10所示的安装体100中，使元件电极12和电极端子32之间空气绝缘，但是也可使树脂25置于元件电极12和电极端子32之间来提高绝缘性。并且，如图11所示，也可以使钎料接合体20的上表面不是平面，而是稍微具有曲线。这是对图8所示的结构进行短时间热处理(例如，回流焊处理)，仅熔融少量的钎料接合体20，从而变形为更能缓和应力的形状。
(实施方式6)
在图12所示的安装体100中，示出了在安装基板30的上表面30a平坦的典型的基板上放置了半导体元件10的结构。该情况下，缩小元件电极12的上表面和电极端子32的上表面的阶差，使用薄型的半导体芯片作为半导体元件10较好，以便更容易地执行钎料接合体20的自聚合形成。该情况下的半导体元件10的厚度是150μm以下，最好是100μm左右。并且，即使是半导体元件10的厚度超过150μm(例如200～450μm程度)，也可以没有问题地进行钎料接合体20的自聚合形成。
如果从图12所示的结构中除去基板40，则成为图13所示那样的安装体100。此外，除去树脂25，进行回流焊处理等，形成抑制钎料接合体20的应力缓和的形状，则成为图14所示的安装体100。并且，在图14所示的结构中，也可以在元件电极12和电极端子32之间形成树脂25。
图12所示的安装体100与图3A～图3E同样地，可以如图15A～图15E那样制造。即，首先，如图15A所示，在平坦的安装基板30上放置半导体元件之后，如图15B所示，涂敷钎料树脂膏21。接着，如图15C所示，在钎料树脂膏21上放置基板40，接着，如图15D那样，加热钎料树脂膏21。于是，对流添加剂(未图示)沸腾，在树脂中产生对流27，进行钎料粒子自聚合。并且，如图15E所示，形成钎料接合体20，得到安装体100。
安装基板30不限于硬性印制基板，也可以使用由图16所示那样的管芯焊盘部30b和引脚部30a构成的引脚框30。并且，如上所述，可以使用挠性印制基板作为安装基板30。并且，基板40的上表面也可以不平坦，例如使用挠性基板作为基板40，也可以如图17所示那样做成基板40的上表面弯曲的结构。
此外，基板40采用挠性基板那样的柔软的基板，从而可以减小施加在钎料接合体20的应力，其结果，可以实现连接部的稳定化。除此之外，可以减小因半导体元件10的厚度而变宽的电极端子32和电极图案42之间的间隙，在电极端子32中也可以得到稳定的连接。
进而，在图2所示的结构例中，使元件电极12和电极端子32的间隔(节距)相同地引出，也可以如图18所示地做成分散开的结构，以便电极端子32侧的间隔(节距)变宽。
并且，在上述结构例中，示出了将元件电极12排列在外围的半导体元10，但是不限于此，也可以使用排列成阵列状的半导体元件10。并且，元件电极12的端子数量不特别限定，针脚多且节距窄，本发明实施方式的技术优点就增大。
(实施方式7)
接着，参照图19及图20，说明本实施方式的安装体100中的钎料接合体20的自聚合形成状态。
图19所示的截面的显微镜照片是对图20所示的结构实际地进行研磨露出截面，并用显微镜观察时的显微镜照片。该结构是在具有铜质的整面层35’的挠性基板30上放置半导体元件10，然后，如图3B～图3E所示，在树脂25中自聚合地形成连接元件电极12和电极端子区域32’的钎料接合体20的结构。
如图19所示，钎料接合体20从元件电极12向上，而且沿着电极图案42’延伸，到达下方的电极端子区域32’。并且，在图19中的截面中，由于填充有研磨剂的影响，各要素的截面结构的局部很难看到。这里，半导体元件10的厚度是100μm以下(该例子中为厚度50μm)。并且，基板30及基板40的厚度是30μm。
以上，通过最佳实施方式说明了本发明，这样的记述不是限定事项，当然可以进行各种应用。
在上述的本发明实施方式中，对半导体元件10是裸片的情况进行了说明，但是不限于裸片，例如也可以将芯片尺寸封装(CSP)那样的半导体封装用作半导体元件10。并且，半导体元件10最好是存储器IC芯片、逻辑IC芯片、或者系统LSI芯片，但是其种类不特别限制。
工业上的可利用性
根据本发明，可以提供利用不同于WB法、FC法、TAB法的新的微细节距连接技术的安装体及其制造方法。

Claims (23)

1.一种安装体，包括半导体元件和安装基板，该半导体元件具备形成有元件电极的表面和与上述表面相对的背面，该安装基板形成有具备电极端子的布线图案；其特征在于，
上述半导体元件的背面与上述安装基板相接；
上述半导体元件的上述元件电极和形成在上述安装基板上的上述布线图案的上述电极端子，通过钎料粒子聚合而成形为桥形状的钎料接合体电连接；
还包括形成有电极图案的对置基板，
上述电极图案夹着上述钎料接合体配置在上述半导体元件之上。
2.如权利要求1所述的安装体，其特征在于，
上述对置基板是透光性基板。
3.如权利要求1所述的安装体，其特征在于，
上述对置基板是挠性基板。
4.如权利要求1所述的安装体，其特征在于，
在上述对置基板的相反面也形成有电极图案。
5.如权利要求1所述的安装体，其特征在于，
在上述对置基板的相反面形成有屏蔽层。
6.如权利要求1所述的安装体，其特征在于，
上述钎料接合体与位于该钎料接合体的上表面的电极图案接触形成。
7.如权利要求1所述的安装体，其特征在于，
在上述安装基板的一部分形成有凹部，
上述半导体元件的上述背面与上述凹部的底面相接。
8.如权利要求7所述的安装体，其特征在于，
上述安装基板的上表面和上述半导体元件的上述表面位于同一平面上。
9.如权利要求1所述的安装体，其特征在于，
上述半导体元件是厚度为100μm以下的薄型半导体芯片。
10.如权利要求1所述的安装体，其特征在于，
上述钎料接合体埋设在树脂中。
11.如权利要求10所述的安装体，其特征在于，
上述树脂的上表面形成平面。
12.如权利要求1所述的安装体，其特征在于，
上述元件电极和上述电极端子通过上述电极图案电连接。
13.如权利要求10所述的安装体，其特征在于，上述树脂是透光性树脂。
14.一种安装体的制造方法，其特征在于，包括：
工序a，将半导体元件的背面配置在安装基板上，其中，该半导体元件具备形成有元件电极的表面和与上述表面相对的上述背面，该安装基板形成有具备电极端子的布线图案；
工序b，将树脂中含有钎料粉和该树脂被加热时沸腾的对流添加剂的钎料树脂膏，提供给包含上述元件电极及上述电极端子的区域；
工序c，在具有形成了电极图案的第一面和与上述第一面相对的第二面的基板中，使上述基板的第一面夹着上述钎料树脂膏与上述半导体元件的上述表面及上述安装基板对置，以便上述基板的上述电极图案覆盖上述元件电极及上述电极端子；以及
工序d，通过加热上述钎料树脂膏，使上述对流添加剂沸腾，从而在上述树脂中产生对流，使上述钎料树脂膏中的上述钎料粉自聚合，形成至少连结上述元件电极和上述电极图案之间、及上述电极端子和电极图案之间的钎料部件。
15.如权利要求14所述的安装体的制造方法，其特征在于，
在上述工序d中，上述钎料接合体具有沿着上述电极图案延伸的部位。
16.如权利要求14所述的安装体的制造方法，其特征在于，
上述基板是透光性基板。
17.如权利要求14所述的安装体的制造方法，其特征在于，
构成上述钎料树脂膏的树脂是透光性树脂。
18.如权利要求14所述的安装体的制造方法，其特征在于，
在上述工序d之后，再除去上述基板。
19.如权利要求18所述的安装体的制造方法，其特征在于，
在除去上述基板之后，通过上述电极图案执行电检测。
20.如权利要求14所述的安装体的制造方法，其特征在于，
在上述电极图案的表面实施了提高钎料浸润性的涂覆处理。
21.如权利要求14所述的安装体的制造方法，其特征在于，
上述安装基板是挠性基板。
22.如权利要求14所述的安装体的制造方法，其特征在于，
形成有上述电极图案的基板是挠性基板。
23.如权利要求14所述的安装体的制造方法，其特征在于，
上述钎料接合体埋设在树脂中。
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