CN100539086C - 制造集成电路器件的方法 - Google Patents

制造集成电路器件的方法 Download PDF

Info

Publication number
CN100539086C
CN100539086C CNB2006101060325A CN200610106032A CN100539086C CN 100539086 C CN100539086 C CN 100539086C CN B2006101060325 A CNB2006101060325 A CN B2006101060325A CN 200610106032 A CN200610106032 A CN 200610106032A CN 100539086 C CN100539086 C CN 100539086C
Authority
CN
China
Prior art keywords
film
substrate
electrode
dielectric film
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2006101060325A
Other languages
English (en)
Chinese (zh)
Other versions
CN1881569A (zh
Inventor
山田大干
道前芳隆
杉山荣二
高桥秀和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of CN1881569A publication Critical patent/CN1881569A/zh
Application granted granted Critical
Publication of CN100539086C publication Critical patent/CN100539086C/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0214Manufacture or treatment of multiple TFTs using temporary substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0241Manufacture or treatment of multiple TFTs using liquid deposition, e.g. printing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0251Manufacture or treatment of multiple TFTs characterised by increasing the uniformity of device parameters
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07202Connecting or disconnecting of bump connectors using auxiliary members
    • H10W72/07204Connecting or disconnecting of bump connectors using auxiliary members using temporary auxiliary members, e.g. sacrificial coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CNB2006101060325A 2005-06-01 2006-06-01 制造集成电路器件的方法 Expired - Fee Related CN100539086C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005161413 2005-06-01
JP2005161413 2005-06-01

Publications (2)

Publication Number Publication Date
CN1881569A CN1881569A (zh) 2006-12-20
CN100539086C true CN100539086C (zh) 2009-09-09

Family

ID=37494669

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2006101060325A Expired - Fee Related CN100539086C (zh) 2005-06-01 2006-06-01 制造集成电路器件的方法

Country Status (3)

Country Link
US (4) US7485511B2 (https=)
JP (1) JP5634487B2 (https=)
CN (1) CN100539086C (https=)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7863188B2 (en) * 2005-07-29 2011-01-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7968382B2 (en) * 2007-02-02 2011-06-28 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
JP4380718B2 (ja) * 2007-03-15 2009-12-09 ソニー株式会社 半導体装置の製造方法
US7973316B2 (en) * 2007-03-26 2011-07-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
US8149080B2 (en) * 2007-09-25 2012-04-03 Infineon Technologies Ag Integrated circuit including inductive device and ferromagnetic material
US7868362B2 (en) * 2007-10-16 2011-01-11 Honeywell International Inc. SOI on package hypersensitive sensor
CN102089858B (zh) * 2008-02-20 2013-03-13 夏普株式会社 柔性半导体基板的制造方法
WO2010035627A1 (en) * 2008-09-25 2010-04-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
EP2178133B1 (en) 2008-10-16 2019-09-18 Semiconductor Energy Laboratory Co., Ltd. Flexible Light-Emitting Device, Electronic Device, and Method for Manufacturing Flexible-Light Emitting Device
KR101243920B1 (ko) * 2010-01-07 2013-03-14 삼성디스플레이 주식회사 기판 밀봉에 사용되는 레이저 빔 조사 장치, 기판 밀봉 방법, 및 유기 발광 디스플레이 장치의 제조 방법
US20110186940A1 (en) * 2010-02-03 2011-08-04 Honeywell International Inc. Neutron sensor with thin interconnect stack
US8310021B2 (en) 2010-07-13 2012-11-13 Honeywell International Inc. Neutron detector with wafer-to-wafer bonding
TWI642094B (zh) 2013-08-06 2018-11-21 半導體能源研究所股份有限公司 剝離方法
US10978489B2 (en) 2015-07-24 2021-04-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display panel, method for manufacturing semiconductor device, method for manufacturing display panel, and information processing device
WO2017103737A1 (en) 2015-12-18 2017-06-22 Semiconductor Energy Laboratory Co., Ltd. Display panel, input/output device, data processing device, and method for manufacturing display panel
US10181424B2 (en) 2016-04-12 2019-01-15 Semiconductor Energy Laboratory Co., Ltd. Peeling method and manufacturing method of flexible device
TWI727041B (zh) 2016-05-20 2021-05-11 日商半導體能源研究所股份有限公司 顯示裝置
US11637009B2 (en) 2016-10-07 2023-04-25 Semiconductor Energy Laboratory Co., Ltd. Cleaning method of glass substrate, manufacturing method of semiconductor device, and glass substrate
CN106585069A (zh) * 2016-12-23 2017-04-26 武汉华星光电技术有限公司 柔性基板、面板及丝网印刷机制作柔性基板、面板的方法
US10170600B2 (en) 2017-01-12 2019-01-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
JP6427747B1 (ja) * 2017-05-17 2018-11-28 株式会社野田スクリーン 薄膜キャパシタ構造、および当該薄膜キャパシタ構造を備えた半導体装置
WO2019175704A1 (ja) 2018-03-16 2019-09-19 株式会社半導体エネルギー研究所 電気モジュール、表示パネル、表示装置、入出力装置、情報処理装置、電気モジュールの作製方法

Family Cites Families (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2601500B1 (fr) * 1986-07-11 1988-10-21 Bull Sa Procede de liaison programmable par laser de deux conducteurs superposes du reseau d'interconnexion d'un circuit integre, et circuit integre en resultant
JPH03232232A (ja) 1990-02-08 1991-10-16 Fujitsu Ltd 半導体装置の製造方法
US5317436A (en) 1990-12-31 1994-05-31 Kopin Corporation A slide assembly for projector with active matrix moveably mounted to housing
US5166556A (en) 1991-01-22 1992-11-24 Myson Technology, Inc. Programmable antifuse structure, process, logic cell and architecture for programmable integrated circuits
US5821597A (en) 1992-09-11 1998-10-13 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device
US6720576B1 (en) 1992-09-11 2004-04-13 Semiconductor Energy Laboratory Co., Ltd. Plasma processing method and photoelectric conversion device
JP3770631B2 (ja) 1994-10-24 2006-04-26 株式会社ルネサステクノロジ 半導体装置の製造方法
JP3579492B2 (ja) 1995-03-16 2004-10-20 株式会社半導体エネルギー研究所 表示装置の作製方法
US5757456A (en) 1995-03-10 1998-05-26 Semiconductor Energy Laboratory Co., Ltd. Display device and method of fabricating involving peeling circuits from one substrate and mounting on other
US6022792A (en) 1996-03-13 2000-02-08 Seiko Instruments, Inc. Semiconductor dicing and assembling method
US6011275A (en) * 1996-12-30 2000-01-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing the same
EP1455302B1 (en) 1999-02-24 2007-09-19 Hitachi Maxell, Ltd. Method for manufacturing an IC element including a coil
US7060153B2 (en) 2000-01-17 2006-06-13 Semiconductor Energy Laboratory Co., Ltd. Display device and method of manufacturing the same
JP4748859B2 (ja) 2000-01-17 2011-08-17 株式会社半導体エネルギー研究所 発光装置の作製方法
US20010053559A1 (en) 2000-01-25 2001-12-20 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating display device
TW507258B (en) 2000-02-29 2002-10-21 Semiconductor Systems Corp Display device and method for fabricating the same
JP2001318624A (ja) 2000-02-29 2001-11-16 Semiconductor Energy Lab Co Ltd 表示装置およびその作製方法
JP2001345452A (ja) 2000-06-02 2001-12-14 Nec Kagoshima Ltd 薄膜トランジスタ及びその製造方法
SG136795A1 (en) 2000-09-14 2007-11-29 Semiconductor Energy Lab Semiconductor device and manufacturing method thereof
JP4939690B2 (ja) * 2001-01-30 2012-05-30 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6887650B2 (en) 2001-07-24 2005-05-03 Seiko Epson Corporation Transfer method, method of manufacturing thin film devices, method of manufacturing integrated circuits, circuit board and manufacturing method thereof, electro-optical apparatus and manufacturing method thereof, ic card, and electronic appliance
US6814832B2 (en) * 2001-07-24 2004-11-09 Seiko Epson Corporation Method for transferring element, method for producing element, integrated circuit, circuit board, electro-optical device, IC card, and electronic appliance
JP3956697B2 (ja) 2001-12-28 2007-08-08 セイコーエプソン株式会社 半導体集積回路の製造方法
JP2004179649A (ja) * 2002-11-12 2004-06-24 Sony Corp 超薄型半導体装置の製造方法および製造装置
JP4554152B2 (ja) * 2002-12-19 2010-09-29 株式会社半導体エネルギー研究所 半導体チップの作製方法
EP1437683B1 (en) 2002-12-27 2017-03-08 Semiconductor Energy Laboratory Co., Ltd. IC card and booking account system using the IC card
JP4393859B2 (ja) 2002-12-27 2010-01-06 株式会社半導体エネルギー研究所 記録媒体の作製方法
JP4524992B2 (ja) * 2003-01-28 2010-08-18 セイコーエプソン株式会社 薄膜トランジスタ型表示装置、薄膜素子の製造方法、薄膜トランジスタ回路基板、電気光学装置および電子機器
JP2004247373A (ja) * 2003-02-12 2004-09-02 Semiconductor Energy Lab Co Ltd 半導体装置
JP2004349543A (ja) 2003-05-23 2004-12-09 Seiko Epson Corp 積層体の剥離方法、薄膜装置の製造法、薄膜装置、電子機器
JP2005056985A (ja) 2003-08-01 2005-03-03 Seiko Epson Corp 半導体装置の製造方法、半導体装置および電子機器
US7492090B2 (en) 2003-09-19 2009-02-17 Semiconductor Energy Laboratory Co., Ltd. Display device and method for manufacturing the same
JP4574295B2 (ja) 2003-09-19 2010-11-04 株式会社半導体エネルギー研究所 発光装置の作製方法
US7566640B2 (en) 2003-12-15 2009-07-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing thin film integrated circuit device, noncontact thin film integrated circuit device and method for manufacturing the same, and idtag and coin including the noncontact thin film integrated circuit device
US7271076B2 (en) 2003-12-19 2007-09-18 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of thin film integrated circuit device and manufacturing method of non-contact type thin film integrated circuit device
US7699232B2 (en) * 2004-02-06 2010-04-20 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
WO2006011664A1 (en) * 2004-07-30 2006-02-02 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
WO2006011665A1 (en) * 2004-07-30 2006-02-02 Semiconductor Energy Laboratory Co., Ltd. Laminating system, ic sheet, scroll of ic sheet, and method for manufacturing ic chip
US7422935B2 (en) 2004-09-24 2008-09-09 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device, and semiconductor device and electronic device
KR101176027B1 (ko) * 2004-10-19 2012-08-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 안테나를 구비한 반도체장치 및 그 제조 방법
US7364954B2 (en) * 2005-04-28 2008-04-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
US7485511B2 (en) 2009-02-03
US7816685B2 (en) 2010-10-19
US8120034B2 (en) 2012-02-21
US20120068181A1 (en) 2012-03-22
US20090140249A1 (en) 2009-06-04
US20110073861A1 (en) 2011-03-31
US8362485B2 (en) 2013-01-29
US20060275960A1 (en) 2006-12-07
JP5634487B2 (ja) 2014-12-03
CN1881569A (zh) 2006-12-20
JP2013042180A (ja) 2013-02-28

Similar Documents

Publication Publication Date Title
CN100539086C (zh) 制造集成电路器件的方法
TW558743B (en) Peeling method and method of manufacturing semiconductor device
US8034724B2 (en) Method for manufacturing semiconductor device
CN101043026B (zh) 晶体半导体薄膜,半导体器件及其制造方法
TWI392102B (zh) 半導體裝置
JP5201937B2 (ja) パターン形成方法、及び薄膜トランジスタの作製方法
JP5542269B2 (ja) 発光装置
JP5500914B2 (ja) レーザ照射装置
JP5700637B2 (ja) トランジスタ
JP5775322B2 (ja) 半導体装置及びその作製方法
TW201203512A (en) Semiconductor device and method for manufacturing the same
WO2021095974A1 (ko) 유전박막, 이를 포함하는 멤커패시터, 이를 포함하는 셀 어레이, 및 그 제조 방법
KR101272064B1 (ko) 반도체 장치
JP4453693B2 (ja) 半導体装置の製造方法及び電子機器の製造方法
WO2011149118A1 (ko) 액상 공정을 이용한 산화물 반도체 박막의 형성 방법, 결정화 방법, 이를 이용한 반도체 소자 형성 방법
JP2002198364A (ja) 半導体装置の作製方法
WO2005081297A1 (ja) 薄膜の熱処理方法、熱処理装置、薄膜半導体素子の製造方法および電気光学装置
JP4939699B2 (ja) 半導体装置の作製方法
JP2007201399A (ja) 半導体装置
JP2789170B2 (ja) 絶縁ゲート型電界効果半導体装置の作製方法
KR20090084239A (ko) 다결정 실리콘 박막 제조장치 및 방법
JP2000138376A (ja) 絶縁ゲ―ト型電界効果半導体装置の作製方法
JPH09186344A (ja) 絶縁ゲート型電界効果半導体装置の作製方法
JPH0851221A (ja) 液晶表示パネル用絶縁ゲート型電界効果半導体装置およびその作製方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090909

Termination date: 20180601