CN100505178C - 贯通基板、内插器以及贯通基板的制造方法 - Google Patents

贯通基板、内插器以及贯通基板的制造方法 Download PDF

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Publication number
CN100505178C
CN100505178C CNB2005800221520A CN200580022152A CN100505178C CN 100505178 C CN100505178 C CN 100505178C CN B2005800221520 A CNB2005800221520 A CN B2005800221520A CN 200580022152 A CN200580022152 A CN 200580022152A CN 100505178 C CN100505178 C CN 100505178C
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China
Prior art keywords
substrate
conductive layer
layer
hole
interposer
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Expired - Fee Related
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CNB2005800221520A
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Chinese (zh)
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CN1977365A (zh
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八壁正巳
加川健一
星野智久
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
CNB2005800221520A 2004-07-06 2005-07-05 贯通基板、内插器以及贯通基板的制造方法 Expired - Fee Related CN100505178C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004199871A JP2006024653A (ja) 2004-07-06 2004-07-06 貫通基板および貫通基板の製造方法
JP199871/2004 2004-07-06
JP199872/2004 2004-07-06

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CN1977365A CN1977365A (zh) 2007-06-06
CN100505178C true CN100505178C (zh) 2009-06-24

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CNB2005800221520A Expired - Fee Related CN100505178C (zh) 2004-07-06 2005-07-05 贯通基板、内插器以及贯通基板的制造方法

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JP (1) JP2006024653A (enrdf_load_stackoverflow)
CN (1) CN100505178C (enrdf_load_stackoverflow)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4807272B2 (ja) * 2007-02-05 2011-11-02 パナソニック電工株式会社 半導体ウェハへの貫通孔配線の形成方法
KR100916771B1 (ko) * 2007-10-08 2009-09-14 성균관대학교산학협력단 관통형전극의 형성방법
KR101052870B1 (ko) * 2008-04-21 2011-07-29 주식회사 하이닉스반도체 관통 전극, 이를 갖는 회로 기판, 이를 갖는 반도체 패키지및 반도체 패키지를 갖는 적층 반도체 패키지
KR101031134B1 (ko) 2008-09-11 2011-04-27 주식회사 동부하이텍 반도체 소자의 컨택 및 그 제조 방법
JP5246103B2 (ja) 2008-10-16 2013-07-24 大日本印刷株式会社 貫通電極基板の製造方法
US8455356B2 (en) * 2010-01-21 2013-06-04 International Business Machines Corporation Integrated void fill for through silicon via
JP5209075B2 (ja) 2010-05-21 2013-06-12 有限会社 ナプラ 電子デバイス及びその製造方法
TWI449138B (zh) * 2011-01-19 2014-08-11 Subtron Technology Co Ltd 封裝載板
JP2013161910A (ja) * 2012-02-03 2013-08-19 Osaka Prefecture Univ 半導体装置の製造方法、半導体装置、赤外線センサの製造方法および赤外線センサ
JP6056386B2 (ja) * 2012-11-02 2017-01-11 凸版印刷株式会社 貫通電極付き配線基板及びその製造方法
US9596768B2 (en) * 2014-03-04 2017-03-14 Qualcomm Incorporated Substrate with conductive vias
CN105390475A (zh) * 2015-10-20 2016-03-09 北京大学 一种衬底内部的电容集成结构及其制造方法
US10490483B2 (en) * 2016-03-07 2019-11-26 Micron Technology, Inc. Low capacitance through substrate via structures
JP2017199854A (ja) 2016-04-28 2017-11-02 Tdk株式会社 貫通配線基板
KR102803444B1 (ko) * 2020-01-06 2025-05-07 삼성전기주식회사 인쇄회로기판

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002009193A (ja) * 2000-04-18 2002-01-11 Matsushita Electric Ind Co Ltd 半導体装置
JP4628520B2 (ja) * 2000-06-06 2011-02-09 富士通株式会社 電子装置実装基板の製造方法
US6498381B2 (en) * 2001-02-22 2002-12-24 Tru-Si Technologies, Inc. Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same
JP2004119606A (ja) * 2002-09-25 2004-04-15 Canon Inc 半導体基板の貫通孔埋め込み方法および半導体基板
SG111972A1 (en) * 2002-10-17 2005-06-29 Agency Science Tech & Res Wafer-level package for micro-electro-mechanical systems
JP2006019455A (ja) * 2004-06-30 2006-01-19 Nec Electronics Corp 半導体装置およびその製造方法

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CN1977365A (zh) 2007-06-06
JP2006024653A (ja) 2006-01-26

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