CN100452437C - 低能量多沟道全耗尽量子井互补式金氧半导体场效晶体管 - Google Patents
低能量多沟道全耗尽量子井互补式金氧半导体场效晶体管 Download PDFInfo
- Publication number
- CN100452437C CN100452437C CNB2004800333292A CN200480033329A CN100452437C CN 100452437 C CN100452437 C CN 100452437C CN B2004800333292 A CNB2004800333292 A CN B2004800333292A CN 200480033329 A CN200480033329 A CN 200480033329A CN 100452437 C CN100452437 C CN 100452437C
- Authority
- CN
- China
- Prior art keywords
- gate electrode
- channel region
- insulating barrier
- sept
- sidewall
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6727—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device having source or drain regions connected to bulk conducting substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/706,948 US7074657B2 (en) | 2003-11-14 | 2003-11-14 | Low-power multiple-channel fully depleted quantum well CMOSFETs |
| US10/706,948 | 2003-11-14 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1879224A CN1879224A (zh) | 2006-12-13 |
| CN100452437C true CN100452437C (zh) | 2009-01-14 |
Family
ID=34573412
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004800333292A Expired - Lifetime CN100452437C (zh) | 2003-11-14 | 2004-10-08 | 低能量多沟道全耗尽量子井互补式金氧半导体场效晶体管 |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US7074657B2 (enExample) |
| EP (1) | EP1695389B1 (enExample) |
| JP (1) | JP2007511907A (enExample) |
| KR (1) | KR20060108672A (enExample) |
| CN (1) | CN100452437C (enExample) |
| DE (1) | DE602004027158D1 (enExample) |
| TW (1) | TWI360225B (enExample) |
| WO (1) | WO2005053035A1 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7224007B1 (en) * | 2004-01-12 | 2007-05-29 | Advanced Micro Devices, Inc. | Multi-channel transistor with tunable hot carrier effect |
| KR100549014B1 (ko) * | 2004-07-21 | 2006-02-02 | 삼성전자주식회사 | 스페이서 패턴을 갖는 반도체 장치들 및 그 형성방법들 |
| US7544572B2 (en) * | 2005-11-30 | 2009-06-09 | Advanced Micro Devices, Inc. | Multi-operational mode transistor with multiple-channel device structure |
| CN102074585B (zh) * | 2010-10-22 | 2012-07-04 | 友达光电股份有限公司 | 薄膜晶体管与显示面板 |
| JP6401977B2 (ja) * | 2013-09-06 | 2018-10-10 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| CN103872139B (zh) * | 2014-02-24 | 2016-09-07 | 北京京东方光电科技有限公司 | 薄膜晶体管及其制作方法、阵列基板和显示装置 |
| US9653287B2 (en) * | 2014-10-30 | 2017-05-16 | Samsung Electronics Co., Ltd. | S/D connection to individual channel layers in a nanosheet FET |
| US9590038B1 (en) | 2015-10-23 | 2017-03-07 | Samsung Electronics Co., Ltd. | Semiconductor device having nanowire channel |
| US9899387B2 (en) * | 2015-11-16 | 2018-02-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-gate device and method of fabrication thereof |
| KR102343470B1 (ko) | 2016-01-28 | 2021-12-24 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
| EP3651203A1 (en) * | 2017-10-18 | 2020-05-13 | IUCF-HYU (Industry-University Cooperation Foundation Hanyang University) | Layer, multilevel element, method for fabricating multilevel element, and method for driving multilevel element |
| KR102814839B1 (ko) * | 2019-06-11 | 2025-05-30 | 삼성전자주식회사 | 반도체 소자 |
| CN112151616B (zh) * | 2020-08-20 | 2022-12-16 | 中国科学院微电子研究所 | 一种堆叠mos器件及其制备方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5153688A (en) * | 1990-04-21 | 1992-10-06 | Canon Kabushiki Kaisha | Method and device for controlling interference of electron waves by light in which a transverse magnetic wave is applied |
| CN1070052A (zh) * | 1991-08-23 | 1993-03-17 | 株式会社半导体能源研究所 | 半导体器件及其制造方法 |
| US5500545A (en) * | 1995-02-27 | 1996-03-19 | United Microelectronics Corporation | Double switching field effect transistor and method of manufacturing it |
| US20020115240A1 (en) * | 2001-02-20 | 2002-08-22 | International Business Machines Corporation | Double soi device with recess etch and epitaxy |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04179271A (ja) * | 1990-11-14 | 1992-06-25 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JPH0575125A (ja) * | 1991-09-12 | 1993-03-26 | Toshiba Corp | 薄膜トランジスタ |
| FR2703855B1 (fr) * | 1993-04-05 | 1995-05-24 | Valeo Electronique | Montage à réponse linéarisée et symétrisée, oscillateur utilisant un tel montage et émetteur de télécommande utilisant un tel oscillateur. |
| JPH06310719A (ja) * | 1993-04-19 | 1994-11-04 | Sharp Corp | Ge−SiのSOI型MOSトランジスタ及びその製造方法 |
| KR100279264B1 (ko) * | 1998-12-26 | 2001-02-01 | 김영환 | 더블 게이트 구조를 갖는 에스·오·아이 트랜지스터 및 그의제조방법 |
| US6373112B1 (en) * | 1999-12-02 | 2002-04-16 | Intel Corporation | Polysilicon-germanium MOSFET gate electrodes |
| US6617653B1 (en) * | 2000-05-31 | 2003-09-09 | Matsushita Electric Industrial Co., Ltd. | Misfet |
| JP2003092400A (ja) * | 2001-07-13 | 2003-03-28 | Seiko Epson Corp | 半導体装置及びその製造方法 |
| KR100481209B1 (ko) * | 2002-10-01 | 2005-04-08 | 삼성전자주식회사 | 다중 채널을 갖는 모스 트랜지스터 및 그 제조방법 |
| FR2853454B1 (fr) * | 2003-04-03 | 2005-07-15 | St Microelectronics Sa | Transistor mos haute densite |
| US6919250B2 (en) * | 2003-05-21 | 2005-07-19 | Advanced Micro Devices, Inc. | Multiple-gate MOS device and method for making the same |
| US6921700B2 (en) * | 2003-07-31 | 2005-07-26 | Freescale Semiconductor, Inc. | Method of forming a transistor having multiple channels |
-
2003
- 2003-11-14 US US10/706,948 patent/US7074657B2/en not_active Expired - Lifetime
-
2004
- 2004-10-08 EP EP04794688A patent/EP1695389B1/en not_active Expired - Lifetime
- 2004-10-08 DE DE602004027158T patent/DE602004027158D1/de not_active Expired - Lifetime
- 2004-10-08 KR KR1020067009128A patent/KR20060108672A/ko not_active Ceased
- 2004-10-08 WO PCT/US2004/033413 patent/WO2005053035A1/en not_active Ceased
- 2004-10-08 CN CNB2004800333292A patent/CN100452437C/zh not_active Expired - Lifetime
- 2004-10-08 JP JP2006539498A patent/JP2007511907A/ja active Pending
- 2004-10-18 TW TW093131508A patent/TWI360225B/zh not_active IP Right Cessation
-
2006
- 2006-06-02 US US11/445,345 patent/US7253484B2/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5153688A (en) * | 1990-04-21 | 1992-10-06 | Canon Kabushiki Kaisha | Method and device for controlling interference of electron waves by light in which a transverse magnetic wave is applied |
| CN1070052A (zh) * | 1991-08-23 | 1993-03-17 | 株式会社半导体能源研究所 | 半导体器件及其制造方法 |
| US5500545A (en) * | 1995-02-27 | 1996-03-19 | United Microelectronics Corporation | Double switching field effect transistor and method of manufacturing it |
| US20020115240A1 (en) * | 2001-02-20 | 2002-08-22 | International Business Machines Corporation | Double soi device with recess etch and epitaxy |
Also Published As
| Publication number | Publication date |
|---|---|
| US7074657B2 (en) | 2006-07-11 |
| US20050104140A1 (en) | 2005-05-19 |
| JP2007511907A (ja) | 2007-05-10 |
| TW200522356A (en) | 2005-07-01 |
| WO2005053035A1 (en) | 2005-06-09 |
| DE602004027158D1 (de) | 2010-06-24 |
| EP1695389B1 (en) | 2010-05-12 |
| TWI360225B (en) | 2012-03-11 |
| US7253484B2 (en) | 2007-08-07 |
| KR20060108672A (ko) | 2006-10-18 |
| CN1879224A (zh) | 2006-12-13 |
| EP1695389A1 (en) | 2006-08-30 |
| US20060278938A1 (en) | 2006-12-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11424244B2 (en) | Integrated circuit having a vertical power MOS transistor | |
| US11114563B2 (en) | Semiconductor devices with low junction capacitances and methods of fabrication thereof | |
| CN101997032B (zh) | 半导体器件及半导体器件制造方法 | |
| CN1855544B (zh) | 具有屏蔽电极的半导体器件及其方法 | |
| CN100452437C (zh) | 低能量多沟道全耗尽量子井互补式金氧半导体场效晶体管 | |
| TW200307331A (en) | Metal insulator semiconductor type semiconductor device and its manufacturing method | |
| JP2008270575A (ja) | 半導体装置およびその製造方法 | |
| CN114695549A (zh) | 高压半导体装置以及其制作方法 | |
| TWI751431B (zh) | 具有低閃爍雜訊的半導體裝置及其形成方法 | |
| KR100750432B1 (ko) | 전계 효과 트랜지스터 구조체, 트랜지스터 장치 및트랜지스터 제조 방법 | |
| US20250056871A1 (en) | Methods of forming bottom dielectric isolation layers | |
| CN103594470B (zh) | 具有垂直功率mos晶体管的集成电路 | |
| CN102044433A (zh) | 一种混合源漏场效应晶体管及其制备方法 | |
| CN113471075A (zh) | 半导体器件及其形成方法 | |
| JP3779556B2 (ja) | 電界効果トランジスタ | |
| US6919250B2 (en) | Multiple-gate MOS device and method for making the same | |
| JP4845170B2 (ja) | 超シャロー金属酸化物表面チャネルmosトランジスタ | |
| JP2005175011A (ja) | 電界効果型トランジスタ及びその製造方法 | |
| CN116266536A (zh) | 晶体管的制备方法和晶体管 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: GLOBALFOUNDRIES INC. Free format text: FORMER OWNER: ADVANCED MICRO DEVICES INC. Effective date: 20100730 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: CALIFORNIA STATE, USA TO: CAYMAN ISLANDS GRAND CAYMAN ISLAND |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20100730 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES Inc. Address before: California, USA Patentee before: ADVANCED MICRO DEVICES, Inc. |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20210224 Address after: California, USA Patentee after: Lattice chip (USA) integrated circuit technology Co.,Ltd. Address before: Greater Cayman Islands, British Cayman Islands Patentee before: GLOBALFOUNDRIES Inc. |
|
| TR01 | Transfer of patent right | ||
| CX01 | Expiry of patent term |
Granted publication date: 20090114 |
|
| CX01 | Expiry of patent term |