CN100433025C - 评价图案的制作方法 - Google Patents
评价图案的制作方法 Download PDFInfo
- Publication number
- CN100433025C CN100433025C CNB2006100879902A CN200610087990A CN100433025C CN 100433025 C CN100433025 C CN 100433025C CN B2006100879902 A CNB2006100879902 A CN B2006100879902A CN 200610087990 A CN200610087990 A CN 200610087990A CN 100433025 C CN100433025 C CN 100433025C
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- pattern
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Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F18/00—Pattern recognition
- G06F18/20—Analysing
- G06F18/28—Determining representative reference patterns, e.g. by averaging or distorting; Generating dictionaries
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- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Data Mining & Analysis (AREA)
- Life Sciences & Earth Sciences (AREA)
- Bioinformatics & Cheminformatics (AREA)
- Bioinformatics & Computational Biology (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Evolutionary Biology (AREA)
- Evolutionary Computation (AREA)
- General Engineering & Computer Science (AREA)
- Artificial Intelligence (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP169801/2005 | 2005-06-09 | ||
JP2005169801A JP4828870B2 (ja) | 2005-06-09 | 2005-06-09 | 評価パタンの作成方法およびプログラム |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1877586A CN1877586A (zh) | 2006-12-13 |
CN100433025C true CN100433025C (zh) | 2008-11-12 |
Family
ID=37510018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006100879902A Active CN100433025C (zh) | 2005-06-09 | 2006-06-09 | 评价图案的制作方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20060285739A1 (zh) |
JP (1) | JP4828870B2 (zh) |
KR (1) | KR100770815B1 (zh) |
CN (1) | CN100433025C (zh) |
TW (1) | TW200710614A (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112864023B (zh) * | 2021-01-07 | 2022-04-29 | 长鑫存储技术有限公司 | 半导体标记制作方法及半导体标记 |
Citations (3)
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JPH0683949A (ja) * | 1992-08-28 | 1994-03-25 | Toyo Electric Mfg Co Ltd | 画像の縮小方法 |
US6128067A (en) * | 1998-04-28 | 2000-10-03 | Kabushiki Kaisha Toshiba | Correcting method and correcting system for mask pattern |
CN1411046A (zh) * | 2001-09-26 | 2003-04-16 | 株式会社东芝 | 图形评价装置、图形评价方法及程序 |
Family Cites Families (57)
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GB8328909D0 (en) * | 1983-10-28 | 1983-11-30 | Hutton G H | Manufacturing pattern-bearing article |
JPS6381571A (ja) * | 1986-09-25 | 1988-04-12 | Sony Corp | パタン作成装置に用いるデ−タ処理方法及びデ−タ処理装置 |
JPS6420618A (en) * | 1987-07-15 | 1989-01-24 | Matsushita Electric Ind Co Ltd | Device for editing mask pattern input |
JP2856846B2 (ja) * | 1990-05-31 | 1999-02-10 | 株式会社東芝 | パターン欠陥検査方法とその装置 |
US5348558A (en) * | 1992-04-23 | 1994-09-20 | Mitsubishi Denki Kabushiki Kaisha | Layout pattern generating apparatus |
JPH0677324A (ja) * | 1992-06-23 | 1994-03-18 | Fujitsu Ltd | 導体部分のレイアウトデータの変換方法及びその装置 |
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US6131182A (en) * | 1997-05-02 | 2000-10-10 | International Business Machines Corporation | Method and apparatus for synthesizing and optimizing control logic based on SRCMOS logic array macros |
US6470489B1 (en) * | 1997-09-17 | 2002-10-22 | Numerical Technologies, Inc. | Design rule checking system and method |
JP3223865B2 (ja) * | 1997-11-07 | 2001-10-29 | 日本電気株式会社 | 化合物半導体装置の製造プロセス評価方法およびプロセス評価パタン |
JPH11186496A (ja) * | 1997-12-17 | 1999-07-09 | Matsushita Electron Corp | 絶縁膜評価パターン及びその評価方法 |
SE9800665D0 (sv) * | 1998-03-02 | 1998-03-02 | Micronic Laser Systems Ab | Improved method for projection printing using a micromirror SLM |
JP4100644B2 (ja) * | 1998-03-25 | 2008-06-11 | 東芝松下ディスプレイテクノロジー株式会社 | パターンレイアウト装置 |
WO2000025181A1 (fr) * | 1998-10-23 | 2000-05-04 | Hitachi, Ltd. | Procede de fabrication de dispositif semi-conducteur et procede de formation de masque adapte associe |
US6381731B1 (en) * | 1999-01-19 | 2002-04-30 | Laurence W. Grodd | Placement based design cells injection into an integrated circuit design |
JP3301400B2 (ja) * | 1999-01-22 | 2002-07-15 | 日本電気株式会社 | パターン描画用データ作成方法 |
US6467076B1 (en) * | 1999-04-30 | 2002-10-15 | Nicolas Bailey Cobb | Method and apparatus for submicron IC design |
US6507944B1 (en) * | 1999-07-30 | 2003-01-14 | Fujitsu Limited | Data processing method and apparatus, reticle mask, exposing method and apparatus, and recording medium |
US7817844B2 (en) * | 1999-08-26 | 2010-10-19 | Nanogeometry Research Inc. | Pattern inspection apparatus and method |
US6584609B1 (en) * | 2000-02-28 | 2003-06-24 | Numerical Technologies, Inc. | Method and apparatus for mixed-mode optical proximity correction |
US7412676B2 (en) * | 2000-06-13 | 2008-08-12 | Nicolas B Cobb | Integrated OPC verification tool |
JP3665551B2 (ja) * | 2000-09-22 | 2005-06-29 | 沖電気工業株式会社 | 半導体ウエハ用評価パターン及びそれを用いた半導体ウエハの評価方法 |
JP4083965B2 (ja) * | 2000-09-27 | 2008-04-30 | 株式会社東芝 | 半導体集積回路の設計パターンのデータ処理方法、及びデータ処理プログラムを記録したコンピュータ読み取り可能な記録媒体 |
JP3730500B2 (ja) * | 2000-09-27 | 2006-01-05 | 株式会社東芝 | パターンデータ形成装置、パターンデータ形成方法、電子部品の製造方法 |
US6553559B2 (en) * | 2001-01-05 | 2003-04-22 | International Business Machines Corporation | Method to determine optical proximity correction and assist feature rules which account for variations in mask dimensions |
JP4044297B2 (ja) * | 2001-03-29 | 2008-02-06 | 株式会社東芝 | パターン欠陥検査装置 |
JP3909654B2 (ja) | 2001-05-10 | 2007-04-25 | ソニー株式会社 | ルールベースopcの評価方法およびシミュレーションベースopcモデルの評価方法並びにマスクの製造方法 |
JP4104840B2 (ja) * | 2001-08-23 | 2008-06-18 | 株式会社東芝 | マスクパターン評価システム及びその方法 |
JP3706364B2 (ja) * | 2001-10-09 | 2005-10-12 | アスムル マスクツールズ ビー.ブイ. | 2次元フィーチャ・モデルの較正および最適化方法 |
US6948141B1 (en) * | 2001-10-25 | 2005-09-20 | Kla-Tencor Technologies Corporation | Apparatus and methods for determining critical area of semiconductor design data |
JP3615182B2 (ja) * | 2001-11-26 | 2005-01-26 | 株式会社東芝 | 光近接効果補正方法及び光近接効果補正システム |
WO2003079111A1 (en) * | 2002-03-04 | 2003-09-25 | Massachusetts Institute Of Technology | A method and system of lithography using masks having gray-tone features |
JP4282051B2 (ja) * | 2002-07-22 | 2009-06-17 | シャープ株式会社 | 半導体集積回路製造用マスクパターンデータ生成方法およびその検証方法 |
US6842889B2 (en) * | 2002-08-06 | 2005-01-11 | Micron Technology, Inc. | Methods of forming patterned reticles |
US6785871B2 (en) * | 2002-08-21 | 2004-08-31 | Lsi Logic Corporation | Automatic recognition of an optically periodic structure in an integrated circuit design |
JP3668215B2 (ja) * | 2002-08-21 | 2005-07-06 | 株式会社東芝 | パターン検査装置 |
JP3870153B2 (ja) * | 2002-10-22 | 2007-01-17 | キヤノン株式会社 | 光学特性の測定方法 |
US6904587B2 (en) * | 2002-12-20 | 2005-06-07 | Synopsys, Inc. | Incremental lithography mask layout design and verification |
US6996790B2 (en) * | 2003-01-30 | 2006-02-07 | Synopsys, Inc. | System and method for generating a two-dimensional yield map for a full layout |
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DE10337286B4 (de) * | 2003-08-13 | 2005-11-10 | Infineon Technologies Ag | Verfahren zur Projektion eines auf einer Maske angeordneten Schaltungsmusters auf einen Halbleiterwafer |
JP4620942B2 (ja) * | 2003-08-21 | 2011-01-26 | 川崎マイクロエレクトロニクス株式会社 | 半導体集積回路のレイアウト方法、そのレイアウト構造、およびフォトマスク |
US7325222B2 (en) * | 2004-03-12 | 2008-01-29 | Lsi Logic Corporation | Method and apparatus for verifying the post-optical proximity corrected mask wafer image sensitivity to reticle manufacturing errors |
US7194725B1 (en) * | 2004-04-02 | 2007-03-20 | Advanced Micro Devices, Inc. | System and method for design rule creation and selection |
US7065738B1 (en) * | 2004-05-04 | 2006-06-20 | Advanced Micro Devices, Inc. | Method of verifying an optical proximity correction (OPC) model |
US7404174B2 (en) * | 2004-07-27 | 2008-07-22 | International Business Machines Corporation | method for generating a set of test patterns for an optical proximity correction algorithm |
JP4768251B2 (ja) * | 2004-11-01 | 2011-09-07 | 株式会社東芝 | 半導体集積回路の設計方法、半導体集積回路の設計システム及び半導体集積回路の製造方法 |
US7640143B2 (en) * | 2004-11-03 | 2009-12-29 | International Business Machines Corporation | Circuit statistical modeling for partially correlated model parameters |
US7401319B2 (en) * | 2004-12-23 | 2008-07-15 | Invarium, Inc. | Method and system for reticle-wide hierarchy management for representational and computational reuse in integrated circuit layout design |
US7542013B2 (en) * | 2005-01-31 | 2009-06-02 | Asml Holding N.V. | System and method for imaging enhancement via calculation of a customized optimal pupil field and illumination mode |
JP4769025B2 (ja) * | 2005-06-15 | 2011-09-07 | 株式会社日立ハイテクノロジーズ | 走査型電子顕微鏡用撮像レシピ作成装置及びその方法並びに半導体パターンの形状評価装置 |
WO2007010621A1 (ja) * | 2005-07-22 | 2007-01-25 | Fujitsu Limited | フォトマスクパターンデータの作成方法、そのフォトマスクパターンデータを用いて作成されたフォトマスク、及び、そのフォトマスクを用いた半導体装置の製造方法 |
US7266803B2 (en) * | 2005-07-29 | 2007-09-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Layout generation and optimization to improve photolithographic performance |
US7458060B2 (en) * | 2005-12-30 | 2008-11-25 | Lsi Logic Corporation | Yield-limiting design-rules-compliant pattern library generation and layout inspection |
JP5242103B2 (ja) * | 2007-09-07 | 2013-07-24 | ルネサスエレクトロニクス株式会社 | 半導体集積回路のレイアウト方法 |
-
2005
- 2005-06-09 JP JP2005169801A patent/JP4828870B2/ja not_active Expired - Fee Related
-
2006
- 2006-06-02 TW TW095119517A patent/TW200710614A/zh unknown
- 2006-06-08 KR KR1020060051279A patent/KR100770815B1/ko active IP Right Grant
- 2006-06-08 US US11/448,719 patent/US20060285739A1/en not_active Abandoned
- 2006-06-09 CN CNB2006100879902A patent/CN100433025C/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0683949A (ja) * | 1992-08-28 | 1994-03-25 | Toyo Electric Mfg Co Ltd | 画像の縮小方法 |
US6128067A (en) * | 1998-04-28 | 2000-10-03 | Kabushiki Kaisha Toshiba | Correcting method and correcting system for mask pattern |
CN1411046A (zh) * | 2001-09-26 | 2003-04-16 | 株式会社东芝 | 图形评价装置、图形评价方法及程序 |
Non-Patent Citations (2)
Title |
---|
成品率驱动下基于模型的掩模版优化算法. 王旸,蔡懿慈,石蕊,洪先龙.半导体学报,第25卷第3期. 2004 |
成品率驱动下基于模型的掩模版优化算法. 王旸,蔡懿慈,石蕊,洪先龙.半导体学报,第25卷第3期. 2004 * |
Also Published As
Publication number | Publication date |
---|---|
KR20060128688A (ko) | 2006-12-14 |
TW200710614A (en) | 2007-03-16 |
JP4828870B2 (ja) | 2011-11-30 |
JP2006343587A (ja) | 2006-12-21 |
US20060285739A1 (en) | 2006-12-21 |
TWI322340B (zh) | 2010-03-21 |
KR100770815B1 (ko) | 2007-10-26 |
CN1877586A (zh) | 2006-12-13 |
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Effective date of registration: 20170810 Address after: Tokyo, Japan Patentee after: TOSHIBA MEMORY Corp. Address before: Tokyo, Japan Patentee before: Toshiba Corp. |
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Address after: Tokyo, Japan Patentee after: TOSHIBA MEMORY Corp. Address before: Tokyo, Japan Patentee before: Japanese businessman Panjaya Co.,Ltd. Address after: Tokyo, Japan Patentee after: Kaixia Co.,Ltd. Address before: Tokyo, Japan Patentee before: TOSHIBA MEMORY Corp. |
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