BR112016017343A2 - - Google Patents

Info

Publication number
BR112016017343A2
BR112016017343A2 BR112016017343A BR112016017343A BR112016017343A2 BR 112016017343 A2 BR112016017343 A2 BR 112016017343A2 BR 112016017343 A BR112016017343 A BR 112016017343A BR 112016017343 A BR112016017343 A BR 112016017343A BR 112016017343 A2 BR112016017343 A2 BR 112016017343A2
Authority
BR
Brazil
Application number
BR112016017343A
Other languages
Portuguese (pt)
Other versions
BR112016017343B1 (pt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BR112016017343A2 publication Critical patent/BR112016017343A2/pt
Publication of BR112016017343B1 publication Critical patent/BR112016017343B1/pt

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/17—Ink jet characterised by ink handling
    • B41J2/175—Ink supply systems ; Circuit parts therefor
    • B41J2/17503—Ink cartridges
    • B41J2/17543—Cartridge presence detection or type identification
    • B41J2/17546—Cartridge presence detection or type identification electronically
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/26—Accessing multiple arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/20—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/696—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having at least one additional gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/711—Insulated-gate field-effect transistors [IGFET] having floating bodies

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
BR112016017343-0A 2014-01-31 2014-01-31 Dispositivo de memória de cabeça de impressão, sistema e método para endereçamento tridimensional de uma unidade de memória programável apagável somente de leitura (eprom) de uma cabeça de impressão integrada BR112016017343B1 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2014/014014 WO2015116129A1 (en) 2014-01-31 2014-01-31 Three-dimensional addressing for erasable programmable read only memory

Publications (2)

Publication Number Publication Date
BR112016017343A2 true BR112016017343A2 (enExample) 2017-08-08
BR112016017343B1 BR112016017343B1 (pt) 2022-01-04

Family

ID=53757530

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016017343-0A BR112016017343B1 (pt) 2014-01-31 2014-01-31 Dispositivo de memória de cabeça de impressão, sistema e método para endereçamento tridimensional de uma unidade de memória programável apagável somente de leitura (eprom) de uma cabeça de impressão integrada

Country Status (19)

Country Link
US (3) US9773556B2 (enExample)
EP (5) EP3100273B1 (enExample)
JP (1) JP6262355B2 (enExample)
KR (1) KR101942164B1 (enExample)
CN (2) CN105940454B (enExample)
AU (2) AU2014380279B2 (enExample)
BR (1) BR112016017343B1 (enExample)
CA (1) CA2938125C (enExample)
DK (1) DK3100273T3 (enExample)
ES (1) ES2784236T3 (enExample)
HU (1) HUE048477T2 (enExample)
MX (1) MX367147B (enExample)
PH (1) PH12016501490B1 (enExample)
PL (1) PL3100273T3 (enExample)
PT (1) PT3100273T (enExample)
RU (1) RU2640631C1 (enExample)
SG (1) SG11201605665VA (enExample)
WO (1) WO2015116129A1 (enExample)
ZA (1) ZA201605059B (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105940454B (zh) * 2014-01-31 2020-01-17 惠普发展公司,有限责任合伙企业 对可擦除可编程只读存储器进行三维寻址
BR112019006948B1 (pt) 2016-10-06 2022-12-20 Hewlett-Packard Development Company, L.P. Aparelho de controle para um dispositivo de ejeção de fluido, dispositivo de ejeção de fluido e método
BR112019015681B1 (pt) 2017-01-31 2023-10-31 Hewlett-Packard Development Company, L.P Arranjo de memória para uma matriz de ejeção de fluido, matriz de ejeção de fluido e cartucho de fluido
CN113276561B (zh) * 2017-01-31 2022-10-11 惠普发展公司,有限责任合伙企业 用于流体喷射片的存储器库装置、流体喷射片及流体盒
US11090926B2 (en) 2017-07-06 2021-08-17 Hewlett-Packard Development Company, L.P. Decoders for memories of fluid ejection devices
PH12019501747B1 (en) 2017-07-06 2022-11-09 Hewlett Packard Development Co Selectors for nozzles and memory elements
US10913265B2 (en) 2017-07-06 2021-02-09 Hewlett-Packard Development Company, L.P. Data lines to fluid ejection devices
AU2019428071B2 (en) 2019-02-06 2023-01-19 Hewlett-Packard Development Company, L.P. Print component with memory circuit
MX2021008895A (es) 2019-02-06 2021-08-19 Hewlett Packard Development Co Componente de impresion de comunicacion.
WO2020162910A1 (en) 2019-02-06 2020-08-13 Hewlett-Packard Development Company, L.P. Memories of fluidic dies
US11787173B2 (en) 2019-02-06 2023-10-17 Hewlett-Packard Development Company, L.P. Print component with memory circuit

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JPS5641574A (en) 1979-09-07 1981-04-18 Nec Corp Memory unit
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CA1234224A (en) 1985-05-28 1988-03-15 Boleslav Sykora Computer memory management system
JPS63136397A (ja) 1986-11-26 1988-06-08 Nec Corp シフトレジスタ回路
JP3081614B2 (ja) 1989-03-08 2000-08-28 富士通株式会社 部分書込み制御装置
JP2862287B2 (ja) * 1989-10-12 1999-03-03 キヤノン株式会社 画像記録装置
US5029020A (en) * 1989-11-17 1991-07-02 Xerox Corporation Scanner with slow scan image context processing
JPH06236680A (ja) * 1992-12-15 1994-08-23 Mitsubishi Electric Corp シリアルアドレス入力用メモリ装置及びシリアルアドレス発生装置
US5828814A (en) 1996-09-10 1998-10-27 Moore Business Forms, Inc. Reduced cost high resolution real time raster image processing system and method
KR100313503B1 (ko) 1999-02-12 2001-11-07 김영환 멀티-뱅크 메모리 어레이를 갖는 반도체 메모리 장치
TW522099B (en) * 1999-03-31 2003-03-01 Seiko Epson Corp Printing system, printing controller, printer, method for controlling printing operations, printing method, ink box, ink provider, and recording medium
JP2000349163A (ja) * 1999-06-04 2000-12-15 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US6883044B1 (en) 2000-07-28 2005-04-19 Micron Technology, Inc. Synchronous flash memory with simultaneous access to one or more banks
US7444575B2 (en) 2000-09-21 2008-10-28 Inapac Technology, Inc. Architecture and method for testing of an integrated circuit device
US6402279B1 (en) 2000-10-30 2002-06-11 Hewlett-Packard Company Inkjet printhead and method for the same
US6552955B1 (en) * 2001-10-30 2003-04-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device with reduced power consumption
US6983428B2 (en) * 2002-09-24 2006-01-03 Sandisk Corporation Highly compact non-volatile memory and method thereof
US7549718B2 (en) * 2004-05-27 2009-06-23 Silverbrook Research Pty Ltd Printhead module having operation controllable on basis of thermal sensors
KR100855861B1 (ko) * 2005-12-30 2008-09-01 주식회사 하이닉스반도체 비휘발성 반도체 메모리 장치
JP4802722B2 (ja) * 2006-01-17 2011-10-26 セイコーエプソン株式会社 シーケンシャルアクセスメモリ
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CN105940454B (zh) * 2014-01-31 2020-01-17 惠普发展公司,有限责任合伙企业 对可擦除可编程只读存储器进行三维寻址
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Also Published As

Publication number Publication date
MX2016009841A (es) 2016-10-26
CN105940454A (zh) 2016-09-14
CN105940454B (zh) 2020-01-17
PH12016501490B1 (en) 2018-11-14
EP3100273B1 (en) 2020-03-25
JP2017507404A (ja) 2017-03-16
SG11201605665VA (en) 2016-08-30
EP3236471A3 (en) 2018-01-17
CA2938125C (en) 2018-10-23
CA2938125A1 (en) 2015-08-06
EP4468299A2 (en) 2024-11-27
ES2784236T3 (es) 2020-09-23
PT3100273T (pt) 2020-04-13
EP3100273A1 (en) 2016-12-07
KR20160104700A (ko) 2016-09-05
EP3236471A2 (en) 2017-10-25
US9928912B2 (en) 2018-03-27
EP3100273A4 (en) 2017-12-13
EP4468299A3 (en) 2025-02-26
WO2015116129A1 (en) 2015-08-06
US9773556B2 (en) 2017-09-26
DK3100273T3 (da) 2020-04-06
AU2014380279A1 (en) 2016-08-11
US20170221566A1 (en) 2017-08-03
US10340011B2 (en) 2019-07-02
BR112016017343B1 (pt) 2022-01-04
US20180114579A1 (en) 2018-04-26
PH12016501490A1 (en) 2017-02-06
EP3896696A1 (en) 2021-10-20
US20160343439A1 (en) 2016-11-24
HUE048477T2 (hu) 2020-07-28
EP3258469A1 (en) 2017-12-20
RU2640631C1 (ru) 2018-01-10
CN111326202A (zh) 2020-06-23
ZA201605059B (en) 2017-09-27
AU2017210573A1 (en) 2017-08-24
JP6262355B2 (ja) 2018-01-17
PL3100273T3 (pl) 2020-06-29
MX367147B (es) 2019-08-06
AU2014380279B2 (en) 2017-05-04
AU2017210573B2 (en) 2019-04-11
KR101942164B1 (ko) 2019-01-24
EP3258469B1 (en) 2021-10-06

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B25G Requested change of headquarter approved

Owner name: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P (US)

B09A Decision: intention to grant [chapter 9.1 patent gazette]
B09W Correction of the decision to grant [chapter 9.1.4 patent gazette]

Free format text: O PRESENTE PEDIDO TEVE UM PARECER DE DEFERIMENTO NOTIFICADO NA RPI NO 2656 DE30/11/2021, TENDO SIDO CONSTATADO QUE ESTA NOTIFICACAO FOI EFETUADA COM INCORRECOES NAINDICACAO DO RELATORIO DESCRITIVO, QUADRO REIVINDICATORIO E RESUMO, ASSIM, CONCLUO PELARETIFICACAO DO PARECER DE DEFERIMENTO, DEVENDO INTEGRAR A CARTA PATENTE O QUE CONSTAM NOQUADRO 1 DESTE PARECER.

B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 31/01/2014, OBSERVADAS AS CONDICOES LEGAIS.

B21F Lapse acc. art. 78, item iv - on non-payment of the annual fees in time

Free format text: REFERENTE A 12A ANUIDADE.

B24J Lapse because of non-payment of annual fees (definitively: art 78 iv lpi, resolution 113/2013 art. 12)

Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2864 DE 25-11-2025 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.