AU2001283186A1 - Simultaneous formation of charge storage and bitline to worldline isolation - Google Patents

Simultaneous formation of charge storage and bitline to worldline isolation

Info

Publication number
AU2001283186A1
AU2001283186A1 AU2001283186A AU8318601A AU2001283186A1 AU 2001283186 A1 AU2001283186 A1 AU 2001283186A1 AU 2001283186 A AU2001283186 A AU 2001283186A AU 8318601 A AU8318601 A AU 8318601A AU 2001283186 A1 AU2001283186 A1 AU 2001283186A1
Authority
AU
Australia
Prior art keywords
worldline
bitline
isolation
charge storage
simultaneous formation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001283186A
Other languages
English (en)
Inventor
Narbeh Derhacobian
Mark T. Ramsbey
David M. Rogers
Hidehiko Shiraiwa
Ravi Sunkavalli
Michael A. Van Buskirk
Janet Wang
Yider Wu
Jean Y. Yang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Spansion LLC
Original Assignee
Fujitsu Ltd
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Advanced Micro Devices Inc filed Critical Fujitsu Ltd
Publication of AU2001283186A1 publication Critical patent/AU2001283186A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/954—Making oxide-nitride-oxide device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/981—Utilizing varying dielectric thickness

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
AU2001283186A 2000-11-28 2001-08-07 Simultaneous formation of charge storage and bitline to worldline isolation Abandoned AU2001283186A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/723,635 US6465306B1 (en) 2000-11-28 2000-11-28 Simultaneous formation of charge storage and bitline to wordline isolation
US09723635 2000-11-28
PCT/US2001/024829 WO2002045157A1 (en) 2000-11-28 2001-08-07 Simultaneous formation of charge storage and bitline to worldline isolation

Publications (1)

Publication Number Publication Date
AU2001283186A1 true AU2001283186A1 (en) 2002-06-11

Family

ID=24907066

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001283186A Abandoned AU2001283186A1 (en) 2000-11-28 2001-08-07 Simultaneous formation of charge storage and bitline to worldline isolation

Country Status (8)

Country Link
US (3) US6465306B1 (ja)
EP (1) EP1338034B1 (ja)
JP (1) JP5132024B2 (ja)
KR (1) KR100810710B1 (ja)
CN (1) CN100530600C (ja)
AU (1) AU2001283186A1 (ja)
DE (2) DE60141035D1 (ja)
WO (1) WO2002045157A1 (ja)

Families Citing this family (112)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6047352A (en) * 1996-10-29 2000-04-04 Micron Technology, Inc. Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
US6614692B2 (en) * 2001-01-18 2003-09-02 Saifun Semiconductors Ltd. EEPROM array and method for operation thereof
US6795778B2 (en) * 2001-05-24 2004-09-21 Lincoln Global, Inc. System and method for facilitating welding system diagnostics
US7234274B2 (en) * 2001-07-10 2007-06-26 Kabushikikaisha Ansei Vehicle door
DE10140758A1 (de) * 2001-08-20 2003-04-24 Infineon Technologies Ag Speicherelement für eine Halbleiterspeichereinrichtung
TW519734B (en) * 2001-12-04 2003-02-01 Macronix Int Co Ltd Programming and erasing methods of non-volatile memory having nitride tunneling layer
JP2003243544A (ja) * 2002-02-20 2003-08-29 Mitsubishi Electric Corp 不揮発性半導体記憶装置およびその製造方法
US6617215B1 (en) * 2002-03-27 2003-09-09 Advanced Micro Devices, Inc. Memory wordline hard mask
KR100432888B1 (ko) * 2002-04-12 2004-05-22 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조방법
KR100655441B1 (ko) * 2005-09-01 2006-12-08 삼성전자주식회사 트랩형 비휘발성 메모리 장치의 제조 방법
US7927950B2 (en) * 2002-05-07 2011-04-19 Samsung Electronics Co., Ltd. Method of fabricating trap type nonvolatile memory device
KR100437451B1 (ko) * 2002-05-07 2004-06-23 삼성전자주식회사 트랩형 비휘발성 메모리 장치의 제조 방법
US6804136B2 (en) * 2002-06-21 2004-10-12 Micron Technology, Inc. Write once read only memory employing charge trapping in insulators
US7154140B2 (en) * 2002-06-21 2006-12-26 Micron Technology, Inc. Write once read only memory with large work function floating gates
US7193893B2 (en) * 2002-06-21 2007-03-20 Micron Technology, Inc. Write once read only memory employing floating gates
US6847562B2 (en) * 2002-06-28 2005-01-25 Progressant Technologies, Inc. Enhanced read and write methods for negative differential resistance (NDR) based memory device
US7095659B2 (en) * 2002-06-28 2006-08-22 Progressant Technologies, Inc. Variable voltage supply bias and methods for negative differential resistance (NDR) based memory device
US6912151B2 (en) * 2002-06-28 2005-06-28 Synopsys, Inc. Negative differential resistance (NDR) based memory device with reduced body effects
US6853035B1 (en) * 2002-06-28 2005-02-08 Synopsys, Inc. Negative differential resistance (NDR) memory device with reduced soft error rate
US7098472B2 (en) * 2002-06-28 2006-08-29 Progressant Technologies, Inc. Negative differential resistance (NDR) elements and memory device using the same
US6864104B2 (en) * 2002-06-28 2005-03-08 Progressant Technologies, Inc. Silicon on insulator (SOI) negative differential resistance (NDR) based memory device with reduced body effects
US6795337B2 (en) * 2002-06-28 2004-09-21 Progressant Technologies, Inc. Negative differential resistance (NDR) elements and memory device using the same
US6567292B1 (en) 2002-06-28 2003-05-20 Progressant Technologies, Inc. Negative differential resistance (NDR) element and memory with reduced soft error rate
US6969689B1 (en) * 2002-06-28 2005-11-29 Krishnaswamy Ramkumar Method of manufacturing an oxide-nitride-oxide (ONO) dielectric for SONOS-type devices
US7221586B2 (en) * 2002-07-08 2007-05-22 Micron Technology, Inc. Memory utilizing oxide nanolaminates
US7847344B2 (en) * 2002-07-08 2010-12-07 Micron Technology, Inc. Memory utilizing oxide-nitride nanolaminates
US7221017B2 (en) * 2002-07-08 2007-05-22 Micron Technology, Inc. Memory utilizing oxide-conductor nanolaminates
US6917544B2 (en) 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
KR100446632B1 (ko) * 2002-10-14 2004-09-04 삼성전자주식회사 비휘발성 ｓｏｎｓｎｏｓ 메모리
US7394703B2 (en) * 2002-10-15 2008-07-01 Halo Lsi, Inc. Twin insulator charge storage device operation and its fabrication method
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
US6730957B1 (en) * 2002-11-05 2004-05-04 Winbond Electronics Corporation Non-volatile memory compatible with logic devices and fabrication method thereof
US6980467B2 (en) * 2002-12-09 2005-12-27 Progressant Technologies, Inc. Method of forming a negative differential resistance device
US6812084B2 (en) * 2002-12-09 2004-11-02 Progressant Technologies, Inc. Adaptive negative differential resistance device
US7012833B2 (en) * 2002-12-09 2006-03-14 Progressant Technologies, Inc. Integrated circuit having negative differential resistance (NDR) devices with varied peak-to-valley ratios (PVRs)
US6979580B2 (en) * 2002-12-09 2005-12-27 Progressant Technologies, Inc. Process for controlling performance characteristics of a negative differential resistance (NDR) device
US6806117B2 (en) * 2002-12-09 2004-10-19 Progressant Technologies, Inc. Methods of testing/stressing a charge trapping device
US6849483B2 (en) * 2002-12-09 2005-02-01 Progressant Technologies, Inc. Charge trapping device and method of forming the same
DE10259783A1 (de) * 2002-12-19 2004-07-15 Infineon Technologies Ag Verfahren zur Verbesserung der Prozessschrittfolge bei der Herstellung von Halbleiterspeichern
US7005711B2 (en) * 2002-12-20 2006-02-28 Progressant Technologies, Inc. N-channel pull-up element and logic circuit
US6797567B2 (en) * 2002-12-24 2004-09-28 Macronix International Co., Ltd. High-K tunneling dielectric for read only memory device and fabrication method thereof
US6797650B1 (en) 2003-01-14 2004-09-28 Advanced Micro Devices, Inc. Flash memory devices with oxynitride dielectric as the charge storage media
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US6780708B1 (en) 2003-03-05 2004-08-24 Advanced Micro Devices, Inc. Method of forming core and periphery gates including two critical masking steps to form a hard mask in a core region that includes a critical dimension less than achievable at a resolution limit of lithography
US6998670B2 (en) * 2003-04-25 2006-02-14 Atmel Corporation Twin EEPROM memory transistors with subsurface stepped floating gates
US6919242B2 (en) * 2003-04-25 2005-07-19 Atmel Corporation Mirror image memory cell transistor pairs featuring poly floating spacers
US6888192B2 (en) * 2003-04-25 2005-05-03 Atmel Corporation Mirror image non-volatile memory cell transistor pairs with single poly layer
KR100885910B1 (ko) * 2003-04-30 2009-02-26 삼성전자주식회사 게이트 적층물에 ｏｈａ막을 구비하는 비 휘발성 반도체메모리 장치 및 그 제조방법
JP2004335566A (ja) * 2003-05-01 2004-11-25 Renesas Technology Corp 半導体装置の製造方法
US6977389B2 (en) * 2003-06-02 2005-12-20 Advanced Micro Devices, Inc. Planar polymer memory device
US6787458B1 (en) 2003-07-07 2004-09-07 Advanced Micro Devices, Inc. Polymer memory device formed in via opening
US6803267B1 (en) 2003-07-07 2004-10-12 Advanced Micro Devices, Inc. Silicon containing material for patterning polymeric memory element
US6835662B1 (en) 2003-07-14 2004-12-28 Advanced Micro Devices, Inc. Partially de-coupled core and periphery gate module process
KR100557995B1 (ko) * 2003-07-30 2006-03-06 삼성전자주식회사 부유트랩형 비휘발성 메모리 셀을 갖는 반도체 장치 및그의 제조방법
US6873550B2 (en) * 2003-08-07 2005-03-29 Micron Technology, Inc. Method for programming and erasing an NROM cell
US7157325B2 (en) * 2003-10-20 2007-01-02 Matsushita Electric Industrial Co., Ltd. Method for fabricating semiconductor memory device
US6979623B2 (en) * 2003-12-17 2005-12-27 Texas Instruments Incorporated Method for fabricating split gate transistor device having high-k dielectrics
KR100567757B1 (ko) * 2003-12-30 2006-04-05 동부아남반도체 주식회사 반도체 소자의 제조 방법
KR100533772B1 (ko) * 2004-01-09 2005-12-06 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US20050167734A1 (en) * 2004-01-20 2005-08-04 The Regents Of The University Of California Flash memory devices using large electron affinity material for charge trapping
US7018868B1 (en) 2004-02-02 2006-03-28 Advanced Micro Devices, Inc. Disposable hard mask for memory bitline scaling
US6927145B1 (en) 2004-02-02 2005-08-09 Advanced Micro Devices, Inc. Bitline hard mask spacer flow for memory cell scaling
US7608855B2 (en) * 2004-04-02 2009-10-27 Spansion Llc Polymer dielectrics for memory element array interconnect
CA2520140C (en) 2004-05-06 2007-05-15 Sidense Corp. Split-channel antifuse array architecture
US9123572B2 (en) 2004-05-06 2015-09-01 Sidense Corporation Anti-fuse memory cell
US8735297B2 (en) 2004-05-06 2014-05-27 Sidense Corporation Reverse optical proximity correction method
US7755162B2 (en) 2004-05-06 2010-07-13 Sidense Corp. Anti-fuse memory cell
US6972230B1 (en) * 2004-06-10 2005-12-06 Macronix International Co., Ltd. Method for fabricating a floating gate memory device
US6946349B1 (en) * 2004-08-09 2005-09-20 Chartered Semiconductor Manufacturing Ltd. Method for integrating a SONOS gate oxide transistor into a logic/analog integrated circuit having several gate oxide thicknesses
US20060036803A1 (en) * 2004-08-16 2006-02-16 Mori Edan Non-volatile memory device controlled by a micro-controller
JPWO2006035503A1 (ja) * 2004-09-29 2008-05-15 スパンション エルエルシー 半導体装置および半導体装置の製造方法
US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
JP2006120719A (ja) * 2004-10-19 2006-05-11 Fujitsu Ltd 不揮発性半導体記憶装置及びその製造方法
US7256112B2 (en) * 2005-01-20 2007-08-14 Chartered Semiconductor Manufacturing, Ltd Laser activation of implanted contact plug for memory bitline fabrication
US7029976B1 (en) 2005-01-21 2006-04-18 Chartered Semiconductor Manufacturing. Ltd Method for SONOS EFLASH integrated circuit
GB2436271B (en) * 2005-01-24 2010-06-16 Spansion Llc Semiconductor device and fabrication method thereof
US7365382B2 (en) * 2005-02-28 2008-04-29 Infineon Technologies Ag Semiconductor memory having charge trapping memory cells and fabrication method thereof
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US7232724B1 (en) 2005-04-25 2007-06-19 Advanced Micro Devices, Inc. Radical oxidation for bitline oxide of SONOS
EP1746645A3 (en) 2005-07-18 2009-01-21 Saifun Semiconductors Ltd. Memory array with sub-minimum feature size word line spacing and method of fabrication
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US20070087503A1 (en) * 2005-10-17 2007-04-19 Saifun Semiconductors, Ltd. Improving NROM device characteristics using adjusted gate work function
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
JP2007194511A (ja) * 2006-01-23 2007-08-02 Renesas Technology Corp 不揮発性半導体記憶装置およびその製造方法
US7709402B2 (en) 2006-02-16 2010-05-04 Micron Technology, Inc. Conductive layers for hafnium silicon oxynitride films
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7582526B2 (en) * 2006-06-02 2009-09-01 Macronix International Co., Ltd. Method for manufacturing semiconductor device
TWI302751B (en) 2006-06-14 2008-11-01 Macronix Int Co Ltd Nonvolatile memory cell, mixed nonvolatile memory array and method for operation thereof
US7471568B2 (en) * 2006-06-21 2008-12-30 Macronix International Co., Ltd. Multi-level cell memory structures with enlarged second bit operation window
US7599229B2 (en) * 2006-06-21 2009-10-06 Macronix International Co., Ltd. Methods and structures for expanding a memory operation window and reducing a second bit effect
CN101097951B (zh) * 2006-06-27 2011-03-02 旺宏电子股份有限公司 非挥发性记忆胞结构以及操作方法
US7585746B2 (en) * 2006-07-12 2009-09-08 Chartered Semiconductor Manufacturing, Ltd. Process integration scheme of SONOS technology
US8587049B2 (en) * 2006-07-17 2013-11-19 Spansion, Llc Memory cell system with charge trap
US8809936B2 (en) * 2006-07-31 2014-08-19 Globalfoundries Inc. Memory cell system with multiple nitride layers
US7556999B2 (en) * 2006-09-12 2009-07-07 Macronix International Co., Ltd. Method for fabricating non-volatile memory
KR101005638B1 (ko) * 2006-12-04 2011-01-05 주식회사 하이닉스반도체 반도체 메모리 소자 및 제조방법
TW200826293A (en) * 2006-12-11 2008-06-16 Innolux Display Corp Read-only memory and method for manufacturing the same
US7955960B2 (en) * 2007-03-22 2011-06-07 Hynix Semiconductor Inc. Nonvolatile memory device and method of fabricating the same
KR100907886B1 (ko) * 2007-10-11 2009-07-15 주식회사 동부하이텍 비휘발성 메모리 소자의 제조방법
KR101052475B1 (ko) * 2008-12-29 2011-07-28 주식회사 하이닉스반도체 비휘발성 메모리 소자의 제조 방법
CN102237366B (zh) * 2010-04-29 2016-06-15 旺宏电子股份有限公司 具有连续电荷储存介电堆栈的非挥发存储阵列
US9331184B2 (en) * 2013-06-11 2016-05-03 United Microelectronics Corp. Sonos device and method for fabricating the same
US8916432B1 (en) * 2014-01-21 2014-12-23 Cypress Semiconductor Corporation Methods to integrate SONOS into CMOS flow
JP6407644B2 (ja) * 2014-09-24 2018-10-17 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN104332471B (zh) * 2014-11-17 2017-06-23 上海华力微电子有限公司 一种sonos闪存器件及其编译方法
CN104952734B (zh) * 2015-07-16 2020-01-24 矽力杰半导体技术(杭州)有限公司 半导体结构及其制造方法
JP2019102520A (ja) * 2017-11-29 2019-06-24 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US11311958B1 (en) * 2019-05-13 2022-04-26 Airgas, Inc. Digital welding and cutting efficiency analysis, process evaluation and response feedback system for process optimization

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4173766A (en) 1977-09-16 1979-11-06 Fairchild Camera And Instrument Corporation Insulated gate field-effect transistor read-only memory cell
US5168334A (en) 1987-07-31 1992-12-01 Texas Instruments, Incorporated Non-volatile semiconductor memory
JPH03227069A (ja) 1990-01-31 1991-10-08 Matsushita Electron Corp 半導体記憶装置の製造方法
JP3358663B2 (ja) 1991-10-25 2002-12-24 ローム株式会社 半導体記憶装置およびその記憶情報読出方法
US5644533A (en) 1992-11-02 1997-07-01 Nvx Corporation Flash memory system, and methods of constructing and utilizing same
JPH06291330A (ja) 1993-03-31 1994-10-18 Citizen Watch Co Ltd 半導体不揮発性記憶素子とその製造方法
DE19505293A1 (de) 1995-02-16 1996-08-22 Siemens Ag Mehrwertige Festwertspeicherzelle mit verbessertem Störabstand
US6475846B1 (en) * 1995-05-18 2002-11-05 Texas Instruments Incorporated Method of making floating-gate memory-cell array with digital logic transistors
JP3424427B2 (ja) * 1995-07-27 2003-07-07 ソニー株式会社 不揮発性半導体メモリ装置
US5768192A (en) 1996-07-23 1998-06-16 Saifun Semiconductors, Ltd. Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping
US5753551A (en) * 1996-11-25 1998-05-19 Vanguard International Semiconductor Corporation Memory cell array with a self-aligned, buried bit line
US5966603A (en) * 1997-06-11 1999-10-12 Saifun Semiconductors Ltd. NROM fabrication method with a periphery portion
US6768165B1 (en) 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
JP4810712B2 (ja) * 1997-11-05 2011-11-09 ソニー株式会社 不揮発性半導体記憶装置及びその読み出し方法
US5963465A (en) 1997-12-12 1999-10-05 Saifun Semiconductors, Ltd. Symmetric segmented memory array architecture
TW358236B (en) 1997-12-19 1999-05-11 Nanya Technology Corp Improved local silicon oxidization method in the manufacture of semiconductor isolation
US6030871A (en) 1998-05-05 2000-02-29 Saifun Semiconductors Ltd. Process for producing two bit ROM cell utilizing angled implant
US6215148B1 (en) * 1998-05-20 2001-04-10 Saifun Semiconductors Ltd. NROM cell with improved programming, erasing and cycling
US6287917B1 (en) * 1999-09-08 2001-09-11 Advanced Micro Devices, Inc. Process for fabricating an MNOS flash memory device
US6117730A (en) * 1999-10-25 2000-09-12 Advanced Micro Devices, Inc. Integrated method by using high temperature oxide for top oxide and periphery gate oxide
US6406960B1 (en) * 1999-10-25 2002-06-18 Advanced Micro Devices, Inc. Process for fabricating an ONO structure having a silicon-rich silicon nitride layer
US6326268B1 (en) * 1999-10-25 2001-12-04 Advanced Micro Devices, Inc. Method of fabricating a MONOS flash cell using shallow trench isolation
JP4923318B2 (ja) * 1999-12-17 2012-04-25 ソニー株式会社 不揮発性半導体記憶装置およびその動作方法
JP4051175B2 (ja) * 2000-11-17 2008-02-20 スパンション エルエルシー 不揮発性半導体メモリ装置および製造方法
US6468865B1 (en) * 2000-11-28 2002-10-22 Advanced Micro Devices, Inc. Method of simultaneous formation of bitline isolation and periphery oxide

Also Published As

Publication number Publication date
US20020063277A1 (en) 2002-05-30
WO2002045157A1 (en) 2002-06-06
CN1478298A (zh) 2004-02-25
KR100810710B1 (ko) 2008-03-07
DE60144340D1 (de) 2011-05-12
JP5132024B2 (ja) 2013-01-30
US6555436B2 (en) 2003-04-29
KR20030060958A (ko) 2003-07-16
US6541816B2 (en) 2003-04-01
EP1338034B1 (en) 2010-01-06
JP2004515076A (ja) 2004-05-20
US6465306B1 (en) 2002-10-15
CN100530600C (zh) 2009-08-19
US20020192910A1 (en) 2002-12-19
DE60141035D1 (de) 2010-02-25
EP1338034A1 (en) 2003-08-27

Similar Documents

Publication Publication Date Title
AU2001283186A1 (en) Simultaneous formation of charge storage and bitline to worldline isolation
AU2002219953A1 (en) Multiple tier array capacitor and methods of fabrication therefor
HUP0301575A3 (en) Methods of modifying eukaryotic cells
AU2001262953A1 (en) Three-dimensional memory array and method of fabrication
AU2001240542A1 (en) Heterocyclic compounds and their use as parp inhibitors
AU2002218441A1 (en) Rigid cigarette pack and its method of manufacturing
AU2001283492A1 (en) Methods of patterning protein and cell adhesivity
AU7077900A (en) Non-volatile memory structure for twin-bit storage and methods of making same
AU6340600A (en) Telomerase inhibitors and methods of their use
TW542145U (en) Storage box structure of motorcycle
AU2001281044A1 (en) Glow-in-the-dark sublimation-receptive medium and method of making
AU2001255696A1 (en) Telomerase inhibitors and methods of their use
AU2002216223A1 (en) Preservation of cells
AU2001275897A1 (en) Improvement of cell culture performance
AU2001229352A1 (en) Ignition plug and method of manufacture
AU2001236755A1 (en) Structures and methods for improved capacitor cells
AU2002238218A1 (en) Prolonged storage of red blood cells
AU2001225856A1 (en) Optimized anaerobic adhesive compositions and methods of preparing same
AU2001261496A1 (en) Luxo-sigma54 interactions and methods of use
AU2001280468A1 (en) High-performance high-density cmos sram cell
AU2001286032A1 (en) Storage and conversion of compositions
AU3594400A (en) Isolation of stem cells and methods of use thereof
AU2001286861A1 (en) Use of methylphenidate compounds to enhance memory
AU7324900A (en) Storage of coins
AU4459100A (en) Cell cycle genes and methods of use