ATE421757T1 - Magetspeicherzellenfeld mit wahlfreiem zugriff mit dünnen elektrisch leitfähigen lese- und schreibleitungen - Google Patents

Magetspeicherzellenfeld mit wahlfreiem zugriff mit dünnen elektrisch leitfähigen lese- und schreibleitungen

Info

Publication number
ATE421757T1
ATE421757T1 AT05368012T AT05368012T ATE421757T1 AT E421757 T1 ATE421757 T1 AT E421757T1 AT 05368012 T AT05368012 T AT 05368012T AT 05368012 T AT05368012 T AT 05368012T AT E421757 T1 ATE421757 T1 AT E421757T1
Authority
AT
Austria
Prior art keywords
lines
memory cell
random access
electrically conductive
magnetic memory
Prior art date
Application number
AT05368012T
Other languages
English (en)
Inventor
Tai Min
Po-Kang Wang
Xizeng Shi
Yimin Guo
Original Assignee
Headway Technologies Inc
Applied Spintronics Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Headway Technologies Inc, Applied Spintronics Tech Inc filed Critical Headway Technologies Inc
Application granted granted Critical
Publication of ATE421757T1 publication Critical patent/ATE421757T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1653—Address circuits or decoders
    • G11C11/1657—Word-line or row circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1659—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
  • Hall/Mr Elements (AREA)
AT05368012T 2004-07-16 2005-06-24 Magetspeicherzellenfeld mit wahlfreiem zugriff mit dünnen elektrisch leitfähigen lese- und schreibleitungen ATE421757T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/892,668 US7067330B2 (en) 2004-07-16 2004-07-16 Magnetic random access memory array with thin conduction electrical read and write lines

Publications (1)

Publication Number Publication Date
ATE421757T1 true ATE421757T1 (de) 2009-02-15

Family

ID=35124479

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05368012T ATE421757T1 (de) 2004-07-16 2005-06-24 Magetspeicherzellenfeld mit wahlfreiem zugriff mit dünnen elektrisch leitfähigen lese- und schreibleitungen

Country Status (7)

Country Link
US (3) US7067330B2 (de)
EP (1) EP1619689B1 (de)
JP (1) JP2006032973A (de)
KR (2) KR20060053836A (de)
AT (1) ATE421757T1 (de)
DE (1) DE602005012463D1 (de)
TW (1) TWI302705B (de)

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US7760474B1 (en) 2006-07-14 2010-07-20 Grandis, Inc. Magnetic element utilizing free layer engineering
US7663848B1 (en) 2006-07-14 2010-02-16 Grandis, Inc. Magnetic memories utilizing a magnetic element having an engineered free layer
US20090095985A1 (en) * 2007-10-10 2009-04-16 Samsung Electronics Co., Ltd. Multi-layer electrode, cross point memory array and method of manufacturing the same
US20090102015A1 (en) * 2007-10-17 2009-04-23 Ulrich Klostermann Integrated Circuit, Memory Cell Array, Memory Cell, Memory Module, Method of Operating an Integrated Circuit, and Method of Manufacturing an Integrated Circuit
DE102007049786A1 (de) * 2007-10-17 2009-04-23 Qimonda Ag Integrierte Schaltung, Speicherzellenarray, Speicherzelle, Verfahren zum Betreiben einer integrierten Schaltung, sowie Verfahren zum Herstellen einer integrierten Schaltung
US8659852B2 (en) 2008-04-21 2014-02-25 Seagate Technology Llc Write-once magentic junction memory array
US7852663B2 (en) * 2008-05-23 2010-12-14 Seagate Technology Llc Nonvolatile programmable logic gates and adders
US7855911B2 (en) * 2008-05-23 2010-12-21 Seagate Technology Llc Reconfigurable magnetic logic device using spin torque
US7881098B2 (en) 2008-08-26 2011-02-01 Seagate Technology Llc Memory with separate read and write paths
US7985994B2 (en) * 2008-09-29 2011-07-26 Seagate Technology Llc Flux-closed STRAM with electronically reflective insulative spacer
US8169810B2 (en) 2008-10-08 2012-05-01 Seagate Technology Llc Magnetic memory with asymmetric energy barrier
US8089132B2 (en) * 2008-10-09 2012-01-03 Seagate Technology Llc Magnetic memory with phonon glass electron crystal material
US8039913B2 (en) * 2008-10-09 2011-10-18 Seagate Technology Llc Magnetic stack with laminated layer
US7880209B2 (en) * 2008-10-09 2011-02-01 Seagate Technology Llc MRAM cells including coupled free ferromagnetic layers for stabilization
US20100102405A1 (en) * 2008-10-27 2010-04-29 Seagate Technology Llc St-ram employing a spin filter
US8045366B2 (en) * 2008-11-05 2011-10-25 Seagate Technology Llc STRAM with composite free magnetic element
US8043732B2 (en) 2008-11-11 2011-10-25 Seagate Technology Llc Memory cell with radial barrier
US7826181B2 (en) * 2008-11-12 2010-11-02 Seagate Technology Llc Magnetic memory with porous non-conductive current confinement layer
US8289756B2 (en) 2008-11-25 2012-10-16 Seagate Technology Llc Non volatile memory including stabilizing structures
US7826259B2 (en) * 2009-01-29 2010-11-02 Seagate Technology Llc Staggered STRAM cell
US7999338B2 (en) 2009-07-13 2011-08-16 Seagate Technology Llc Magnetic stack having reference layers with orthogonal magnetization orientation directions
US20140003118A1 (en) 2012-07-02 2014-01-02 International Business Machines Corporation Magnetic tunnel junction self-alignment in magnetic domain wall shift register memory devices
KR102465539B1 (ko) 2015-09-18 2022-11-11 삼성전자주식회사 자기 터널 접합 구조체를 포함하는 반도체 소자 및 그의 형성 방법
JP2017139399A (ja) * 2016-02-05 2017-08-10 Tdk株式会社 磁気メモリ
JP6297104B2 (ja) 2016-08-04 2018-03-20 株式会社東芝 磁気記憶装置及びその製造方法
JP6271655B1 (ja) * 2016-08-05 2018-01-31 株式会社東芝 不揮発性メモリ
US10693059B2 (en) * 2018-02-20 2020-06-23 International Business Machines Corporation MTJ stack etch using IBE to achieve vertical profile
US10944050B2 (en) * 2018-05-08 2021-03-09 Applied Materials, Inc. Magnetic tunnel junction structures and methods of manufacture thereof

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US7067330B2 (en) * 2004-07-16 2006-06-27 Headway Technologies, Inc. Magnetic random access memory array with thin conduction electrical read and write lines

Also Published As

Publication number Publication date
EP1619689A1 (de) 2006-01-25
US7067330B2 (en) 2006-06-27
TW200614233A (en) 2006-05-01
US20060014306A1 (en) 2006-01-19
JP2006032973A (ja) 2006-02-02
KR20060053836A (ko) 2006-05-22
DE602005012463D1 (de) 2009-03-12
US7394122B2 (en) 2008-07-01
US20060211155A1 (en) 2006-09-21
US20060014346A1 (en) 2006-01-19
TWI302705B (en) 2008-11-01
KR100948009B1 (ko) 2010-03-18
EP1619689B1 (de) 2009-01-21
US7394123B2 (en) 2008-07-01
KR20090028591A (ko) 2009-03-18

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