ATE381778T1 - Verfahren zum erreichen eines dotierungsniveaus im polysilizium für flash-speicherbauelemente - Google Patents

Verfahren zum erreichen eines dotierungsniveaus im polysilizium für flash-speicherbauelemente

Info

Publication number
ATE381778T1
ATE381778T1 AT00948725T AT00948725T ATE381778T1 AT E381778 T1 ATE381778 T1 AT E381778T1 AT 00948725 T AT00948725 T AT 00948725T AT 00948725 T AT00948725 T AT 00948725T AT E381778 T1 ATE381778 T1 AT E381778T1
Authority
AT
Austria
Prior art keywords
layer
select transistor
flash memory
memory cell
amorphous silicon
Prior art date
Application number
AT00948725T
Other languages
English (en)
Inventor
Kent Chang
Kenneth Au
Hao Fang
Original Assignee
Spansion Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spansion Llc filed Critical Spansion Llc
Application granted granted Critical
Publication of ATE381778T1 publication Critical patent/ATE381778T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
AT00948725T 1999-08-06 2000-07-14 Verfahren zum erreichen eines dotierungsniveaus im polysilizium für flash-speicherbauelemente ATE381778T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/369,638 US6218689B1 (en) 1999-08-06 1999-08-06 Method for providing a dopant level for polysilicon for flash memory devices

Publications (1)

Publication Number Publication Date
ATE381778T1 true ATE381778T1 (de) 2008-01-15

Family

ID=23456276

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00948725T ATE381778T1 (de) 1999-08-06 2000-07-14 Verfahren zum erreichen eines dotierungsniveaus im polysilizium für flash-speicherbauelemente

Country Status (9)

Country Link
US (1) US6218689B1 (de)
EP (1) EP1218938B1 (de)
JP (1) JP5178979B2 (de)
KR (1) KR100697353B1 (de)
CN (1) CN1178291C (de)
AT (1) ATE381778T1 (de)
DE (1) DE60037528T2 (de)
TW (1) TW457709B (de)
WO (1) WO2001011683A1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6362049B1 (en) * 1998-12-04 2002-03-26 Advanced Micro Devices, Inc. High yield performance semiconductor process flow for NAND flash memory products
KR100339683B1 (ko) * 2000-02-03 2002-06-05 윤종용 반도체 집적회로의 자기정렬 콘택 구조체 형성방법
US6462372B1 (en) 2001-10-09 2002-10-08 Silicon-Based Technology Corp. Scaled stack-gate flash memory device
KR100487560B1 (ko) * 2003-03-10 2005-05-03 삼성전자주식회사 선택 트랜지스터를 갖는 이이피롬 및 그 제조방법
US6995060B2 (en) * 2003-03-19 2006-02-07 Promos Technologies Inc. Fabrication of integrated circuit elements in structures with protruding features
US6962852B2 (en) * 2003-03-19 2005-11-08 Promos Technologies Inc. Nonvolatile memories and methods of fabrication
US6962851B2 (en) * 2003-03-19 2005-11-08 Promos Technologies, Inc. Nonvolatile memories and methods of fabrication
US6974739B2 (en) * 2003-05-16 2005-12-13 Promos Technologies Inc. Fabrication of dielectric on a gate surface to insulate the gate from another element of an integrated circuit
US6902974B2 (en) * 2003-05-16 2005-06-07 Promos Technologies Inc. Fabrication of conductive gates for nonvolatile memories from layers with protruding portions
US7214585B2 (en) 2003-05-16 2007-05-08 Promos Technologies Inc. Methods of fabricating integrated circuits with openings that allow electrical contact to conductive features having self-aligned edges
US7169667B2 (en) * 2003-07-30 2007-01-30 Promos Technologies Inc. Nonvolatile memory cell with multiple floating gates formed after the select gate
US6951782B2 (en) * 2003-07-30 2005-10-04 Promos Technologies, Inc. Nonvolatile memory cell with multiple floating gates formed after the select gate and having upward protrusions
US6885044B2 (en) * 2003-07-30 2005-04-26 Promos Technologies, Inc. Arrays of nonvolatile memory cells wherein each cell has two conductive floating gates
US7060565B2 (en) * 2003-07-30 2006-06-13 Promos Technologies Inc. Fabrication of dielectric for a nonvolatile memory cell having multiple floating gates
US7052947B2 (en) * 2003-07-30 2006-05-30 Promos Technologies Inc. Fabrication of gate dielectric in nonvolatile memories in which a memory cell has multiple floating gates
US7101757B2 (en) * 2003-07-30 2006-09-05 Promos Technologies, Inc. Nonvolatile memory cells with buried channel transistors
KR100665396B1 (ko) * 2004-01-09 2007-01-04 에스티마이크로일렉트로닉스 엔.브이. 플래쉬 메모리 소자의 제조 방법
KR100538884B1 (ko) * 2004-03-30 2005-12-23 주식회사 하이닉스반도체 플래쉬 메모리소자의 제조방법
JP4907897B2 (ja) * 2005-04-15 2012-04-04 株式会社東芝 不揮発性半導体記憶装置
KR100766229B1 (ko) * 2005-05-30 2007-10-10 주식회사 하이닉스반도체 플래시 메모리 소자의 제조 방법
KR100680455B1 (ko) * 2005-06-30 2007-02-08 주식회사 하이닉스반도체 Ｎａｎｄ형 플래쉬 메모리 소자, 그 제조 방법 및 그 구동방법
TWI267200B (en) * 2006-01-09 2006-11-21 Powerchip Semiconductor Corp Non-volatile memory structure and fabricating method thereof
KR100735470B1 (ko) * 2006-05-19 2007-07-03 삼성전기주식회사 질화물계 반도체 발광소자의 제조방법
US7782651B2 (en) 2006-10-24 2010-08-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including storage device and method for driving the same
KR100898678B1 (ko) * 2006-10-31 2009-05-22 주식회사 하이닉스반도체 반도체 소자의 제조방법
US9741734B2 (en) * 2015-12-15 2017-08-22 Intel Corporation Memory devices and systems having reduced bit line to drain select gate shorting and associated methods

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60189971A (ja) * 1984-03-09 1985-09-27 Toshiba Corp 半導体装置の製造方法
US4899205A (en) * 1986-05-09 1990-02-06 Actel Corporation Electrically-programmable low-impedance anti-fuse element
US5677867A (en) 1991-06-12 1997-10-14 Hazani; Emanuel Memory with isolatable expandable bit lines
JPH04217373A (ja) 1990-12-18 1992-08-07 Sharp Corp 不揮発性記憶装置およびその製造方法
EP0612108B1 (de) 1993-02-19 2001-07-04 STMicroelectronics S.r.l. EEPROM-Zelle mit doppelter Polysiliziumschicht und ihr Herstellungsverfahren
JPH0799248A (ja) * 1993-06-11 1995-04-11 Fujitsu Ltd 半導体装置及びその製造方法
JP3256375B2 (ja) * 1993-07-05 2002-02-12 シャープ株式会社 不揮発性メモリセルの製造方法
US5511020A (en) 1993-11-23 1996-04-23 Monolithic System Technology, Inc. Pseudo-nonvolatile memory incorporating data refresh operation
JP3450467B2 (ja) 1993-12-27 2003-09-22 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
JPH08306889A (ja) * 1995-05-08 1996-11-22 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2885134B2 (ja) * 1995-06-15 1999-04-19 日本電気株式会社 半導体メモリ装置の製造方法
JPH0964209A (ja) * 1995-08-25 1997-03-07 Toshiba Corp 半導体装置およびその製造方法
JPH1084053A (ja) * 1996-09-09 1998-03-31 Matsushita Electron Corp 半導体記憶装置の製造方法
JP3442596B2 (ja) * 1996-11-28 2003-09-02 富士通株式会社 半導体装置の製造方法
JPH1167941A (ja) * 1997-08-26 1999-03-09 Sanyo Electric Co Ltd 不揮発性半導体記憶装置及びその製造方法
KR100407084B1 (ko) * 1997-10-06 2003-11-28 세이코 엡슨 가부시키가이샤 불휘발성 반도체 기억 장치 및 그 제조 방법
JPH11176957A (ja) * 1997-12-05 1999-07-02 Sony Corp 不揮発性半導体記憶装置およびその製造方法
US6023085A (en) * 1997-12-18 2000-02-08 Advanced Micro Devices, Inc. Core cell structure and corresponding process for NAND-type high performance flash memory device

Also Published As

Publication number Publication date
JP2003506901A (ja) 2003-02-18
US6218689B1 (en) 2001-04-17
DE60037528D1 (de) 2008-01-31
KR100697353B1 (ko) 2007-03-20
DE60037528T2 (de) 2008-12-24
EP1218938B1 (de) 2007-12-19
WO2001011683A1 (en) 2001-02-15
CN1178291C (zh) 2004-12-01
TW457709B (en) 2001-10-01
CN1369113A (zh) 2002-09-11
KR20020020951A (ko) 2002-03-16
JP5178979B2 (ja) 2013-04-10
EP1218938A1 (de) 2002-07-03

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