ATE232337T1 - Sequentieller interleaver und adressgenerator mit verringertem speicheraufwand - Google Patents

Sequentieller interleaver und adressgenerator mit verringertem speicheraufwand

Info

Publication number
ATE232337T1
ATE232337T1 AT95106635T AT95106635T ATE232337T1 AT E232337 T1 ATE232337 T1 AT E232337T1 AT 95106635 T AT95106635 T AT 95106635T AT 95106635 T AT95106635 T AT 95106635T AT E232337 T1 ATE232337 T1 AT E232337T1
Authority
AT
Austria
Prior art keywords
cell
cells
symbol
symbols
location
Prior art date
Application number
AT95106635T
Other languages
English (en)
Inventor
Zheng Huang
Original Assignee
Gen Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Instrument Corp filed Critical Gen Instrument Corp
Application granted granted Critical
Publication of ATE232337T1 publication Critical patent/ATE232337T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2782—Interleaver implementations, which reduce the amount of required interleaving memory
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2732—Convolutional interleaver; Interleavers using shift-registers or delay lines like, e.g. Ramsey type interleaver
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276—Interleaving address generation

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
AT95106635T 1994-05-04 1995-05-03 Sequentieller interleaver und adressgenerator mit verringertem speicheraufwand ATE232337T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/238,259 US5537420A (en) 1994-05-04 1994-05-04 Convolutional interleaver with reduced memory requirements and address generator therefor

Publications (1)

Publication Number Publication Date
ATE232337T1 true ATE232337T1 (de) 2003-02-15

Family

ID=22897141

Family Applications (1)

Application Number Title Priority Date Filing Date
AT95106635T ATE232337T1 (de) 1994-05-04 1995-05-03 Sequentieller interleaver und adressgenerator mit verringertem speicheraufwand

Country Status (12)

Country Link
US (1) US5537420A (de)
EP (1) EP0681373B1 (de)
JP (1) JP3634004B2 (de)
KR (1) KR100362090B1 (de)
AT (1) ATE232337T1 (de)
AU (1) AU683355B2 (de)
CA (1) CA2148199C (de)
DE (1) DE69529546T2 (de)
DK (1) DK0681373T3 (de)
ES (1) ES2191689T3 (de)
NO (1) NO315886B1 (de)
TW (1) TW245862B (de)

Families Citing this family (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5659580A (en) * 1994-11-29 1997-08-19 Lucent Technologies Inc. Data interleaver for use with mobile communication systems and having a contiguous counter and an address twister
US5898710A (en) * 1995-06-06 1999-04-27 Globespan Technologies, Inc. Implied interleaving, a family of systematic interleavers and deinterleavers
US5764649A (en) * 1996-03-29 1998-06-09 Amati Communications Corporation Efficient address generation for convolutional interleaving using a minimal amount of memory
US5828671A (en) * 1996-04-10 1998-10-27 Motorola, Inc. Method and apparatus for deinterleaving an interleaved data stream
US5719875A (en) * 1996-06-11 1998-02-17 Lucent Technologies Inc. Systematic convolution interleavers and deinterleavers
KR100192797B1 (ko) * 1996-07-01 1999-06-15 전주범 정적 램을 이용한 길쌈인터리버의 구조
US5940863A (en) * 1996-07-26 1999-08-17 Zenith Electronics Corporation Apparatus for de-rotating and de-interleaving data including plural memory devices and plural modulo memory address generators
KR100186627B1 (ko) * 1996-09-21 1999-05-15 삼성전자 주식회사 베이스 밴드 인터리버
US6061815A (en) * 1996-12-09 2000-05-09 Schlumberger Technologies, Inc. Programming utility register to generate addresses in algorithmic pattern generator
ATE292336T1 (de) * 1997-01-31 2005-04-15 Cit Alcatel Verfahren und geräte zur schachtelung/entschachtelung von digitalen daten und kommunikationssystem
US5912898A (en) * 1997-02-27 1999-06-15 Integrated Device Technology, Inc. Convolutional interleaver/de-interleaver
KR100255304B1 (ko) * 1997-04-08 2000-05-01 김영환 디지탈 통신기기의 컨벌루셔널 디인터리버
KR100237745B1 (ko) * 1997-05-23 2000-01-15 김영환 회전형 인터리버/디인터리버의 메모리 주소 발생장치 및 그 방법
JP3239084B2 (ja) * 1997-05-30 2001-12-17 株式会社次世代デジタルテレビジョン放送システム研究所 マルチキャリア伝送インターリーブ装置及び方法
KR19990003242A (ko) 1997-06-25 1999-01-15 윤종용 구조적 펀처드 길쌈부호 부호와 및 복호기
US5938763A (en) * 1997-08-06 1999-08-17 Zenith Electronics Corporation System for transposing data from column order to row order
JP4033245B2 (ja) * 1997-09-02 2008-01-16 ソニー株式会社 ターボ符号化装置およびターボ符号化方法
US6014761A (en) * 1997-10-06 2000-01-11 Motorola, Inc. Convolutional interleaving/de-interleaving method using pointer incrementing across predetermined distances and apparatus for data transmission
KR100248396B1 (ko) * 1997-10-24 2000-03-15 정선종 병렬 길쌈 부호화기를 사용한 채널 부호기 설계방법
KR100556469B1 (ko) * 1998-01-12 2006-04-21 엘지전자 주식회사 인터리브/디인터리브 장치
JP3295372B2 (ja) * 1998-04-22 2002-06-24 日本プレシジョン・サーキッツ株式会社 デインターリーブ装置
US6178530B1 (en) 1998-04-24 2001-01-23 Lucent Technologies Inc. Addressing scheme for convolutional interleaver/de-interleaver
EP0954109B1 (de) * 1998-04-27 2004-12-22 Matsushita Electric Industrial Co., Ltd. Verfahren und Vorrichtung zur Faltungsverschachtelung sowie Verfahren und Vorrichtung zur Faltungsentschachtelung
JP4081875B2 (ja) * 1998-09-08 2008-04-30 ソニー株式会社 符号化装置および方法、復号装置および方法、並びに提供媒体
DE69907011T2 (de) * 1998-10-30 2004-03-25 Broadcom Corp., Irvine Verallgemeinerter faltungsver- und -entschachteler
US6278715B1 (en) * 1998-11-05 2001-08-21 Qualcom Incorporated System and method for reducing deinterleaver memory requirements through chunk allocation
KR100306282B1 (ko) * 1998-12-10 2001-11-02 윤종용 통신시스템의인터리빙/디인터리빙장치및방법
KR100602538B1 (ko) * 1999-01-22 2006-07-19 텍사스 인스트루먼츠 인코포레이티드 콘볼루션 인터리빙을 위한 효율적인 메모리 어드레싱
KR100330238B1 (ko) * 1999-04-02 2002-03-25 윤종용 통신시스템의 인터리빙/디인터리빙 장치 및 방법
KR100362557B1 (ko) * 1999-04-06 2002-11-27 삼성전자 주식회사 이차원 인터리빙 장치 및 방법
US6553517B1 (en) 1999-04-09 2003-04-22 Sony Corporation Interleavers and de-interleavers
CN100442679C (zh) * 1999-05-19 2008-12-10 三星电子株式会社 涡式交织装置
KR100350683B1 (ko) * 1999-08-28 2002-08-28 삼성전자 주식회사 데이터 디인터리버 및 어드레스 발생방법
KR100645730B1 (ko) * 1999-12-30 2006-11-13 주식회사 케이티 매직 매트릭스를 이용한 인터리빙 방법
US6662332B1 (en) 2000-07-05 2003-12-09 3Com Corporation Interleaver for burst error correction
US7770010B2 (en) * 2000-09-18 2010-08-03 Wideband Semiconductors Inc. Dynamically configurable interleaver scheme using at least one dynamically changeable interleaving parameter
US6714599B1 (en) * 2000-09-29 2004-03-30 Qualcomm, Incorporated Method and apparatus for efficient processing of signal in a communication system
US7385949B1 (en) 2001-06-05 2008-06-10 Broadcom Corporation System and method for de-interleaving data in a wireless receiver
EP1388947A1 (de) * 2002-08-05 2004-02-11 Alcatel System mit Verschachteler und Entschachteler
KR100518295B1 (ko) * 2003-03-14 2005-10-04 삼성전자주식회사 디지털 통신 시스템의 디인터리빙장치 및 그의디인터리빙방법
US6839870B2 (en) * 2003-03-21 2005-01-04 Terayon Communications Systems, Inc. Error-correcting code interleaver
US7225306B2 (en) * 2004-06-23 2007-05-29 Texas Instruments Incorporated Efficient address generation for Forney's modular periodic interleavers
KR100739684B1 (ko) 2004-08-05 2007-07-13 삼성전자주식회사 저밀도 패리티 체크 행렬 생성 장치 및 방법
US7457993B2 (en) 2004-11-16 2008-11-25 Texas Instruments Incorporated Error free dynamic rate change in a digital subscriber line DSL with constant delay
US7716563B2 (en) * 2004-11-30 2010-05-11 Ciena Corporation Method and apparatus for the efficient implementation of a totally general convolutional interleaver in DMT-based xDSL systems
CN101120508B (zh) * 2005-02-14 2012-10-10 皇家飞利浦电子股份有限公司 用于进行交织或去交织的方法和设备
US7657818B2 (en) * 2005-06-22 2010-02-02 Adaptive Spectrum And Signal Alignment, Inc. Dynamic minimum-memory interleaving
US7644340B1 (en) * 2005-07-08 2010-01-05 Marvell International Ltd. General convolutional interleaver and deinterleaver
TWI269535B (en) * 2005-09-13 2006-12-21 Sunplus Technology Co Ltd Convolutional interleaving and de-interleaving circuit and method
KR100733767B1 (ko) 2005-12-05 2007-06-29 한국전자통신연구원 시간 디인터리빙 장치 및 방법
US20070277064A1 (en) * 2006-05-02 2007-11-29 Mediatek Inc. Reconfigurable convolutional interleaver/deinterleaver using minimum amount of memory and an address generator
CA2700667C (en) 2007-07-26 2016-05-24 Samsung Electronics Co., Ltd. Device for processing streams and method thereof
KR101535833B1 (ko) * 2007-07-26 2015-07-13 삼성전자주식회사 스트림 처리 장치 및 방법
KR101623730B1 (ko) * 2009-11-23 2016-05-25 삼성전자주식회사 인터리버 장치
US8799750B1 (en) * 2011-05-09 2014-08-05 Xilinx, Inc. Convolutional interleaver for bursty memory access
GB2512601B (en) * 2013-04-02 2016-02-10 Sony Corp Transmitters and methods for transmitting signals

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4084226A (en) * 1976-09-24 1978-04-11 Sperry Rand Corporation Virtual address translator
GB2059723A (en) * 1979-09-19 1981-04-23 Marconi Co Ltd Interleavers for digital data signals
US4394642A (en) * 1981-09-21 1983-07-19 Sperry Corporation Apparatus for interleaving and de-interleaving data
JPS607418B2 (ja) * 1983-10-05 1985-02-25 日立電子株式会社 インタ−リ−ブ処理回路
JPS6437125A (en) * 1987-07-31 1989-02-07 Csk Corp Cross coding method and device therefor
US5172379A (en) * 1989-02-24 1992-12-15 Data General Corporation High performance memory system
US5042033A (en) * 1989-06-05 1991-08-20 Canadian Marconi Corporation RAM-implemented convolutional interleaver
JP3415693B2 (ja) * 1993-12-23 2003-06-09 ノキア モービル フォーンズ リミテッド インターリーブプロセス

Also Published As

Publication number Publication date
DK0681373T3 (da) 2003-05-26
DE69529546T2 (de) 2004-02-19
AU683355B2 (en) 1997-11-06
CA2148199C (en) 2000-11-21
NO951715D0 (no) 1995-05-03
KR100362090B1 (ko) 2003-02-05
KR950035112A (ko) 1995-12-30
NO315886B1 (no) 2003-11-03
JP3634004B2 (ja) 2005-03-30
JPH0865177A (ja) 1996-03-08
EP0681373A2 (de) 1995-11-08
EP0681373A3 (de) 1996-10-16
EP0681373B1 (de) 2003-02-05
DE69529546D1 (de) 2003-03-13
CA2148199A1 (en) 1995-11-05
ES2191689T3 (es) 2003-09-16
TW245862B (en) 1995-04-21
US5537420A (en) 1996-07-16
NO951715L (no) 1995-11-06
AU1784995A (en) 1995-11-09

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