ATE128598T1 - Verfahren zur herstellung einer vielschichtleiterplatte. - Google Patents

Verfahren zur herstellung einer vielschichtleiterplatte.

Info

Publication number
ATE128598T1
ATE128598T1 AT91910236T AT91910236T ATE128598T1 AT E128598 T1 ATE128598 T1 AT E128598T1 AT 91910236 T AT91910236 T AT 91910236T AT 91910236 T AT91910236 T AT 91910236T AT E128598 T1 ATE128598 T1 AT E128598T1
Authority
AT
Austria
Prior art keywords
pct
circuit board
layers
resin
metal
Prior art date
Application number
AT91910236T
Other languages
English (en)
Inventor
Jiri Masik
Original Assignee
Polyclad Europ Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Polyclad Europ Ab filed Critical Polyclad Europ Ab
Application granted granted Critical
Publication of ATE128598T1 publication Critical patent/ATE128598T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4638—Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0285—Using ultrasound, e.g. for cleaning, soldering or wet treatment
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/065—Binding insulating layers without adhesive, e.g. by local heating or welding, before lamination of the whole PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/102—Using microwaves, e.g. for curing ink patterns or adhesive

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
AT91910236T 1990-05-16 1991-04-17 Verfahren zur herstellung einer vielschichtleiterplatte. ATE128598T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9001766A SE465399B (sv) 1990-05-16 1990-05-16 Saett vid tillverkning av flerlagermoensterkort

Publications (1)

Publication Number Publication Date
ATE128598T1 true ATE128598T1 (de) 1995-10-15

Family

ID=20379505

Family Applications (1)

Application Number Title Priority Date Filing Date
AT91910236T ATE128598T1 (de) 1990-05-16 1991-04-17 Verfahren zur herstellung einer vielschichtleiterplatte.

Country Status (8)

Country Link
US (1) US5336353A (de)
EP (1) EP0528963B1 (de)
JP (1) JPH05507388A (de)
AT (1) ATE128598T1 (de)
AU (1) AU7970691A (de)
DE (1) DE69113456T2 (de)
SE (1) SE465399B (de)
WO (1) WO1991018491A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITMC960043A1 (it) * 1996-04-05 1997-10-05 So Ma Ci S Spa Sistema per mantenere bloccati i pannelli dei circuiti stampati multistrato durante la polimerizzazione dei fogli isolanti intermedi
DE19958644A1 (de) * 1999-12-06 2001-10-04 Schweizer Electronic Ag Verfahren und Vorrichtung zur Herstellung von Multilayern
US6682802B2 (en) 2000-12-14 2004-01-27 Intel Corporation Selective PCB stiffening with preferentially oriented fibers
EP1220590A1 (de) * 2000-12-22 2002-07-03 TAPEMATIC S.p.A. Verfahren zur Herstellung von mehrschichtigen Karten für gedruckte Schaltungen
JP2005026608A (ja) * 2003-07-02 2005-01-27 Tokyo Electron Ltd 接合方法および接合装置
CN112533400B (zh) * 2019-09-19 2022-04-15 宏启胜精密电子(秦皇岛)有限公司 电路板的制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2917472C2 (de) * 1979-04-30 1986-10-16 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Unverstiftet verpreßte Mehrlagenleiterplatte und Verfahren zu deren Herstellung
DE3240754A1 (de) * 1981-11-06 1983-05-19 Sumitomo Bakelite Co. Ltd., Tokyo Gedruckte schaltung mit mehreren schichten und verfahren zu deren herstellung
US4481533A (en) * 1981-11-27 1984-11-06 Lenkeit Industries, Inc. Method and apparatus for successively positioning sheets of material with precision for punching aligning holes in the sheets enabling the sheets to be used in the manufacture of composite circuit boards
DE3423181A1 (de) * 1984-06-22 1986-01-02 Dielektra GmbH, 5000 Köln Verfahren zur herstellung von vorlaminaten fuer mehrlagenleiterplatten
US4702785A (en) * 1985-06-24 1987-10-27 President Engineering Corporation Process for manufacturing multilayer PC boards
JPS62233211A (ja) * 1986-04-02 1987-10-13 Matsushita Electric Works Ltd 積層板の製造方法
JPH072392B2 (ja) * 1986-07-18 1995-01-18 日立化成工業株式会社 積層板
JPH0728127B2 (ja) * 1986-08-28 1995-03-29 東芝ケミカル株式会社 多層回路積層板の製造方法
JPH0298195A (ja) * 1988-10-04 1990-04-10 Mitsubishi Electric Corp 多層プリント基板の製造方法

Also Published As

Publication number Publication date
SE9001766D0 (sv) 1990-05-16
SE9001766L (sv) 1991-09-02
EP0528963A1 (de) 1993-03-03
EP0528963B1 (de) 1995-09-27
JPH05507388A (ja) 1993-10-21
DE69113456D1 (de) 1995-11-02
DE69113456T2 (de) 1996-04-04
AU7970691A (en) 1991-12-10
US5336353A (en) 1994-08-09
WO1991018491A1 (en) 1991-11-28
SE465399B (sv) 1991-09-02

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee