WO2021208629A1 - 一种不对称板的制作方法 - Google Patents

一种不对称板的制作方法 Download PDF

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Publication number
WO2021208629A1
WO2021208629A1 PCT/CN2021/079081 CN2021079081W WO2021208629A1 WO 2021208629 A1 WO2021208629 A1 WO 2021208629A1 CN 2021079081 W CN2021079081 W CN 2021079081W WO 2021208629 A1 WO2021208629 A1 WO 2021208629A1
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WO
WIPO (PCT)
Prior art keywords
copper
board
unit
asymmetric
gong
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Application number
PCT/CN2021/079081
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English (en)
French (fr)
Inventor
王俊
陈晓青
陈前
Original Assignee
深圳市景旺电子股份有限公司
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Filing date
Publication date
Application filed by 深圳市景旺电子股份有限公司 filed Critical 深圳市景旺电子股份有限公司
Priority to EP21788341.2A priority Critical patent/EP4025020A4/en
Priority to US17/768,665 priority patent/US11917769B2/en
Publication of WO2021208629A1 publication Critical patent/WO2021208629A1/zh

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/061—Lamination of previously made multilayered subassemblies
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties

Definitions

  • This application relates to the technical field of circuit board manufacturing, and in particular to a method for manufacturing an asymmetric board.
  • the asymmetric stacking structure of the radar board is mainly composed of high-frequency materials and ordinary FR4 materials.
  • a high-frequency core board is combined with multiple FR4 core boards. Compressed by.
  • the outermost layer of the asymmetric structure is usually a high-frequency core board, and the high-frequency core board usually contains PTFE (polytetrafluoroethylene, polytetrafluoroethylene) material.
  • the assembly is based on imposition. Delivery, there is a connection between the unit and the unit.
  • the circuit board needs to be soldered by reflow soldering during assembly.
  • the temperature is as high as 260°C.
  • the mixed pressure asymmetric laminated high-frequency board Warpage occurs after pressing.
  • the shrinkage of the high-frequency surface leads to more serious warpage, which in turn leads to virtual welding and desoldering after assembly, which seriously affects the assembly effect and product reliability. sex.
  • the asymmetric laminated circuit board of conventional materials can be drilled in the prepreg of the layer where the asymmetric structure is located to cut off the prepreg arm on the asymmetric side, reduce the torque and release the stress.
  • the high-frequency core board layer where the asymmetric structure is located contains PTFE as the filler, and cannot be laminated by prepreg and copper foil.
  • the layer prepreg is drilled to relieve stress to achieve the purpose of improving the degree of warpage.
  • the purpose of the embodiments of the present application is to provide a method for manufacturing an asymmetric board, which aims to solve the problem of warping of the existing asymmetric circuit board.
  • a method for manufacturing an asymmetric plate including:
  • the mother board includes at least one first daughter board, each of the first daughter boards includes a first insulating layer, and a first copper layer and a second copper layer disposed on opposite sides of the first insulating layer. Two copper layers;
  • the second daughter board includes a second insulating layer, and a third copper layer and a fourth copper layer disposed on opposite sides of the second insulating layer; wherein, the first insulating layer Different from the material of the second insulating layer;
  • Hot pressing stacking the mother board and the second daughter board and placing a prepreg between the mother board and the second daughter board, wherein the third copper layer is located on the second daughter board
  • a plurality of impositions are formed on the asymmetric board, each of the impositions includes a plurality of units, and the first copper layer to the fourth copper layer correspond to the one of the imposition and the imposition Connecting positions are formed between the unit, the unit and the unit, and between the unit and the edge of the asymmetric plate;
  • Finished gong board perform at the connection position between the imposition and the imposition, the connection position between the imposition and the board edge, and the connection position between the unit and the unit Gong board to obtain a plurality of said imposition, each imposition includes a plurality of interconnected units;
  • the manufacturing method of the asymmetric plate further includes at least one of the following three items:
  • Copper laying in the step of making the mother board, laying copper on the connection positions of the mother board except for the second copper layer of the outermost layer to obtain a copper laying area;
  • Copper digging in the step of making the second daughter board, digging copper on the connection position of the third copper layer;
  • Deep control gong After the step of the finished gong board, on each of the impositions, the deep gong is controlled by the connection position between the unit and the unit on the side of the second sub-board to obtain a control groove .
  • the copper paving area between the unit and the unit is intermittently arranged, and the lengths of the two adjacent copper paving areas between the unit and the unit are different;
  • the copper paving area between the imposition and the copper paving area between the unit and the board edge are continuously arranged.
  • two of the copper paving areas spaced apart have the same shape.
  • the unilateral shrinkage distance of the copper-laying area between the unit and the unit relative to the connection position is greater than or equal to 0.15mm; the copper-laying area between the imposition and the imposition The distance to the unit is greater than or equal to 0.2 mm, and the distance from the copper paving area between the unit and the edge of the board to the unit is greater than or equal to 0.2 mm.
  • the width of the copper cutting area is smaller than the width of the finished gong board in the step of finished gong board.
  • the distance between the copper cutting area and the finished gong plate position in the finished gong plate step is greater than or equal to 0.1 mm.
  • the step of controlling the depth of the gong is controlled so that the gong penetrates the second daughter board without damaging the first copper layer of the mother board.
  • the manufacturing method of the asymmetric board includes the copper drawing step and the deep control step.
  • the copper drawing step a copper drawing area is formed on the connection position of the third copper layer
  • the maximum depth D0max H1-H4+H3- ⁇ X, wherein the H1 is the thickness of the second sub-board, the H3 is the thickness of the prepreg, and the H4 is the thickness of the third copper layer ,
  • the ⁇ X is the precision tolerance of the deep-controlled gong machine.
  • the manufacturing method of the asymmetric plate includes the copper paving step, and in the finished gong plate step, the position of the finished gong plate corresponds to the position of a part of the copper paving area.
  • the manufacturing method of the asymmetric board includes the copper-drawing step.
  • a copper-drawing area is formed on the connection position of the third copper layer and located outside the copper-drawing area.
  • the connecting portion of the connecting portion corresponds to the position of the remaining copper-laying area.
  • the manufacturing method of the asymmetric board further includes the step of controlling the depth of the groove, and the width of the depth controlling groove is larger than that of the copper area in the connection position of the inner circuit of the second sub-board. width.
  • the distance of the single side of the depth control groove beyond the single side of the copper-laying area in the connecting position in each of the imposition is greater than or equal to 0.075 mm.
  • a depth control gong is performed on each of the connecting parts, and the number of the depth control grooves is multiple in each of the imposition.
  • the distance between the edge of the depth control groove and the edge of the adjacent unit is greater than or equal to 0.075 mm.
  • the temperature drop rate is 2° C./min ⁇ 3° C./min.
  • the beneficial effect of the method for manufacturing the asymmetric board provided by the embodiment of the present application is that the method for manufacturing the asymmetric board provided by the embodiment of the present invention includes the steps of making a mother board, making a second daughter board, a mother board, and a second daughter board.
  • Hot pressing, and the finished gong board also include: paving copper on the connection location of the mother board except the second copper layer of the outermost layer to obtain a copper paving area, and in the production of the second daughter board on the third copper layer At least one of the three steps of controlling the deep groove from the side of the second sub-board on the connecting position to obtain the deep groove from the side of the second sub-board after the step of the finished gong board.
  • Any of the items are beneficial to reduce the warpage of the asymmetrical board after heating, so as to solve the problem of the customer's virtual soldering and desoldering after the circuit board is assembled, and improve the reliability of the product.
  • Figure 1 is a flow chart of the steps of a method for manufacturing an asymmetric plate provided by an embodiment of the present invention
  • Figure 2 is a schematic diagram of the stacked structure of an asymmetric plate
  • Fig. 3 is a schematic diagram of copper paving of the connection positions of the inner circuit layer in the mother board
  • Figure 4 is an enlarged view of A in Figure 3;
  • Figure 5 is a schematic longitudinal cross-sectional view of the second sub-board
  • FIG. 6 is a schematic diagram of copper extraction of the third copper layer of the second daughter board
  • Fig. 7 is an enlarged view of B in Fig. 6;
  • Figure 8 is a schematic structural diagram of the connection position of the imposition before the deep gong
  • Fig. 9 is a schematic diagram of the structure of the connection position of the imposition after the deep gong is controlled.
  • the asymmetric board 100 includes: a mother board 1 having a first daughter board 11 or formed by thermally pressing a plurality of first daughter boards 11 with each other, and a second daughter board 2.
  • the first sub-board 11 includes a first insulating layer 112, and a first copper layer 111 and a second copper layer 113 disposed on opposite sides of the first insulating layer 112.
  • the second sub-board 2 may be a high-frequency core board.
  • the second sub-board 2 includes a second insulating layer 22, and a third copper layer 21 and a fourth copper layer 23 disposed on opposite sides of the second insulating layer 22, the material of the first insulating layer 112 of the first sub-board 11 and The material of the second insulating layer 22 of the second sub-board 2 is different.
  • the mother board 1 and the second daughter board 2 are laminated and thermally pressed together. Since the material of the first insulating layer 112 of the first daughter board 11 and the material of the second insulating layer 22 of the second daughter board 2 are different, the obtained
  • the laminated structure of is asymmetric in form, that is, the asymmetric plate 100 described above is obtained.
  • the material of the second insulating layer 22 in the high-frequency core board is PTFE
  • the first sub-board 11 is a commonly used FR4 core board.
  • the FR4 material used in the first insulating layer 112 has a higher expansion coefficient than the second insulating layer. 22 hours. Therefore, after the mother board 1 and the second daughter board 2 are laminated and thermally pressed together, the asymmetric board 100 is likely to warp in the direction of the second daughter board 2.
  • H1 H4+H5+H6, and set the thickness of the motherboard 1 to H2.
  • an embodiment of the present invention provides a method for manufacturing an asymmetric plate to solve the above-mentioned warpage problem of the asymmetric plate 100.
  • the manufacturing method of the asymmetric plate includes:
  • the mother board 1 includes at least one first daughter board 11;
  • Hot pressing the mother board 1 and the second daughter board 2 are stacked, wherein the third copper layer 21 is located on the second daughter board 2 on the side away from the mother board 1, and the second copper layer 113 is located on the first daughter board 11.
  • the mother board 1 and the second daughter board 2 are stacked, wherein the third copper layer 21 is located on the second daughter board 2 on the side away from the mother board 1, and the second copper layer 113 is located on the first daughter board 11.
  • PCS1 ⁇ PCS4 in combination Represents four units 31 in one imposition 3, of course, the number of units 31 in one imposition 3 is not limited to four), the first copper layer 111 to the fourth copper layer 23 of the asymmetric board 100 correspond to the imposition 3 and the imposition 3, between the unit 31 and the unit 31, and the area between the unit 31 and the edge 35 are all used as the connecting position 30; and
  • Finished gongs perform gongs on the connecting position 30 between the imposition 3 and the imposition 3, the connecting position 30 between the imposition 3 and the board edge 35, and the connecting position 30 between the unit 31 and the unit 31 to obtain multiple impositions 3.
  • Each imposition 3 includes a plurality of units 31; after the gong board is finished, the units 31 in each imposition 3 are connected to each other.
  • the manufacturing method of the asymmetric plate in the embodiment of the present invention includes at least one of the following three items:
  • the step of making the mother board 1 further includes laying copper on the circuit layer connection location 30 of the first daughter board 11. More specifically, except for the second copper layer 113 on the outermost layer of the motherboard 1, copper is partially reserved in the connection sites 30 on the other first copper layer 111 and the second copper layer 113, forming a plurality of spaced layers. Copper area 32, as shown in Figure 3;
  • the step of manufacturing the second sub-board 2 further includes digging copper on the connection location 30 of the protective layer of the second sub-board 2. More specifically, on the side of the second daughter board 2 away from the mother board 1, that is, on the third copper layer 21, the portion corresponding to the connection location 30 is drawn to form a plurality of spaced copper cut areas 33. A connecting portion 34 of copper material is formed therebetween, as shown in FIG. 6; and
  • Deep control gong After the step of finished gong board, the connection position 30 between unit 31 and unit 31 on each imposition 3 is controlled by the side of the second sub-board 2 to control the depth gong to obtain the depth control groove 36, such as Shown in Figure 9.
  • the unit 31 and the unit 31 on each imposition 3 are still connected, and the imposition 3 can be shipped.
  • the manufacturing method of the asymmetric board provided by the embodiment of the present invention includes copper cutting on the connection location 30 of the protective layer of the second sub-board 2 and copper plating on the connection location 30 of the inner circuit layer of the first sub-board 11, and After the finished gong board is finished, at least one of the deep gongs is controlled by the side of the second sub-board 2 on the connecting position 30. Any one of these three items is beneficial to reduce the warpage of the asymmetric board 100 after being heated. , So as to solve the problem of customers' virtual soldering and desoldering after the circuit board is assembled, and improve the reliability of the product.
  • step S1 is to make the mother board 1
  • step S2 is to make the second daughter board 2
  • step S3 is the hot pressing between the mother board 1 and the second daughter board 2.
  • step S4 is a finished gong board
  • step S5 is a deep-control gong.
  • step S1 the following detailed steps are included:
  • Step S1-1 Cutting: Cut the entire large copper clad laminate into the required work board according to the design requirements, and pass the cut work board through the tunnel furnace to reduce the internal stress of the board; the work board includes an insulating layer and copper on both sides Floor;
  • Step S1-2 Transfer of the inner layer pattern of the working board: Coat a layer of photosensitive polymer on the copper layer on at least one side of the working board, and irradiate it with an exposure machine (such as a 4CCD alignment lens semi-automatically).
  • an exposure machine such as a 4CCD alignment lens semi-automatically.
  • the inner layer pattern required by the board 1 is transferred to the photosensitive polymer;
  • Step S1-3 Development: Put the working plate covered with photosensitive polymer into the developer, the photosensitive polymer that has not undergone polymerization reaction is developed, and the photosensitive polymer that undergoes polymerization reaction will not be developed (in negative type). Take photopolymer as an example), the copper material that does not need to be retained on the copper layer of the working board is exposed;
  • Step S1-4 Etching: The exposed copper material is etched away through the etching solution, and the copper material protected by the photosensitive polymer is retained to obtain the desired inner layer pattern;
  • Step S1-5 stripping: the photopolymer on the copper layer is stripped by the stripping liquid to obtain the first sub-board 11; the copper layers on both sides of the first sub-board 11 are the first copper layer 111 and the second copper layer 111, respectively.
  • the copper layer 113, between the first copper layer 111 and the second copper layer 113 is a first insulating layer 112;
  • Step S1-6 optical inspection: optically inspect the completed first sub-board 11 to confirm the quality
  • Step S1-7 punching, using a punching machine to punch a plurality of positioning holes on the first sub-board 11 (for example, 8 positioning holes, including 4 fusion positioning holes and 4 riveting and positioning holes);
  • Step S1-8 browning: browning the first copper layer 111 and the second copper layer 113 on opposite sides of the first sub-board 11 with a browning solution to roughen the surface of the copper conductor;
  • Step S1-9 the first heat pressing (correspondingly, based on the time sequence, the aforementioned heat pressing between the mother board 1 and the second daughter board 2 is named the second heat pressing):
  • the first sub-board 11 after browning is laminated with the prepreg according to the customer's stacking requirements (here positioned as the first prepreg 4, as shown in Figure 2), riveted according to the positioning holes, and aligned with the inspection machine.
  • the ring is then hot-pressed under the high temperature environment in the press;
  • Step S1-10 post-compression processing procedures: including target shooting, gong edge, drilling, copper sinking, board electrical, outer circuit, inner layer etching, inner layer automatic optical inspection, etc.
  • the motherboard 1 (the following are examples of the motherboard 1 being thermally pressed by a plurality of first daughter boards 11), please refer to FIG.
  • the second copper layer 113 of the outermost layer on the side of the daughter board 2 serves as one of the protective layers of the asymmetric board 100 during the second thermal compression bonding process. Tool hole. Therefore, in the above step S1, at least one of the first sub-boards 11 has only one side of the copper layer to make the inner layer pattern according to the above steps S1-2 to S1-5, that is, in the above step S1, at least one The first sub-board 11 has only one side of the copper layer to make an inner layer pattern according to the above steps S1-2 to S1-5.
  • the inner layer graphics should include: the line graphics (not shown) in the unit 31, the graphics corresponding to the copper area 32 on the connection position 30 between the unit 31 and the unit 31, and the connection position 30 between the imposition 3 and the imposition 3
  • the upper part corresponds to the pattern of the copper-laying area 32, and the pattern corresponding to the copper-laying area 32 on the connection position 30 between the unit 31 and the board edge 35.
  • the inner layer pattern obtained is that on the first copper layer 111 (or the first copper layer 111 and the second copper layer 113) of the first sub-board 11, the cells 31 and
  • the connecting position 30 between the units 31 forms a copper paving area 32
  • the connecting position 30 between the imposition 3 and the imposition 3 and the connecting position 30 between the unit 31 and the board edge 35 also form a copper paving area 32.
  • connection location 30 between the unit 31 and the unit 31 is intermittently paving copper, forming a plurality of copper paving areas 32 sequentially spaced apart by a certain distance; and the connection between the imposition 3 and the imposition 3
  • the position 30 and the copper area 32 on the connection position 30 between the unit 31 and the board edge 35 may be continuous. This is because the gap between the copper-laying areas 32 spaced apart between the unit 31 and the unit 31 is beneficial to release the internal stress of the first sub-board 11, thereby reducing the warpage of the first sub-board 11 and the asymmetric board 100;
  • the connecting position 30 between the imposition 3 and the imposition 3 and the connecting position 30 between the unit 31 and the board edge 35 need to be removed in the subsequent steps of the finished gong board. Therefore, the copper paving area 32 does not need to be arranged at intervals. Can reduce the complexity of production and reduce production costs.
  • the L1 layer and the L2 layer are the third copper layer 21 and the fourth copper layer 23 of the second sub-board 2 respectively, and the L1 layer is the side of the second sub-board 2.
  • the protective layer of L3 to L6 is located on the mother board 1 composed of two first daughter boards 11 superimposed, and the L6 layer is the protective layer on the side of the mother board 1 in the second heat pressing process.
  • the second copper layer 113 used as the L6 layer is only used to make various tool holes required for the subsequent process, and the first copper layer 111 and the second copper layer 113 used as the L3 layer to the L5 layer are in accordance with the above Steps S1-2 to S1-5 normally make the above-mentioned inner layer graphics.
  • the spacing of the copper-laying areas 32 can reduce the warpage of the mother board 1, thereby reducing the warpage of the asymmetric board 100 caused by the mother board 1 and the second daughter board 2 during the second heat pressing process.
  • the shapes of the multiple copper-laying areas 32 in the connecting position 30 between the unit 31 and the unit 31 may not necessarily be completely consistent.
  • the two copper paving areas 32 spaced apart have the same shape.
  • a copper paving area 32 has the same shape
  • the length and the width are close to or even equal, and the length of the adjacent copper paving area 32 is obviously greater than its width and is elongated (for this specific effect, please combine the following step S4).
  • step S2 includes:
  • Step S2-1 Cutting: Cut the entire large copper clad laminate into the required work board according to the design requirements, and pass the cut work board through the tunnel furnace to reduce the internal stress of the board;
  • Step S2-2 The transfer of the work board graphics: Coat a layer of photosensitive polymer on the copper layers on both sides of the work board, and irradiate it with an exposure machine (such as a 4CCD alignment lens semi-automatically), and the second sub The pattern required by the board 2 is transferred to the photosensitive polymer;
  • an exposure machine such as a 4CCD alignment lens semi-automatically
  • the photosensitive polymer that has not undergone polymerization is developed, while the photosensitive polymer that undergoes polymerization will not be developed (in negative type).
  • Photopolymer as an example, copper materials that do not need to be retained on the copper layers on both sides of the working board are exposed;
  • Step S2-4 Etching: the exposed copper material is etched away through the etching solution, and the copper material protected by the photosensitive polymer is retained, and the required patterns on the copper layers on both sides are obtained respectively;
  • Step S2-5 Film stripping: The photopolymer on the copper layer is stripped off by the stripping liquid to obtain the second sub-board 2; the copper layers on both sides of the second sub-board 2 are the third copper layer 21 and the fourth copper layer respectively.
  • the copper layer 23, between the third copper layer 21 and the fourth copper layer 23 is a second insulating layer 22;
  • Step S2-6 Optical inspection: optically inspect the finished second sub-board 2 to confirm the quality
  • Step S2-7 punching, using a punching machine to punch a plurality of positioning holes (for example, 8 positioning holes, including 4 fusion positioning holes and 4 riveting and positioning holes) on the second sub-board 2 using a punching machine.
  • a punching machine to punch a plurality of positioning holes (for example, 8 positioning holes, including 4 fusion positioning holes and 4 riveting and positioning holes) on the second sub-board 2 using a punching machine.
  • the inner layer is normally made on the L2 layer, that is, on the fourth copper layer 23. Line graphics.
  • the pattern of the second sub-board 2 should include: the pattern of the connection location 30 between the unit 31 and the unit 31 formed on the third copper layer 21 other than the pattern of the copper area 33 (that is, the pattern of the connection portion 34) ,
  • the connecting position 30 between the imposition 3 and the imposition 3 corresponds to the graphics outside the copper-cutting area 33, and the connecting position 30 between the unit 31 and the board edge 35 corresponds to the graphics other than the copper-cutting area 33, on the fourth copper layer 23
  • the inner layer circuit pattern of the formed cell 31 (not shown, and at this time, the inner layer circuit pattern is not formed in the cell 31 of the L1 layer as a protective layer).
  • the obtained pattern is that the third copper layer 21 of the second sub-board 2 has a plurality of spaced connection portions 34 on the connection position 30 between the unit 31 and the unit 31, and the imposition 3
  • the multiple spaced connecting portions 34 on the connecting position 30 with the imposition 3, and the multiple spaced connecting portions 34 on the connecting position 30 between the unit 31 and the board edge 35, as shown in FIG. 6, are on the fourth copper layer 23
  • part of the stress of the second insulating layer 22 of the second sub-board 2 can be released, thereby reducing the degree of warpage of the second sub-board 2 after being heated, and thereby , To reduce the degree of warpage of the finished circuit board after assembly.
  • the connecting portion 34 in this step S2, is set to correspond to the position of the partial copper paving area 32 in step S1. In this way, in the thickness direction of the asymmetric board 100, the connecting portion 34 always has a copper-layed area 32 corresponding to it, which is more convenient for thermal compression bonding between the connecting portion 34 and the copper-plated area 32 (for details, please continue to combine the following steps S3).
  • step S3 the specific step of the second thermal compression bonding is: stacking at least one prepreg (here defined as the second prepreg 5) between the mother board 1 and the second daughter board 2 obtained above according to the customer’s stacking requirements , Please refer to Figure 2), locate through the positioning hole, use the inspection machine to fully align the ring between layers, and perform hot pressing in a high temperature environment.
  • prepreg here defined as the second prepreg 5
  • the temperature drop rate is 2° C./min ⁇ 3° C./min, for example, keep 2° C./min. Due to the lower temperature drop rate, the internal stress of the asymmetric plate 100 can be further reduced, thereby reducing its warpage after heating.
  • the connecting portion 34 on the L1 layer corresponds to the two spaced copper areas 32 on the L3 layer ⁇ L5 layer, that is, corresponding to the longer length. Small copper area 32. In this way, there will be no copper area 32 under the connecting portion 34 during the second thermal compression bonding, and the deformation of the connecting portion 34 during the thermal compression bonding process and the deformation of the asymmetric plate 100 will be avoided. .
  • this step S3 it also includes browning, laser drilling, plasma treatment, copper immersion, plate electrical thickening, and outer circuit production on the asymmetric plate 100 obtained by the second thermal compression bonding (
  • the inner circuit patterns of the upper unit 31 on the L1 and L6 layers are made, and after the outer circuit is made, the connecting portion 34 on the L1 layer is removed, and the connecting position 30 on the L6 layer can be left with the layout of the L3 ⁇ L5 layer.
  • the copper area 32 has a consistent copper pattern, or in other words, a copper paving area 32 is also formed on the connection position of the L6 layer, pattern plating, outer layer etching, solder mask printing, character printing, and testing. Please refer to FIG. 8 and FIG. 9 in combination.
  • the outermost layer of the imposition 3 is the solder resist layer 6 formed by the solder resist ink printing.
  • step S3 proceed to step S4, the finished gong board: perform gong board on the obtained asymmetric board 100, that is, the connection position 30 between the imposition 3 and the imposition 3, and the gap between the imposition 3 and the edge 35
  • the connection position 30 and the connection position 30 between the unit 31 and the unit 31 are respectively connected with gongs to cut off the connection between the imposition 3 and the imposition 3, the connection between the imposition 3 and the edge 35, and the connection between the unit 31 and the unit 31
  • the parts of are connected to obtain multiple impositions 3, and each imposition 3 includes a plurality of interconnected units 31.
  • connection portion 34 on the connection location 30 of the L1 layer between the unit 31 and the unit 31, and a copper paving area 32 is provided on the connection location 30 of the L3 to L6 layer. That is, after the step S4, in each imposition 3, a copper paving area 32 is reserved between the unit 31 and the unit 31 on the connection location 30 between the L3 layer and the L6 layer.
  • the copper paving area 32 with a longer length in the connecting position 30 is cut off, and the other copper paving areas 32 are reserved.
  • the finished gong board position can be performed according to the position of a part of the copper paving area 32, and the shape of the copper paving area 32 is not particularly limited.
  • the copper paving area 32 is set according to the connection requirements between the unit 31 and the unit 31 after the finished gong board.
  • the copper cutting area 33 to the finished gong plate position Sufficient distance should be reserved between them, that is, the width of the copper cutting area 33 should be smaller than the width of the finished gong board.
  • the distance between the copper cutting area 33 and the finished gong plate position is D3, D3 ⁇ 0.1mm, that is, the edge of the copper cutting area 33 close to the unit 31 is adjacent to the unit 31 relative to the finished gong plate position The edge of the joint is retracted by at least 0.1mm.
  • step S5 is performed.
  • the connection position 30 between the unit 31 and the unit 31 is divided by the second sub-board 2.
  • the deep gong is controlled laterally, and the deep groove 36 is obtained.
  • the second core board 2 is partially removed, which can reduce its expansion after the second heat pressing and the heating process of the customer's subsequent assembly process, thereby reducing the second sub-board 2 and the asymmetric board 100 warpage;
  • the connecting position 30 between the unit 31 and the unit 31 is partially removed in height, and the depth control groove 36 can make room for the expansion of the unit 31 and reduce the thermal stress of the unit 31, especially It is the second sub-board 2 side, so that the warpage of the second sub-board 2 and the asymmetric board 100 can also be reduced.
  • the depth control gong is set to control the depth gong on the asymmetric board 100 from the side of the third copper layer 21 starting from the connection position 30 between the units 31.
  • the depth control gong is controlled.
  • the position of the deep control groove 36 corresponds to the position of the remaining copper paving area 32 until it reaches the second prepreg 5 between the mother board 1 and the second daughter board 2.
  • the deep control gong removes part of the second sub-board 2 and part of the second prepreg 5 in the connection position 30, that is, the deep control gong is controlled so that the gong penetrates the second sub-board 2 and does not damage the first sub-board.
  • H3 is the thickness of the second prepreg 5
  • ⁇ X is the control The precision tolerance of the deep gong machine. Among them, the thickness of the solder resist layer 6 is relatively small compared to other layers and can be ignored.
  • H1 is 0.186mm
  • H4 is 0.018mm
  • H3 is 0.08mm
  • the precision tolerance ⁇ X of the depth control gong machine is 0.025mm. Therefore, the minimum depth D0min of the depth control groove 36 is 0.193mm , The maximum depth D0max of the depth control groove 36 is 0.223mm. This is only an example. In other optional embodiments, the depth D0 of the depth control groove 36 is allowed to have other ranges according to the difference in the stacking structure of the specific asymmetric plate 100 and the difference in the depth control gong machine, which is not particularly limited. .
  • the depth D0 of the depth control groove 36 should be as close as possible to D0max.
  • the number of the depth control grooves 36 is multiple, and the positions of the depth control grooves 36 correspond to the positions of the connecting portions 34 one by one. That is, in step S5, the depth control gong is started at each connecting portion 34.
  • the width of the depth control groove 36 is larger than the width of the copper area 32 in the connection location 30 of the inner line (L3 layer ⁇ L5 layer).
  • the single side of the depth control groove 36 extends beyond the copper area 32 of the inner line of the connection position (the area filled with diagonal lines in FIGS. 8 and 9 represents the copper area 32 in the connection position).
  • the distance of the single side is D5, D5 ⁇ 0.075mm.
  • the width of the depth control groove 36 must be smaller than the width of the connecting position 30. Specifically, the distance between the edge of the depth control groove 36 and the edge of the unit 31 is D6, D6 ⁇ 0.075mm.
  • the depth control gong machine and other equipment used also have accuracy tolerances, in order to avoid the internal circuit layer (L3 to L5) of imposition 3
  • the copper-layed area 32 in the connecting position 30 between the unit 31 and the unit 31 is retracted from the single side of the connecting position 30 by a distance of D1. That is, the distance between the edge of the copper-laying area 32 between the unit 31 and the unit 31 to the edge of the connection position 30 is D1, D1 ⁇ 0.15mm.
  • the copper-laying area 32 in the connecting position 30 between the unit 31 and the unit 31 has a unilateral indentation distance of ⁇ 0.15 mm relative to the connecting position 30 in the short-side direction of the unit 31, and the unit 31 and the unit 31
  • the indentation distance of the copper area 32 in the connecting position 30 between the units 31 relative to the single side of the connecting position 30 in the longitudinal direction of the unit 31 is greater than or equal to 0.2 mm.
  • the aforementioned long side direction is only based on the rectangular unit 31 shown in FIG. 3 and the position shown by the reference symbol "D1" in FIG. 4, and the long side of the unit 31 is The up and down direction of the paper surface shown in FIG. 3, the short side of the unit 31 is the left and right direction of the paper surface shown in FIG. It can be set according to specific needs.
  • the copper-laying area 32 in the connection location 30 between the unit 31 and the unit 31 is retracted from the single side of the connection location 30 in the long side direction of the unit 31, which is the unit 31 and the unit 31.
  • the gap distance between the copper paving area 32 and the unit 31, the gap distance is greater than or equal to 0.2mm; the copper paving area 32 in the connecting position 30 between the unit 31 and the unit 31 is opposite in the short side direction of the unit 31
  • the unilateral shrinking distance at the connecting position 30 is the gap distance between the two adjacent copper paving areas 32 in the connecting position 30 between the unit 31 and the unit 31, and the gap distance is greater than or equal to 0.15 mm.
  • the gap distance between the copper paving area 32 between the unit 31 and the unit 31 and the unit 31 is greater than or equal to 0.20 mm.
  • the distances between the copper paving area 32 between the imposition 3 and the imposition 3, the copper paving area 32 between the unit 31 and the board edge 35 and the adjacent unit 31 are all D2, D2 ⁇ 0.2 mm.

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Abstract

本申请适用于线路板制作技术领域，提供了一种不对称板的制作方法，该不对称板的制作方法包括制作母板（1）、制作第二子板（2）、母板（1）和第二子板（2）的热压合，以及成品锣板，还包括：在母板（1）的除最外层第二铜层（113）外的连接位（30）上铺铜而得到铺铜区（32），在制作第二子板（2）时在第三铜层（21）保护层的连接位上掏铜，以及在成品锣板后在每一拼版（3）上由第二子板（2）一侧于连接位（30）控深锣而得到控深槽（36）的三项步骤中的至少一项，该三项中的任何一项均有利于减小不对称板在受热后的翘曲程度，从而解决客户在电路板成品装配后虚焊、脱焊的问题，提高产品的可靠性。

Description

一种不对称板的制作方法
本申请要求于2020年04月15日在中国专利局提交的、申请号为202010297206.0、发明名称为“一种不对称板的制作方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及线路板制作技术领域，具体涉及一种不对称板的制作方法。
 背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然构成现有技术。
随着汽车雷达的广泛应用，不同材料混压且不对称叠构越来越广泛的应用在雷达板设计中。与常规材料不对称叠构压合不同的是，雷达板的混压不对称叠构主要是由高频材料与普通FR4材料进行混压，一般由一张高频芯板配合多张FR4芯板压合而成。并且，为了保证信号传输效率、降低损耗，不对称结构所在的最外层通常为高频芯板，而高频芯板通常包含PTFE（polytetrafluoroethylene，聚四氟乙烯）材料，此外，装配是以拼版交货，单元与单元之间存在连接位。按照正常制作工序，电路板在装配期间需要经过回流焊方式进行焊接，温度高达260℃，在高温且PTFE材料的X、Y轴膨胀系数较大的情况下，混压不对称叠构高频板在压合后出现翘曲，进一步地，在装配期间受到热应力作用，高频面出现收缩现象导致翘曲更加严重，进而导致装配后虚焊、脱焊现象，严重影响装配效果及产品的可靠性。
常规材料的不对称叠构的电路板可以通过在不对称结构所在层的半固化片进行钻孔，以切断不对称侧的半固化片力臂，减小力矩、释放应力。但是雷达板的混压不对称叠构电路板中，不对称结构所在的高频芯板层因所含填料为PTFE，不能通过半固化片加铜箔方式压合制作，因此，不能通过在不对称所在层半固化片进行钻孔、释放应力，来达到改善翘曲程度的目的。
因此，针对不同材料混压且叠构不对称的雷达板，其压合、装配后的翘曲问题仍待改善。
 技术问题
本申请实施例的目的在于：提供一种不对称板的制作方法，旨在解决现有的不对称线路板翘曲的问题。
 技术解决方案
为解决上述技术问题，本申请实施例采用的技术方案是：
提供了一种不对称板的制作方法，包括：
制作母板：所述母板包括至少一个第一子板，每一所述第一子板包括第一绝缘层，以及设置于所述第一绝缘层的相对两侧的第一铜层和第二铜层；
制作第二子板：所述第二子板包括第二绝缘层，以及设置于所述第二绝缘层的相对两侧的第三铜层和第四铜层；其中，所述第一绝缘层和第二绝缘层的材料不同；
热压合：将所述母板和所述第二子板层叠设置并在所述母板和所述第二子板之间放置半固化片，其中，所述第三铜层位于所述第二子板的远离所述母板的一侧，所述第二铜层位于所述第一子板的远离所述第二子板的一侧，将所述母板和所述第二子板热压合，得到所述不对称板；所述不对称板上形成有多个拼版，每一所述拼版包括多个单元，所述第一铜层至第四铜层上对应所述拼版与拼版之间、所述单元与单元之间，以及所述单元与所述不对称板的板边之间均形成连接位；以及
成品锣板：于所述拼版与拼版之间的所述连接位、所述拼版与所述板边之间的所述连接位，以及所述单元与所述单元之间的所述连接位进行锣板，得到多个所述拼版，每一拼版包括多个相互连接的单元；
其中，所述不对称板的制作方法还包括以下三项中的至少一项：
铺铜：在所述制作母板的步骤中，在所述母板的除最外层所述第二铜层外的连接位上铺铜，得到铺铜区；
掏铜：在所述制作第二子板的步骤中，在所述第三铜层的连接位上掏铜；以及
控深锣：在所述成品锣板的步骤之后，在每一所述拼版上，由所述第二子板一侧于所述单元与单元之间的连接位控深锣，得到控深槽。
在一个实施例中，所述单元与单元之间的所述铺铜区为间断设置，且，所述单元与单元之间的相邻两个所述铺铜区的长度不同；所述拼版与拼版之间的所述铺铜区、所述单元与所述板边之间的所述铺铜区为连续设置。
在一个实施例中，所述单元与单元之间的多个所述铺铜区中，相间隔的两个所述铺铜区的形状一致。
在一个实施例中，所述单元与单元之间的所述铺铜区相对于所述连接位的单边内缩距离大于或等于0.15mm；所述拼版与拼版之间的所述铺铜区至所述单元之间的距离大于或等于0.2mm，所述单元与所述板边之间的所述铺铜区至所述单元之间的距离大于或等于0.2mm。
在一个实施例中，所述掏铜区的宽度小于所述成品锣板步骤中的成品锣板位的宽度。
在一个实施例中，所述掏铜区与所述成品锣板步骤中的成品锣板位之间的距离大于或等于0.1mm。
在一个实施例中，所述控深锣步骤控制为锣穿所述第二子板且不锣伤所述母板的第一铜层。
在一个实施例中，所述不对称板的制作方法包括所述掏铜步骤和所述控深锣步骤，所述掏铜步骤中，在所述第三铜层的连接位上形成掏铜区以及位于掏铜区之外的连接部，所述热压合步骤中还包括所述连接部被去掉，所述控深槽的深度最小值D0min=H1-H4+ΔX，所述控深槽的深度最大值D0max=H1-H4+H3-ΔX，其中，所述H1为所述第二子板的厚度，所述H3为所述半固化片的厚度，所述H4为所述第三铜层的厚度，所述ΔX为控深锣机的精度公差。
在一个实施例中，所述不对称板的制作方法包括所述铺铜步骤，所述成品锣板步骤中，成品锣板位与部分的所述铺铜区的位置对应。
在一个实施例中，所述不对称板的制作方法包括所述掏铜步骤，所述掏铜步骤中，在所述第三铜层的连接位上形成掏铜区以及位于掏铜区之外的连接部，所述连接部与其余所述铺铜区的位置相对应。
在一个实施例中，所述不对称板的制作方法还包括所述控深槽步骤，所述控深槽的宽度大于所述第二子板的内层线路的连接位中的铺铜区的宽度。
在一个实施例中，所述控深槽的单边超出所述每一所述拼版内连接位内的所述铺铜区的单边的距离大于或等于0.075mm。
在一个实施例中，所述控深锣步骤中，于每一所述连接部进行控深锣，在每一所述拼版内，所述控深槽的数量为多个。
在一个实施例中，所述控深槽的边缘与相邻的所述单元的边缘之间的距离大于或等于0.075mm。
在一个实施例中，在所述热压合步骤中，降温速率为2℃/min~3℃/min。
 有益效果
本申请实施例提供的不对称板的制作方法的有益效果在于：本发明实施例提供的不对称板的制作方法，其包括制作母板、制作第二子板、母板和第二子板的热压合，以及成品锣板，还包括：在母板的除最外层第二铜层外的连接位上铺铜而得到铺铜区，在制作第二子板时在第三铜层的连接位上掏铜，以及在成品锣板的步骤之后在每一拼版上由第二子板一侧于连接位控深锣而得到控深槽的三项步骤中的至少一项，该三项中的任何一项均有利于减小不对称板在受热后的翘曲程度，从而解决客户在电路板成品装配后虚焊、脱焊的问题，提高产品的可靠性。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例或示范性技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1是本发明实施例提供的不对称板的制作方法的步骤流程图；
图2是不对称板的叠构结构示意图；
图3是母板中内层线路层的连接位的铺铜示意图；
图4是图3中A处的放大图；
图5是第二子板的纵向剖面示意图；
图6是第二子板的第三铜层的掏铜示意图；
图7是图6中B处的放大图；
图8是拼版的连接位在控深锣前的结构示意图；
图9是拼版的连接位在控深锣后的结构示意图。
 本发明的实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本申请。
需说明的是，当部件被称为“固定于”或“设置于”另一个部件，它可以直接在另一个部件上或者间接在该另一个部件上。当一个部件被称为是“连接于”另一个部件，它可以是直接或者间接连接至该另一个部件上。术语“上”、“下”、“左”、“右”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制，对于本领域的普通技术人员而言，可以根据具体情况理解上述术语的具体含义。术语“第一”、“第二”仅用于便于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明技术特征的数量。“多个”的含义是两个或两个以上，除非另有明确具体的限定。
为了说明本申请所提供的技术方案，以下结合具体附图及实施例进行详细说明。
请首先参阅图2，不对称板100包括：具有一个第一子板11或者是由多个第一子板11相互热压合形成的母板1，以及第二子板2。第一子板11包括第一绝缘层112，以及设置于第一绝缘层112的相对两侧的第一铜层111和第二铜层113，第二子板2可以是高频芯板，第二子板2包括第二绝缘层22，以及设置于第二绝缘层22的相对两侧的第三铜层21和第四铜层23，第一子板11的第一绝缘层112的材料和第二子板2的第二绝缘层22的材料不同。将母板1与第二子板2层叠并热压合，由于第一子板11的第一绝缘层112的材料和第二子板2的第二绝缘层22的材料不同，因此，所得到的压合结构在形式上是不对称的，也即，得到上述的不对称板100。
该不对称板100受到高温作用时容易往膨胀系数大的方向翘曲。通常地，高频芯板中的第二绝缘层22的材料为PTFE，第一子板11为常用的FR4芯板，其第一绝缘层112所使用的FR4材料的膨胀系数较第二绝缘层22小。因此，将母板1与第二子板2层叠并热压合后，该不对称板100容易往第二子板2的方向翘曲。
请结合参阅图2，设定第二子板2的厚度为H1，其中，第三铜层21的厚度为H4，第二绝缘层22的厚度为H5，第四铜层23的厚度为H6，则H1=H4+H5+H6，设定母板1的厚度为H2。
请参阅图1，本发明实施例提供一种不对称板的制作方法，用以解决上述不对称板100的翘曲问题。具体地，该不对称板的制作方法包括：
制作母板1：请结合参阅2，母板1包括至少一个第一子板11；
制作第二子板2：请结合参阅图2；
热压合：将母板1和第二子板2层叠设置，其中，第三铜层21位于第二子板2上远离母板1的一侧，第二铜层113位于第一子板11上远离第二子板2的一侧，并在母板1和第二子板2之间放置至少一张半固化片，将母板1和第二子板2放入压机进行热压合，得到上述的不对称板100；如图3和图6所示，不对称板100上形成有多个拼版3，每一拼版3包括多个单元31（请结合参阅图3和图6，PCS1~PCS4代表一个拼版3内的四个单元31，当然，一个拼版3内的单元31的数量不限于四个），不对称板100的第一铜层111至第四铜层23上对应拼版3与拼版3之间、单元31与单元31之间，以及单元31与板边35之间的区域均作为连接位30；以及
成品锣板：于拼版3与拼版3之间的连接位30、拼版3与板边35之间的连接位30，以及单元31与单元31之间的连接位30进行锣板，得到多个拼版3，每一拼版3包括多个单元31；成品锣板后，每一拼版3内的单元31之间是相互连接的。
其中，本发明实施例的不对称板的制作方法包括以下三项中的至少一项：
铺铜：在制作母板1的步骤中还包括在第一子板11的线路层连接位30上铺铜。更具体地是，母板1上除最外层的第二铜层113外，于其他第一铜层111和第二铜层113上的连接位30中部分保留铜，形成多个间隔的铺铜区32，如图3所示；
掏铜：在制作第二子板2的步骤中还包括在第二子板2的保护层的连接位30上掏铜。更具体地是，在第二子板2的远离母板1一侧，也即第三铜层21上对应连接位30部分掏铜，形成多个间隔的掏铜区33，掏铜区33之间形成铜材料的连接部34，如图6所示；以及
控深锣：在成品锣板的步骤之后，在每一拼版3上于单元31与单元31之间的连接位30由第二子板2一侧进行控深锣，得到控深槽36，如图9所示。
需要说明的是，控深锣后，每一拼版3上单元31与单元31之间仍是连接的，可以以拼版3出货。
本发明实施例提供的不对称板的制作方法，其包括在第二子板2的保护层的连接位30上掏铜、第一子板11的内层线路层的连接位30铺铜，以及在成品锣板后由第二子板2一侧于连接位30上控深锣中的至少一个，该三项中的任何一项均有利于减小不对称板100在受热后的翘曲程度，从而解决客户在电路板成品装配后虚焊、脱焊的问题，提高产品的可靠性。
需要说明的是，以上制作母板1和第二子板2的步骤是相互独立的、互不影响的。因此，制作母板1和制作第二子板2的步骤在时间上可以依次进行，也可以同时进行。以下，以先制作母板1、后制作第二子板2为例进行说明。也即，如图1所示，在本实施例中，步骤S1为制作母板1，步骤S2为制作第二子板2，步骤S3为母板1与第二子板2之间的热压合，步骤S4为成品锣板，步骤S5为控深锣。
具体地，在步骤S1中，包括以下详细步骤：
步骤S1-1、开料：将整张大的覆铜板按设计要求裁成需要的工作板，将裁切好的工作板过隧道炉，减少板内应力；工作板包括绝缘层和两侧的铜层；
步骤S1-2、工作板内层图形的转移：在工作板的至少一侧的铜层上涂覆一层光敏聚合物，采用曝光机（如4CCD对位镜头半自动）对其进行照射，将母板1所需的内层图形转移至光敏聚合物上；
步骤S1-3、显影：将覆有光敏聚合物的工作板置入显影液中，没有发生聚合反应的光敏聚合物被显影掉，而发生聚合反应的光敏聚合物则不会显影（以负型光敏聚合物为例），工作板的铜层上不需要保留的铜材料暴露出；
步骤S1-4、蚀刻：通过蚀刻液，将暴露出的铜材料蚀刻掉，有光敏聚合物保护的铜材料则保留下来，得到所需的内层图形；
步骤S1-5、退膜：通过退膜液把铜层上的光敏聚合物退掉，得到第一子板11；第一子板11两侧的铜层分别为第一铜层111和第二铜层113，第一铜层111和第二铜层113之间为第一绝缘层112；
步骤S1-6、光学检查：对做好的第一子板11进行光学检查，确认品质；
步骤S1-7、冲孔，采用冲孔机在第一子板11上冲出多个定位孔（如，8个定位孔，包括4个熔合定位孔和4个铆和定位孔）；
步骤S1-8、棕化：通过棕化液对第一子板11的相对两侧的第一铜层111和第二铜层113进行棕化，以粗化铜导体的表面；
步骤S1-9、第一热次压合（对应地，基于时间顺序，将前述所提及的母板1与第二子板2之间的热压合命名为第二次热压合）：把棕化后的第一子板11按照客户叠构需求叠合半固化片（这里定位为第一半固化片4，如图2所示），根据定位孔进行铆合，用检查机全照层间对准环，然后在压机内的高温环境下进行热压合；
步骤S1-10、压合后处理工序：包括打靶、锣边、钻孔、沉铜、板电、外层线路、内层蚀刻、内层全自动光学检查等。
还需特别说明的是，在母板1（以下均以母板1由多个第一子板11热压合而成为例进行说明）中，请参阅图2，其用于设置在远离第二子板2一侧的最外层的第二铜层113作为该不对称板100的在第二次热压合过程中的其中一个保护层，该保护层上只制作后续工序所需的各种工具孔。因此，在上述步骤S1中，至少一个第一子板11仅有其一侧的铜层按照上述步骤S1-2至步骤S1-5制作内层图形，也即，在上述步骤S1中，至少一个第一子板11仅有其一侧的铜层按照上述步骤S1-2至步骤S1-5制作内层图形。
具体地，内层图形应包括：单元31内的线路图形（未图示）、单元31与单元31之间连接位30上对应铺铜区32的图形、拼版3与拼版3之间连接位30上对应铺铜区32的图形，以及单元31与板边35之间连接位30上对应铺铜区32的图形。因此，在上述步骤S1-5中，所得到的内层图形为，在第一子板11的第一铜层111（或者是第一铜层111和第二铜层113）上，单元31与单元31之间的连接位30形成铺铜区32，拼版3与拼版3之间的连接位30以及单元31与板边35之间的连接位30上也形成铺铜区32。
可选地，如图3所示，单元31与单元31之间的连接位30上为间断地铺铜，形成多个依次间隔一定距离的铺铜区32；而拼版3与拼版3之间的连接位30，以及单元31与板边35之间的连接位30上的铺铜区32可以是连续的。这是因为，单元31与单元31之间间隔设置的铺铜区32之间的间隙有利于释放第一子板11的内应力，进而减少第一子板11和不对称板100的翘曲；而拼版3与拼版3之间的连接位30，以及单元31与板边35之间的连接位30在后续的成品锣板步骤中是需要去掉的，因此，铺铜区32不需要间隔设置，可以降低制作的复杂性，降低生产成本。
如图2所示，以六层不对称板为例，L1层和L2层分别为第二子板2的第三铜层21和第四铜层23，L1层为第二子板2一侧的保护层，L3层至L6层位于由两个第一子板11叠合构成的母板1，L6层为在第二次热压合过程中的母板1一侧的保护层，该步骤S1中，用于作为L6层的第二铜层113上只制作后续工序所需的各种工具孔，用于作为L3层至L5层的第一铜层111和第二铜层113上按照上述步骤S1-2至步骤S1-5正常制作上述的内层图形。这样，铺铜区32的间隔设置能够减少母板1的翘曲，进而减少母板1与第二子板2在第二次热压合过程中所引起的不对称板100的翘曲程度，进而可以减少成品电路板在客户装配过程中受热引起的翘曲；此外，多个铺铜区32的设置能够增强母板1的刚性。
此外，如图4所示，单元31与单元31之间连接位30内的多个铺铜区32的形状可以不必是完全一致的。本实施例中，单元31与单元31之间连接位30内的多个铺铜区32中，相间隔的两个铺铜区32的形状一致，如图4所示，一个铺铜区32的长度和宽度接近甚至相等，而与其相邻的一个铺铜区32的长度明显大于其宽度而成长条形（该具体效果请结合后面步骤S4）。
具体地，在步骤S2中，包括：
步骤S2-1、开料：将整张大的覆铜板按设计要求裁成需要的工作板，将裁切好的工作板过隧道炉，减少板内应力；
步骤S2-2、工作板图形的转移：在工作板的两侧的铜层上分别涂覆一层光敏聚合物，采用曝光机（如4CCD对位镜头半自动）对其进行照射，将第二子板2所需的图形转移至光敏聚合物上；
步骤S2-3、显影：将覆有光敏聚合物的工作板置入显影液中，没有发生聚合反应的光敏聚合物被显影掉，而发生聚合反应的光敏聚合物则不会显影（以负型光敏聚合物为例），工作板的两侧铜层上不需要保留的铜材料暴露出；
步骤S2-4、蚀刻：通过蚀刻液，将暴露出的铜材料蚀刻掉，有光敏聚合物保护的铜材料则保留下来，分别得到两侧铜层上所需的图形；
步骤S2-5、退膜：通过退膜液把铜层上的光敏聚合物退掉，得到第二子板2；第二子板2两侧的铜层分别为第三铜层21和第四铜层23，第三铜层21和第四铜层23之间为第二绝缘层22；
步骤S2-6、光学检查：对做好的第二子板2进行光学检查，确认品质；
步骤S2-7、冲孔，采用冲孔机在第二子板2上冲出多个定位孔（如，8个定位孔，包括4个熔合定位孔和4个铆和定位孔）。
此处需要说明的是，在该步骤S2中，由于L1层也即第三铜层21作为该不对称板100的另一个保护层，L2层上也即第四铜层23上正常制作内层线路图形。
具体地，第二子板2的图形应包括：在第三铜层21上形成的单元31与单元31之间连接位30上对应掏铜区33以外的图形（也即连接部34的图形）、拼版3与拼版3之间连接位30上对应掏铜区33以外的图形，以及单元31与板边35之间连接位30上对应掏铜区33以外的图形，在第四铜层23上形成的单元31的内层线路图形（未图示，且此时，L1层的单元31内不制作内层线路图形，以作为保护层）。因此，在上述步骤S2-5中，所得到的图形是，第二子板2的第三铜层21上具有单元31与单元31之间连接位30上多个间隔的连接部34、拼版3与拼版3之间连接位30上多个间隔的连接部34，以及单元31与板边35之间连接位30上多个间隔的连接部34，如图6所示，在第四铜层23上具有单元31的内层线路图形，如图5所示。
通过在L1层的连接位30上部分地掏铜，能够释放该第二子板2的第二绝缘层22的部分应力，从而，减小第二子板2在受热后的翘曲程度，进而，减少电路板成品装配后的翘曲程度。
其中，在一个可选实施例中，在该步骤S2中，连接部34设置为与步骤S1中部分铺铜区32的位置相对应。这样，在该不对称板100的厚度方向上，连接部34总是具有与其对应的铺铜区32，更便于连接部34与铺铜区32之间的热压合（详情请继续结合以下步骤S3）。
在步骤S3中，第二次热压合的具体步骤是：按照客户叠构需求在上述得到的母板1和第二子板2之间叠合至少一张半固化片（这里定义为第二半固化片5，请参阅图2），通过定位孔进行定位，用检查机全照层间对准环，在高温环境进行热压合。
在一个可选实施例中，该第二次热压合中，降温速率为2℃/min~3℃/min，具体例如保持2℃/min。由于该降温速率较低，可以进一步减少不对称板100的内应力，进而减少其受热后的翘曲程度。
请结合参阅图3和图6，在一个具体实施例中，L1层上的连接部34与L3层~L5层上两个相间隔设置的铺铜区32是对应的，也即对应其中长度较小的铺铜区32。如此，在进行第二次热压合时不会出现连接部34的下方没有铺铜区32的情况，进而可以避免连接部34在热压合过程中的变形，以及该不对称板100的变形。
此外，在该步骤S3中，还包括对经第二次热压合得到的不对称板100进行棕化、镭射钻孔、等离子体处理、沉铜板电、板电加厚、外层线路制作（L1层和L6层上单元31内线路图形制作，并且，经外层线路制作后，L1层上的连接部34被去掉，L6层的连接位30上可以留有与L3层~L5层的铺铜区32一致的铜图案，或者说，在L6层的连接位上也形成铺铜区32）、图形电镀、外层蚀刻、防焊油墨印刷、字符印刷，以及测试等。请结合参阅图8和图9，在拼版3的最外层，分别为防焊油墨印刷形成的阻焊层6。
在步骤S3之后，进行步骤S4，成品锣板：对所得到的不对称板100进行锣板，也即，在拼版3与拼版3之间的连接位30、拼版3与板边35之间的连接位30，以及单元31与单元31之间的连接位30上分别进行锣板，切断拼版3与拼版3之间、拼版3与板边35之间的连接，以及单元31与单元31之间的部分连接，得到多个拼版3，每一拼版3包括多个相互连接的单元31。
在所得到的每一拼版3内，单元31与单元31之间在L1层的连接位30上没有连接部34，在L3层~L6层的连接位30上设有铺铜区32。也即，经该步骤S4后，在每一拼版3内，单元31与单元31之间在L3层~L6层的连接位30上保留有铺铜区32。
其中，在一个具体实施例中，请结合参阅图3，可以是连接位30中的长度较大的、呈长条状的铺铜区32在锣掉，保留其他的铺铜区32。当然，此处仅作示例，以表明成品锣板位可以按照部分的铺铜区32的位置进行，而并非对铺铜区32的形状进行特别限定。在实际应用中，铺铜区32根据所要成品锣板后单元31与单元31之间的连接需求进行设定。
在一个可选实施例中，请结合参阅图6和图7，为了能够在该步骤S4中防止锣板时产生对位偏差，在上述的步骤S2中，掏铜区33至成品锣板位之间需预留足够的距离，也即，掏铜区33的宽度应当小于成品锣板位的宽度。具体地，掏铜区33与成品锣板位之间的距离为D3，D3≥0.1mm，也就是说，掏铜区33的靠近单元31的边缘相对于成品锣板位的与单元31相邻接的边缘内缩至少0.1mm。
请参阅图1，在一个实施例中，在完成上述步骤S4的成品锣板之后，进行步骤S5，在每一拼版3内单元31与单元31之间的连接位30由第二子板2一侧控深锣，得到控深槽36。如此，一方面，第二芯板2被部分去除，因而能够减少其在第二次热压合后以及客户后续装配工序的受热过程中的膨胀，进而减少该第二子板2和不对称板100的翘曲；另一方面，单元31与单元31中之间的连接位30在高度上被部分去除，控深槽36能够为单元31的膨胀让出空间，减少单元31的热应力，尤其是第二子板2一侧，从而，也能够减少该第二子板2和不对称板100的翘曲。
其中，可选地，控深锣设置为在不对称板100上由第三铜层21一侧开始于单元31之间的连接位30进行控深锣，毫无疑义地，由于此时每一拼版3内单元31与单元31之间通过部分第二绝缘层22、部分第二半固化片5、铺铜区32以及铺铜区32之间的部分第一半固化片4连接在一起，因此，控深锣对应实施于剩余的铺铜区32的上方，也即控深槽36的位置与剩余的铺铜区32的位置相对应，直至到达母板1与第二子板2之间的第二半固化片5。这样的结果是，控深锣去除了连接位30中部分的第二子板2和部分的第二半固化片5，也即，控深锣控制为锣穿第二子板2且不锣伤第一子板11的最靠近第二子板2一侧的第一铜层111。这样的好处是，可以避免控深槽36的深度D0过大导致单元31之间断裂而影响出货。
因此，控深槽36的深度最小值D0min=H1-H4+ΔX，控深槽36的深度最大值D0max=H1-H4+H3-ΔX，其中，H3为第二半固化片5的厚度，ΔX为控深锣机的精度公差。其中，阻焊层6的厚度相对于其它层较小，可忽略不计。
例如，在一个具体实施例中，H1为0.186mm，H4为0.018mm，H3为0.08mm，控深锣机的精度公差ΔX为0.025mm，因此，控深槽36的深度最小值D0min为0.193mm，控深槽36的深度最大值D0max为0.223mm。此处仅为示例，在其他可选实施例中，根据具体不对称板100的叠构的不同以及控深锣机的不同，控深槽36的深度D0允许有其他范围，对此不作特别限制。
在实际应用中，为了保证热应力的释放效果，控深槽36的深度D0应尽量接近D0max。
在一个可选实施例中，每一拼版3内，控深槽36的数量为多个，控深槽36的位置与连接部34的位置一一相对应。也即，在步骤S5中，于每一连接部34开始进行控深锣。
在一个可选实施例中，请结合参阅图8和图9，控深槽36的宽度大于内层线路（L3层~L5层）的连接位30中的铺铜区32的宽度。具体地，控深槽36的单边超出连接位的内层线路的铺铜区32（图8和图9中以斜线填充的区域表示连接位内的铺铜区32）单边的距离为D5，D5≥0.075mm。
在一个可选实施例中，请结合参阅图8和图9，控深槽36的宽度必然小于连接位30的宽度，具体地，控深槽36的边缘与单元31的边缘之间的距离为D6，D6≥0.075mm。
其中，可选地，因步骤S4和步骤S5中存在对位误差，所使用的控深锣机等设备也存在精度公差，为避免在拼版3的内层线路层（L3层至L5层）上的边缘以及控深槽36的边缘露出所铺的铜，如图4所示，单元31与单元31之间连接位30内的铺铜区32相对于连接位30的单边内缩距离为D1，也即，单元31与单元31之间的铺铜区32的边缘至连接位30的边缘之间的距离为D1，D1≥0.15mm。根据单元31的形式的不同，这包括单元31与单元31之间连接位30内的铺铜区32在单元31的短边方向上相对于连接位30的单边内缩距离大于或等于0.15mm，单元31与单元31之间连接位30内的铺铜区32在单元31的长边方向上相对于连接位30的单边内缩距离大于或等于0.2mm。其中，进一步可选地，单元31与单元31之间连接位30内的铺铜区32在单元31的短边方向上相对于连接位30的单边内缩距离为≥0.15mm，单元31与单元31之间连接位30内的铺铜区32在单元31的长边方向上相对于连接位30的单边内缩距离大于或等于0.2mm。在此需要说明的是，上述所说的长边方向仅是基于图3所示的呈长方形的单元31和图4中附图标记“D1”所示位置而言，该单元31的长边为图3所示纸面的上下方向，该单元31的短边为图3所示纸面的左右方向，然而，不以此为限，在实际生产中，单元31的长边方向和短边方向可以根据具体需要进行设置。
因此，在本实施例中，单元31与单元31之间连接位30内的铺铜区32在单元31的长边方向上相对于连接位30的单边内缩距离即为单元31与单元31之间的铺铜区32与单元31之间的间隙距离，该间隙距离大于或等于0.2mm；单元31与单元31之间连接位30内的铺铜区32在单元31的短边方向上相对于连接位30的单边内缩距离即为单元31与单元31之间连接位30内相邻两个铺铜区32之间的间隙距离，该间隙距离大于或等于0.15mm。
进一步地，在一个可选实施例中，单元31与单元31之间的铺铜区32与单元31之间的间隙距离大于或等于0.20mm。
而拼版3与拼版3之间的铺铜区32、单元31与板边35之间的铺铜区32到相邻的单元31之间的距离均为D2，D2≥0.2mm。
以上仅为本申请的可选实施例而已，并不用于限制本申请。对于本领域的技术人员来说，本申请可以有各种更改和变化。凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的权利要求范围之内。

Claims (15)

  1. 一种不对称板的制作方法，其特征在于，包括：
    制作母板：所述母板包括至少一个第一子板，每一所述第一子板包括第一绝缘层，以及设置于所述第一绝缘层的相对两侧的第一铜层和第二铜层；
    制作第二子板：所述第二子板包括第二绝缘层，以及设置于所述第二绝缘层的相对两侧的第三铜层和第四铜层；其中，所述第一绝缘层和第二绝缘层的材料不同；
    热压合：将所述母板和所述第二子板层叠设置并在所述母板和所述第二子板之间放置半固化片，其中，所述第三铜层位于所述第二子板的远离所述母板的一侧，所述第二铜层位于所述第一子板的远离所述第二子板的一侧，将所述母板和所述第二子板热压合，得到所述不对称板；所述不对称板上形成有多个拼版，每一所述拼版包括多个单元，所述第一铜层至第四铜层上对应所述拼版与拼版之间、所述单元与单元之间，以及所述单元与所述不对称板的板边之间均形成连接位；以及
    成品锣板：于所述拼版与拼版之间的所述连接位、所述拼版与所述板边之间的所述连接位，以及所述单元与所述单元之间的所述连接位进行锣板，得到多个所述拼版，每一拼版包括多个相互连接的单元；
    其中，所述不对称板的制作方法还包括以下三项中的至少一项：
    铺铜：在所述制作母板的步骤中，在所述母板的除最外层所述第二铜层外的连接位上铺铜，得到铺铜区；
    掏铜：在所述制作第二子板的步骤中，在所述第三铜层的连接位上掏铜；以及
    控深锣：在所述成品锣板的步骤之后，在每一所述拼版上，由所述第二子板一侧于所述单元与单元之间的连接位控深锣，得到控深槽。
  2. 如权利要求1所述的不对称板的制作方法，其特征在于，所述单元与单元之间的所述铺铜区为间断设置，且所述单元与单元之间的相邻两个所述铺铜区的长度不同；所述拼版与拼版之间的所述铺铜区、所述单元与所述板边之间的所述铺铜区为连续设置。
  3. 如权利要求2所述的不对称板的制作方法，其特征在于，所述单元与单元之间的多个所述铺铜区中，相间隔的两个所述铺铜区的形状一致。
  4. 如权利要求2所述的不对称板的制作方法，其特征在于，所述单元与单元之间的所述铺铜区相对于所述连接位的单边内缩距离大于或等于0.15mm；所述拼版与拼版之间的所述铺铜区至所述单元之间的距离大于或等于0.2mm，所述单元与所述板边之间的所述铺铜区至所述单元之间的距离大于或等于0.2mm。
  5. 如权利要求1所述的不对称板的制作方法，其特征在于，所述掏铜区的宽度小于所述成品锣板步骤中的成品锣板位的宽度。
  6. 如权利要求5所述的不对称板的制作方法，其特征在于，所述掏铜区与所述成品锣板步骤中的成品锣板位之间的距离大于或等于0.1mm。
  7. 如权利要求1所述的不对称板的制作方法，其特征在于，所述控深锣步骤控制为锣穿所述第二子板且不锣伤所述母板的第一铜层。
  8. 如权利要求7所述的不对称板的制作方法，其特征在于，所述不对称板的制作方法包括所述掏铜步骤和所述控深锣步骤，所述掏铜步骤中，在所述第三铜层的连接位上形成掏铜区以及位于掏铜区之外的连接部，所述热压合步骤中还包括所述连接部被去掉，所述控深槽的深度最小值D0min=H1-H4+ΔX，所述控深槽的深度最大值D0max=H1-H4+H3-ΔX，其中，所述H1为所述第二子板的厚度，所述H3为所述半固化片的厚度，所述H4为所述第三铜层的厚度，所述ΔX为控深锣机的精度公差。
  9. 如权利要求1至8中任一项所述的不对称板的制作方法，其特征在于，所述不对称板的制作方法包括所述铺铜步骤，所述成品锣板步骤中，成品锣板位与部分的所述铺铜区的位置对应。
  10. 如权利要求9所述的不对称板的制作方法，其特征在于，所述不对称板的制作方法包括所述掏铜步骤，所述掏铜步骤中，在所述第三铜层的连接位上形成掏铜区以及位于掏铜区之外的连接部，所述连接部与其余所述铺铜区的位置相对应。
  11. 如权利要求9所述的不对称板的制作方法，其特征在于，所述不对称板的制作方法还包括所述控深槽步骤，所述控深槽的宽度大于所述第二子板的内层线路的连接位中的铺铜区的宽度。
  12. 如权利要求11所述的不对称板的制作方法，其特征在于，所述控深槽的单边超出每一所述拼版内所述连接位内的所述铺铜区的单边的距离大于或等于0.075mm。
  13. 如权利要求11所述的不对称板的制作方法，其特征在于，所述控深锣步骤中，于每一所述连接部进行控深锣，在每一所述拼版内，所述控深槽的数量为多个。
  14. 如权利要求1至8中任一项所述的不对称板的制作方法，其特征在于，所述控深槽的边缘与相邻的所述单元的边缘之间的距离大于或等于0.075mm。
  15. 如权利要求1至8中任一项所述的不对称板的制作方法，其特征在于，在所述热压合步骤中，降温速率为2℃/min~3℃/min。
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