WO2017169953A1 - Dispositif de montage et procédé de montage - Google Patents

Dispositif de montage et procédé de montage Download PDF

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Publication number
WO2017169953A1
WO2017169953A1 PCT/JP2017/011110 JP2017011110W WO2017169953A1 WO 2017169953 A1 WO2017169953 A1 WO 2017169953A1 JP 2017011110 W JP2017011110 W JP 2017011110W WO 2017169953 A1 WO2017169953 A1 WO 2017169953A1
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WIPO (PCT)
Prior art keywords
mounting
layer
data
reference mark
alignment
Prior art date
Application number
PCT/JP2017/011110
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English (en)
Japanese (ja)
Inventor
寺田　勝美
祐樹 真下
Original Assignee
東レエンジニアリング株式会社
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Publication date
Application filed by 東レエンジニアリング株式会社 filed Critical 東レエンジニアリング株式会社
Priority to CN201780032768.9A priority Critical patent/CN109314065B/zh
Priority to KR1020187027599A priority patent/KR102319865B1/ko
Publication of WO2017169953A1 publication Critical patent/WO2017169953A1/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H05K13/0404—Pick-and-place heads or apparatus, e.g. with jaws
    • H05K13/0413—Pick-and-place heads or apparatus, e.g. with jaws with orientation of the component while holding it; Drive mechanisms for gripping tools, e.g. lifting, lowering or turning of gripping tools
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/08—Monitoring manufacture of assemblages
    • H05K13/081—Integration of optical monitoring devices in assembly lines; Processes using optical monitoring devices specially adapted for controlling devices or machines in assembly lines
    • H05K13/0815—Controlling of component placement on the substrate during or after manufacturing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75753—Means for optical alignment, e.g. sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/759—Means for monitoring the connection process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7598—Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/8113—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/81132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81908—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving monitoring, e.g. feedback loop
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Definitions

  • the present invention relates to a mounting apparatus and a mounting method in three-dimensional mounting in which workpieces such as semiconductor elements are sequentially stacked and bonded in the vertical direction.
  • a COC method Chip on Chip
  • a COW method in which chips are sequentially stacked on a wafer.
  • Chip on Wafer a semiconductor chip component
  • WOW method Wafer on Wafer in which wafers are sequentially stacked on the wafer.
  • the upper layer bonded objects are sequentially bonded in a state where the position of the electrode of the upper layer bonded object is aligned with the position of the electrode (including the bump) of the lower layer bonded object.
  • the position of the lower object for example, the position of the electrode or the position of the alignment mark
  • the position of the upper layer object to be stacked on the lower layer object to be recognized is aligned with the position of the lower object to be recognized by the camera), and the position of the upper layer object to be stacked is recognized from above by the recognition means.
  • a two-view camera composed of an integrated housing having recognition means in two upper and lower views is used for recognizing bump position information.
  • the two-field camera is inserted between the objects to be joined.
  • the upper-field recognition camera uses the upper-field object recognition mark, and the lower-field recognition camera aligns the lower object-to-be-joined. Each mark is image-recognized.
  • the position of the lower layer electrode is memorized using the recognition camera for the lower field of view of the two-field camera, and the position of the upper layer electrode is measured after the upper layer object is joined.
  • the position information of the lower layer electrode and the position information of the upper layer electrode are compared and the displacement of the electrode is obtained, the housing supporting the two-field camera is accurately affected by the ambient temperature in the apparatus. There is a problem that electrode displacement cannot be measured.
  • the atmosphere temperature in the apparatus is set so that the temperature of the bonding heater is 280 ° C. or higher and the temperature of the substrate holding stage is about 100 ° C. Therefore, the housing of the two-field camera gradually expands due to the heat in the apparatus, and the position of the upper layer electrode is increased by the amount of thermal expansion from the coordinate position when the position of the lower layer electrode is recognized and stored. As a result, an error occurs in the measurement result of the electrode displacement.
  • the alignment mark provided in the lower layer is covered with the objects to be bonded and cannot be recognized after mounting. Is big.
  • an object of the present invention is to provide a mounting device and a mounting device capable of measuring the positional deviation information of the lower layer and the upper layer without being affected by the ambient temperature and correcting the stacking position in the mounting device for stacking the objects to be bonded such as semiconductor elements.
  • a method will be provided.
  • the mounting apparatus includes a control unit having a function of measuring a positional shift of the recognition means for the lower layer and correcting a position where the objects to be bonded are sequentially stacked.
  • the invention according to claim 2 is the invention according to claim 1, This is a mounting device provided with a two-field camera in which the lower layer recognition means and the upper layer recognition means are constituted by an integrated casing.
  • a mounting apparatus comprising the temperature sensor for measuring an ambient temperature inside the two-field camera according to the second aspect of the present invention.
  • the invention according to claim 4 A mounting method in a mounting apparatus used for three-dimensional mounting in which workpieces such as semiconductor elements are sequentially stacked and bonded in the vertical direction, A holding stage for holding a workpiece corresponding to the lowermost layer; A bonding head for holding a workpiece to be sequentially stacked on the bottom layer; Lower layer recognition means for recognizing the alignment mark attached to the lower layer workpiece; An upper layer recognition means for recognizing an alignment mark attached to the upper layer bonded portion;
  • a mounting apparatus comprising: Prior to the work of sequentially stacking the objects to be joined, the step of recognizing the reference mark provided on the holding stage with the lower layer recognition means, and storing the image recognition information of the reference mark as the position information of the reference mark before mounting; The lower layer recognition means recognizes an image of the alignment mark of the workpiece corresponding to the lowermost layer held on the holding stage and the alignment mark provided on the upper layer side of the workpiece to be laminated on the upper layer of the workpiece.
  • the step of storing the reference mark data during mounting the step of storing the upper layer correction alignment data, and the step of bonding the object to be bonded to the upper layer of the object to be bonded are repeated.
  • the invention according to claim 5 is the invention according to claim 4,
  • the reference mark provided on the holding stage is image-recognized by the lower-layer recognition means from the data of the temperature sensor provided in the two-field camera in which the lower-layer recognition means and the upper-layer recognition means are constituted by an integrated housing. And measuring the horizontal extension of the recognition means for the lower layer using the previous mounting reference mark data and storing it as misalignment data without performing the step of storing as mounting reference mark data. Implementation method.
  • the lower layer recognizing means measures the alignment accuracy after mounting of the objects to be joined sequentially stacked on the lowermost layer, and the reference mark provided on the holding stage is an image. It has a control unit that recognizes and measures the positional deviation of the recognition means for the lower layer from the image recognition result of the reference mark and corrects the position where the objects to be joined are sequentially stacked. Information can be measured without being affected by the ambient temperature, and the stacking position can be corrected.
  • the measurement can be performed efficiently.
  • the temperature sensor for measuring the ambient temperature since the temperature sensor for measuring the ambient temperature is provided inside the two-view camera, the horizontal extension of the two-view camera with respect to the ambient temperature can be measured. Since the timing for measuring the reference mark can be estimated in advance from the relationship between the measured temperature and elongation, the reference mark can be measured efficiently and the production efficiency can be increased.
  • the reference mark provided on the holding stage is image-recognized, the pre-mounting reference mark data and the mounting reference mark data are stored, and the horizontal extension of the lower layer recognition means is measured to determine the position. It is stored as deviation data. Then, the alignment mark of the object to be laminated next is image-recognized by the upper-layer recognition means, and the position-recognition data is corrected and stored as upper-layer correction alignment data. It is possible to measure the positional deviation information between the lower layer and the upper layer without being affected by the ambient temperature and correct the stacking position.
  • the lower-layer recognition means and the upper-layer recognition means are provided on the holding stage from the data of the temperature sensor provided in the two-field camera configured by an integral housing. Recognize the image of the reference mark with the lower layer recognition means and measure the horizontal elongation of the lower layer recognition means using the previous mounting reference mark data without performing the process of storing the reference mark data as mounting reference mark data. And the step of storing as misregistration data, the reference mark can be measured efficiently and the production efficiency can be increased.
  • the mounting apparatus 1 includes a bonding head 10 that presses and heats a semiconductor chip component 4 (hereinafter referred to as a chip component) as a bonded object to a wafer 2 as a bonded object, and a holding stage 20 that holds the wafer 2 by suction.
  • the holding stage 20 is provided with a reference mark 60 as shown in FIG.
  • the reference mark 60 may be provided at any position as long as it moves integrally with the holding stage 20, but is preferably provided at a position adjacent to the wafer 2 held by suction.
  • the holding stage 20 is movable in the XY directions and is driven by a driving means (not shown).
  • the wafer 2 is provided with a plurality of mounting locations (indicated by reference numerals 2a, 2b, 2c,... In FIG. 3). Alignment marks (indicated by reference numerals 3a, 3b, 3c,... In FIG. 3) are attached to the individual mounting locations.
  • Alignment marks 5a and 5b are respectively attached to the back surface (the surface bonded to the wafer 2) and the front surface (the surface held by the bonding head 10) of the chip component 4 as shown in FIG.
  • the alignment mark 5a is attached to the back surface (the surface bonded to the wafer 2)
  • the alignment mark 5b is attached to the front surface (the surface held by the bonding head 10).
  • the alignment mark 5b is indicated by a dotted line.
  • the two-field camera 30 includes an upper field of view 31 for recognizing the alignment mark 5 a attached to the chip component 4 held by the bonding head 10, and the alignment marks 3 a, 3 b of the wafer 2 held by the holding stage 20.
  • the two-field recognition means 30 is supported by a housing 33, and a temperature sensor 35 for measuring the ambient temperature is attached inside the housing 33.
  • the upper visual field 31 corresponds to the upper layer recognition means of the present invention, and the lower visual field 32 corresponds to the lower layer recognition means.
  • the two-field camera 30 is movable in the XY direction and the Z direction and is driven by a driving means (not shown) and is provided with position detection means such as a linear encoder.
  • the bonding head 10 is movable in the Z direction (vertical direction) and the ⁇ direction (horizontal rotation direction), and is configured to suck and hold the chip component 4 and press it against the wafer 2 with a predetermined pressure.
  • the conveying means 25 includes a chip slider 26 that horizontally moves between the lower side of the bonding head 10 and a supply part of the chip component 4 (not shown).
  • the control unit 50 determines the position of the holding stage 20 based on the position information obtained from the driving means of the two-field camera 30 and the position information of the alignment marks of the wafer 2 and the chip component 4 that recognize the image of the two-field camera 30. Control is performed to press the bonding head 10 against the wafer 2 with a predetermined pressure.
  • the two-field camera 30 recognizes an image of the reference mark 60 provided on the holding stage 20 and stores initial position information P0 before mounting work, and measures the positional accuracy of the wafer 2 and the chip component 4 after mounting. Before performing the above, the image of the reference mark 60 is periodically recognized to acquire the position information P1.
  • the control unit 50 stores the relationship between the temperature and the extension of the casing from the data of the temperature sensor 35 provided in the casing 33 and the data of the thermal expansion amount of the casing 33.
  • the wafer 2 is sucked and held on the holding stage 20 (step ST01).
  • the transport means 25 horizontally transports the chip component 4 from the chip supply unit using the chip slider 26, lowers the bonding head 10 to a predetermined height, and delivers the chip component 4 from the chip slider 26 to the bonding head 10.
  • the bonding head 10 rises to the height of the standby position, and the chip slider 26 moves to the chip supply unit (step ST02).
  • the two-field camera 30 is inserted between the bonding head 10 and the holding stage 20.
  • the holding stage 20 is moved horizontally so that the reference mark 60 enters the lower visual field 32 of the two-field camera 30.
  • Data obtained by image recognition with the lower visual field 32 is stored in the control unit 50 as initial position information P0 of the position information of the pre-mounting reference mark (step ST03).
  • the holding stage 10 is moved horizontally so that the mounting portion 2a of the wafer 2 comes below the bonding head 10.
  • the wafer 2 is provided with a plurality of mounting positions.
  • the chip component 4 is mounted from the mounting location 2a (step ST04).
  • the alignment mark 5a of the chip component 4 held by suction on the bonding head 10 is image-recognized by the upper visual field 31, and the alignment mark 3a of the mounting portion 2a of the wafer 2 is image-recognized by the lower visual field 32.
  • the alignment mark 3a of the wafer 2 is stored in the control unit 50 as the lowermost layer alignment data 72a, and the alignment mark 5a of the chip component 4 is stored in the control unit 50 as the upper layer alignment data 73a (step ST05). .
  • the two-field camera 30 is moved to the standby position, and the holding stage 20 is aligned in the XY direction and the bonding head 10 is aligned in the ⁇ direction from the lowermost layer alignment data 72a and the upper layer alignment data 73a (step ST06).
  • step ST07 the bonding head 10 is lowered, and the chip component 4 is pressed and heated at the target mounting location of the wafer 2 (step ST07).
  • the bonding head 10 is raised to the standby position.
  • the holding stage 20 is moved in the XY directions so that the mounting location 2b to be mounted next comes below the bonding head 10 (step ST08).
  • the chip slider 26 of the transport means 25 horizontally transports the chip component 4 from the chip supply unit to the bonding head 10, the bonding head 10 is lowered to a predetermined height, and the chip component 4 to be mounted next is transferred from the chip slider 26. It is delivered to the bonding head 10. When the delivery is completed, the bonding head 10 rises to the height of the standby position, and the chip slider 26 moves to the chip supply unit (step ST09).
  • the two-field camera 30 is inserted between the bonding head 10 and the holding stage 20 (step ST10).
  • step ST05 to step ST10 are repeated, and the chip components 4 are mounted on all mounting portions of the wafer 2.
  • the mounting location is moved to 2b, 2c,...
  • the alignment mark is moved to 3b, 3c,...
  • the lowermost alignment data is also transferred to the control unit 50 as 72a, 72b, 72c,.
  • the upper layer alignment data is also stored in the controller 50 as 73a, 73b, 73c,.
  • step ST03 Since the housing 33 of the two-field camera 30 is thermally expanded due to an increase in the ambient temperature due to the mounting operation, the position of the reference mark 60 that is image-recognized in the lower field of view 32 is shifted from the position recognized in step ST03. Recognized.
  • the control unit 50 stores the position of the reference mark 60 as reference position information P1 after thermal expansion, calculates the difference from the position information P0 of the initial pre-mounting reference mark stored in step ST03, and outputs the difference data P2. Store (step ST12).
  • the holding stage 10 is moved horizontally so that the mounting location 2a of the wafer 2 is located below the bonding head 10. Since the chip part 4 is mounted on the mounting location 2a, the image of the alignment mark 3a cannot be recognized. Therefore, the measurement of the mounting position accuracy of the chip component 4 mounted on the mounting location 2a is performed by measuring the surface position of the chip component 4 (chip component 4 mounted in step ST07) already mounted in the lower field of view 32 of the two-field camera 30. Using the position information obtained by image recognition of the alignment mark 5b and the lowermost layer alignment data 72a stored in step ST05, the control unit 50 uses the chip component 4 already mounted (chip component 4 mounted in step ST07). ) Is calculated.
  • the mounting position data P2 obtained in step ST12 is used. Correct the deviation.
  • the corrected mounting position deviation data is stored in the control unit 50 as upper layer corrected alignment data P3 (step ST13).
  • the image of the alignment mark 5a of the chip component 4 attracted and held by the bonding head 10 is recognized by the upper visual field 31, and the alignment mark 5b on the surface of the chip component 4 mounted on the mounting portion 2a of the wafer 2 is moved downward.
  • An image is recognized in the field of view 32.
  • the position information of the alignment mark 5a of the chip component 4 is stored in the control unit 50 as the upper layer alignment data 73a (step ST14).
  • the two-field camera 30 is moved to the standby position, and the holding stage 20 is moved in the XY direction and the bonding head 10 is moved in the ⁇ direction from the lowermost layer alignment data 72a, the upper layer alignment data 73a, and the upper layer correction alignment data P3. Alignment is performed (step ST15).
  • step ST16 the bonding head 10 is lowered, and the chip component 4 is pressed and heated on the mounting location 2a to be stacked and mounted.
  • the bonding head 10 is raised to the standby position.
  • the holding stage 20 is moved in the XY directions so that the mounting location 2b to be mounted next comes below the bonding head 10 (step ST17).
  • the chip slider 26 of the transport means 25 horizontally transports the chip component 4 from the chip supply unit to the bonding head 10, the bonding head 10 is lowered to a predetermined height, and the chip component 4 to be mounted next is transferred from the chip slider 26. It is delivered to the bonding head 10. When the delivery is completed, the bonding head 10 rises to the height of the standby position, and the chip slider 26 moves to the chip supply unit (step ST18).
  • the two-field camera 30 is inserted between the bonding head 10 and the holding stage 20 (step ST19).
  • step ST13 to step ST19 are repeated, and the chip components 4 are stacked and mounted at the mounting locations.
  • the mounting location moves to 2b, 2c, and the alignment mark also moves to 3b, 3c, and so on.
  • the process moves to the next step (step ST20).
  • step ST21 the stacked mounting of the chip component 4 on the wafer 2 is finished.
  • the reference mark 60 is image-recognized by the lower visual field 32 of the two-field camera 30, and the reference mark data position information before mounting. Since the positional deviation data P2 is created by comparing P0 and the reference position information P1 after thermal expansion, the stack mounting is performed by correcting the expansion due to the thermal expansion of the housing 33 of the two-field camera 30 due to the change in the ambient temperature. Can do.
  • the image recognition of the fiducial mark may not be performed every time the stacked mounting is performed after the ambient temperature has been saturated.
  • the timing of image recognition can be omitted as appropriate from the data of the temperature sensor 35 provided in the housing 33 of the two-view camera 30 and the data of the elongation due to the thermal expansion of the housing.
  • step ST15 When the upper layer correction alignment data P3 measured in step ST13 is added in step ST15, it is added to the mounting location after n times using the average value of data acquired n times successively in the order of the mounting location. May be. By doing so, it is possible to minimize the influence of abnormal data due to measurement variations and sudden deviations.
  • FIG. 6 is a schematic side view of the mounting apparatus 100.
  • the reference numerals used in the mounting apparatus 1 are used in the mounting apparatus 100.
  • the reference mark 60 is provided on the holding stage 20, but in the mounting apparatus 100, the reference mark 61 is provided at the tip of the bracket 11 attached to the bonding head 10.
  • the fiducial mark 60 is image-recognized by the lower visual field 32 of the two-field camera 30, but in the second embodiment, the fiducial mark 61 is image-recognized by the upper visual field 31. Accordingly, steps ST03 and ST12 of the first embodiment are changed as shown below. Other steps are the same as those in the first embodiment.
  • Step ST03 is “insert the two-field camera 30 between the bonding head 10 and the holding stage 20.
  • the two-field camera 30 is moved so that the reference mark 61 enters the upper field 31 of the two-field camera 30.
  • the position information of the pre-mounting reference mark obtained by image recognition in the field of view 31 is stored in the control unit 50 as the initial position information P0 (step ST03a) ”.
  • step ST12 “the two-field camera 30 is moved to the same location as step ST03.
  • the housing 33 of the two-field camera 30 is thermally expanded due to the increase in the ambient temperature due to the mounting operation.
  • the position of the reference mark 61 is recognized at a position shifted from the position recognized in step ST03a, and the control unit 50 stores the position of the reference mark 61 as reference position information P1 after thermal expansion, and in step ST03a.
  • the difference from the stored initial pre-mounting reference mark position information P0 is calculated and stored as positional deviation data P2 (step ST12a).
  • the second embodiment can achieve the same effect as the first embodiment.
  • the two-view camera 30 is configured by an integrated housing having a recognition unit for two views, but the lower view 32 for recognizing the wafer 2 side and the upper view 31 for recognizing the chip component 4 side. Even in the case of the configuration in which each is separated, the post-mounting accuracy can be measured with the lower visual field 32. Therefore, even when the casing for fixing the lower visual field 32 is deformed due to thermal expansion, the reference mark 60 on the holding stage 20 side is provided. By recognizing, the amount of change in the optical axis due to thermal expansion can be obtained, and the same effect can be achieved.
  • the alignment marks 3a of the wafer 2 and the chip component 4 are respectively provided. Since 5a and 5b can be recognized synchronously, high-speed and high-precision mounting is possible.
  • the top of the penetrating electrode at the same arrangement position may be used above and below the chip component 4 to be laminated other than the alignment marks 3a, 5a and 5b. By doing so, it is possible to measure the alignment accuracy between the electrodes that transmit the electric signal with high accuracy, so that higher quality bonding can be performed.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Operations Research (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Supply And Installment Of Electrical Components (AREA)
  • Die Bonding (AREA)

Abstract

L'invention concerne un dispositif de montage et un procédé de montage grâce auxquels, dans un dispositif de montage qui empile des éléments à souder, par exemple des éléments semi-conducteurs, une position d'empilement peut être corrigée en mesurant des informations d'erreur de position concernant une couche inférieure et une couche supérieure, sans influence de la température ambiante. Plus précisément, le dispositif de montage comporte : un étage de maintien qui maintient un élément à souder correspondant à la couche la plus inférieure; une tête de soudage qui maintient des éléments à souder qui doivent être empilés successivement sur la couche la plus inférieure; un moyen de reconnaissance de couche inférieure qui reconnaît une marque de positionnement fixée à un élément de couche inférieure à souder; et un moyen de reconnaissance de couche supérieure qui reconnaît une marque de positionnement fixée à un élément de couche supérieure à souder. Le dispositif de montage comporte une unité de commande qui assure la fonction de mesure par les moyens de reconnaissance de couche inférieure de la précision de positionnement après le montage des éléments à souder, lesquels sont empilés successivement sur la couche la plus inférieure, et la fonction de reconnaissance d'une image de la marque de référence disposée sur l'étage de maintien, de mesure d'une erreur de position des moyens de reconnaissance de couche inférieure à partir du résultat de la reconnaissance d'image de marque de référence, et de correction de la position d'empilement successif des éléments à souder.
PCT/JP2017/011110 2016-03-31 2017-03-21 Dispositif de montage et procédé de montage WO2017169953A1 (fr)

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CN201780032768.9A CN109314065B (zh) 2016-03-31 2017-03-21 安装装置和安装方法
KR1020187027599A KR102319865B1 (ko) 2016-03-31 2017-03-21 실장 장치 및 실장 방법

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JP2016071875A JP6478939B2 (ja) 2016-03-31 2016-03-31 実装装置および実装方法

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CN111771267A (zh) * 2018-07-23 2020-10-13 爱立发株式会社 安装装置以及安装方法
TWI759709B (zh) * 2019-03-27 2022-04-01 新加坡商Ｐｙｘｉｓ Ｃｆ有限公司 用於半導體器件接合的對準載具、對準系統及方法

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KR20220008514A (ko) 2020-07-14 2022-01-21 삼성전자주식회사 웨이퍼 본딩 장치 및 웨이퍼 본딩 방법

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TWI759709B (zh) * 2019-03-27 2022-04-01 新加坡商Ｐｙｘｉｓ Ｃｆ有限公司 用於半導體器件接合的對準載具、對準系統及方法
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KR20180126487A (ko) 2018-11-27
JP2017183628A (ja) 2017-10-05
CN109314065A (zh) 2019-02-05
CN109314065B (zh) 2022-07-08
JP6478939B2 (ja) 2019-03-06
KR102319865B1 (ko) 2021-10-29

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