WO2015144023A1 - 基于lao衬底的非极性蓝光led外延片及其制备方法 - Google Patents

基于lao衬底的非极性蓝光led外延片及其制备方法 Download PDF

Info

Publication number
WO2015144023A1
WO2015144023A1 PCT/CN2015/074828 CN2015074828W WO2015144023A1 WO 2015144023 A1 WO2015144023 A1 WO 2015144023A1 CN 2015074828 W CN2015074828 W CN 2015074828W WO 2015144023 A1 WO2015144023 A1 WO 2015144023A1
Authority
WO
WIPO (PCT)
Prior art keywords
polar
layer
lao substrate
lao
epitaxial wafer
Prior art date
Application number
PCT/CN2015/074828
Other languages
English (en)
French (fr)
Inventor
蔡卓然
高海
刘智
尹祥麟
刘正伟
Original Assignee
上海卓霖信息科技有限公司
江苏卓宁光电子有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 上海卓霖信息科技有限公司, 江苏卓宁光电子有限公司 filed Critical 上海卓霖信息科技有限公司
Priority to CA2942999A priority Critical patent/CA2942999C/en
Priority to JP2016574326A priority patent/JP6326154B2/ja
Priority to RU2016138668A priority patent/RU2643176C1/ru
Priority to PL15769396T priority patent/PL3107128T3/pl
Priority to US15/128,639 priority patent/US9978908B2/en
Priority to KR1020167026454A priority patent/KR20160130411A/ko
Priority to EP15769396.1A priority patent/EP3107128B1/en
Publication of WO2015144023A1 publication Critical patent/WO2015144023A1/zh

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/0008Devices characterised by their operation having p-n or hi-lo junctions
    • H01L33/0012Devices characterised by their operation having p-n or hi-lo junctions p-i-n devices
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B11/00Single-crystal growth by normal freezing or freezing under temperature gradient, e.g. Bridgman-Stockbarger method
    • C30B11/14Single-crystal growth by normal freezing or freezing under temperature gradient, e.g. Bridgman-Stockbarger method characterised by the seed, e.g. its crystallographic orientation
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02Epitaxial-layer growth
    • C30B23/025Epitaxial-layer growth characterised by the substrate
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/183Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/186Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
    • C30B29/406Gallium nitride
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02414Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/0008Devices characterised by their operation having p-n or hi-lo junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

  • the invention relates to an LED epitaxial wafer and a preparation method thereof, in particular to a non-polar blue LED epitaxial wafer based on a LAO substrate and a preparation method thereof.
  • the LED blue epitaxial wafer substrate is mainly sapphire.
  • sapphire substrates There are two serious problems with LED technology based on sapphire substrates.
  • the mismatch rate of sapphire and GaN lattice is as high as 17%.
  • Such a high lattice mismatch makes the LED epitaxial wafer on sapphire have a high defect density, which greatly affects the luminous efficiency of the LED chip.
  • sapphire substrates are very expensive, making nitride LEDs costly to produce.
  • GaN-based LEDs have polarity.
  • the most ideal material for manufacturing high-efficiency LED devices is GaN.
  • GaN is a close-packed hexagonal crystal structure, and its crystal plane is divided into a polar plane c-plane [(0001) plane] and a non-polar plane a-plane [(11-20) plane] and an m-plane [(1-100) plane] .
  • Currently, GaN-based LEDs are mostly constructed based on the polar faces of GaN.
  • the centroids of the Ga atom set and the N atom set do not coincide, thereby forming an electric dipole, generating a spontaneous polarization field and a piezoelectric polarization field, thereby causing a quantum bound Stark effect (Quantum-confined) Starker Effect (QCSE), which separates electrons and holes, reduces the radiation recombination efficiency of carriers, and ultimately affects the luminous efficiency of LEDs and causes instability of LED emission wavelength.
  • QSE quantum bound Stark effect
  • the technical problem to be solved by the present invention is to provide a non-polar blue LED epitaxial wafer based on a LAO substrate and a preparation method thereof, which have the advantages of low defect density, good crystal quality, good luminescence performance, and low preparation cost.
  • the technical solution adopted by the present invention to solve the above technical problem is to provide a non-polar blue LED epitaxial wafer based on a LAO substrate, comprising a substrate, wherein the substrate is a LAO substrate on the LAO substrate.
  • a buffer layer, a first undoped layer, a first doped layer, a quantum well layer, an electron blocking layer, and a second doped layer are sequentially disposed.
  • the above-mentioned LAO substrate-based non-polar blue LED epitaxial wafer wherein the buffer layer is a non-polar m-plane GaN buffer layer, and the first undoped layer is a non-polar non-doped u-GaN layer
  • the first doped layer is non- a polar n-type doped GaN thin film, the quantum well layer being a non-polar InGaN/GaN quantum well layer, the electron blocking layer being a non-polar m-plane AlGaN electron blocking layer, and the second doped layer being non- Polar p-type doped GaN film.
  • the present invention provides a method for preparing a non-polar blue LED epitaxial wafer based on a LAO substrate, which comprises the following steps: a) using a LAO substrate, selecting a crystal orientation, and performing surface cleaning on the LAO substrate. Processing; b) annealing the LAO substrate and forming an AlN seed layer on the surface of the LAO substrate; c) sequentially forming a non-polar m-plane GaN buffer layer by chemical vapor deposition of a metal organic compound on the LAO substrate, A non-polar undoped u-GaN layer, a non-polar n-type doped GaN thin film, a non-polar InGaN/GaN quantum well, a non-polar m-plane AlGaN electron blocking layer, and a non-polar p-type doped GaN thin film.
  • step b) comprises the following steps: baking the LAO substrate at a high temperature of 900 to 1200 ° C for 1 to 4 hours, and then air cooling to room temperature Then, it is insulated by N2 plasma for 30 to 80 minutes, and an AlN seed layer is formed on the surface of the LAO substrate by radio frequency plasma enhanced organometallic chemical vapor deposition.
  • the flow rate of the N plasma is 40 to 90 sccm, and plasma nitrogen is generated.
  • the RF power is 200 to 500W.
  • the above method for preparing a non-polar blue LED epitaxial wafer based on a LAO substrate, wherein the forming process of the non-polar m-plane GaN buffer layer in the step c) is as follows: reducing the temperature of the LAO substrate to 400-800 ° C
  • the TMGa and N plasma are introduced to control the reaction chamber pressure to be 400-700 torr, the N plasma flow rate is 40 to 90 sccm, the plasma nitrogen generating RF power is 200 to 700 W, and the V/III ratio is 800 to 1200.
  • the method for preparing a non-polar blue LED epitaxial wafer based on a LAO substrate, wherein the forming process of the non-polar non-doped u-GaN layer in the step c) is as follows: controlling the temperature of the LAO substrate to be 1000-1500 °C, TMGa is introduced, the pressure in the reaction chamber is controlled to 400 torr, and the V/III ratio is 180.
  • the method for preparing a non-polar blue LED epitaxial wafer based on the LAO substrate, wherein the forming process of the non-polar n-type doped GaN film in the step c) is as follows: controlling the temperature of the LAO substrate to be 1000-1300 ° C , pass TMGa and SiH4, keep the flow rate of SiH4 60-100sccm, control the reaction chamber pressure to 240torr, V/III ratio is 160, doping electron concentration is 1.0 ⁇ 10 17 ⁇ 5.3 ⁇ 10 19 cm-3;
  • Forming a barrier layer controlling the temperature of the LAO substrate to be 750-950 ° C, closing H2, introducing TEGa and ammonia gas, controlling the pressure of the reaction chamber to 200 torr, the ratio of V/III to 986, and the thickness of 10 to 15 nm;
  • a well layer is formed, the temperature of the LAO substrate is controlled to be 750 to 950 ° C, H 2 is turned off, TEGa, TMIn and ammonia gas are introduced, and the pressure in the reaction chamber is controlled to 200 torr, the ratio of V/III is 1439, and the thickness is 2 to 4 nm.
  • the above-mentioned method for preparing a non-polar blue LED epitaxial wafer based on a LAO substrate, wherein the formation process of the non-polar m-plane A1 GaN electron blocking layer in the step c) is as follows: raising the temperature of the LAO substrate to 900-1050 °C, TMGa and ammonia gas were introduced, and the pressure in the reaction chamber was controlled to 200 torr, and the V/III ratio was 986.
  • the above method for preparing a non-polar blue LED epitaxial wafer based on a LAO substrate, wherein the forming process of the non-polar p-type doped GaN film in the step c) is as follows: controlling the temperature of the LAO substrate to be 900 to 1100 ° C , pass TMGa, CP2Mg and ammonia gas, keep the flow rate of CP2Mg to 250 ⁇ 450sccm, control the reaction chamber pressure to 200torr, V/III ratio is 1000 ⁇ 1250, doping hole concentration 1.0 ⁇ 10 16 ⁇ 2.2 ⁇ 10 18 cm -3.
  • the present invention has the following beneficial effects: the LAO substrate-based non-polar blue LED epitaxial wafer and the preparation method thereof are provided by using the LAO substrate, and the buffer layer is sequentially disposed on the LAO substrate.
  • the first undoped layer, the first doped layer, the quantum well layer, the electron blocking layer and the second doped layer have the advantages of low defect density, good crystal quality, good luminescence performance, and low preparation cost.
  • FIG. 1 is a schematic structural view of a non-polar blue LED epitaxial wafer based on a LAO substrate according to the present invention
  • FIG. 2 is a schematic structural view of a device for preparing a non-polar blue LED epitaxial wafer for a LAO substrate according to the present invention
  • FIG. 3 is a schematic diagram of a preparation process of a non-polar blue LED epitaxial wafer based on a LAO substrate according to the present invention
  • FIG. 4 is an XRD test chart of a non-polar blue LED epitaxial wafer grown on a (001) surface of a LAO substrate according to the present invention
  • FIG. 5 is a PL spectrum test chart of a non-polar m-plane blue LED epitaxial wafer grown on a LAO substrate at a temperature of room temperature;
  • Figure 6 is a graph showing the EL spectrum of a non-polar m-plane blue LED epitaxial wafer grown on a LAO substrate at room temperature.
  • FIG. 1 is a schematic structural view of a non-polar blue LED epitaxial wafer based on a LAO substrate according to the present invention.
  • a non-polar blue LED epitaxial wafer based on a LAO substrate includes a substrate, wherein the substrate is a LAO substrate, and a buffer layer is disposed on the LAO substrate in turn.
  • the non-polar blue LED epitaxial wafer grown on the LAO substrate of the present invention which is also called a bismuth aluminum oxide substrate, and is composed of La, Al, O elements.
  • the molecular formula is LaAlxOy. As shown in FIG.
  • the non-polar blue LED epitaxial wafer provided by the present invention comprises a LAO substrate 10 arranged in order from bottom to top, a non-polar m-plane GaN buffer layer 11, and a non-polar non-doped u-GaN layer 12. a non-polar n-type doped GaN thin film 13, a non-polar InGaN/GaN quantum well layer 14, a non-polar m-plane AlGaN electron blocking layer 15, and a non-polar p-type doped GaN thin film 16.
  • FIG. 2 is a schematic view showing the structure of a device for preparing a non-polar blue LED epitaxial wafer for a LAO substrate according to the present invention.
  • MFC is a flow controller that controls the flow of gas to meet growing needs.
  • FIG. 3 is a schematic diagram of a preparation process of a non-polar blue LED epitaxial wafer based on a LAO substrate according to the present invention.
  • a method for preparing a non-polar blue LED epitaxial wafer grown on a LAO substrate of the present invention specifically includes the following steps:
  • Step S1 using a LAO substrate, selecting a crystal orientation, and performing surface cleaning treatment on the LAO substrate;
  • Step S2 annealing the LAO substrate, and forming an AlN seed layer on the surface of the LAO substrate;
  • Step S3 sequentially forming a non-polar m-plane GaN buffer layer, a non-polar non-doped u-GaN layer, a non-polar n-type doped GaN film, and a non-polar layer on the LAO substrate by chemical vapor deposition of a metal organic compound.
  • Annealing the substrate baking the substrate at 900-1200 ° C for 1 to 4 hours, then air cooling to room temperature, then passing through N2 plasma for 30 to 80 minutes to form AlN seed crystal on the surface of the substrate.
  • the layer provides a template for the growth of the GaN film, the flow rate of the N plasma is 40 to 90 sccm, and the radio frequency power for generating the plasma nitrogen is 200 to 500 W;
  • the non-polar m-plane GaN buffer layer is grown by radio frequency plasma (RF) enhanced organic metal chemical vapor deposition (MOCVD) under the following conditions: the substrate temperature is lowered to 400-800 ° C, and TMGa and N are introduced.
  • RF radio frequency plasma
  • MOCVD organic metal chemical vapor deposition
  • Plasma The reaction chamber pressure is 400-700 torr
  • the flow rate of the N plasma is 40-90 sccm
  • the radio frequency power for generating plasma nitrogen is 200-700 W
  • the V/III ratio is 800-1200;
  • the non-polar undoped u-GaN layer is grown by the MOCVD process under the following conditions: the substrate temperature is 1000-1500 ° C, the TMGa is introduced, the reaction chamber pressure is 400 torr, and the V/III ratio is 180;
  • the non-polar n-type doped GaN film is grown by MOCVD process under the following conditions: substrate temperature is 1000-1300 °C, TMGa and SiH4 are introduced, the flow rate of SiH4 is 60-100 sccm, and the pressure of the reaction chamber is 240 torr. , the V/III ratio is 160; the doping electron concentration is 1.0 ⁇ 10 17 to 5.3 ⁇ 10 19 cm-3;
  • the non-polar InGaN/GaN quantum well is grown by MOCVD process.
  • the process conditions are as follows: the barrier layer is formed, the substrate temperature is 750-950 ° C, H 2 is turned off, TEGa and ammonia gas are introduced, and the reaction chamber pressure is 200 torr, V.
  • the ratio of /III is 986, the thickness is 10-15 nm; the well layer is formed, the substrate temperature is 750-950 ° C, H2 is turned off, TEGa, TMIn and ammonia gas are introduced, the reaction chamber pressure is 200 torr, and the V/III ratio is 1439. Thickness is 2 to 4 nm;
  • the non-polar m-plane AlGaN electron blocking layer was grown by MOCVD process under the following conditions: the substrate temperature was raised to 900-1050 ° C, TMGa and ammonia gas were introduced, the reaction chamber pressure was 200 torr, and the V/III ratio was 986. ;
  • the non-polar p-type doped GaN film is grown by MOCVD process under the following conditions: substrate temperature is 900-1100 °C, TMGa, CP2Mg and ammonia gas are introduced, and the flow rate of CP2Mg is maintained at 250-450 sccm.
  • the pressure is 200 torr, the V/III ratio is 1000 to 1250, and the doping hole concentration is 1.0 ⁇ 10 16 -2.2 ⁇ 10 18 cm-3.
  • FIG. 4 is an XRD test chart of a non-polar blue LED epitaxial wafer grown on a (001) surface of a LAO substrate of the present invention.
  • the half-width (FWHM) value of the LED epitaxial wafer x-ray back-swing curve is obtained by the present invention, and the half-width (FWHM) value thereof is less than 0.1°, indicating that the non-polar blue LED epitaxial prepared by the present invention is epitaxial.
  • the film has very good properties both in defect density and in crystalline quality.
  • FIG. 5 is a PL spectrum test chart of a non-polar m-plane blue LED epitaxial wafer grown on a LAO substrate at a temperature of room temperature.
  • the PL spectrum test at a temperature of 293 K of the present invention gave an emission peak wavelength of 460 nm and a half width of 23 nm. This indicates that the non-polar GaN film prepared by the present invention has very good optical properties.
  • Figure 6 is a graph showing the EL spectrum of a non-polar m-plane blue LED epitaxial wafer grown on a LAO substrate at room temperature.
  • the LAO substrate-based non-polar blue LED epitaxial wafer and the preparation method thereof are provided by using a LAO substrate and sequentially providing a non-polar m-plane GaN buffer layer on the LAO substrate.
  • the invention has the advantages of simple growth process and low preparation cost, and the prepared non-polar blue LED epitaxial wafer has low defect density, good crystal quality, and good electrical and optical performance.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Led Devices (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

一种基于LAO衬底的非极性蓝光LED外延片及其制备方法,包括如下步骤:a)采用LAO衬底(10),选取晶体取向,并对LAO衬底进行表面清洁处理(S1);b)对LAO衬底进行退火处理,并在LAO衬底表面形成AlN籽晶层(S2);c)在LAO衬底上采用金属有机化合物化学气相淀积依次形成非极性m面GaN缓冲层(11)、非极性非掺杂u-GaN层(12)、非极性n型掺杂GaN薄膜(13)、非极性InGaN/GaN量子阱(14)、非极性m面AlGaN电子阻挡层(15)和非极性p型掺杂GaN薄膜(16)(S3)。该基于LAO衬底的非极性蓝光LED外延片及其制备方法,具有缺陷密度低、结晶质量好,发光性能好的优点,且制备成本低廉。

Description

基于LAO衬底的非极性蓝光LED外延片及其制备方法 技术领域
本发明涉及一种LED外延片及其制备方法,尤其涉及一种基于LAO衬底的非极性蓝光LED外延片及其制备方法。
背景技术
目前LED蓝光外延片衬底主要为蓝宝石。基于蓝宝石衬底的LED技术存在两个严峻的问题。首先,蓝宝石与GaN晶格的失配率高达17%,如此高的晶格失配使得蓝宝石上的LED外延片有很高的缺陷密度,大大影响了LED芯片的发光效率。其次,蓝宝石衬底价格十分昂贵,使得氮化物LED生产成本很高。
LED芯片的发光效率不够高的另外一个主要原因是由于目前广泛使用的GaN基LED具有极性。目前制造高效LED器件最为理想的材料是GaN。GaN为密排六方晶体结构,其晶面分为极性面c面[(0001)面]和非极性面a面[(11-20)面]及m面[(1-100)面]。目前,GaN基LED大都基于GaN的极性面构建而成。在极性面GaN上,Ga原子集合和N原子集合的质心不重合,从而形成电偶极子,产生自发极化场和压电极化场,进而引起量子束缚斯塔克效应(Quantum-confined Starker Effect,QCSE),使电子和空穴分离,载流子的辐射复合效率降低,最终影响LED的发光效率,并造成LED发光波长的不稳定。
发明内容
本发明所要解决的技术问题是提供一种基于LAO衬底的非极性蓝光LED外延片及其制备方法,具有缺陷密度低、结晶质量好,发光性能好的优点,且制备成本低廉。
本发明为解决上述技术问题而采用的技术方案是提供一种基于LAO衬底的非极性蓝光LED外延片,包括衬底,其中,所述衬底为LAO衬底,所述LAO衬底上依次设置有缓冲层、第一非掺杂层、第一掺杂层、量子阱层、电子阻挡层和第二掺杂层。
上述的基于LAO衬底的非极性蓝光LED外延片,其中,所述缓冲层为非极性m面GaN缓冲层,所述第一非掺杂层为非极性非掺杂u-GaN层,所述第一掺杂层为非 极性n型掺杂GaN薄膜,所述量子阱层为非极性InGaN/GaN量子阱层,所述电子阻挡层为非极性m面AlGaN电子阻挡层,所述第二掺杂层为非极性p型掺杂GaN薄膜。
本发明为解决上述技术问题海提供一种基于LAO衬底的非极性蓝光LED外延片的制备方法,包括如下步骤:a)采用LAO衬底,选取晶体取向,并对LAO衬底进行表面清洁处理;b)对LAO衬底进行退火处理,并在LAO衬底表面形成AlN籽晶层;c)在LAO衬底上采用金属有机化合物化学气相淀积依次形成非极性m面GaN缓冲层、非极性非掺杂u-GaN层、非极性n型掺杂GaN薄膜、非极性InGaN/GaN量子阱、非极性m面AlGaN电子阻挡层和非极性p型掺杂GaN薄膜。
上述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其中,所述步骤b)包括如下过程:将LAO衬底在900~1200℃下高温烘烤1~4小时后空冷至室温,然后通入N2等离子体保温30~80分钟,在LAO衬底表面采用射频等离子体增强有机金属化学气相淀积形成AlN籽晶层,N等离子体的流量为40~90sccm,产生等离子体氮的射频功率为200~500W。
上述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其中,所述步骤c)中非极性m面GaN缓冲层的形成过程如下:将LAO衬底温度降为400~800℃,通入TMGa与N等离子体,控制反应室压力为400~700torr、N等离子体的流量为40~90sccm,产生等离子体氮的射频功率为200~700W,V/III比为800~1200。
上述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其中,所述步骤c)中非极性非掺杂u-GaN层的形成过程如下:控制LAO衬底温度为1000~1500℃,通入TMGa,控制反应室压力为400torr,V/III比为180。
上述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其中,所述步骤c)中非极性n型掺杂GaN薄膜的形成过程如下:控制LAO衬底温度为1000~1300℃,通入TMGa和SiH4,保持SiH4的流量为60~100sccm,控制反应室压力为240torr,V/III比为160,掺杂电子浓度为1.0×1017~5.3×1019cm-3;
上述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其中,所述步骤c)中非极性InGaN/GaN量子阱的形成过程如下:
形成垒层:控制LAO衬底温度为750~950℃,关闭H2,通入TEGa与氨气,控制反应室压力为200torr,V/III比为986,厚度为10~15nm;
形成阱层,控制LAO衬底温度为750~950℃,关闭H2,通入TEGa、TMIn与氨气,控制反应室压力为200torr,V/III比为1439,厚度为2~4nm。
上述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其中,所述步骤c)中非极性m面A1GaN电子阻挡层的形成过程如下:将LAO衬底温度升至900~1050℃,通入TMGa与氨气,控制反应室压力为200torr,V/III比为986。
上述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其中,所述步骤c)中非极性p型掺杂GaN薄膜的形成过程如下:控制LAO衬底温度为900~1100℃,通入TMGa、CP2Mg与氨气,保持CP2Mg的流量为250~450sccm,控制反应室压力为200torr,V/III比为1000~1250,掺杂空穴浓度1.0×1016~2.2×1018cm-3。
本发明对比现有技术有如下的有益效果:本发明提供的基于LAO衬底的非极性蓝光LED外延片及其制备方法,通过采用LAO衬底,并在LAO衬底上依次设置缓冲层、第一非掺杂层、第一掺杂层、量子阱层、电子阻挡层和第二掺杂层,具有缺陷密度低、结晶质量好,发光性能好的优点,且制备成本低廉。
附图说明
图1为本发明基于LAO衬底的非极性蓝光LED外延片结构示意图;
图2为本发明的用于LAO衬底的非极性蓝光LED外延片的制备装置结构示意图;
图3为本发明基于LAO衬底的非极性蓝光LED外延片制备流程示意图;
图4为本发明生长在LAO衬底(001)面上的非极性蓝光LED外延片的XRD测试图;
图5为本发明生长在LAO衬底上的非极性m面蓝光LED外延片的在温度为室温下PL谱测试图;
图6为本发明生长在LAO衬底上的非极性m面蓝光LED外延片的在温度为室温下EL谱测试图。
具体实施方式
下面结合附图和实施例对本发明作进一步的描述。
图1为本发明基于LAO衬底的非极性蓝光LED外延片结构示意图。
请参见图1,本发明提供的基于LAO衬底的非极性蓝光LED外延片,包括衬底,其中,所述衬底为LAO衬底,所述LAO衬底上依次设置有缓冲层、第一非掺杂层、第一掺杂层、量子阱层、电子阻挡层和第二掺杂层。本发明的生长在LAO衬底上的非极性蓝光LED外延片,所述LAO衬底又称镧铝氧化物衬底,由La,Al,O元素组成, 分子式为LaAlxOy。如图1所示,本发明提供的非极性蓝光LED外延片包括由下至上依次排列的LAO衬底10、非极性m面GaN缓冲层11、非极性非掺杂u-GaN层12、非极性n型掺杂GaN薄膜13、非极性InGaN/GaN量子阱层14、非极性m面AlGaN电子阻挡层15、非极性p型掺杂GaN薄膜16。
图2为本发明的用于LAO衬底的非极性蓝光LED外延片的制备装置结构示意图。
请继续参见图2,20、21分别为NH3和SiH4,其作用是提供N和Si;22是H2,其作用是作为载气,输送Cp2Mg、TMGa、TMIn;23、24、25分别是Cp2Mg、TMGa、TMIn,其作用是提供LED生长所需的Mg、Ga、In;26是机械手,用于输送衬底和样品;27是射频感应加热器,用来对衬底加热及控温;28是石墨盘,用于承载LAO衬底;29是反应腔,各种反应气体发生化学反应生成LED的腔体;30是喷头,反应气体充分混合后均匀喷射到衬底表面的装置;31是射频等离子源装置,用于提供活性N;32-40是阀门,用于控制各种管道的气体的输送状态。MFC是流量控制器,用于控制气体的流量,从而满足生长的需求。
图3为本发明基于LAO衬底的非极性蓝光LED外延片制备流程示意图。
请继续参见图3,本发明的生长在LAO衬底上的非极性蓝光LED外延片的制备方法,具体包括以下步骤:
步骤S1:采用LAO衬底,选取晶体取向,并对LAO衬底进行表面清洁处理;
步骤S2:对LAO衬底进行退火处理,并在LAO衬底表面形成AlN籽晶层;
步骤S3:在LAO衬底上采用金属有机化合物化学气相淀积依次形成非极性m面GaN缓冲层、非极性非掺杂u-GaN层、非极性n型掺杂GaN薄膜、非极性InGaN/GaN量子阱、非极性m面AlGaN电子阻挡层和非极性p型掺杂GaN薄膜。
下面给出一个具体实施例,制作步骤及工艺条件如下:
(1)采用LAO衬底,选取晶体取向;
(2)对衬底进行表面清洁处理;
(3)对衬底进行退火处理:将衬底在900-1200℃下高温烘烤1~4h后空冷至室温,然后通入N2等离子体保温30~80分钟,在衬底表面形成AlN籽晶层,为GaN薄膜的生长提供模板,N等离子体的流量为40~90sccm,产生等离子体氮的射频功率为200~500W;
(4)采用射频等离子体(RF)增强有机金属化学气相淀积(MOCVD)生长非极性m面GaN缓冲层,工艺条件为:将衬底温度降为400~800℃,通入TMGa与N等离子 体,反应室压力为400~700torr、N等离子体的流量为40~90sccm,产生等离子体氮的射频功率为200~700W,V/III比为800~1200;
(5)采用MOCVD工艺生长非极性非掺杂u-GaN层,工艺条件为:衬底温度为1000~1500℃,通入TMGa,反应室压力为400torr,V/III比为180;
(6)采用MOCVD工艺生长非极性n型掺杂GaN薄膜,工艺条件为:衬底温度为1000~1300℃,通入TMGa和SiH4,保持SiH4的流量为60~100sccm,反应室压力为240torr,V/III比为160;掺杂电子浓度1.0×1017~5.3×1019cm-3;
(7)采用MOCVD工艺生长非极性InGaN/GaN量子阱,工艺条件为:形成垒层,衬底温度为750~950℃,关闭H2,通入TEGa与氨气,反应室压力为200torr,V/III比为986,厚度为10~15nm;形成阱层,衬底温度为750~950℃,关闭H2,通入TEGa、TMIn与氨气,反应室压力为200torr,V/III比为1439,厚度为2~4nm;
(8)采用MOCVD工艺生长非极性m面AlGaN电子阻挡层,工艺条件为:衬底温度升至900~1050℃,通入TMGa与氨气,反应室压力为200torr,V/III比为986;
(9)采用MOCVD工艺生长非极性p型掺杂GaN薄膜,工艺条件为:衬底温度为900~1100℃,通入TMGa、CP2Mg与氨气,保持CP2Mg的流量为250~450sccm,反应室压力为200torr,V/III比为1000~1250;掺杂空穴浓度1.0×1016-2.2×1018cm-3。
图4为本发明生长在LAO衬底(001)面上的非极性蓝光LED外延片的XRD测试图。
由图4可见,本发明测试得到LED外延片×射线回摆曲线的半峰宽(FWHM)值,其半峰宽(FWHM)值低于0.1°,表明本发明制备的非极性蓝光LED外延片无论是在缺陷密度还是在结晶质量,都具有非常好的性能。
图5为本发明生长在LAO衬底上的非极性m面蓝光LED外延片的在温度为室温下PL谱测试图。
由图5可见,本发明温度为293K下PL谱测试得到发光峰波长为460nm,半峰宽为23nm。这表明本发明制备的非极性GaN薄膜在光学性质上具有非常好的性能。
图6为本发明生长在LAO衬底上的非极性m面蓝光LED外延片的在温度为室温下EL谱测试图。
由图6可见,温度为293K下EL谱测试得到发光峰波长为461nm,半峰宽为22nm,输出功率为7.8mw@20mA。表明本发明制备的非极性GaN薄膜在电学性质上具有非常 好的性能。
综上所述,本发明提供的基于LAO衬底的非极性蓝光LED外延片及其制备方法,通过采用LAO衬底,并在LAO衬底上依次设置非极性m面GaN缓冲层、非极性非掺杂GaN层、非极性n型掺杂GaN薄膜、非极性InGaN/GaN量子阱层、非极性m面AlGaN电子阻挡层和非极性p型掺杂GaN薄膜。与现有技术相比,本发明具有生长工艺简单,制备成本低廉的优点,且制备的非极性蓝光LED外延片缺陷密度低、结晶质量好,电学、光学性能好。
虽然本发明已以较佳实施例揭示如上,然其并非用以限定本发明,任何本领域技术人员,在不脱离本发明的精神和范围内,当可作些许的修改和完善,因此本发明的保护范围当以权利要求书所界定的为准。

Claims (10)

  1. 一种基于LAO衬底的非极性蓝光LED外延片,包括衬底,其特征在于,所述衬底为LAO衬底,所述LAO衬底上依次设置有缓冲层、第一非掺杂层、第一掺杂层、量子阱层、电子阻挡层和第二掺杂层。
  2. 如权利要求1所述的基于LAO衬底的非极性蓝光LED外延片,其特征在于,所述缓冲层为非极性m面GaN缓冲层,所述第一非掺杂层为非极性非掺杂u-GaN层,所述第一掺杂层为非极性n型掺杂GaN薄膜,所述量子阱层为非极性InGaN/GaN量子阱层,所述电子阻挡层为非极性m面AlGaN电子阻挡层,所述第二掺杂层为非极性p型掺杂GaN薄膜。
  3. 一种如权利要求2所述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其特征在于,包括如下步骤:
    a)采用LAO衬底,选取晶体取向,并对LAO衬底进行表面清洁处理;
    b)对LAO衬底进行退火处理,并在LAO衬底表面形成AlN籽晶层;
    c)在LAO衬底上采用金属有机化合物化学气相淀积依次形成非极性m面GaN缓冲层、非极性非掺杂u-GaN层、非极性n型掺杂GaN薄膜、非极性InGaN/GaN量子阱、非极性m面AlGaN电子阻挡层和非极性p型掺杂GaN薄膜。
  4. 如权利要求3所述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其特征在于,所述步骤b)包括如下过程:
    将LAO衬底在900~1200℃下高温烘烤1~4小时后空冷至室温,然后通入N2等离子体保温30~80分钟,在LAO衬底表面采用射频等离子体增强有机金属化学气相淀积形成AlN籽晶层,N等离子体的流量为40~90sccm,产生等离子体氮的射频功率为200~500W。
  5. 如权利要求3所述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其特征在于,所述步骤c)中非极性m面GaN缓冲层的形成过程如下:将LAO衬底温度降为400~800℃,通入TMGa与N等离子体,控制反应室压力为400~700torr、N等离子体的流量为40~90sccm,产生等离子体氮的射频功率为200~700W,V/III比为800~1200。
  6. 如权利要求3所述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其特征在于,所述步骤c)中非极性非掺杂u-GaN层的形成过程如下:控制LAO衬底 温度为1000~1500℃,通入TMGa,控制反应室压力为400torr,V/III比为180。
  7. 如权利要求3所述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其特征在于,所述步骤c)中非极性n型掺杂GaN薄膜的形成过程如下:控制LAO衬底温度为1000~1300℃,通入TMGa和SiH4,保持SiH4的流量为60~100sccm,控制反应室压力为240torr,V/III比为160,掺杂电子浓度为1.0×1017~5.3×1019cm-3;
  8. 如权利要求3所述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其特征在于,所述步骤c)中非极性InGaN/GaN量子阱的形成过程如下:
    形成垒层:控制LAO衬底温度为750~950℃,关闭H2,通入TEGa与氨气,控制反应室压力为200torr,V/III比为986,厚度为10~15nm;
    形成阱层,控制LAO衬底温度为750~950℃,关闭H2,通入TEGa、TMIn与氨气,控制反应室压力为200torr,V/III比为1439,厚度为2~4nm。
  9. 如权利要求3所述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其特征在于,所述步骤c)中非极性m面AlGaN电子阻挡层的形成过程如下:将LAO衬底温度升至900~1050℃,通入TMGa与氨气,控制反应室压力为200torr,V/III比为986。
  10. 如权利要求3所述的基于LAO衬底的非极性蓝光LED外延片的制备方法,其特征在于,所述步骤c)中非极性p型掺杂GaN薄膜的形成过程如下:控制LAO衬底温度为900~1100℃,通入TMGa、CP2Mg与氨气,保持CP2Mg的流量为250~450sccm,控制反应室压力为200torr,V/III比为1000~1250,掺杂空穴浓度1.0×1016~2.2×1018cm-3。
PCT/CN2015/074828 2014-03-24 2015-03-23 基于lao衬底的非极性蓝光led外延片及其制备方法 WO2015144023A1 (zh)

Priority Applications (7)

Application Number Priority Date Filing Date Title
CA2942999A CA2942999C (en) 2014-03-24 2015-03-23 Non-polar blue led epitaxial wafer based on lao substrate and preparation method thereof
JP2016574326A JP6326154B2 (ja) 2014-03-24 2015-03-23 LaAlxOy基板に基づく非極性青色LEDエピタキシャルウェハの製造方法
RU2016138668A RU2643176C1 (ru) 2014-03-24 2015-03-23 Неполярная светодиодная эпитаксиальная пластина синего свечения на подложке из lao и способ ее получения
PL15769396T PL3107128T3 (pl) 2014-03-24 2015-03-23 Sposób wytwarzania niepolarnej płytki epitaksjalnej niebieskiej led bazującej na podłożu lao
US15/128,639 US9978908B2 (en) 2014-03-24 2015-03-23 Non-polar blue light LED epitaxial wafer based on LAO substrate and preparation method thereof
KR1020167026454A KR20160130411A (ko) 2014-03-24 2015-03-23 Lao 기판에 기반한 무극성 블루 led 에피 웨이퍼 및 그 제조 방법
EP15769396.1A EP3107128B1 (en) 2014-03-24 2015-03-23 Preparation method of a non-polar blue led epitaxial wafer based on lao substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410112151.6 2014-03-24
CN201410112151.6A CN104600162B (zh) 2014-03-24 2014-03-24 基于lao衬底的非极性蓝光led外延片的制备方法

Publications (1)

Publication Number Publication Date
WO2015144023A1 true WO2015144023A1 (zh) 2015-10-01

Family

ID=53125803

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/074828 WO2015144023A1 (zh) 2014-03-24 2015-03-23 基于lao衬底的非极性蓝光led外延片及其制备方法

Country Status (9)

Country Link
US (1) US9978908B2 (zh)
EP (1) EP3107128B1 (zh)
JP (1) JP6326154B2 (zh)
KR (1) KR20160130411A (zh)
CN (1) CN104600162B (zh)
CA (1) CA2942999C (zh)
PL (1) PL3107128T3 (zh)
RU (1) RU2643176C1 (zh)
WO (1) WO2015144023A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9978908B2 (en) 2014-03-24 2018-05-22 Shanghai Chiptek Semiconductor Technology Co., Ltd. Non-polar blue light LED epitaxial wafer based on LAO substrate and preparation method thereof

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106299041A (zh) * 2016-08-29 2017-01-04 华南理工大学 生长在r面蓝宝石衬底上的非极性LED外延片的制备方法及应用
CN107170862B (zh) * 2017-06-08 2019-03-22 中国科学院半导体研究所 一种非极性面量子点发光二极管及其制备方法
CN107887301B (zh) * 2017-09-27 2020-07-07 华灿光电(浙江)有限公司 一种发光二极管外延片的制造方法
CN108538972A (zh) * 2018-04-28 2018-09-14 华南理工大学 一种图形化Si衬底上非极性紫外LED及其制备与应用
CN111276583A (zh) * 2020-02-12 2020-06-12 广东省半导体产业技术研究院 一种GaN基LED外延结构及其制备方法、发光二极管
CN113571607B (zh) * 2021-06-01 2022-08-12 华灿光电(浙江)有限公司 高发光效率的发光二极管外延片及其制造方法
CN114875492B (zh) * 2022-04-18 2023-08-22 华南理工大学 生长在LaAlO3衬底上的非极性p型GaN薄膜外延结构及其制备方法
CN116936700B (zh) * 2023-09-15 2023-12-22 江西兆驰半导体有限公司 发光二极管外延片及其制备方法、发光二极管
CN117525232B (zh) * 2024-01-03 2024-03-29 江西兆驰半导体有限公司 发光二极管外延片及其制备方法、发光二极管

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1761080A (zh) * 2005-10-13 2006-04-19 南京大学 一种m面InGaN/GaN量子阱LED器件结构的生长方法
CN1881625A (zh) * 2005-06-15 2006-12-20 上海蓝光科技有限公司 Mocvd生长氮化物发光二极管结构外延片的方法
CN101901761A (zh) * 2010-06-24 2010-12-01 西安电子科技大学 基于γ面LiAlO2衬底上非极性m面GaN的MOCVD生长方法
US20120171797A1 (en) * 2010-12-08 2012-07-05 Applied Materials, Inc. Seasoning of deposition chamber for dopant profile control in led film stacks
CN103311100A (zh) * 2013-06-14 2013-09-18 西安电子科技大学 含有非极性m面GaN缓冲层的InN半导体器件的制备方法
CN203850326U (zh) * 2014-03-24 2014-09-24 上海卓霖信息科技有限公司 基于lao衬底的非极性蓝光led外延片

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07201745A (ja) * 1993-12-28 1995-08-04 Hitachi Cable Ltd 半導体ウェハ及びその製造方法
JP2002029896A (ja) 2000-07-05 2002-01-29 National Institute Of Advanced Industrial & Technology 窒化物半導体の結晶成長方法
US7112860B2 (en) * 2003-03-03 2006-09-26 Cree, Inc. Integrated nitride-based acoustic wave devices and methods of fabricating integrated nitride-based acoustic wave devices
JP2005223165A (ja) * 2004-02-06 2005-08-18 Sanyo Electric Co Ltd 窒化物系発光素子
US7285799B2 (en) * 2004-04-21 2007-10-23 Philip Lumileds Lighting Company, Llc Semiconductor light emitting devices including in-plane light emitting layers
TWI377602B (en) * 2005-05-31 2012-11-21 Japan Science & Tech Agency Growth of planar non-polar {1-100} m-plane gallium nitride with metalorganic chemical vapor deposition (mocvd)
JP4765751B2 (ja) * 2006-04-26 2011-09-07 三菱化学株式会社 窒化物半導体素子の製造方法
JP4770580B2 (ja) * 2006-05-15 2011-09-14 三菱化学株式会社 窒化物半導体素子の製造方法
TWM314427U (en) * 2006-08-29 2007-06-21 Sfi Electronics Technology Inc LED assembly with having ESD protection capacity
JP2010512661A (ja) * 2006-12-11 2010-04-22 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア 高特性無極性iii族窒化物光デバイスの有機金属化学気相成長法(mocvd)による成長
JP4962130B2 (ja) 2007-04-04 2012-06-27 三菱化学株式会社 GaN系半導体発光ダイオードの製造方法
JP2009016467A (ja) * 2007-07-03 2009-01-22 Sony Corp 窒化ガリウム系半導体素子及びこれを用いた光学装置並びにこれを用いた画像表示装置
JP2009283785A (ja) 2008-05-23 2009-12-03 Showa Denko Kk Iii族窒化物半導体積層構造体およびその製造方法
US8435816B2 (en) 2008-08-22 2013-05-07 Lattice Power (Jiangxi) Corporation Method for fabricating InGaAlN light emitting device on a combined substrate
TWI425559B (zh) 2009-09-17 2014-02-01 Univ Nat Chiao Tung 以單晶氧化物作為基板成長纖鋅礦結構半導體非極性m面磊晶層之方法
TWI433231B (zh) * 2010-12-02 2014-04-01 Epistar Corp 一種半導體元件的製作方法
JP5558454B2 (ja) 2011-11-25 2014-07-23 シャープ株式会社 窒化物半導体発光素子および窒化物半導体発光素子の製造方法
JP5468709B2 (ja) 2012-03-05 2014-04-09 パナソニック株式会社 窒化物半導体発光素子、光源及びその製造方法
TW201337050A (zh) * 2012-03-14 2013-09-16 Univ Nat Chiao Tung 纖鋅礦結構材料之非極性晶面
CN203085627U (zh) * 2012-12-11 2013-07-24 华南理工大学 生长在LiGaO2衬底上的非极性蓝光LED外延片
CN103268911B (zh) * 2013-04-22 2016-05-18 浙江大学 p-NiO/n-ZnO异质结发光器件及其制备方法
CN103296159B (zh) * 2013-05-31 2015-09-16 华南理工大学 生长在铝酸锶钽镧衬底上的InGaN/GaN多量子阱及制备方法
CN203760505U (zh) * 2014-03-24 2014-08-06 上海卓霖信息科技有限公司 用于lao衬底的非极性蓝光led外延片的制备装置
CN104600162B (zh) 2014-03-24 2016-01-27 上海卓霖半导体科技有限公司 基于lao衬底的非极性蓝光led外延片的制备方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1881625A (zh) * 2005-06-15 2006-12-20 上海蓝光科技有限公司 Mocvd生长氮化物发光二极管结构外延片的方法
CN1761080A (zh) * 2005-10-13 2006-04-19 南京大学 一种m面InGaN/GaN量子阱LED器件结构的生长方法
CN101901761A (zh) * 2010-06-24 2010-12-01 西安电子科技大学 基于γ面LiAlO2衬底上非极性m面GaN的MOCVD生长方法
US20120171797A1 (en) * 2010-12-08 2012-07-05 Applied Materials, Inc. Seasoning of deposition chamber for dopant profile control in led film stacks
CN103311100A (zh) * 2013-06-14 2013-09-18 西安电子科技大学 含有非极性m面GaN缓冲层的InN半导体器件的制备方法
CN203850326U (zh) * 2014-03-24 2014-09-24 上海卓霖信息科技有限公司 基于lao衬底的非极性蓝光led外延片

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9978908B2 (en) 2014-03-24 2018-05-22 Shanghai Chiptek Semiconductor Technology Co., Ltd. Non-polar blue light LED epitaxial wafer based on LAO substrate and preparation method thereof

Also Published As

Publication number Publication date
CA2942999C (en) 2019-01-15
JP6326154B2 (ja) 2018-05-16
EP3107128B1 (en) 2018-04-18
US9978908B2 (en) 2018-05-22
CN104600162A (zh) 2015-05-06
PL3107128T3 (pl) 2018-09-28
KR20160130411A (ko) 2016-11-11
CA2942999A1 (en) 2015-10-01
CN104600162B (zh) 2016-01-27
US20170110627A1 (en) 2017-04-20
JP2017513236A (ja) 2017-05-25
RU2643176C1 (ru) 2018-01-31
EP3107128A4 (en) 2016-12-21
EP3107128A1 (en) 2016-12-21

Similar Documents

Publication Publication Date Title
WO2015144023A1 (zh) 基于lao衬底的非极性蓝光led外延片及其制备方法
CN102881788A (zh) 一种改善GaN基LED量子阱结构提高载子复合效率的外延生长方法
CN109119515A (zh) 一种发光二极管外延片及其制造方法
CN108878609B (zh) Led的aln缓冲层及其外延生长方法
CN103779465B (zh) Led多量子阱结构装置及生长方法
CN109411573B (zh) 一种led外延结构生长方法
CN112331752A (zh) 一种具有低电阻率p型层的深紫外led外延制造方法
CN101901757A (zh) 基于a面6H-SiC衬底上非极性a面GaN的MOCVD生长方法
CN113410353B (zh) 发光二极管外延片及其制备方法
JP4940928B2 (ja) 窒化物半導体の製造方法
CN115084329B (zh) 一种应用于Si衬底上的LED外延片及其生长方法
JP2003332234A (ja) 窒化層を有するサファイア基板およびその製造方法
CN116978992A (zh) 发光二极管及其制备方法
WO2017028555A1 (zh) 基于Si衬底的GaN基材料及其制作方法
JPH09295890A (ja) 半導体製造装置および半導体製造方法
CN203850326U (zh) 基于lao衬底的非极性蓝光led外延片
CN203760505U (zh) 用于lao衬底的非极性蓝光led外延片的制备装置
CN113113515B (zh) 发光二极管外延片的生长方法
JP2007103955A (ja) 窒化物半導体素子および窒化物半導体結晶層の成長方法
JP2005210091A (ja) Iii族窒化物半導体素子およびそれを用いた発光素子
CN112736168A (zh) 非极性GaN基微型发光二极管及制备方法
KR100956200B1 (ko) 질화물 반도체 발광소자의 제조 방법
JP4556034B2 (ja) Iii族窒化物半導体の作製方法
KR101006701B1 (ko) 금속실리사이드 시드층에 의한 단결정 박막 및 그 제조방법
JP2005045153A (ja) 窒化物半導体の製造方法及び半導体ウエハ並びに半導体デバイス

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15769396

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2016574326

Country of ref document: JP

Kind code of ref document: A

REEP Request for entry into the european phase

Ref document number: 2015769396

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2015769396

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 2942999

Country of ref document: CA

ENP Entry into the national phase

Ref document number: 20167026454

Country of ref document: KR

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 15128639

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2016138668

Country of ref document: RU

Kind code of ref document: A