WO2015085722A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2015085722A1
WO2015085722A1 PCT/CN2014/078533 CN2014078533W WO2015085722A1 WO 2015085722 A1 WO2015085722 A1 WO 2015085722A1 CN 2014078533 W CN2014078533 W CN 2014078533W WO 2015085722 A1 WO2015085722 A1 WO 2015085722A1
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WIPO (PCT)
Prior art keywords
layer
display panel
thin film
film transistor
conductive layer
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PCT/CN2014/078533
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English (en)
French (fr)
Inventor
齐永莲
舒适
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京东方科技集团股份有限公司
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Priority to US14/429,372 priority Critical patent/US9825256B2/en
Publication of WO2015085722A1 publication Critical patent/WO2015085722A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K50/865—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. light-blocking layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices

Definitions

  • the present invention belongs to the field of display technologies, and in particular, to a display panel and a display device including the same. Background technique
  • flat panel display devices have replaced bulky CRT display devices as current mainstream display devices.
  • LCD Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • the 0LED is a light-emitting device using an organic solid-state semiconductor as a light-emitting material
  • the 0LED display device is a display device that realizes image display using 0LED.
  • the white OLED (W0LED) technology is the most mature, its stability and preparation process are simple, so it has been widely used in display devices.
  • a W0LED display device includes an array substrate and a color filter substrate.
  • the array substrate includes a plurality of thin film transistors arranged in an array.
  • the thin film transistor is a control component that determines whether light can pass.
  • the color film layer is the key to colorization of the WOLED display device. component.
  • the color film substrate and the array substrate are generally fabricated separately, and then the color film substrate and the array substrate are packaged.
  • the precision of the alignment pressure box of the array substrate and the color film substrate is very high.
  • the WOLED display device a structure of a display panel in which a color filter layer is disposed on an array substrate (COA) to realize color display has appeared. That is, the thin film transistor array and the color film layer are prepared on the same substrate, and the color film layer is disposed over the thin film transistor array.
  • COA array substrate
  • 1 is an example of a WOLED display device in which a COA structure is formed on a substrate by a patterning process, and a flat protective layer is coated thereon after the color film layer is prepared. The WOLED device (including the anode, the luminescent layer, and the cathode) is then formed.
  • a patterning process including coating
  • a passivation layer 3 (Passivation, abbreviated as PVX)
  • a resin layer 1Q Resin
  • a metal anode 11 connected to the drain electrode 25 of the thin film transistor is formed over the resin layer 10
  • a pixel defining layer 7 PDL
  • a light emitting layer 6 emitting Layer
  • EL pixel defining layer 7
  • a metal cathode 12 is sputtered and packaged to form a WOLED display device.
  • the resin layer 10 is advantageous for increasing the aperture ratio of the display panel, so that the effective pixel area is increased; at the same time, the logic power consumption is also reduced, the power consumption of the product is greatly reduced, and the performance of the product is improved.
  • the manufacture of a separate color film substrate can be omitted, and the precision of the alignment pressure box of the color film substrate and the array substrate is not required; and the display panel has good stability.
  • the large size of the OLED display device can be achieved well, and thus it is a full color implementation method of the currently used W0LED display device.
  • Such a display panel has a complicated structure, a large number of preparation processes, and requires high-precision matching of a thin film transistor array and a color film layer, so that it is difficult to obtain a high product yield; and, in ITO (Indium Tin Oxide, oxidation) Indium tin)
  • IT0 is deposited on the upper layer of the color film layer. Due to the large thickness of the color film layer, the step difference is large, and the thickness of the IT0 is small, so it is difficult to deposit and the IT0 disconnection is easy to occur. This not only causes the cost of the W0LED display device of this structure to be high, but also further reduces the yield of the product.
  • SUMMARY OF THE INVENTION A display panel and a display device including the same are provided. The display panel has a simpler structure, simplifies the process, and reduces the cost.
  • a display panel includes a substrate, the substrate is divided into a plurality of sub-pixel regions, and the sub-pixel region includes a thin film transistor and is disposed on the thin film transistor
  • the OLED device is characterized in that a pixel defining layer and a conductive layer are disposed under the OLED device, and the pixel defining layer is used to define the sub-pixel region.
  • a light transmitting region and an opaque region wherein an upper surface of the conductive layer is in the same plane as an upper surface of the pixel defining layer, and the conductive layer is electrically connected to a drain of the thin film transistor.
  • the conductive layer has a light transmittance of 95% or more, and the conductive layer has a sheet resistance ranging from 45 to 90 Q / S q .
  • the conductive layer is formed of a conductive resin
  • the conductive resin includes a resin and conductive particles, a photoinitiator, a monomer, a dispersant, and a surfactant uniformly distributed in the resin, the conductive particles.
  • a surfactant uniformly distributed in the resin, the conductive particles.
  • the pixel defining layer is formed by a patterning process
  • the conductive layer is formed by an inkjet method using the pixel defining layer as a barrier.
  • a color film layer is disposed under the thin film transistor, below the conductive layer and the pixel defining layer, and the color film layer corresponds to the thin film transistor
  • a first via is formed in a region of the drain, and the conductive layer is electrically connected to a drain of the thin film transistor through the first via.
  • a passivation layer is disposed above the thin film transistor and below the color film layer, and a region of the passivation layer corresponding to a drain of the thin film transistor a second via hole is formed, the second via hole and the first via hole are overlapped in a hole axis direction, and the conductive layer passes through the first via hole and the second via hole and the thin film transistor The drain is electrically connected.
  • a black matrix is further disposed above the passivation layer and below the color film layer, and the black matrix at least partially overlaps with a source and a drain of the thin film transistor in a right projection direction. .
  • the conductive layer functions as one electrode of the organic light emitting diode device, and the organic light emitting diode device further includes a light emitting layer formed over the conductive layer and formed in Another electrode above the luminescent layer.
  • the passivation layer, the black matrix, and the color film layer are patterned Process formation.
  • a display device includes a display panel and a driving circuit electrically connected to the display panel, wherein the display panel uses the above display panel.
  • the present invention provides a display panel and a display device including the same.
  • the conductive layer ⁇ in the display panel is formed by an inkjet method, and a pixel defining layer is formed over the TFT by exposure and development, and a conductive layer is formed by an inkjet method in a region defined by the pixel defining layer.
  • the pixel defining layer is used as a retaining wall for forming a conductive layer by an ink jet method in addition to a light transmitting region and an opaque region for defining each sub-pixel region.
  • the conductive layer functions as a flat layer in addition to I T0 as the anode of the W0LED device.
  • the structure of the display panel is simpler, which reduces the steps of forming a flat layer and separately forming a retaining wall in the display panel in the prior art, and also avoids the necessity of forming an anode by using I T0.
  • the sputtering process simplifies the process and reduces costs.
  • FIG. 1 is a cross-sectional view of a display panel in the prior art
  • FIG. 2 is a cross-sectional view of a display panel according to Embodiment 1 of the present invention.
  • 3A-3G are schematic views showing a forming process of the display panel of FIG. 2;
  • 3A is a cross-sectional view showing a thin film transistor formed over a substrate
  • FIG. 3B is a cross-sectional view of a pattern including a passivation layer formed over a thin film transistor
  • FIG. 3C is a cross-sectional view of a pattern including a black matrix formed over a passivation layer
  • FIG. 3D is a cross-sectional view of a pattern including a color film layer formed over a black matrix.
  • Figure 3E is a cross-sectional view showing a pattern including a pixel defining layer over a color film layer
  • Figure 3F is a cross-sectional view showing the formation of a conductive layer in a region defined by the pixel defining layer of Figure 3E by an ink jet method;
  • 3G is a cross-sectional view of a light-emitting layer and a cathode in which a WOLED device is sequentially formed over a pixel defining layer and a conductive layer.
  • a display panel includes a substrate, the substrate is divided into a plurality of sub-pixel regions, the sub-pixel region thin film transistor and an organic light emitting diode device disposed above the thin film transistor, wherein a pixel defining layer and a conductive layer are disposed under the OLED device, and the pixel defining layer is configured to define a light transmitting region and an opaque region of the sub-pixel region, where The upper surface of the conductive layer is in the same plane as the upper surface of the pixel defining layer, and the conductive layer is electrically connected to the drain of the thin film transistor and serves as an electrode of the organic light emitting diode device.
  • a display device includes a display panel and a driving circuit electrically connected to the display panel, wherein the display panel uses the above-described display panel.
  • Example 1
  • the display device provided in this embodiment is a WOLED display device.
  • the 0 LED device can be divided into a bottom emission type and a top emission type according to the light extraction direction.
  • the light extraction end of the W0LED device is the bottom end, that is, the W0LED device in the display device is a bottom emission type.
  • the display panel of the WOLED display device includes an array substrate and a color film layer formed on the array substrate, that is, the color film layer is disposed above the array substrate on which the thin film transistor has been formed.
  • the display panel includes a substrate 1 and a thin film transistor disposed on the substrate, and a passivation layer 3, a black matrix 4, a color filter layer 5, and a WOLED device are sequentially disposed above the thin film transistor.
  • the thin film transistor mainly includes a gate electrode 21, a gate insulating layer 22, an active layer 23, and a source electrode 24 and a drain electrode 25 disposed in the same layer.
  • the WOLED device includes at least an anode 8, a light-emitting layer 6, and a cathode 12, and may further include an auxiliary functional layer such as a hole injection layer, a hole transport layer, an electron blocking layer, or a hole and an exciton blocking layer. a light-transmitting region and an opaque region of the region molecular pixel region, and pixels are disposed under the light-emitting layer 6 of the WOLED device As shown in FIG.
  • the substrate 1 is divided into a plurality of sub-pixel regions, and the sub-pixel region includes a thin film transistor and a WOLED device disposed above the thin film transistor, and above the thin film transistor, under the WOLED device is disposed a pixel defining layer 7 and a conductive layer 8, the pixel defining layer 7 defining the sub-pixel region as a light transmitting region and an opaque region, wherein the thin film transistor and the pixel defining layer 7 are disposed in the opaque region, and are electrically conductive
  • the layer 8 is disposed in the opaque region, and the upper surface of the conductive layer 8 is in the same plane as the upper surface of the pixel defining layer 7, and the conductive layer 8 is electrically connected to the drain 25 of the thin film transistor.
  • the pixel defining layer 7 functions as a retaining wall for forming the conductive layer 8 by the ink jet method.
  • the conductive layer 8 functions as both a flattening and a conductive function, and can be used as an anode or a cathode of a WOLED device (in this embodiment, used as an anode of a WOLED device).
  • the light transmittance of the conductive layer 8 is greater than or equal to 95% to ensure good light transmittance; the surface resistance of the conductive layer 8 ranges from 45 to 90 Q / s (i, to ensure good electrical power)
  • the display panel in this embodiment omits the resin layer 10 compared with the array substrate of the C0A mode in the prior art, and at the same time, can improve the aperture ratio of the display panel, so that the area of the effective pixel is increased;
  • the sputtering step which must be used in the prior art to form the anode of the WOLED device by I TO is avoided.
  • the conductive layer 8 is formed of a conductive resin composite material, and the conductive resin composite material can be made of an existing material.
  • a synthetic resin such as an epoxy resin, an acrylic resin, or a modified polyurethane which is commonly used in the market is excellent in adhesion.
  • a conductive resin composite material formed by uniformly mixing a metal powder such as silver having excellent conductivity into a substrate.
  • the conductive resin composite material comprises a resin and conductive particles, a photoinitiator, a monomer, a dispersant and a surfactant which are uniformly distributed in the resin, and the conductive particles comprise nano-sized erbium-doped Sn0 2 , nanometer-scale I T0 or a nano-silver solution that is uniformly dispersed.
  • the pixel defining layer 7 is formed in the opaque region by a patterning process, and the conductive layer 8 is formed in the light-transmitting method by an inkjet method. Area. Specifically, the conductive resin composite material is filled in the light-transmitting region by an inkjet method, and the conductive layer 8 is formed after curing. Meanwhile, in order to realize colorization of the WOLED display device, in the sub-pixel region, a color film layer 5 is disposed under the thin film transistor, below the conductive layer 8 and the pixel defining layer 7, and the color film layer 5 corresponds to the region of the drain 25. A first via hole 51 is formed (see FIG.
  • the color film layer 5 is formed by a color photoresist material, and the color photoresist material has a function of filtering light, and generally has the characteristics of good heat resistance, high color saturation, and good light transmittance.
  • three sub-pixel regions constitute one pixel region, and each pixel region includes a color film layer 5 formed of color resist materials of three colors of red, green, and blue (a color photoresist of one color is disposed in each sub-pixel region). Material).
  • a passivation layer 3 is disposed above the thin film transistor and below the color film layer 5, and a region of the passivation layer 3 corresponding to the drain 25 of the thin film transistor is provided with a second pass.
  • the hole 31 (see FIG. 3B, the second via 31 in FIG. 2 has been filled with the conductive resin composite material), and the second via hole 31 and the first via hole 51 coincide in the direction of the hole axis, so that the conductive layer 8 passes through the first pass.
  • the hole 51 and the second via 31 are electrically connected to the drain 25.
  • the passivation layer 3 is disposed so that the thin film transistor and the conductive layer 8 can be insulated and insulated; at the same time, the thin film transistor is also protected, so that the thin film transistor is not affected when the color film layer 5 is formed over the thin film transistor. .
  • a black matrix 4 is disposed above the passivation layer 3 and below the color film layer 5, and the black matrix 4 and the source of the thin film transistor, respectively.
  • the poles 24 and the drains 25 at least partially overlap in the forward projection direction (i.e., the black matrix 4 at least partially overlaps the projection of the source and drain electrodes 25 of the thin film transistor on the substrate, respectively).
  • Black matrix 4 also provides good protection for thin film transistors
  • the conductive layer 8 is an electrode (for example, an anode) of the WOLED device, and the light-emitting layer 6 is further disposed above the conductive layer 8, and another light is disposed above the light-emitting layer 6.
  • An electrode (such as a cathode) can realize image display when the WOLED device emits light.
  • the passivation layer 3, the black matrix 4, and the color film layer 5 in the display panel in this embodiment are formed by a patterning process.
  • the preparation method of a specific display panel will be described in detail later.
  • the patterning process may include only a photolithography process, or may include a photolithography process and an etching process, and may also include printing, inkjet, etc. for forming a predetermined schedule.
  • the process of patterning; the lithography process refers to a process of forming a pattern by using a photoresist, a mask, an exposure machine, or the like, including a process of film formation, exposure, development, and the like.
  • the corresponding patterning process can be selected in accordance with the structure formed in the present invention.
  • the method for preparing the above display panel specifically includes the following steps S1 to S7.
  • Step SI Forming a thin film transistor on the substrate.
  • the thin film transistor 2 includes a gate electrode 21, a gate insulating layer 11, an active layer 23, and a source electrode 24 and a drain electrode 25 which are disposed in the same layer.
  • the specific structure of the thin film transistor can be flexibly designed as needed, and the formation process of each layer can be the same, the details are not described herein. After this step is completed, the so-called array backplane is completed.
  • the passivation layer 3 is a protective layer, and the passivation layer 3 is formed by a patterning process.
  • a passivation layer film is formed over the thin film transistor, exposed, developed, and patterned by a dry etching process to form a pattern including the passivation layer 3 and the second via 31, and then the display panel is post-baked. .
  • a black matrix 4 is formed over the passivation layer 3, and the black matrix 4 at least partially overlaps the source 24 and the drain 25 of the thin film transistor in the forward projection direction, respectively.
  • the black matrix 4 is formed by a patterning process, specifically, a black matrix film is formed over the active layer 23 of the passivation layer 3 corresponding to the thin film transistor, and is exposed, developed, and formed to include black.
  • the pattern of the matrix 4, the black matrix 4 can effectively prevent light leakage, and can protect the thin film transistor.
  • red (R), green (G), and blue (B) are used.
  • the three color color resist materials are respectively formed in the respective sub-pixel regions in a certain order, and the pattern including the color film layer 5 and the first via holes 51 is formed by exposure and development by a patterning process.
  • the second via hole 31 and the first via hole 51 overlap in the hole axis direction, so that the subsequently formed conductive layer 8 is electrically connected to the drain electrode 25 through the second via hole 31 and the first via hole 51.
  • the sub-pixel region includes a light transmitting region and an opaque region
  • the thin film transistor is disposed in the opaque region.
  • the pixel defining layer 7 is disposed in the opaque region, and is formed by a patterning process, exposed, developed, and formed in a region that does not need to emit light (ie, an opaque region).
  • Limited layer P i xe l Def ine
  • PDL PDL Layer
  • the pixel defining layer 7 formed in this step also serves as a retaining wall for the preparation of the conductive layer by the ink jet method in the subsequent preparation process. Therefore, compared with the prior art (the retaining wall is separately formed by the patterning process), the present embodiment The method of preparing the display panel in the example also saves the step of separately forming the retaining wall.
  • FIG. 3E only gives an example of the pattern of the pixel defining layer.
  • the graphic of the pixel defining layer can be flexibly designed according to the actual situation according to the application of the display device and the product requirements.
  • the specific shape is not limited.
  • a conductive resin composite material is filled in a region defined by the pixel defining layer 7 by an ink jet method (ink-j e t ) to form a conductive layer 8.
  • the upper surface of the conductive layer 8 is in the same plane as the upper surface of the pixel defining layer 7, and the conductive layer 8 is electrically connected to the drain electrode 25 of the thin film transistor through the second via 31 and the first via 51.
  • the conductive layer 8 is directly formed in the region defined by the pixel defining layer 7 by inkjet printing, and the upper surface of the conductive layer 8 is in the same plane as the upper surface of the pixel defining layer 7, that is, the conductive layer 8 and the pixel are
  • the upper surface of the defining layer 7 is flattened to function as a flat protective layer in the prior art; at the same time, due to the conductivity of the conductive layer 8, it can simultaneously serve as an electrode of the WOLED device (in this embodiment) It is the anode of the WOLED device and saves the step of sputtering to form the ITO film to form the anode of the prior art WOLED device.
  • the shower head 14 is aligned with the area defined by the pixel defining layer 7, and the conductive resin composite material (ie, ink droplets) is dropped.
  • the conductive layer 8 is formed.
  • the conductive resin composite material comprises a resin and conductive particles, a photoinitiator, a monomer, a dispersant, and a surfactant uniformly distributed in the resin, and the conductive particles include nano-sized erbium-doped Sn0 2 , nano-scale IT0.
  • the nozzles 14 may be different.
  • the formation of a conductive layer by an inkjet method has the advantages of low cost, simple process, high utilization ratio of a conductive resin composite material, and the like.
  • the preferred method for preparing the conductive resin composite material in the present embodiment is as follows: by adding conductive particles in the resin (Re s in ), such as nano-sized erbium-doped Sn0 2 , nano-scale I TO or uniformly dispersed nano-silver solution, etc. , uniformly mixed with a resin, a photoinitiator, a monomer, a dispersant, and a surfactant to form a conductive resin composite material, and adjusted to a suitable temperature by adjusting a curing temperature, a particle size of the nanoparticles, and illumination.
  • Conductivity without affecting its photosensitivity, curability and other properties.
  • the resin is mainly used for bonding and maintaining the film morphology;
  • the photoinitiator is mainly used for reacting in the light, and the crosslinking agent is caused to crosslink and polymerize;
  • the dispersant is used for grouping the particles in the conductive resin composite material.
  • the dispersion is carried out to make the distribution of each particle component uniform;
  • the surfactant is mainly used to maintain the surface properties of the photoresist such as surface tension.
  • the preferred conductive resin composite material In order to ensure good light transmittance of the display panel and good conductivity of the WOLED device, the preferred conductive resin composite material generally needs to have the following characteristics: transmittance: not less than 95%; surface resistance range: 45-90 Q / s ( i; flatness uniformity: not greater than
  • a white light (Whi te) luminescent layer 6 (EL) is formed by evaporation, followed by sputtering to form a thin aluminum (A1) metal layer to serve as the cathode 12 of the WOLED device, and packaged. .
  • the pixel defining layer is directly used as a retaining wall, and a conductive layer is formed by an inkjet method, and the conductive layer is simultaneously used as a flat layer, and
  • a flat protective layer it is necessary to use a flat protective layer to increase the flatness of the upper surface of the color filter layer, and the patterning process can be reduced. Since the conductive layer is formed by the inkjet method in the region defined by the pixel defining layer, the individual can be reduced.
  • the patterning process for forming the retaining wall can also reduce the step of forming the anode of the WOLED device by sputtering IT0, and correspondingly avoiding problems such as disconnection and falling off caused by the difficulty of deposition of I T0, which is beneficial to ensure product yield. Therefore, the display panel formed by the embodiment has a simpler process and lower cost.
  • the embodiment further provides a display device using the above display panel, the display device further comprising a driving circuit electrically connected to the display panel, the display device having low cost and stable performance due to the use of the display panel The advantage of high yield.
  • the display device may be any product or component having display function such as electronic paper, mobile phone, tablet computer, television, display, notebook computer, digital photo frame, navigator, and the like.
  • Example 2
  • the W0LED device of this embodiment is of a top emission type. That is, in the display panel of the present embodiment, the light-removing end of the WOLED device is the tip end. In this case, the color film layer should be placed on the luminescent layer of the W0LED device.
  • a pixel defining layer (PDL) is formed over the thin film transistor, and then a metal anode (conductive layer) connected to the drain of the thin film transistor is further prepared and Evaporation Layer (Emi tt ing layer: EL), then a color film layer is prepared on top of the EL layer, and finally a metal cathode is sputtered and packaged to form a WOLED display device.
  • PDL pixel defining layer
  • a metal anode conductive layer
  • EL Evaporation Layer
  • a color film layer is prepared on top of the EL layer
  • a metal cathode is sputtered and packaged to form a WOLED display device.
  • the cathode crucible is formed of a thin aluminum metal material to ensure good light transmittance and meet the light-receiving requirements of the top emission type WOLED device.
  • the other structures of the display panel in this embodiment are the same as those of the display panel in the first embodiment.
  • the method for preparing the display panel can also refer to the method for preparing the display panel in the first embodiment, and details are not described herein again.
  • the embodiment further provides a display device using the above display panel.
  • the display device further includes a driving circuit electrically connected to the display panel, the display device having the advantages of low cost, stable performance, and high yield.
  • Embodiments 1 and 2 provide a display panel and a display device including the same.
  • the C0A structure was used in the display panel and a conductive layer was formed by an ink jet method. Specifically, a pixel defining layer is formed directly on the color film layer or the thin film transistor by exposure and development, and then a conductive layer is formed by an inkjet method in a region defined by the pixel defining layer.
  • the pixel defining layer is used as a retaining wall when forming a conductive layer by an inkjet method, in addition to defining a light transmitting region and an opaque region of the sub-pixel region; and the conductive layer is used as an anode of the WOLED device instead of the IOT.
  • the function of the flat layer Compared with the prior art, the structure of the display panel is simpler, and the steps of forming a flat layer and separately forming a retaining wall in the display panel of the prior art are correspondingly reduced, and the splash necessary for forming an anode by using I T0 is avoided. The shooting process simplifies the process and reduces costs.
  • the structure of the display panel provided by the present invention is suitable for a display device using a bottom emission type W0LED device and a top emission type W0LED device.

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Abstract

提供一种显示面板和包括该显示面板的显示装置。该显示装置包括基板（1），所述基板（1）被划分为多个子像素区域，子像素区域包括薄膜晶体管和设置在薄膜晶体管上方的有机发光二极管器件，其特征在于，在薄膜晶体管的上方有机发光二极管的下方设置有像素限定层（7）和导电层（8），像素限定层（7）用于限定子像素区域的透光区和不透光区，其中，导电层（8）的上表面和像素限定区（7）的上表面位于同一平面，且导电层（8）与薄膜晶体管的漏极（24）电连接。

Description

显示面板及显示装置
技术领域
本发明属于显示技术领域， 具体涉及显示面板以及包括该显 示面板的显示装置。 背景技术
随着显示技术的发展， 平板显示装置已取代笨重的 CRT显示 装置成为目前的主流显示装置。 目前， 常用的平板显示装置包括 LCD ( Liquid Crystal Display: 液晶显示装置 )和 OLED ( Organic Light-Emitting Diode: 有机发光二极管）显示装置。
其中， 0LED是一种利用有机固态半导体作为发光材料的发光 器件， 0LED 显示装置正是利用 0LED来实现图像显示的显示装置。 尤其以白光有机发光二极管（White OLED: 即 W0LED)的技术最为成 熟， 其稳定性好、 制备工艺简单， 故在显示装置中获得了广泛应 用。 通常， W0LED显示装置包括阵列基板和彩膜基板， 阵列基板中 包括呈阵列分布的多个薄膜晶体管， 薄膜晶体管是决定光线是否 能够通过的控制部件， 彩膜层是 W0LED显示装置实现彩色化的关 键部件。 在 W0LED显示装置的制备中， 一般是将彩膜基板和阵列 基板分别制造出来， 然后再将彩膜基板与阵列基板对盒封装起来。 为保证显示面板的正常工作， 阵列基板和彩膜基板的对位压盒精 度要求很高。
随着显示技术的进步， 目前， 在 W0LED显示装置中出现了将 彩膜层设在阵列基板上（Color Filter on Array, 简称 COA)以实 现彩色显示的显示面板的结构。 即， 将薄膜晶体管阵列和彩膜层 制备到同一基板上， 并将彩膜层设置在薄膜晶体管阵列的上方。 图 1所示为釆用构图工艺在基板上形成有 C0A结构的 W0LED显示 装置的一个示例， 其在彩膜层制备完成后在其上涂覆平坦保护层， 然后再形成 W0LED器件 （包括阳极、 发光层和阴极） 。 具体地， 在已经形成了薄膜晶体管 （主要包括栅极 21、 栅绝缘层 22、 有源 层 23和同层设置的源极 24和漏极 25 ) 的阵列基板上， 釆用构图 工艺 （ 包括涂布、 曝光、 显影等多个步骤） 形成钝化层 3 (Passivation, 简称 PVX ) ， 接着在钝化层 3的上方依次形成黑 矩阵 4和彩膜层 5;然后在彩膜层 5的上方形成树脂层 1Q( Resin )， 再在树脂层 10的上方形成与薄膜晶体管的漏极 25相连的金属阳 极 11, 然后进一步制备像素限定层 7 ( Pixel Define Layer, 简 称 PDL) 以及发光层 6 ( Emitting Layer ： 简称 EL ) ， 最后溅射 形成金属阴极 12， 并封装形成 W0LED显示装置。 其中， 树脂层 10 有利于提高显示面板的开口率， 使得有效像素面积增大； 同时也 减少了逻辑功耗， 极大地降低了产品功耗， 提高了产品的性能。
釆用上述具有 C0A结构的显示面板， 可以省去单独的彩膜基 板的制造， 不需要考虑彩膜基板与阵列基板的对位压盒精度； 而 且制成的显示面板具有较好的稳定性， 可以较好地实现 0LED显示 装置的大尺寸化， 所以成为目前较常釆用的 W0LED显示装置的全 彩实现方法。 但是， 这种显示面板结构复杂， 制备工艺较多， 且 需要薄膜晶体管阵列和彩膜层的高精度匹配， 因此难以取得较高 的产品良率； 并且， 在釆用 ITO ( Indium Tin Oxide, 氧化铟锡） 制备阳极的过程中， IT0沉积在彩膜层的上方， 由于彩膜层的厚度 较大， 形成的段差较大， 而 IT0—般厚度较小， 因此难以沉积而 且容易发生 IT0断线， 这不仅造成这种结构的 W0LED显示装置成 本高， 还进一步降低了产品良率。 发明内容 足， 提供一种显示面板以及包括该显示面板的显示装置， 该显示 面板的结构更简单， 简化了工艺， 降低了成本。
一种显示面板， 包括基板， 所述基板被划分为多个子像素区 域， 所述子像素区域包括薄膜晶体管和设置在所述薄膜晶体管上 方的有机发光二极管器件， 其特征在于， 在所述薄膜晶体管的上 方、 所述有机发光二极管器件的下方设置有像素限定层和导电层， 所述像素限定层用于限定所述子像素区域的透光区和不透光区， 其中， 所述导电层的上表面与所述像素限定层的上表面位于同一 平面， 且所述导电层与所述薄膜晶体管的漏极电连接。
优选的是， 所述导电层的光透过率大于等于 95%， 所述导电 层的面电阻范围为 45-90 Q /Sq。
优选的是， 所述导电层由导电树脂形成， 所述导电树脂包括 树脂以及均勾分布于所述树脂中的导电粒子、 光引发剂、 单体、 分散剂和表面活性剂， 所述导电粒子包括纳米级掺锑 Sn02、 纳米 级 I T0或均匀分散的纳米银溶液。
优选的是， 所述像素限定层釆用构图工艺形成， 所述导电层 以所述像素限定层为挡墙釆用喷墨法形成。
优选的是， 在所述子像素区域内， 在所述薄膜晶体管的上方、 所述导电层和所述像素限定层的下方还设置有彩膜层， 所述彩膜 层对应所述薄膜晶体管的漏极的区域开设有第一过孔， 所述导电 层通过所述第一过孔与所述薄膜晶体管的漏极电连接。
优选的是， 在所述子像素区域内， 在所述薄膜晶体管的上方、 所述彩膜层的下方还设置有钝化层， 所述钝化层中对应所述薄膜 晶体管的漏极的区域开设有第二过孔， 所述第二过孔与所述第一 过孔在孔轴方向上重合， 所述导电层通过所述第一过孔和所述第 二过孔与所述薄膜晶体管的漏极电连接。
优选的是， 在所述钝化层的上方、 所述彩膜层的下方还设置 有黑矩阵， 所述黑矩阵分别与所述薄膜晶体管的源极和漏极在正 投影方向上至少部分重叠。
优选的是， 在所述子像素区域内， 所述导电层用作所述有机 发光二极管器件的一个电极， 并且所述有机发光二极管器件还包 括形成在所述导电层上方的发光层和形成在所述发光层上方的另 一电极。
优选的是， 所述钝化层、 所述黑矩阵、 所述彩膜层通过构图 工艺形成。
一种显示装置， 包括显示面板和与所述显示面板电连接的驱 动电路， 其中， 所述显示面板釆用上述的显示面板。
本发明的有益效果是： 本发明提供了一种显示面板以及包括 该显示面板的显示装置。 该显示面板中的导电层釆用喷墨法制备 形成， 在 TFT 的上方， 经曝光、 显影即可形成像素限定层， 并在 像素限定层限定的区域内釆用喷墨法形成导电层。 该像素限定层 除了用于限定各子像素区域的透光区和不透光区， 还用作釆用喷 墨法形成导电层时的挡墙。此外， 导电层除了代替 I T0作为 W0LED 器件的阳极， 还兼具平坦层的功能。 因此， 与现有技术相比， 该 显示面板的结构更简单， 减少了现有技术中显示面板中形成平坦 层以及单独形成挡墙的步骤， 而且还避免了釆用 I T0形成阳极所 必须的溅射工艺， 简化了工艺， 降低了成本。 附图说明
图 1为现有技术中一种显示面板的剖视图；
图 2为本发明实施例 1提供的显示面板的剖视图。
图 3A- 3G为图 2中显示面板的形成过程的示意图；
其中：
图 3A为在基板上方形成薄膜晶体管的剖视图；
图 3B为在薄膜晶体管上方形成包括钝化层的图形的剖视图； 图 3C为在钝化层上方形成包括黑矩阵的图形的剖视图； 图 3D为在黑矩阵上方形成包括彩膜层的图形的剖视图； 图 3E为在彩膜层上方形成包括像素限定层的图形的剖视图； 图 3F为釆用喷墨法在图 3E的像素限定层限定的区域内形成 包括导电层的剖视图； 和
图 3G为在像素限定层和导电层的上方依次形成 W0LED器件的 发光层和阴极的剖视图。 具体实施方式 为使本领域技术人员更好地理解本发明的技术方案， 下面结 合附图和具体实施方式对本发明显示面板和包括该显示面板的显 示装置作进一步详细描述。
根据本发明实施例的一种显示面板， 包括基板， 所述基板被 划分为多个子像素区域， 所述子像素区域薄膜晶体管和设置在所 述薄膜晶体管上方的有机发光二极管器件， 其特征在于， 在所述 薄膜晶体管的上方、 所述有机发光二极管器件的下方设置有像素 限定层和导电层， 所述像素限定层用于限定所述子像素区域的透 光区和不透光区， 其中， 所述导电层的上表面与所述像素限定层 的上表面位于同一平面， 且所述导电层与所述薄膜晶体管的漏极 电连接并作为所述有机发光二极管器件的一个电极。
根据本发明实施例的一种显示装置， 包括显示面板和与所述 显示面板电连接的驱动电路， 其中， 所述显示面板釆用上述的显 示面板。 实施例 1 :
本实施例提供的显示装置为 W0LED显示装置。 0LED器件按光 的取出方向可分为底发射型和顶发射型， 在本实施例的显示面板 中， W0LED器件的光的取出端为底端， 即显示装置中的 W0LED器件 为底发射型。
在本实施例中， 该 W0LED显示装置的显示面板包括阵列基板 和形成在阵列基板上的彩膜层， 即将彩膜层设在已经形成了薄膜 晶体管的阵列基板的上方。 如图 2所示， 显示面板包括基板 1和 设置于基板上的薄膜晶体管， 薄膜晶体管的上方还依次设置有钝 化层 3、 黑矩阵 4、 彩膜层 5和 W0LED器件。 其中， 薄膜晶体管主 要包括依次层叠设置的栅极 21、 栅绝缘层 22、 有源层 2 3和同层 设置的源极 24和漏极 25。 W0LED器件至少包括阳极 8、 发光层 6 和阴极 1 2， 还可以选择性地包括空穴注入层、 空穴传输层、 电子 阻挡层或空穴与激子阻挡层等辅助功能层。 为区分子像素区域的 透光区与不透光区， 在 W0LED器件的发光层 6的下方设置有像素 如图 2所示， 基板 1被划分为多个子像素区域， 子像素区域 包括薄膜晶体管和设置在所述薄膜晶体管上方的 W0LED器件， 在 所述薄膜晶体管的上方、 所述 W0LED器件的下方设置有像素限定 层 7和导电层 8，所述像素限定层 7将所述子像素区域限定为透光 区和不透光区， 其中， 薄膜晶体管和像素限定层 7设置于不透光 区内， 导电层 8设置于不透光区内， 导电层 8的上表面与像素限 定层 7的上表面位于同一平面， 且导电层 8与薄膜晶体管的漏极 25电连接。 这样， 像素限定层 7除了能起到限定子像素区域的透 光区和不透光区的作用， 还起到了后续釆用喷墨法形成导电层 8 时的挡墙的作用。 此外， 导电层 8同时兼具平坦化和导电的功能， 可以用作 W0LED器件的阳极或阴极（本实施例中， 用做 W0LED器 件的阳极） 。
在本实施例中， 导电层 8 的光透过率大于等于 95%， 以保证 良好的光透过性； 导电层 8的面电阻范围为 45-90 Q / s (i， 以保证 良好的电性能。 本实施例中的显示面板与现有技术中的 C0A模式 的阵列基板相比， 省略了树脂层 1 0， 同时能有利于提高显示面板 的开口率， 使得有效像素的面积增大； 还避免了现有技术中釆用 I TO形成 W0LED器件的阳极而必须釆用的溅射步骤。
其中， 导电层 8 由导电树脂复合材料形成， 导电树脂复合材 料可以釆用现有材料， 比如， 市面上常见的为釆用粘结力优良的 环氧树脂、 丙烯酸树脂以及改性聚氨酯等合成树脂为基材均匀混 合导电性优良的银等金属粉末形成的导电树脂复合材料。 在本实 施例中， 优选导电树脂复合材料包括树脂以及均勾分布于树脂中 的导电粒子、 光引发剂、 单体、 分散剂和表面活性剂， 导电粒子 包括纳米级掺锑 Sn02、 纳米级 I T0或均勾分散的纳米银溶液。
在本实施例中， 为了区分子像素区域的透光区和不透光区， 像素限定层 7 釆用构图工艺形成在不透光区， 并釆用喷墨法将导 电层 8 形成在透光区。 具体地， 将导电树脂复合材料通过喷墨方 式填充于透光区内， 固化后即形成导电层 8。 同时， 为了实现 WOLED显示装置的彩色化， 在子像素区域内， 薄膜晶体管的上方、 导电层 8和像素限定层 7的下方还设置有彩 膜层 5，彩膜层 5对应漏极 25的区域开设有第一过孔 51(见图 3D, 图 2中第一过孔 51 已填充有导电树脂复合材料） ， 导电层 8通过 第一过孔 51与漏极 25电连接。 彩膜层 5釆用彩色光阻材料形成， 彩色光阻材料具有滤光的功能， 一般具有耐热性佳、 色饱和度高、 透光率好等特点。 通常， 三个子像素区域构成一个像素区域， 每 一像素区域包括由红、 绿、 蓝三种颜色的彩色光阻材料形成的彩 膜层 5 (每个子像素区域内设置一种颜色的彩色光阻材料） 。
在本实施例中， 在子像素区域内， 薄膜晶体管的上方、 彩膜 层 5的下方还设置有钝化层 3，钝化层 3中对应薄膜晶体管的漏极 25的区域开设有第二过孔 31(见图 3B,图 2中第二过孔 31 已填充 有导电树脂复合材料） ， 第二过孔 31与第一过孔 51在孔轴方向 上重合， 使得导电层 8通过第一过孔 51和第二过孔 31与漏极 25 电连接。 钝化层 3的设置， 使得薄膜晶体管与导电层 8能够绝缘 隔离； 同时， 也对薄膜晶体管起到了一定的保护作用， 使得在薄 膜晶体管上方形成彩膜层 5时， 不会对薄膜晶体管造成影响。
为防止相邻子像素区之间因设置栅线或数据线可能引起的漏 光， 钝化层 3的上方、 彩膜层 5的下方还设置有黑矩阵 4， 黑矩阵 4分别与薄膜晶体管的源极 24和漏极 25在正投影方向上至少部分 重叠 （即， 黑矩阵 4分别与薄膜晶体管的源极 24和漏极 25在基 板上的投影至少部分重叠） 。 黑矩阵 4还能对薄膜晶体管能起到 良好的保护作用
在图 2中， 在子像素区域内， 以导电层 8为 W0LED器件的一 个电极（例如阳极）， 在导电层 8的上方还设置有发光层 6， 并在 发光层 6的上方设置有另一电极（例如阴极） ， 当 W0LED器件发 光时， 即可实现图像显示。
与现有技术相同， 本实施例中显示面板中的钝化层 3、 黑矩 阵 4、彩膜层 5通过构图工艺形成。 具体的显示面板的制备方法将 在后面进行详细阐述。 在阐述具体制备方法之前， 应该理解， 在本发明中， 构图工 艺， 可只包括光刻工艺， 或， 包括光刻工艺以及刻蚀步骤， 同时 还可以包括打印、 喷墨等其他用于形成预定图形的工艺； 光刻工 艺， 是指包括成膜、 曝光、 显影等工艺过程的利用光刻胶、 掩模 板、 曝光机等形成图形的工艺。 可根据本发明中所形成的结构选 择相应的构图工艺。
如图 3A-3G所示， 上述显示面板的制备方法具体包括如下步 骤 S 1至 S7。
步骤 SI ) ： 在基板上形成薄膜晶体管。
在本步骤中， 在基板排列有多个子像素区域， 每一子像素区 域内均形成有薄膜晶体管。 如图 3A所示， 在基板 1上， 薄膜晶体 管 2包括依次层叠的栅极 21、 栅绝缘层 11、 有源层 23和同层设 置的源极 24和漏极 25。
由于薄膜晶体管的具体结构根据需要可进行灵活设计， 而其 各层的形成工艺均可釆用技术相同， 因此这里不再赘述。 本步骤 完成后， 即完成了通常所称的阵列背板。
步骤 S2 ) : 在薄膜晶体管上方形成包括钝化层的图形。
在本步骤中， 钝化层 3即保护层， 钝化层 3釆用构图工艺形 成。 如图 3B所示， 在薄膜晶体管的上方形成钝化层膜， 经曝光、 显影， 并通过干刻工艺， 形成包括钝化层 3以及第二过孔 31的图 形， 然后对显示面板进行后烘。
步骤 S 3 ) : 在钝化层上方形成包括黑矩阵的图形。
如图 3C所示，在本步骤中，在钝化层 3的上方形成黑矩阵 4， 黑矩阵 4分别与薄膜晶体管的源极 24和漏极 25在正投影方向上 至少部分重叠。 与钝化层 3的制备工艺相同， 黑矩阵 4釆用构图 工艺形成， 具体地， 在钝化层 3对应薄膜晶体管的有源层 23的上 方形成黑矩阵膜， 经曝光、 显影， 形成包括黑矩阵 4 的图形， 黑 矩阵 4能有效防止漏光， 并能对薄膜晶体管起到良好的保护作用。
步骤 S4 ) : 在黑矩阵上方形成包括彩膜层的图形。
如图 3D所示， 在本步骤中， 将红 （R ) 、 绿（G ) 、 蓝 （B ) 三个颜色的彩色光阻材料按照一定顺序分别形成在各子像素区域 内， 同样釆用构图工艺， 经曝光、 显影， 形成包括彩膜层 5 以及 第一过孔 51的图形。 其中， 第二过孔 31与第一过孔 51在孔轴方 向上重合， 以便于后续形成的导电层 8通过第二过孔 31和第一过 孔 51与漏极 25电连接。
步骤 S5 ) : 在彩膜层上方形成包括像素限定层的图形。
在本实施例中， 子像素区域包透光区和不透光区， 薄膜晶体 管设置于不透光区内。 如图 3E所示， 在本步骤中， 像素限定层 7 设置在不透光区内， 同样釆用构图工艺， 经曝光、 显影， 在不需 发光的区域（即不透光区） 形成包括像素限定层 （P i xe l Def ine
Layer , 简称 PDL ) 的图形， 从而分隔出透光区和不透光区。
在本步骤中形成的像素限定层 7还兼作后续制备过程中釆用 喷墨法制备导电层时的挡墙， 因此， 相比现有技术 （需釆用构图 工艺单独形成挡墙） ， 本实施例中显示面板的制备方法还节省了 单独形成挡墙的步骤。
这里应该理解的是， 图 3E仅给出了像素限定层的图形的一种 示例， 像素限定层的图形根据显示装置应用场合的不同和产品需 求的不同， 可根据实际情况进行灵活设计， 本申请中对具体的形 状不做限定。
步骤 S6 ) : 在像素限定层限定的区域内形成导电层。
如图 3F所示， 在本步骤中， 釆用喷墨法 （ ink-j e t ) 在像素 限定层 7限定的区域内填充导电树脂复合材料， 以形成导电层 8。 其中， 导电层 8的上表面与像素限定层 7的上表面位于同一平面， 导电层 8通过第二过孔 31和第一过孔 51与薄膜晶体管的漏极 25 电连接。
将导电层 8通过喷墨打印的方法直接形成在像素限定层 7限 定的区域内， 并使导电层 8的上表面与像素限定层 7的上表面位 于同一平面， 即， 将导电层 8与像素限定层 7的上表面平坦化， 从而起到了现有技术中平坦保护层的作用； 同时， 由于导电层 8 的导电性， 使得其可同时作为 W0LED器件的电极（在本实施例中 为 WOLED器件的阳极） ， 并节省了溅射形成 IT0膜以形成现有技 术中 W0LED器件的阳极的步骤。
具体地， 如图 3F所示， 将喷头 14对准像素限定层 7限定的 区域， 滴入导电树脂复合材料 （也即墨滴） ， 经过固化步骤后， 即可形成导电层 8。在本实施例中，优选导电树脂复合材料包括树 脂以及均匀分布于树脂中的导电粒子、 光引发剂、 单体、 分散剂 和表面活性剂， 导电粒子包括纳米级掺锑 Sn02、 纳米级 IT0 ( Ind iumTin Ox i de , 氧化铟锡） 或均匀分散的纳米银溶液等， 根 据导电树脂复合材料的不同， 釆用的喷头 14 (包括热气泡式和压 电式喷头） 也可不同。 釆用喷墨法形成导电层具有成本低、 工艺 简单、 导电树脂复合材料利用率高等优点。
其中， 本实施例中优选的导电树脂复合材料的制备方法为： 通过在树脂 （Re s in ) 中添加导电粒子， 比如纳米级掺锑 Sn02、 纳 米级 I TO或均匀分散的纳米银溶液等， 与树脂、 光引发剂、 单体、 分散剂和表面活性剂等均匀混合， 形成导电性的树脂复合材料， 并通过调节固化温度、 纳米粒子的粒度大小、 光照等因素来使其 达到合适的导电率， 而且不会影响其感光性、 固化性和其他性质。 其中， 树脂主要用于粘合和保持膜形态； 光引发剂主要用于在光 照时发生反应， 促使交联剂进行交联发生聚合反应； 分散剂用于 将导电树脂复合材料中的各粒子组份进行分散， 使得各粒子组份 分布均勾； 表面活性剂主要用于保持光刻胶的表面性能如表面张 力等。
为保证显示面板良好的光透过性和 W0LED 器件良好的导电 性， 优选的导电树脂复合材料一般需具有如下特性： 透过率： 不 小于 95%; 面电阻范围： 45-90 Q / s(i; 平坦度的均一性： 不大于
3% ; 硬度 /粘附性 /耐化型 /出气量： 良好， 不影响薄膜晶体管和 W0LED器件的发光层的性能。
步骤 S7 ) ： 在像素限定层和导电层的上方依次形成 W0LED器 件的发光层和阴极。
如图 3G所示， 在本步骤中， 在像素限定层 7和导电层 8的上 方， 通过蒸镀形成白光（Whi te )发光层 6 ( Emi t t ing Layer ： 简 称 EL ) ， 接着溅射形成一层较薄的铝 （A1 )金属层以作为 W0LED 器件的阴极 12， 并进行封装。
本实施例与现有技术相比，釆用 C0A结构制备形成钝化层后， 直接将像素限定层用作挡墙， 并釆用喷墨法形成导电层， 导电层 还同时作为平坦层， 与现有技术必须釆用平坦保护层来增加彩膜 层的上表面的平整度相比， 可以减少一次构图工艺； 由于导电层 釆用喷墨法形成在像素限定层限定的区域内， 可以减少单独形成 挡墙的构图工艺， 还可以减少釆用溅射 IT0形成 W0LED器件的阳 极的步骤， 相应地避免了出现 I T0 不易沉积而导致的断线、 脱落 等问题， 有利于保证产品良率。 因此， 本实施例形成的显示面板， 工艺更简化， 成本也更低。
在本实施例中， 虽然以 W0LED器件为例进行了说明， 但是可 以理解的是， 本发明同样适用于其他 0LED器件。
本实施例还提供一种釆用上述显示面板的显示装置， 该显示 装置还包括与该显示面板电连接的驱动电路， 该显示装置由于釆 用了上述的显示面板， 因此具有成本低、 性能稳定、 良品率高的 优点。
其中， 显示装置可以为电子纸、 手机、 平板电脑、 电视机、 显示器、 笔记本电脑、 数码相框、 导航仪等任何具有显示功能的 产品或部件。 实施例 2 :
本实施例与实施例 1的区别在于， 本实施例的 W0LED器件为 顶发射型。 即在本实施例的显示面板中， W0LED器件的光的取出端 为顶端。 在这种情况下， 彩膜层应相应设置在 W0LED器件的发光 层上。
具体地， 在制备形成薄膜晶体管后， 先在薄膜晶体管的上方 形成像素限定层 （ P ixe l Def ine Layer , 简称 PDL ) ， 然后进一步 制备与薄膜晶体管的漏极相连的金属阳极（导电层）以及蒸镀发光 层 （Emi t t ing Layer ： 简称 EL ) ， 然后在 EL层的上方制备彩膜 层， 最后溅射形成金属阴极， 并封装形成 W0LED显示装置。
在本实施例中， 阴极釆用较薄的铝金属材料形成， 以保证良 好的光透光性， 满足顶发射型 W0LED器件的取光需求。
本实施例中显示面板的其他结构与实施例 1 中显示面板的相 应结构相同， 显示面板的制备方法也可参考实施例 1 中显示面板 的制备方法， 这里不再赘述。
本实施例还提供一种釆用上述显示面板的显示装置。 该显示 装置还包括与该显示面板电连接的驱动电路， 该显示装置具有成 本低、 性能稳定、 良品率高的优点。 实施例 1、 2提供了一种显示面板以及包括该显示面板的显示 装置。 该显示面板中釆用了 C0A结构并利用喷墨法制备形成导电 层。 具体地， 在彩膜层或薄膜晶体管的上方， 直接经曝光、 显影 即可形成像素限定层， 然后在像素限定层限定的区域内釆用喷墨 法形成导电层。 该像素限定层除了限定子像素区域的透光区和不 透光区外， 还用作喷墨法形成导电层时的挡墙； 而导电层除了代 替 I T0作为 W0LED器件的阳极， 还兼具平坦层的功能。 与现有技 术相比， 该显示面板的结构更简单， 而且还相应减少了现有技术 中显示面板中形成平坦层以及单独形成挡墙的步骤， 避免了釆用 I T0形成阳极所必须的溅射工艺， 简化了工艺， 降低了成本。
本发明提供的显示面板的结构适用于釆用底发射型 W0LED器 件和顶发射型 W0LED器件的显示装置。
而釆用的示例性实施方式， 然而本发明并不局限于此。 对于本领 域内的普通技术人员而言， 在不脱离本发明的精神和实质的情况 下， 可以做出各种变型和改进， 这些变型和改进也视为本发明的 保护范围。

Claims

1. 一种显示面板， 包括基板所述基板被划分为多个子像素区 域， 所述子像素区域包括薄膜晶体管和设置在所述薄膜晶体管上 方的有机发光二极管器件， 其特征在于， 在所述薄膜晶体管的上 方、 所述有机发光二极管器件的下方设置有像素限定层和导电层， 所述像素限定层用于限定所述子像素区域的透光区和不透光区， 其中， 所述导电层的上表面与所述像素限定层的上表面位于同一 平面， 且所述导电层与所述薄膜晶体管的漏极电连接。
2. 根据权利要求 1所述的显示面板， 其特征在于， 所述导电 层的光透过率大于等于 95% , 所述导电层的面电阻范围为 45-90 Ω
/sq。
3. 根据权利要求 2所述的显示面板， 其特征在于， 所述导电 层由导电树脂形成， 所述导电树脂包括树脂以及均勾分布于所述 树脂中的导电粒子、 光引发剂、 单体、 分散剂和表面活性剂， 所 述导电粒子包括纳米级掺锑 Sn02、 纳米级 I T0或均勾分散的纳米 银溶液。
4. 根据权利要求 3所述的显示面板， 其特征在于， 所述像素 限定层釆用构图工艺形成， 所述导电层以所述像素限定层为挡墙 釆用喷墨法形成。
5. 根据权利要求 1-4 中任一项所述的显示面板， 其特征在 于， 在所述子像素区域内， 所述薄膜晶体管的上方、 所述导电层 和所述像素限定层的下方还设置有彩膜层， 所述彩膜层对应所述 薄膜晶体管的漏极的区域开设有第一过孔， 所述导电层通过所述 第一过孔与所述薄膜晶体管的漏极电连接。
6. 根据权利要求 5所述的显示面板， 其特征在于， 在所述子 像素区域内， 在所述薄膜晶体管的上方、 所述彩膜层的下方还设 置有钝化层， 所述钝化层中对应所述薄膜晶体管的漏极的区域开 设有第二过孔， 所述第二过孔与所述第一过孔在孔轴方向上重合， 所述导电层还通过所述第一过孔和所述第二过孔与所述薄膜晶体 管的漏极电连接。
7. 根据权利要求 6所述的显示面板， 其特征在于， 在所述钝 化层的上方、 所述彩膜层的下方还设置有黑矩阵， 所述黑矩阵分 别与所述薄膜晶体管的源极和漏极在正投影方向上至少部分重 叠。
8. 根据权利要求 1-7任一项所述的显示面板， 其特征在于， 在所述子像素区域内， 所述导电层用作所述有机发光二极管器件 的一个电极， 并且所述有机发光二极管器件还包括设置在所述导 电层上方的发光层和设置在所述发光层上方的另一电极。
9. 根据权利要求 8所述的显示面板， 其特征在于， 所述钝化 层、 所述黑矩阵、 所述彩膜层通过构图工艺形成。
10. 一种显示装置， 包括显示面板和与所述显示面板电连接 的驱动电路， 其特征在于， 所述显示面板釆用权利要求 1-9任一 项所述的显示面板。
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EP3333891B1 (en) * 2015-07-29 2022-08-31 BOE Technology Group Co., Ltd. Array substrate having conductive planarization layer and preparation method therefor

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CN104483790B (zh) * 2014-12-19 2017-06-27 友达光电股份有限公司 主动元件阵列基板与显示面板
CN110364559B (zh) * 2015-10-09 2022-03-29 Tcl科技集团股份有限公司 Qled显示屏及制备方法
CN105470282B (zh) * 2015-11-20 2020-03-31 Tcl集团股份有限公司 一种无像素bank的TFT-OLED及制备方法
CN105489611A (zh) * 2015-11-26 2016-04-13 Tcl集团股份有限公司 一种印刷型发光显示器及其制作方法
CN105470196B (zh) 2016-01-05 2018-10-19 京东方科技集团股份有限公司 薄膜晶体管、阵列基板及其制造方法、和显示装置
CN106206672A (zh) * 2016-09-09 2016-12-07 深圳市华星光电技术有限公司 Amoled器件及其制作方法
CN106384741B (zh) * 2016-09-27 2019-07-19 上海天马微电子有限公司 有机发光显示装置及其制作方法
CN106483705B (zh) * 2016-12-26 2019-06-11 南京中电熊猫液晶显示科技有限公司 彩色滤光片及其制造方法
CN106847868A (zh) * 2017-02-27 2017-06-13 信利光电股份有限公司 一种全屏指纹识别和触控一体的amoled显示器
US10459331B2 (en) * 2017-03-13 2019-10-29 Wuhan China Star Optoelectronics Technology Co., Ltd. Mask structure and COA type array substrate
CN106773554B (zh) * 2017-03-13 2018-08-14 武汉华星光电技术有限公司 光罩结构及coa型阵列基板
CN108630830B (zh) * 2017-03-22 2020-10-23 上海和辉光电股份有限公司 透明oled显示面板及其制作方法
CN107146770B (zh) * 2017-05-10 2021-01-22 京东方科技集团股份有限公司 一种阵列基板的制备方法、阵列基板和显示装置
TWI634468B (zh) * 2017-08-18 2018-09-01 財團法人工業技術研究院 透明顯示裝置
WO2019062223A1 (zh) * 2017-09-30 2019-04-04 昆山国显光电有限公司 显示屏和电子产品
CN109037294B (zh) * 2018-08-02 2022-04-15 京东方科技集团股份有限公司 有机电致发光显示面板及其制作方法、显示装置
CN109004015B (zh) * 2018-08-10 2020-08-04 京东方科技集团股份有限公司 一种盖板及其制作方法、显示面板及显示装置
CN109887962B (zh) * 2019-02-18 2021-09-24 京东方科技集团股份有限公司 有机发光显示基板及其制作方法、显示装置
CN110165084A (zh) * 2019-06-25 2019-08-23 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示面板和显示装置
KR20210090779A (ko) * 2020-01-10 2021-07-21 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법
CN111403335A (zh) * 2020-03-26 2020-07-10 武汉华星光电半导体显示技术有限公司 显示器件及其制作方法
CN112952021B (zh) * 2021-02-09 2022-08-05 武汉华星光电半导体显示技术有限公司 显示面板及显示装置
CN113745296A (zh) * 2021-08-30 2021-12-03 深圳市华星光电半导体显示技术有限公司 一种oled器件、制造方法及显示装置
CN113629126A (zh) * 2021-10-13 2021-11-09 惠科股份有限公司 阵列基板及其制作方法、显示面板

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1575074A (zh) * 2003-05-30 2005-02-02 三星Sdi株式会社 有机电致发光显示器件及其制造方法
CN1708194A (zh) * 2004-06-04 2005-12-14 三星Sdi株式会社 电致发光显示器件及其制造方法
US20060152151A1 (en) * 2004-12-10 2006-07-13 Seong-Moh Seo Organic light emitting display with color filter layer
CN103700685A (zh) * 2013-12-12 2014-04-02 京东方科技集团股份有限公司 一种显示面板、显示装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6163055A (en) * 1997-03-24 2000-12-19 Semiconductor Energy Laboratory Co., Ltd Semiconductor device and manufacturing method thereof
US7071613B2 (en) * 2001-10-10 2006-07-04 Lg.Philips Lcd Co., Ltd. Organic electroluminescent device
KR100483988B1 (ko) * 2001-11-29 2005-04-15 삼성에스디아이 주식회사 투명도전막의 투과도 변형방법
KR101087567B1 (ko) * 2004-03-23 2011-11-28 엘지디스플레이 주식회사 유기전계발광 소자 및 그 제조방법
US7190122B2 (en) * 2005-03-01 2007-03-13 Eastman Kodak Company OLED display with improved active matrix circuitry
CN100523969C (zh) * 2006-09-22 2009-08-05 北京京东方光电科技有限公司 一种彩膜在薄膜晶体管之上的液晶显示器件及其制造方法
KR101506671B1 (ko) * 2008-02-20 2015-03-27 삼성디스플레이 주식회사 유기 발광 장치 및 그 제조 방법
KR20100010224A (ko) * 2008-07-22 2010-02-01 삼성전자주식회사 박막 트랜지스터 기판 및 그 제조 방법, 액정 표시장치
KR101248671B1 (ko) * 2008-09-23 2013-03-28 코오롱인더스트리 주식회사 투명전극
KR101074813B1 (ko) * 2010-01-07 2011-10-19 삼성모바일디스플레이주식회사 유기 발광 표시 장치 및 그 제조 방법
JP5942275B2 (ja) * 2011-08-02 2016-06-29 パナソニックＩｐマネジメント株式会社 固体撮像装置
KR101402606B1 (ko) * 2012-12-07 2014-06-03 전자부품연구원 능동 매트릭스 디스플레이의 화소 구조 및 제조 방법
CN103353683B (zh) * 2013-06-26 2016-02-10 京东方科技集团股份有限公司 一种阵列基板以及包括该阵列基板的显示装置
KR20150012503A (ko) * 2013-07-25 2015-02-04 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 제조방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1575074A (zh) * 2003-05-30 2005-02-02 三星Sdi株式会社 有机电致发光显示器件及其制造方法
CN1708194A (zh) * 2004-06-04 2005-12-14 三星Sdi株式会社 电致发光显示器件及其制造方法
US20060152151A1 (en) * 2004-12-10 2006-07-13 Seong-Moh Seo Organic light emitting display with color filter layer
CN103700685A (zh) * 2013-12-12 2014-04-02 京东方科技集团股份有限公司 一种显示面板、显示装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3333891B1 (en) * 2015-07-29 2022-08-31 BOE Technology Group Co., Ltd. Array substrate having conductive planarization layer and preparation method therefor
CN111539340A (zh) * 2020-04-26 2020-08-14 厦门天马微电子有限公司 一种显示面板、显示装置及驱动方法

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