WO2015013994A1 - 显示面板及其扇出线结构 - Google Patents

显示面板及其扇出线结构 Download PDF

Info

Publication number
WO2015013994A1
WO2015013994A1 PCT/CN2013/081277 CN2013081277W WO2015013994A1 WO 2015013994 A1 WO2015013994 A1 WO 2015013994A1 CN 2013081277 W CN2013081277 W CN 2013081277W WO 2015013994 A1 WO2015013994 A1 WO 2015013994A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductive layer
fan
layer
display panel
out line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2013/081277
Other languages
English (en)
French (fr)
Inventor
柴立
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to KR1020167005480A priority Critical patent/KR101844692B1/ko
Priority to US14/232,281 priority patent/US20150173232A1/en
Priority to JP2016528290A priority patent/JP6216053B2/ja
Priority to RU2016105819A priority patent/RU2641636C2/ru
Priority to GB1522575.8A priority patent/GB2531955B/en
Publication of WO2015013994A1 publication Critical patent/WO2015013994A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/02—Arrangements of circuit components or wiring on supporting structure
    • H05K7/06—Arrangements of circuit components or wiring on supporting structure on insulating boards, e.g. wiring harnesses
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/13629—Multilayer wirings

Definitions

  • the present invention relates to the field of field display technology, and in particular to a display panel and a fan-out line structure thereof.
  • the liquid crystal display panel includes a display area and a bonding area, and the display area has a plurality of signal lines, and the bonding area is provided with a pad.
  • a fan-out line is disposed between the display area and the junction area, and the fan-out line is connected between the pad and the signal line, and the fan-out line has two types of single-layer and double-layer wire structures.
  • the two-layer wire structure of the prior art comprises two conductive layers and the two conductive layers are completely overlapped, so that static electricity or even breakdown is easily generated between the upper and lower conductive layers in the process of the liquid crystal display panel, resulting in good products of the liquid crystal display panel. The rate drops, leading to economic losses.
  • the technical problem to be solved by the present invention is to provide a display panel and a fan-out line structure thereof, which can reduce the static electricity risk between two conductive layers in the fan-out line, thereby improving product yield and saving cost.
  • a technical solution adopted by the present invention is to provide a fan-out line structure of a display panel.
  • the display panel includes a display area and a bonding area.
  • the display area has a plurality of signal lines, and the bonding area is provided with pads.
  • the fanout line structure includes a plurality of fan-out lines disposed between the display area and the junction area, the first end of the fan-out line is connected to the pad, the second end of the fan-out line is connected to the signal line, and the fan-out line further includes the first end And an intermediate section between the second end, and the fan-out line is a two-layer wire structure comprising a first conductive layer and a second conductive layer, and the first conductive layer and the second conductive layer at the intermediate section
  • the projection on the plane of the display panel is at least partially staggered.
  • the projections of the first conductive layer and the second conductive layer at the first end and the second end on the plane of the display panel are at least partially offset.
  • the first conductive layer is disposed on the lower layer of the second conductive layer
  • the double-layer wire structure further includes an insulating layer and a passivation layer
  • the insulating layer is disposed between the first conductive layer and the second conductive layer
  • the passivation layer is disposed on the second conductive layer On the layer and on the insulation layer.
  • the shape of the fan-out line is a straight line, a curve or a combination thereof, and the impedances of the plurality of fan-out lines tend to be uniform.
  • the display panel includes a display area and a joint area.
  • the display area has a plurality of signal lines, and the joint area is provided with welding.
  • the fan-out cable structure includes a plurality of fan-out lines disposed between the display area and the junction area, the first end of the fan-out line is connected to the pad, the second end of the fan-out line is connected to the signal line, and the fan-out line is further included
  • An intermediate section between the end and the second end, and the fan-out line is a two-layer wire structure comprising a first conductive layer and a second conductive layer, and the first conductive layer and the second conductive portion at the intermediate portion
  • the projection of the layer on the plane of the display panel is at least partially staggered.
  • the first conductive layer is disposed on the lower layer of the second conductive layer, and the double-layer conductive structure further includes an insulating layer and a passivation layer, the insulating layer is disposed between the first conductive layer and the second conductive layer, and the passivation layer is disposed on the first layer Two conductive layers and an insulating layer.
  • the projections of the first conductive layer and the second conductive layer of the intermediate section on the plane of the display panel are completely staggered.
  • the projected portions of the first conductive layer and the second conductive layer of the intermediate section on the plane of the display panel are staggered.
  • the first conductive layer and the second conductive layer are both metal layers.
  • the first conductive layer is a metal layer, and the second conductive layer is an indium tin oxide conductive film; or the first conductive layer is an indium tin oxide conductive film, and the second conductive layer is a metal layer.
  • the first conductive layer and the second conductive layer are both indium tin oxide conductive films.
  • the projections of the first conductive layer and the second conductive layer at the first end and the second end on the plane of the display panel are at least partially offset.
  • the shape of the fan-out line is a straight line, a curve or a combination thereof, and the impedances of the plurality of fan-out lines tend to be uniform.
  • a display panel including a display area and a bonding area, wherein the display area has a plurality of signal lines, the bonding area is provided with a pad, and the fan-out line structure
  • the utility model comprises a plurality of fan-out lines disposed between the display area and the joint area, the first end of the fan-out line is connected to the pad, the second end of the fan-out line is connected to the signal line, and the fan-out line further comprises the first end and the second end
  • An intermediate section between the fan-out line is a two-layer wire structure, the double-layer wire structure includes a first conductive layer and a second conductive layer, and the first conductive layer and the second conductive layer at the intermediate section are located at the display panel
  • the projection on the plane is at least partially staggered.
  • the first conductive layer is disposed on the lower layer of the second conductive layer, and the double-layer conductive structure further includes an insulating layer and a passivation layer, the insulating layer is disposed between the first conductive layer and the second conductive layer, and the passivation layer is disposed on the first layer Two conductive layers and an insulating layer.
  • the projections of the first conductive layer and the second conductive layer of the intermediate section on the plane of the display panel are completely staggered.
  • the projected portions of the first conductive layer and the second conductive layer of the intermediate section on the plane of the display panel are staggered.
  • the first conductive layer and the second conductive layer are both metal layers.
  • the first conductive layer is a metal layer, and the second conductive layer is an indium tin oxide conductive film; or the first conductive layer is an indium tin oxide conductive film, and the second conductive layer is a metal layer.
  • the first conductive layer and the second conductive layer are both indium tin oxide conductive films.
  • the projections of the first conductive layer and the second conductive layer at the first end and the second end on the plane of the display panel are at least partially offset.
  • the shape of the fan-out line is a straight line, a curve or a combination thereof, and the impedances of the plurality of fan-out lines tend to be uniform.
  • the present invention can reduce the two conductive layers in the fan-out line by the first conductive layer and the second conductive layer which are at least partially offset by the projection disposed on the plane of the display panel.
  • the risk of static electricity can improve product yield and save costs.
  • FIG. 1 is a schematic structural view of a display panel of the present invention
  • FIG. 2 is a schematic view showing the projection of the first conductive layer and the second conductive layer of the fan-out line of the first embodiment of the present invention on the plane of the display panel;
  • Figure 3 is a cross-sectional view of the fan-out line of the first embodiment of the present invention taken along line A-A of Figure 2;
  • Figure 4 is a cross-sectional view of the fan-out line of the first embodiment of the present invention taken along line B-B of Figure 2;
  • Figure 5 is a cross-sectional view of the fan-out line of the first embodiment of the present invention taken along line C-C of Figure 2;
  • FIG. 6 is a schematic view showing the projection of the first conductive layer and the second conductive layer of the fan-out line of the second embodiment of the present invention on the plane of the display panel;
  • Figure 7 is a cross-sectional view of the fan-out line of the second embodiment of the present invention taken along the line D-D of Figure 6;
  • FIG. 1 is a schematic structural view of a display panel of the present invention.
  • the display panel 1 includes a display area 11 and a land area 12.
  • the display area 11 has a plurality of signal lines 111a, 111b, and 111c, and the land area 12 is provided with pads 121.
  • the fan-out line structure 13 includes a plurality of fan-out lines 131a, 131b, 131c disposed between the display area 11 and the land 12, and the first ends of the fan-out lines 131a, 131b, 131c are connected to the pads 121, the fan-out lines 131a, 131b, The second end of the 131c is connected to the signal lines 111a, 111b, 111c (for example, the signal line is a scanning signal line or a data signal line on the display panel 1).
  • the shape of the fan-out lines 131a, 131b, and 131c may be a straight line, a curved line, or a combination of a straight line and a curved line, and the impedances of the respective fan-out lines 131a, 131b, and 131c tend to be uniform.
  • Each of the fan-out lines 131a, 131b, and 131c is a two-layer wire structure including a first conductive layer and a second conductive layer.
  • FIG. 2 is a schematic diagram showing the projection of the first conductive layer and the second conductive layer of the fan-out line of the first embodiment of the present invention on the plane of the display panel.
  • the fan-out line 131a takes the fan-out line 131a as an example, it includes a first end 132, a second end 133, and an intermediate section 134 between the first end 132 and the second end 133.
  • the fan-out line 131a is a two-layer wire structure.
  • the two-layer wire structure includes a first conductive layer 135 and a second conductive layer 136.
  • the projection of the first conductive layer 135 and the second conductive layer 136 at the intermediate section 134 on the plane of the display panel 1 is at least partially offset. Specifically, in the present embodiment, the projections of the first conductive layer 135 and the second conductive layer 136 of the intermediate section 134 on the plane of the display panel 1 are preferably completely staggered.
  • FIG. 3 is a cross-sectional view of the fan-out line of the first embodiment of the present invention taken along line A-A of FIG.
  • the first conductive layer 135 is disposed under the second conductive layer 136, and the double-layered wire structure further includes an insulating layer 143 and a passivation layer 144 disposed between the first conductive layer 135 and the second conductive layer 136, blunt The layer 144 is disposed on the second conductive layer 136 and the insulating layer 143.
  • the projections of the first conductive layer 135 and the second conductive layer 136 on the plane of the display panel 1 are completely shifted along the width direction of the first conductive layer 135.
  • FIG. 4 is a cross-sectional view of the fan-out line of the first embodiment of the present invention taken along line B-B of FIG.
  • the first conductive layer 135 and the second conductive layer 136 at the extreme end of the first end 132 are preferably completely overlapped to reduce the end of the first conductive layer 135 and the second conductive layer 136 in the process of the display panel 1. The span of time, thereby reducing the connection impedance.
  • the second conductive layer 136 at the extreme end (B-B) of the first end 132 is directly above the first conductive layer 135.
  • the insulating layer 143 is disposed between the first conductive layer 135 and the second conductive layer 136, and the passivation layer 144 is disposed on the second conductive layer 136 and the insulating layer 143.
  • the projections of the first conductive layer 135 and the second conductive layer 136 at the first end 132 and the second end 133 on the plane of the display panel 1 may also be partially staggered or completely offset.
  • FIG. 5 is a cross-sectional view of the fan-out line of the first embodiment of the present invention taken along line C-C of FIG.
  • the projections of the first conductive layer 135 and the second conductive layer 136 at the second end 133 on the plane of the display panel 1 are preferably partially offset, and the arrangement thereof is similar to that of the first end 132, and details are not described herein again.
  • FIG. 6 is a schematic diagram showing the projection of the first conductive layer and the second conductive layer of the fan-out line of the second embodiment of the present invention on the plane of the display panel.
  • the difference from the first embodiment is that, in the present embodiment, the projections of the first conductive layer 235 and the second conductive layer 236 of the intermediate section 234 on the plane of the display panel 1 are preferably partially offset.
  • FIG. 7 is a cross-sectional view of the fan-out line of the second embodiment of the present invention taken along line D-D of FIG. As shown in FIG. 7, in the present embodiment, the second conductive layer 236 at the D-D is obliquely above the first conductive layer 235.
  • the first conductive layer 135, 235 and the second conductive layer 136, 236 are all metal layers; or the first conductive layer 135, 235 is a metal layer, and the second conductive layer 136, 236 is an indium tin oxide conductive film; or, the first conductive layer 135, 235 is an indium tin oxide conductive film, the second conductive layer 136, 236 is a metal layer; or, the first conductive layer 135, 235 and the second conductive Layers 136, 236 are all indium tin oxide conductive films.
  • the present invention can reduce the electrostatic risk between the two conductive layers in the fan-out line by the first conductive layer and the second conductive layer which are at least partially offset by the projection disposed on the plane of the display panel, thereby Improve product yield and save costs.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本发明公开了一种显示面板的扇出线结构，该显示面板包括显示区和接合区，显示区上有多条信号线，接合区上设置有焊盘，扇出线结构包括多条设置在显示区和接合区之间的扇出线，且扇出线为双层导线结构，双层导线结构包括第一和第二导电层，扇出线的中间区段处的第一和第二导电层在显示面板所在平面上的投影至少部分错开。本发明能够降低扇出线中两导电层之间的静电风险，从而可以提升产品良率，节约成本。

Description

显示面板及其扇出线结构
【技术领域】
本发明涉及领域显示技术领域，特别是涉及一种显示面板及其扇出线结构。
【背景技术】
随着信息社会的发展，人们对显示设备的需求得到增长，因而也推动了液晶显示面板行业的快速发展，降低成本、提升产品良品率和提高产品品质成为液晶显示面板行业的工作重点。
液晶显示面板包括显示区和接合区，显示区上有多条信号线，接合区上设置有焊盘。显示区和接合区之间设置有扇出线，扇出线连接在焊盘和信号线之间，扇出线有单层和双层导线结构两种。现有技术的双层导线结构包括两个导电层且两个导电层完全重叠，导致在液晶显示面板的制程中上下两导电层之间很容易产生静电甚至击穿，造成液晶显示面板的产品良率下降，导致经济损失。
因此，需要提供一种显示面板及其扇出线结构。
【发明内容】
本发明主要解决的技术问题是提供一种显示面板及其扇出线结构，能够降低扇出线中两导电层之间的静电风险，从而可以提升产品良率，节约成本。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种显示面板的扇出线结构，显示面板包括显示区和接合区，显示区上有多条信号线，接合区上设置有焊盘，扇出线结构包括多条设置在显示区和接合区之间的扇出线，扇出线的第一端连接于焊盘，扇出线的第二端连接于信号线，扇出线还包括位于第一端和第二端之间的中间区段，且扇出线为双层导线结构，双层导线结构包括第一导电层和第二导电层，且中间区段处的第一导电层和第二导电层在显示面板所在平面上的投影至少部分错开。第一端和第二端处的第一导电层和第二导电层在显示面板所在平面上的投影至少部分错开设置。第一导电层设置在第二导电层的下层，双层导线结构还包括绝缘层和钝化层，绝缘层设置在第一导电层和第二导电层之间，钝化层设置于第二导电层和绝缘层上。
其中，扇出线的形状为直线、曲线或其组合，且多条扇出线的阻抗趋于一致。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种显示面板的扇出线结构，显示面板包括显示区和接合区，显示区上有多条信号线，接合区上设置有焊盘，扇出线结构包括多条设置在显示区和接合区之间的扇出线，扇出线的第一端连接于焊盘，扇出线的第二端连接于信号线，扇出线还包括位于第一端和第二端之间的中间区段，且扇出线为双层导线结构，双层导线结构包括第一导电层和第二导电层，且中间区段处的第一导电层和第二导电层在显示面板所在平面上的投影至少部分错开。
其中，第一导电层设置在第二导电层的下层，双层导线结构还包括绝缘层和钝化层，绝缘层设置在第一导电层和第二导电层之间，钝化层设置于第二导电层和绝缘层上。
其中，中间区段的第一导电层和第二导电层在显示面板所在平面上的投影完全错开。
其中，中间区段的第一导电层和第二导电层在显示面板所在平面上的投影部分错开。
其中，第一导电层和第二导电层均为金属层。
其中，第一导电层为金属层，第二导电层为氧化铟锡导电薄膜；或者，第一导电层为氧化铟锡导电薄膜，第二导电层为金属层。
其中，第一导电层和第二导电层均为氧化铟锡导电薄膜。
其中，第一端和第二端处的第一导电层和第二导电层在显示面板所在平面上的投影至少部分错开设置。
其中，扇出线的形状为直线、曲线或其组合，且多条扇出线的阻抗趋于一致。
为解决上述技术问题，本发明采用的又一个技术方案是：提供一种显示面板，其包括显示区和接合区，显示区上有多条信号线，接合区上设置有焊盘，扇出线结构包括多条设置在显示区和接合区之间的扇出线，扇出线的第一端连接于焊盘，扇出线的第二端连接于信号线，扇出线还包括位于第一端和第二端之间的中间区段，且扇出线为双层导线结构，双层导线结构包括第一导电层和第二导电层，且中间区段处的第一导电层和第二导电层在显示面板所在平面上的投影至少部分错开。
其中，第一导电层设置在第二导电层的下层，双层导线结构还包括绝缘层和钝化层，绝缘层设置在第一导电层和第二导电层之间，钝化层设置于第二导电层和绝缘层上。
其中，中间区段的第一导电层和第二导电层在显示面板所在平面上的投影完全错开。
其中，中间区段的第一导电层和第二导电层在显示面板所在平面上的投影部分错开。
其中，第一导电层和第二导电层均为金属层。
其中，第一导电层为金属层，第二导电层为氧化铟锡导电薄膜；或者，第一导电层为氧化铟锡导电薄膜，第二导电层为金属层。
其中，第一导电层和第二导电层均为氧化铟锡导电薄膜。
其中，第一端和第二端处的第一导电层和第二导电层在显示面板所在平面上的投影至少部分错开设置。
其中，扇出线的形状为直线、曲线或其组合，且多条扇出线的阻抗趋于一致。
本发明的有益效果是：区别于现有技术的情况，本发明通过设置在显示面板所在平面上的投影至少部分错开的第一导电层和第二导电层，能够降低扇出线中两导电层之间的静电风险，从而可以提升产品良率，节约成本。
【附图说明】
图1是本发明显示面板的结构示意图；
图2是本发明第一实施例的扇出线的第一导电层和第二导电层在显示面板所在平面上的投影示意图；
图3是本发明第一实施例的扇出线沿图2中A-A方向的截面图；
图4是本发明第一实施例的扇出线沿图2中B-B方向的截面图；
图5是本发明第一实施例的扇出线沿图2中C-C方向的截面图；
图6是本发明第二实施例的扇出线的第一导电层和第二导电层在显示面板所在平面上的投影示意图；
图7是本发明第二实施例的扇出线沿图6中D-D方向的截面图。
【具体实施方式】
下面结合附图和实施例对本发明进行详细的说明。
请参阅图1，图1是本发明显示面板的结构示意图。在本实施例中，显示面板1包括显示区11和接合区12。
显示区11上有多条信号线111a、111b、111c，接合区12上设置有焊盘121。
扇出线结构13包括多条设置在显示区11和接合区12之间的扇出线131a、131b、131c，扇出线131a、131b、131c的第一端连接于焊盘121，扇出线131a、131b、131c的第二端连接于信号线111a、111b、111c（例如信号线为显示面板1上的扫描信号线或数据信号线）。扇出线131a、131b、131c的形状可为直线、曲线或直线与曲线的组合，且各条扇出线131a、131b、131c的阻抗趋于一致。
各条扇出线131a、131b、131c为包括第一导电层和第二导电层的双层导线结构。请参阅图2，图2是本发明第一实施例的扇出线的第一导电层和第二导电层在显示面板所在平面上的投影示意图。在本实施例中，以扇出线131a为例，其包括第一端132、第二端133以及位于第一端132和第二端133之间的中间区段134。
扇出线131a为双层导线结构。双层导线结构包括第一导电层135和第二导电层136。
中间区段134处的第一导电层135和第二导电层136在显示面板1所在平面上的投影至少部分错开。具体地，在本实施例中，中间区段134的第一导电层135和第二导电层136在显示面板1所在平面上的投影优选为完全错开。
请参阅图3，图3为本发明第一实施例的扇出线沿图2中A-A方向的截面图。第一导电层135设置在第二导电层136的下层，双层导线结构还包括绝缘层143和钝化层144，绝缘层143设置在第一导电层135和第二导电层136之间，钝化层144设置于第二导电层136和绝缘层143上。在本实施例中，第一导电层135和第二导电层136在显示面板1所在平面上的投影为沿第一导电层135的宽度方向完全错开。
请参阅图4，图4是本发明第一实施例的扇出线沿图2中B-B方向的截面图。第一端132最末端处的第一导电层135和第二导电层136优选为完全重叠设置，以减小显示面板1的制程中在连接其第一导电层135和第二导电层136的末端时的跨度，从而减小连接阻抗。
如图4所示，在本实施例中，第一端132的最末端（B-B）处的第二导电层136在第一导电层135的正上方。绝缘层143设置在第一导电层135和第二导电层136之间，钝化层144设置于第二导电层136和绝缘层143上。应理解，在其他实施例中，第一端132和第二端133处的第一导电层135和第二导电层136在显示面板1所在平面上的投影也可以是部分错开或完全错开。
请参阅图5，图5是本发明第一实施例的扇出线沿图2中C-C方向的截面图。第二端133处的第一导电层135和第二导电层136在显示面板1所在平面上的投影优选为部分错开，其设置方式和第一端132的结构类似，在此不再赘述。
请参阅图6，图6是本发明第二实施例的扇出线的第一导电层和第二导电层在显示面板所在平面上的投影示意图。与第一实施例的不同之处在于，在本实施例中，中间区段234的第一导电层235和第二导电层236在显示面板1所在平面上的投影优选为部分错开。
请参阅图7，图7是本发明第二实施例的扇出线沿图6中D-D方向的截面图。如图7所示，在本实施例中，D-D处的第二导电层236在第一导电层235的斜上方。
值得注意的是，在上述任意一实施例中，第一导电层135，235和第二导电层136，236均为金属层；或者，第一导电层135，235为金属层，第二导电层136，236为氧化铟锡导电薄膜；或者，第一导电层135，235为氧化铟锡导电薄膜，第二导电层136，236为金属层；或者，第一导电层135，235和第二导电层136，236均为氧化铟锡导电薄膜。
上述各实施例可以通过技术特征重组而形成新的实施例，此处不再赘述。
区别于现有技术的情况，本发明通过设置在显示面板所在平面上的投影至少部分错开的第一导电层和第二导电层，能够降低扇出线中两导电层之间的静电风险，从而可以提升产品良率，节约成本。
以上仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种显示面板的扇出线结构，所述显示面板包括显示区和接合区，所述显示区上有多条信号线，所述接合区上设置有焊盘，其中，所述扇出线结构包括多条设置在所述显示区和所述接合区之间的扇出线，所述扇出线的第一端连接于所述焊盘，所述扇出线的第二端连接于所述信号线，所述扇出线还包括位于所述第一端和所述第二端之间的中间区段，且所述扇出线为双层导线结构，所述双层导线结构包括第一导电层和第二导电层，且所述中间区段处的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影至少部分错开，所述第一端和所述第二端处的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影至少部分错开设置，所述第一导电层设置在所述第二导电层的下层，所述双层导线结构还包括绝缘层和钝化层，所述绝缘层设置在所述第一导电层和所述第二导电层之间，所述钝化层设置于所述第二导电层和所述绝缘层上。
  2. 根据权利要求1所述的扇出线结构，其中，所述扇出线的形状为直线、曲线或其组合，且多条所述扇出线的阻抗趋于一致。
  3. 一种显示面板的扇出线结构，所述显示面板包括显示区和接合区，所述显示区上有多条信号线，所述接合区上设置有焊盘，其中，所述扇出线结构包括多条设置在所述显示区和所述接合区之间的扇出线，所述扇出线的第一端连接于所述焊盘，所述扇出线的第二端连接于所述信号线，所述扇出线还包括位于所述第一端和所述第二端之间的中间区段，且所述扇出线为双层导线结构，所述双层导线结构包括第一导电层和第二导电层，且所述中间区段处的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影至少部分错开。
  4. 根据权利要求3所述的扇出线结构，其中，所述第一导电层设置在所述第二导电层的下层，所述双层导线结构还包括绝缘层和钝化层，所述绝缘层设置在所述第一导电层和所述第二导电层之间，所述钝化层设置于所述第二导电层和所述绝缘层上。
  5. 根据权利要求4所述的扇出线结构，其中，所述中间区段的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影完全错开。
  6. 根据权利要求4所述的扇出线结构，其中，所述中间区段的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影部分错开。
  7. 根据权利要求4所述的扇出线结构，其中，所述第一导电层和所述第二导电层均为金属层。
  8. 根据权利要求4所述的扇出线结构，其中，所述第一导电层为金属层，所述第二导电层为氧化铟锡导电薄膜；或者，所述第一导电层为氧化铟锡导电薄膜，所述第二导电层为金属层。
  9. 根据权利要求4所述的扇出线结构，其中，所述第一导电层和所述第二导电层均为氧化铟锡导电薄膜。
  10. 根据权利要求3所述的扇出线结构，其中，所述第一端和所述第二端处的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影至少部分错开设置。
  11. 根据权利要求3所述的扇出线结构，其中，所述扇出线的形状为直线、曲线或其组合，且多条所述扇出线的阻抗趋于一致。
  12. 一种显示面板，所述显示面板包括显示区和接合区，所述显示区上有多条信号线，所述接合区上设置有焊盘，其中，所述扇出线结构包括多条设置在所述显示区和所述接合区之间的扇出线，所述扇出线的第一端连接于所述焊盘，所述扇出线的第二端连接于所述信号线，所述扇出线还包括位于所述第一端和所述第二端之间的中间区段，且所述扇出线为双层导线结构，所述双层导线结构包括第一导电层和第二导电层，且所述中间区段处的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影至少部分错开。
  13. 根据权利要求12所述的显示面板，其中，所述第一导电层设置在所述第二导电层的下层，所述双层导线结构还包括绝缘层和钝化层，所述绝缘层设置在所述第一导电层和所述第二导电层之间，所述钝化层设置于所述第二导电层和所述绝缘层上。
  14. 根据权利要求13所述的显示面板，其中，所述中间区段的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影完全错开。
  15. 根据权利要求13所述的显示面板，其中，所述中间区段的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影部分错开。
  16. 根据权利要求13所述的显示面板，其中，所述第一导电层和所述第二导电层均为金属层。
  17. 根据权利要求13所述的显示面板，其中，所述第一导电层为金属层，所述第二导电层为氧化铟锡导电薄膜；或者，所述第一导电层为氧化铟锡导电薄膜，所述第二导电层为金属层。
  18. 根据权利要求13所述的显示面板，其中，所述第一导电层和所述第二导电层均为氧化铟锡导电薄膜。
  19. 根据权利要求12所述的显示面板，其中，所述第一端和所述第二端处的所述第一导电层和所述第二导电层在所述显示面板所在平面上的投影至少部分错开设置。
  20. 根据权利要求12所述的显示面板，其中，所述扇出线的形状为直线、曲线或其组合，且多条所述扇出线的阻抗趋于一致。
PCT/CN2013/081277 2013-08-01 2013-08-12 显示面板及其扇出线结构 Ceased WO2015013994A1 (zh)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020167005480A KR101844692B1 (ko) 2013-08-01 2013-08-12 디스플레이 패널 및 그의 팬아웃라인 구조
US14/232,281 US20150173232A1 (en) 2013-08-01 2013-08-12 Display panel and fan out-line structure thereof
JP2016528290A JP6216053B2 (ja) 2013-08-01 2013-08-12 表示パネル及びそのファンアウト配線構造
RU2016105819A RU2641636C2 (ru) 2013-08-01 2013-08-12 Панель дисплея и ее структура линий разветвления по выходу
GB1522575.8A GB2531955B (en) 2013-08-01 2013-08-12 Display panel and fan out-line structure thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201310332269.5 2013-08-01
CN201310332269.5A CN103399434B (zh) 2013-08-01 2013-08-01 显示面板及其扇出线结构

Publications (1)

Publication Number Publication Date
WO2015013994A1 true WO2015013994A1 (zh) 2015-02-05

Family

ID=49563084

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2013/081277 Ceased WO2015013994A1 (zh) 2013-08-01 2013-08-12 显示面板及其扇出线结构

Country Status (7)

Country Link
US (1) US20150173232A1 (zh)
JP (1) JP6216053B2 (zh)
KR (1) KR101844692B1 (zh)
CN (1) CN103399434B (zh)
GB (1) GB2531955B (zh)
RU (1) RU2641636C2 (zh)
WO (1) WO2015013994A1 (zh)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9263477B1 (en) * 2014-10-20 2016-02-16 Shenzhen China Star Optoelectronics Technology Co., Ltd. Tri-gate display panel
KR102424443B1 (ko) 2015-09-14 2022-07-22 삼성디스플레이 주식회사 표시 장치
CN105932030B (zh) 2016-06-08 2019-07-26 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示装置
CN106125418A (zh) * 2016-08-11 2016-11-16 深圳市华星光电技术有限公司 显示装置及其显示面板
TWI587053B (zh) * 2016-12-23 2017-06-11 友達光電股份有限公司 導線結構及主動元件陣列基板
CN106773194B (zh) * 2016-12-30 2019-06-11 深圳市华星光电技术有限公司 一种电路基板以及显示设备
CN106531119A (zh) * 2017-01-10 2017-03-22 深圳市华星光电技术有限公司 一种驱动电路及显示装置
CN106548757A (zh) * 2017-01-10 2017-03-29 深圳市华星光电技术有限公司 一种驱动电路及显示装置
CN106647071B (zh) * 2017-02-15 2019-11-22 上海中航光电子有限公司 一种阵列基板、显示面板及显示装置
CN108962838B (zh) * 2017-05-22 2020-06-19 中芯国际集成电路制造(上海)有限公司 扇出结构和方法
KR102357393B1 (ko) * 2017-07-13 2022-02-03 삼성디스플레이 주식회사 디스플레이 장치
CN208422916U (zh) 2018-08-07 2019-01-22 京东方科技集团股份有限公司 阵列基板及显示装置
KR102797644B1 (ko) * 2018-08-07 2025-04-18 삼성디스플레이 주식회사 표시 장치
CN109270755B (zh) * 2018-09-30 2020-10-16 惠科股份有限公司 一种显示面板和显示装置
CN109307961B (zh) * 2018-10-29 2020-10-13 武汉华星光电技术有限公司 显示面板电路结构
CN209000913U (zh) 2018-11-06 2019-06-18 惠科股份有限公司 一种显示面板和显示装置
CN109917572A (zh) * 2019-04-19 2019-06-21 深圳市华星光电技术有限公司 显示面板的垂直淡线修复方法及显示面板
CN112086424B (zh) * 2019-06-14 2023-06-23 群创光电股份有限公司 接合垫结构
CN110928085B (zh) * 2019-11-26 2021-01-15 Tcl华星光电技术有限公司 阵列基板及显示面板
WO2022246702A1 (zh) * 2021-05-26 2022-12-01 京东方科技集团股份有限公司 显示基板、显示面板及显示装置
CN114883348A (zh) * 2022-06-07 2022-08-09 武汉华星光电半导体显示技术有限公司 显示面板及显示终端
CN115064108A (zh) * 2022-06-30 2022-09-16 武汉天马微电子有限公司 显示面板及显示装置
CN115016186B (zh) * 2022-06-30 2023-12-05 苏州华星光电技术有限公司 显示母板及显示面板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1740879A (zh) * 2005-09-09 2006-03-01 友达光电股份有限公司 用于平面显示器的扇出导线区
CN1743927A (zh) * 2005-10-12 2006-03-08 友达光电股份有限公司 扇出导线结构
US20100025690A1 (en) * 2008-07-29 2010-02-04 Samsung Electronics Co., Ltd. Thin film transistor substrate and method of manufacturing the same
CN101718929A (zh) * 2009-10-23 2010-06-02 深超光电（深圳）有限公司 一种阵列基板的扇出线路
CN103149753A (zh) * 2013-03-28 2013-06-12 深圳市华星光电技术有限公司 阵列基板及其扇出线结构

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2803792B2 (ja) * 1992-08-28 1998-09-24 シャープ株式会社 アクティブマトリクス型液晶表示装置
JP2965979B2 (ja) * 1997-09-19 1999-10-18 株式会社東芝 配線基板、表示装置のアレイ基板、アレイ基板を備えた液晶表示装置、並びに配線基板およびアレイ基板の製造方法
JP2002258315A (ja) * 2001-03-01 2002-09-11 Display Technologies Inc アレイ基板、及びこれを用いる液晶表示装置
KR101353493B1 (ko) 2007-02-28 2014-01-24 삼성디스플레이 주식회사 어레이 기판, 이의 제조 방법 및 이를 갖는 표시장치
JP5154298B2 (ja) * 2007-08-01 2013-02-27 株式会社ジャパンディスプレイウェスト 液晶表示パネル、その製造方法
TWI401493B (zh) * 2008-12-24 2013-07-11 Au Optronics Corp 液晶顯示面板
TW201044027A (en) * 2009-06-01 2010-12-16 Wintek Corp Color filter plate with touch function

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1740879A (zh) * 2005-09-09 2006-03-01 友达光电股份有限公司 用于平面显示器的扇出导线区
CN1743927A (zh) * 2005-10-12 2006-03-08 友达光电股份有限公司 扇出导线结构
US20100025690A1 (en) * 2008-07-29 2010-02-04 Samsung Electronics Co., Ltd. Thin film transistor substrate and method of manufacturing the same
CN101718929A (zh) * 2009-10-23 2010-06-02 深超光电（深圳）有限公司 一种阵列基板的扇出线路
CN103149753A (zh) * 2013-03-28 2013-06-12 深圳市华星光电技术有限公司 阵列基板及其扇出线结构

Also Published As

Publication number Publication date
US20150173232A1 (en) 2015-06-18
JP2016527554A (ja) 2016-09-08
RU2016105819A (ru) 2017-08-23
GB2531955A (en) 2016-05-04
GB2531955B (en) 2020-11-04
JP6216053B2 (ja) 2017-10-18
CN103399434A (zh) 2013-11-20
KR101844692B1 (ko) 2018-04-02
KR20160039275A (ko) 2016-04-08
RU2641636C2 (ru) 2018-01-18
GB201522575D0 (en) 2016-02-03
CN103399434B (zh) 2015-09-16

Similar Documents

Publication Publication Date Title
WO2015013994A1 (zh) 显示面板及其扇出线结构
WO2014032324A1 (zh) 一种显示面板以及液晶显示器
WO2019174099A1 (zh) 一种阵列基板及oled显示面板
WO2019227695A1 (zh) 一种阵列基板、显示面板及显示设备
WO2014114147A1 (zh) 单层电容触摸传感器及触控终端
WO2014183327A1 (zh) 阵列基板的扇出线结构及显示面板
WO2016082231A1 (zh) 触控面板以及触摸式显示装置
WO2020062516A1 (zh) 阵列基板和显示面板
WO2016090659A1 (zh) 阵列基板、液晶显示面板及该阵列基板的制造方法
WO2013170684A1 (zh) 触控面板及其应用的触控显示设备
WO2017201788A1 (zh) 显示面板以及显示终端
WO2014205873A1 (zh) 液晶显示面板
WO2014205858A1 (zh) 阵列基板及其制作方法、平板显示装置
WO2017206264A1 (zh) 一种tft基板以及液晶显示面板
WO2015006959A1 (zh) 显示面板及显示装置
CN110111682A (zh) 覆晶薄膜及显示装置
WO2020155225A1 (zh) 一种触控屏
WO2013170682A1 (zh) 触控面板及其制作方法
WO2014071793A1 (zh) 触控感应电极结构及其制造方法
WO2014114148A1 (zh) 单层电容触摸传感器及触控终端
WO2014134893A1 (zh) 导电网格搭桥结构及其制作方法
WO2016106826A1 (zh) 软性印刷电路板和液晶显示器
WO2015180193A1 (zh) 一种检测端子的走线装置及液晶显示器
CN203480178U (zh) 阵列基板和显示装置
WO2017124596A1 (zh) 液晶显示面板及液晶显示装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14232281

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13890468

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 201522575

Country of ref document: GB

Kind code of ref document: A

Free format text: PCT FILING DATE = 20130812

ENP Entry into the national phase

Ref document number: 2016528290

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2016105819

Country of ref document: RU

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 20167005480

Country of ref document: KR

Kind code of ref document: A

122 Ep: pct application non-entry in european phase

Ref document number: 13890468

Country of ref document: EP

Kind code of ref document: A1