WO2014199890A1 - 配線基板の製造方法 - Google Patents

配線基板の製造方法 Download PDF

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Publication number
WO2014199890A1
WO2014199890A1 PCT/JP2014/064929 JP2014064929W WO2014199890A1 WO 2014199890 A1 WO2014199890 A1 WO 2014199890A1 JP 2014064929 W JP2014064929 W JP 2014064929W WO 2014199890 A1 WO2014199890 A1 WO 2014199890A1
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WO
WIPO (PCT)
Prior art keywords
solder resist
resist layer
exposed
wiring board
connection pad
Prior art date
Application number
PCT/JP2014/064929
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
豊田　裕二
寛彦 後閑
川合　宣行
中川　邦弘
Original Assignee
三菱製紙株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱製紙株式会社 filed Critical 三菱製紙株式会社
Priority to KR1020157030883A priority Critical patent/KR102082641B1/ko
Priority to CN201480033751.1A priority patent/CN105309053B/zh
Publication of WO2014199890A1 publication Critical patent/WO2014199890A1/ja

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09845—Stepped hole, via, edge, bump or conductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography
    • H05K2203/0505—Double exposure of the same photosensitive layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0588—Second resist used as pattern over first resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0594—Insulating resist or coating with special shaped edges
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning

Definitions

  • the present invention relates to a method for manufacturing a wiring board, and more particularly to a method for manufacturing a wiring board having a plurality of connection pads for connecting an electronic component such as a semiconductor chip or another wiring board.
  • a wiring board inside various electric devices has a circuit board having an insulating layer and a conductor wiring formed on the surface of the insulating layer on one or both surfaces thereof. Also, a solder resist layer is formed on the entire surface of the circuit board of the wiring board so that the solder does not adhere to the conductor wiring that does not require soldering.
  • the solder resist layer plays a role of preventing the conductor wiring from being oxidized, electrically insulating, and protecting from the external environment.
  • connection pads for connecting to electronic components such as semiconductor chips and other wiring boards are formed on the surface of the wiring board.
  • the connection pad is produced by exposing the whole or part of the conductor wiring on the surface of the circuit board from the solder resist layer.
  • the density of the connection pads has been increased, and the pitch between the connection pads to be arranged is narrow, for example, there is a narrow pitch of 50 ⁇ m or less.
  • connection pad for connecting an electronic component provided on the wiring board is exposed corresponding to the arrangement of the electrode terminals of the electronic component, and the exposed part of the connection pad for connecting the electronic component and the electronic component are connected. It means that the electrode terminals are opposed to each other and electrically connected via solder bumps.
  • connection pad the solder resist layer is partially removed to expose the whole or part of the connection pad surface, and the solder mask layer is partially removed to remove the connection pad.
  • NSMD Non-Solder Mask Defined
  • FIG. 1A is a schematic cross-sectional view showing an example of a wiring board having an SMD structure.
  • a solder resist layer 2 is formed on the surface of the circuit board 1 provided with the conductor wiring 7 and the connection pads 3 as a part of the conductor wiring on the surface of the insulating layer 4.
  • the periphery of the connection pad 3 is covered with the solder resist layer 2. Therefore, there is an advantage that peeling of the connection pad 3 due to mechanical impact and disconnection of the neck portion in the lead-out wiring from the connection pad 3 are unlikely to occur.
  • FIG. 1B is a schematic cross-sectional view showing an example of a wiring board having an NSMD structure.
  • a solder resist layer 2 is formed on the surface of the circuit board 1 provided with the conductor wiring 7 and the connection pads 3 as a part of the conductor wiring on the surface of the insulating layer 4.
  • a plurality of connection pads 3 are arranged in the same opening of the solder resist layer 2, and these connection pads 3 are exposed from the solder resist layer 2.
  • the solder resist layer 2 in the vicinity of the connection pad 3 is completely removed, and the side surface of the connection pad 3 is completely exposed. Therefore, the bonding strength between the connection pad 3 and the solder can be ensured even with a small connection pad 3 as compared with the SMD structure.
  • connection pad 3 when the side surface of the connection pad 3 is completely exposed, the adhesive strength between the connection pad 3 and the insulating layer 4 may be reduced.
  • connection pads 3 arranged at a narrow pitch if a short circuit occurs between the connection pads 3 due to electroless nickel / gold plating in a later process, or if solder bumps are arranged on the connection pads 3, melting occurs. In some cases, the solder that has flowed out flows to the adjacent connection pads 3 and short-circuits between the connection pads 3.
  • an opening having a depth of about 0 to 15 ⁇ m is formed in a part of the solder resist layer provided on the circuit board surface by laser light irradiation.
  • a method of manufacturing a wiring board having a structure in which a part of the side surface of the connection pad is exposed from the solder resist layer has been proposed (for example, see Patent Document 1).
  • the connection pad and the insulating layer are less exposed than the wiring board in which the connection pad existing under the solder resist layer is completely exposed. It becomes possible to improve the adhesive strength.
  • a method of manufacturing a wiring board in which the solder resist layer 2 is filled between adjacent connection pads 3 has been proposed (for example, a patent).
  • Reference 2 According to the method of Patent Document 2, as shown in FIG. 2, the solder resist layer 2 is filled between the connection pads 3, and the thickness of the filled solder resist layer 2 is equal to or less than the thickness of the connection pad 3.
  • An NSMD structure can be formed. Specifically, a solder resist layer 2 is formed on the circuit board 1, and after exposing portions other than the region to be thinned until the thickness of the solder resist layer 2 is equal to or less than the thickness of the connection pad 3, an alkaline aqueous solution is obtained.
  • solder resist layer 2 in the non-exposed portion is thinned with the thinning treatment liquid until the thickness of the connection pad 3 or less.
  • a solder resist layer 2 having a multi-stage structure including a portion less than the thickness of the connection pad 3 and a portion exceeding the thickness of the connection pad 3 is formed, and a part of the conductor wiring that becomes the connection pad 3 is exposed.
  • a wiring board can be manufactured.
  • Patent Document 3 a solder resist layer is formed on a circuit board having a conductor circuit, and then a partial exposure is performed. Thereafter, an unexposed portion is developed to partially expose the upper portion of the connection pad from the solder resist layer.
  • a method of forming a dam shape by forming an opening to be formed, performing a second partial exposure, and then thinning an unexposed portion of the second partial exposure by a desmear process is disclosed. Since the opening of the solder resist layer by this method has an SMD structure, it is difficult to securely fix the electrical connection between the electrode terminal of the electronic component and the corresponding connection pad. In some cases, the electrical connection was insufficient.
  • the formation of the dam structure by this method is performed by desmear treatment, so the solder resist layer is roughened, the strength of the solder resist layer is reduced, and the reliability of the wiring board is sufficiently secured. There were cases where it was not possible.
  • Patent Document 4 discloses an opening that completely exposes a connection pad from a solder resist layer by forming a solder resist layer on a circuit board having a conductor circuit, performing partial exposure, and then developing the unexposed portion. Forming a second portion, then forming a second solder resist, then performing a second partial exposure in which an unexposed portion that is one size larger than the first partial exposure region is generated, and then developing the unexposed portion Discloses a method for forming a dam shape.
  • the opening of the solder resist layer by this method has an NSMD structure, and the connection pad is completely removed from the periphery of the solder resist layer, and the side surface of the connection pad is completely exposed. There is a risk that the adhesive strength between the two will decrease.
  • a solder resist layer is formed on a circuit board having a conductor circuit, and then a partial exposure process is performed, and then an unexposed portion of the solder resist layer is thinned so that openings and dams are formed in the solder resist layer.
  • a method of forming a shape is disclosed.
  • the opening of the solder resist layer by this method has an SMD structure, and the connection pad is covered with the solder resist layer in the vicinity of the periphery, so that the electrical connection between the electrode terminal of the electronic component and the corresponding connection pad is made. It is difficult to securely fix the connection, and the electrical connection between the connection pad and the solder ball may be insufficient.
  • An object of the present invention is to provide a method for manufacturing a wiring board having a solder resist layer on the surface of a circuit board having an insulating layer and a connection pad, wherein a part of the connection pad is exposed from the solder resist layer. There is no electrical short-circuit between the exposed connection pads, high adhesion strength between the connection pad and the insulating layer and the connection pad and solder, no electrical malfunction due to underfill outflow, and the strength of the solder resist layer It is an object of the present invention to provide a method for manufacturing a wiring board capable of obtaining a high wiring board.
  • step (C3) The step of exposing the region part thinned in step (B1) to the first solder resist layer, (A2) A step of forming a second solder resist layer on the first solder resist layer of the circuit board completed up to the step (C3), (C4) a step of exposing a portion other than the region to be developed in step (D), which is a subsequent step, to the second solder resist layer; (D) the step of removing the second solder resist layer of the non-exposed part with a developer; A method of manufacturing a wiring board (hereinafter referred to as “wiring board manufacturing method (2)”).
  • step (3) The step of exposing the region part thinned in step (B1) to the first solder resist layer, (A2) A step of forming a second solder resist layer on the first solder resist layer of the circuit board completed up to the step (C3), (C4) a step of exposing a portion other than the region to be thinned in the step (B3), which is a subsequent step, to the second solder resist layer; (B3) The step in which the second solder resist layer of the non-exposed part is thinned by the thinning treatment liquid in a range where the connection pad is not exposed, (C6) a step of exposing a portion other than the region to be developed in step (D), which is a subsequent step, to the second solder resist layer; (D) the step of removing the second solder resist in the non-exposed area with a developer; A method of manufacturing a wiring board (hereinafter referred to as “wiring board manufacturing method (3)”).
  • the solder resist layer in the method of manufacturing a wiring board having a solder resist layer on the surface of a circuit board having an insulating layer and a connection pad, and a part of the connection pad is exposed from the solder resist layer, the solder resist layer There is no electrical short-circuit between the exposed connection pads, high adhesion strength between the connection pad and the insulating layer and the connection pad and solder, no electrical malfunction due to underfill outflow, and the strength of the solder resist layer It is possible to provide a method for manufacturing a wiring board capable of obtaining a high wiring board.
  • FIGS. 3A and 3B are cross-sectional process diagrams illustrating an example of a method (1) of manufacturing a wiring board.
  • a method (1) of manufacturing a wiring board When electronic components are mounted on a wiring board by flip chip connection, due to the difference in thermal expansion coefficient between the electronic components and the wiring board, when a thermal shock is applied, stress concentrates on the connecting portion, causing deformation or destruction of the connecting portion. Sometimes. In order to prevent stress from concentrating on the connection portion and improve connection reliability, it is common to seal between the electronic component and the wiring board with a resin composition called underfill.
  • the wiring board manufacturing method (1) it is possible to form a two-stage solder resist layer having a dam structure for blocking underfill filling between the electronic component and the wiring board.
  • step (A) a solder resist layer 2 is formed on the surface of the circuit board 1 so as to cover the entire surface.
  • the solder resist layer 2 is exposed to a portion other than the region to be thinned in the subsequent step (B1).
  • the solder resist layer 2 in the non-exposed portion is thinned with the thinning treatment solution in a range where the connection pad 3 is not exposed.
  • step (C2) the solder resist layer 2 is exposed to a portion other than the region to be thinned in the subsequent step (B2).
  • step (B2) the solder resist layer 2 in the non-exposed portion is thinned with a thinning treatment solution until the thickness of the connection pad 3 or less, and a part of the connection pad 3 is exposed.
  • the connection pads 3 exposed in this step (B2) are used as the connection pads 3 for connecting electronic components.
  • step (C5) the solder resist layer 2 is exposed to the area portion thinned in step (B2).
  • the unnecessary solder resist layer 2 remains on the circuit board 1 completed up to the step (C5), the unnecessary solder resist layer 2 is removed by the developer after the step (C5) (D1). May be performed.
  • the exposure area in the step (C2) can be changed to an arbitrary shape.
  • the exposure area for example, a wiring board having a cross-sectional shape shown in FIG. It is possible.
  • FIG. 7 a convex portions of the solder resist layer 2 are formed between the connection pads 3.
  • FIG. 7 b the connection pads 3 exposed from the solder resist layer 2 and the conductor wirings 7 covered with the solder resist layer 2 are alternately arranged.
  • FIGS. 4A and 4B are cross-sectional process diagrams illustrating an example of a method (2) for manufacturing a wiring board.
  • the solder resist layer is composed of a first solder resist layer 2-1 and a second solder resist layer 2-2.
  • the manufacturing method (2) of the wiring board after the thickness of the first solder resist layer 2-1 in the non-exposed portion is reduced to be equal to or less than the thickness of the connection pad 3, the first solder resist layer 2-1 After the second solder resist layer 2-2 is formed on the surface and exposed, the second solder resist layer 2-2 in the non-exposed part is developed.
  • a two-stage solder resist layer having a dam structure for blocking an underfill filling between the electronic component and the wiring board is formed. Can do.
  • step (A1) a first solder resist layer 2-1 is formed on the surface of the circuit board 1 so as to cover the entire surface.
  • step (C1) the first solder resist layer 2-1 is exposed to a portion other than the region to be thinned in the subsequent step (B1).
  • the first solder resist layer 2-1 in the non-exposed part is thinned with a thinning treatment solution until the thickness of the connection pad 3 or less, and a part of the connection pad 3 is exposed.
  • step (C3) the first solder resist layer 2-1 is exposed to the region thinned in step (B1).
  • step (A2) a second solder resist layer 2-2 is formed on the first solder resist layer 2-1 of the circuit board completed up to step (C3).
  • step (C4) the second solder resist layer 2-2 is exposed to a portion other than the region to be developed in the subsequent step (D).
  • step (D) the second solder resist layer 2-2 in the non-exposed portion is removed with a developing solution, and a part of the connection pad 3 is exposed.
  • the connection pads 3 exposed in this step (D) are used as the connection pads 3 for connecting electronic components.
  • the exposure area in the step (C1) can be changed to an arbitrary shape.
  • the exposure area for example, a wiring board having a cross-sectional shape shown in FIG. It is possible.
  • FIG. 8 c convex portions of the first solder resist layer 2-1 are formed between the connection pads 3.
  • FIG. 8d the connection pads 3 exposed from the first solder resist layer 2-1 and the conductor wirings 7 covered with the first solder resist layer 2-1 are alternately arranged.
  • FIGS. 5A and 5B are cross-sectional process diagrams illustrating an example of a method (3) of manufacturing a wiring board.
  • the first solder resist layer 2-1 is thinned until the thickness of the first solder resist layer 2-1 is equal to or less than the thickness of the connection pad 3 before the first solder resist layer 2-1 is exposed.
  • a second solder resist layer 2-2 is formed on the surface of the first solder resist layer 2-1, and after exposure, the second solder resist layer 2-2 in the non-exposed part is thinned, Exposure is performed again, and the remaining second solder resist layer 2-2 in the unexposed area is developed.
  • the wiring board manufacturing method (3) has a dam structure for damming the underfill filling between the electronic component and the wiring board as in the case of using the wiring board manufacturing methods (1) and (2).
  • a two-stage solder resist layer can be formed.
  • step (A1) a first solder resist layer 2-1 is formed on the surface of the circuit board 1 so as to cover the entire surface.
  • the first solder resist layer 2-1 in the non-exposed part is thinned with a thinning treatment solution until the thickness of the connection pad 3 or less, and a part of all the connection pads 3 is exposed.
  • step (C3) the first solder resist layer 2-1 is exposed to the region thinned in step (B1).
  • step (A2) a second solder resist layer 2-2 is formed on the first solder resist layer 2-1 of the circuit board completed up to step (C3).
  • step (C4) the second solder resist layer 2-2 is exposed to a portion other than the region to be thinned in the subsequent step (B3).
  • the second solder resist layer 2-2 in the non-exposed part is thinned with the thinning treatment solution in a range where the connection pad 3 is not exposed.
  • step (C6) the second solder resist layer 2-2 is exposed to a portion other than the region to be developed in the subsequent step (D).
  • step (D) the second solder resist layer 2-2 in the non-exposed part is removed with a developer, and a part of the connection pad 3 is exposed again.
  • the connection pads 3 exposed in this step (D) are used as the connection pads 3 for connecting electronic components.
  • the exposure area in the step (C6) can be changed to an arbitrary shape.
  • the exposure area for example, a wiring board having a cross-sectional shape shown in FIG. It is possible.
  • the convex portion of the second solder resist layer 2-2 is formed between the connection pads 3.
  • the connection pads 3 exposed from the first solder resist layer 2-1 and the conductor wirings 7 covered with the first solder resist layer 2-1 and the second solder resist layer 2-2 are alternately arranged. It is out.
  • the circuit board 1 has an insulating layer 4 and connection pads 3 formed on the surface of the insulating layer 4.
  • a conductor wiring 7 is formed on the surface of the insulating layer 4, and the connection pad 3 is a part of the conductor wiring 7.
  • the wiring board according to the present invention has a solder resist layer 2 on the surface of the circuit board 1, and a part of the connection pad 3 is exposed from the solder resist layer 2.
  • the connection pads 3 for connecting electronic components on the surface and the electronic components are joined via solder bumps.
  • the circuit board is produced, for example, by forming a conductor wiring on one side or both sides of an insulating substrate. As another example, it is fabricated by alternately laminating build-up insulating layers and conductor wirings on an insulating substrate provided with conductor wirings.
  • FIG. 10 is produced by alternately laminating insulating layers and conductor wirings for build-up on a wiring board produced by forming conductor wiring on both surfaces of an insulating substrate and an insulating board provided with the conductor wiring. It is a schematic sectional drawing which shows an example of a wiring board.
  • FIGS. 3-1 to 5-2 which are cross-sectional process diagrams illustrating an example of a method for manufacturing a wiring board according to the present invention, and FIGS.
  • FIGS. 10A and 10B are schematic cross-sectional views illustrating an example of a wiring board which can be manufactured according to the present invention.
  • the circuit board 1 used in the method for manufacturing a wiring board of the present invention As shown in FIGS. 10A and 10B, the insulating layer 4 and the insulating layer 4 are formed on the insulating layer 4 and the surface of the insulating layer 4 by alternately laminating build-up insulating layers and conductive wires on the insulating substrate on which the conductor wiring is arranged. As shown in FIG.
  • the circuit board 1 having the conductor wiring 7 formed on both surfaces is formed by forming the conductor wiring on both surfaces of the insulating substrate, and is formed on the surfaces of the insulating layer 4 and the insulating layer 4.
  • a circuit board 1 having conductor wiring 7 on both surfaces is included.
  • the solder resist layer 2 having a dam structure can be formed on either surface, or can be formed on both surfaces.
  • the insulating substrate examples include a resin substrate made of an electrically insulating material in which a glass cloth is impregnated with a thermosetting resin such as a bismaleimide triazine resin or an epoxy resin.
  • a thermosetting resin such as a bismaleimide triazine resin or an epoxy resin.
  • an insulating layer for buildup for example, an electrical insulating material in which a glass cloth is impregnated with a thermosetting resin, as in the case of an insulating substrate, an inorganic filler such as silicon oxide is dispersed in a thermosetting resin such as an epoxy resin. Examples include electrical insulating materials.
  • the conductor wiring is formed by, for example, a subtractive method, a semi-additive method, an additive method, or the like.
  • an etching resist layer is formed, and exposure, development, etching, and resist stripping are performed to form a conductor wiring.
  • a base metal layer for electrolytic copper plating is provided on the surface of the insulating layer by electroless copper plating.
  • a plating resist layer having an opening corresponding to the conductor wiring is formed, and an electrolytic copper plating layer is formed on the surface of the base metal layer exposed by electrolytic copper plating.
  • the plating resist layer is peeled off, and the exposed base metal layer is removed by flash etching to form a conductor wiring.
  • connection pad on the surface of the wiring board is a connection pad for connecting to the electronic component.
  • the electronic component is flip-chip mounted on the wiring board by being electrically connected to the connection pad via the solder bump.
  • the surface of the connection pad can be roughened or can be treated with a coupling agent.
  • connection pad on the other surface of the wiring board There may be a connection pad on the other surface of the wiring board, and the connection pad on the other surface can be used as a connection pad for external connection.
  • the wiring board is flip-chip mounted on the mother board by electrically connecting the connection pads on the back surface and the conductor wiring of the external electric board such as the mother board via the solder bumps.
  • an alkali development type solder resist can be used as the solder resist. Further, it may be either a one-component or two-component liquid resist, or a dry film resist.
  • the solder resist contains, for example, an alkali-soluble resin, a monofunctional acrylic monomer, a polyfunctional acrylic monomer, a photopolymerization initiator, an epoxy resin, an inorganic filler, and the like.
  • alkali-soluble resin examples include alkali-soluble resins having both photo-curing properties and thermosetting properties.
  • a resin to which an acid anhydride has been added may be mentioned.
  • the polyfunctional acrylic monomer include trimethylolpropane triacrylate (Trimethylol Propane Triacrylate), dipentaerythritol hexaacrylate (Di-pentaerythritol Polyacrylate), and pentaerythritol triacrylate (Pentaerythritol Triacrylate).
  • Epoxy resin is used as a curing agent. It is cross-linked by reacting with carboxylic acid of alkali-soluble resin to improve heat resistance and chemical resistance, but carboxylic acid and epoxy react at room temperature, so the storage stability is poor and alkaline
  • the development type solder resist often takes a two-component form to be mixed before use.
  • the inorganic filler include talc, silica, barium sulfate, titanium oxide, and zinc oxide.
  • the solder resist layer is formed so as to cover the entire surface of the circuit board.
  • the solder resist layer for example, if it is a liquid resist, screen printing method, roll coating method, spray method, dipping method, curtain coating method, bar coating method, air knife method, hot melt method, gravure coating method, brush A coating method or an offset printing method can be used.
  • a laminating method or a vacuum laminating method is used.
  • the process in which the solder resist layer is thinned is a micellization process (thinning process) in which the solder resist layer components in the non-exposed area are micellized with a thinning solution, and then the micelle is removed with a micelle removal solution.
  • This is a process including a micelle removal process. Further, it may include a washing process for washing away the micelles that could not be removed, the remaining thinning treatment liquid and the micelle removal liquid by washing with water, and a drying process for removing the washing water.
  • the thinning treatment is a treatment in which the solder resist layer components in the non-exposed part are micelleed with a thinning treatment solution and the micelles are insolubilized in the thinning treatment solution.
  • an alkaline aqueous solution can be used as the thinning solution.
  • Alkaline aqueous solutions that can be used as the thinning solution include alkali metal silicate (Alkali Metal Silicate), alkali metal hydroxide (Alkali Metal Hydroxide), alkali metal phosphate (Alkali Metal Phosphate), alkali metal carbonate ( Alkali Metal Carbonate), aqueous solutions of inorganic alkaline compounds such as ammonium phosphate and ammonium carbonate; monoethanolamine, diethanolamine, triethanolamine, methylamine, dimethylamine, ethylamine, diethylamine, triethylamine, cyclohexylamine, tetramethylammonium hydroxy (Tetramethylammonium Hydroxide, T AH), tetraethylammonium hydroxide, trimethyl-2-hydroxyethyl ammonium hydroxide (choline, include aqueous solutions of organic alka
  • sulfates and sulfites can be added to the thinning solution.
  • the sulfate or sulfite include alkali metal sulfates or sulfites such as lithium, sodium or potassium, and alkaline earth metal sulfates or sulfites such as magnesium and calcium.
  • an inorganic alkaline compound selected from alkali metal carbonates, alkali metal phosphates, alkali metal hydroxides, alkali metal silicates, and TMAH (tetramethylammonium hydroxide) As the thinning treatment liquid, among these, an inorganic alkaline compound selected from alkali metal carbonates, alkali metal phosphates, alkali metal hydroxides, alkali metal silicates, and TMAH (tetramethylammonium hydroxide) ), A thinning solution containing at least one of the organic alkaline compounds selected from choline and containing 3 to 25% by mass of the inorganic alkaline compound and the organic alkaline compound has a more uniform surface. Can be preferably used. If it is less than 3% by mass, unevenness may easily occur in the thinning process.
  • the content of the alkaline compound is more preferably 5 to 20% by mass, and further preferably 7 to 15% by mass.
  • the pH of the thinning treatment solution is preferably 10 or more. Further, a surfactant, an antifoaming agent, a solvent and the like can be added as appropriate.
  • the presence of inorganic fillers that are insoluble in the thinning solution contained in the solder resist layer cannot be ignored.
  • the size of the inorganic filler depends on its type, but it has a certain particle size distribution from submicron order called nanofiller to several tens of microns, and it is 30-70% by mass in the layer. Present in content. Thinning proceeds after the alkaline compound penetrates into the solder resist layer and then proceeds through the process of micelle formation and micelle removal of the solder resist layer components, but the presence of insoluble inorganic filler suppresses the penetration of the alkaline compound, resulting in thinning. The speed may be slow.
  • the pH of the thinning solution is preferably 12.5 or more, and more preferably 13.0 or more, with respect to the inhibition of the penetration of the alkaline compound by such an inorganic filler.
  • the higher the pH of the thinning solution the greater the swelling of the solder resist layer when the alkaline compound penetrates, and the less the influence of the penetration inhibition by the inorganic filler.
  • the exposed connection pad when a part of the connection pad is exposed by thinning, the exposed connection pad can be used as a connection pad for connecting an electronic component.
  • the surface of the connection pad is roughened, and the anchor effect improves the adhesion between the connection pad and the solder resist layer, and high insulation reliability is maintained for a long time.
  • solder resist pattern formation when removing the solder resist layer and exposing the connection pad surface, it is common to use a low-concentration sodium carbonate aqueous solution with excellent dispersion ability as the developer. Almost no residue of the solder resist layer is generated. However, if the solder resist layer is thinned using a low-concentration sodium carbonate aqueous solution, it cannot be uniformly thinned in the surface, and in-plane unevenness occurs.
  • the temperature of the thinning treatment liquid is preferably 15 to 35 ° C, more preferably 20 to 30 ° C. If the temperature is too low, the penetration rate of the alkaline compound into the solder resist layer may be slow, and it takes a long time to reduce the desired thickness. On the other hand, if the temperature is too high, the micelle removal process proceeds simultaneously with the micelle formation of the solder resist layer components, which may cause uneven film thickness in the surface, which is not preferable.
  • thinning treatment using the thinning treatment liquid methods such as immersion treatment, paddle treatment, spray treatment, brushing, and scraping can be used, but immersion treatment is preferred.
  • immersion treatment is preferred.
  • bubbles are likely to be generated in the thinning treatment liquid, and the generated bubbles may adhere to the surface of the solder resist layer during the thinning, resulting in uneven film thickness.
  • spraying or the like it is preferable to make the spray pressure as small as possible so that bubbles are not generated.
  • the micelles are dissolved all at once by spraying the micelle removal solution in the micelle removal treatment that removes the micelles of the solder resist layer components insolubilized in the thinning solution. Remove.
  • the micelle removal liquid tap water, industrial water, pure water or the like can be used. Further, by using an aqueous solution having a pH of 5 to 10 containing at least one of inorganic alkaline compounds selected from alkali metal carbonates, alkali metal phosphates, and alkali metal silicates as a micelle removal solution, a thinning treatment is performed. The solder resist layer component insolubilized with the liquid is easily redispersed. When the pH of the micelle removal solution is less than 5, the solder resist layer components aggregate and become insoluble sludge, which may adhere to the surface of the solder resist layer that has been thinned.
  • the pH of the micelle removal solution exceeds 10
  • micelle formation of the solder resist layer component and the micelle removal process are promoted at the same time, and uneven film thickness tends to occur in the surface.
  • the pH of the micelle removal solution can be adjusted using sulfuric acid, phosphoric acid, hydrochloric acid, or the like.
  • the spray conditions in the micelle removal process will be described.
  • the spray conditions (temperature, time, spray pressure) are appropriately adjusted according to the dissolution rate of the solder resist layer to be thinned.
  • the treatment temperature is preferably 10 to 50 ° C., more preferably 22 to 50 ° C. If the temperature of the aqueous solution is less than 10 ° C., poor dissolution of the solder resist layer components may occur, and the solder resist layer residue may easily remain on the roughened connection pad surface. On the other hand, when the temperature exceeds 50 ° C., problems such as evaporation of the aqueous solution, temperature management in continuous operation, and restrictions on the device design may occur, which is not preferable.
  • the spray pressure is preferably 0.01 to 0.5 MPa, more preferably 0.1 to 0.3 MPa.
  • the supply flow rate of the micelle removal liquid is preferably 0.030 to 1.0 L / min, more preferably 0.050 to 1.0 L / min, and further 0.10 to 1.0 L / min per 1 cm 2 of the solder resist layer. preferable. When the supply flow rate is within this range, the micelles can be removed substantially uniformly in the surface without leaving insoluble components on the surface of the solder resist layer after thinning. When the supply flow rate per 1 cm 2 of the solder resist layer is less than 0.030 L / min, insoluble components of the solder resist layer may remain.
  • Solder resist layer 2 and first solder resist layer 2 formed in steps (A) in wiring substrate manufacturing method (1), and in steps (A1) and (A2) in wiring substrate manufacturing methods (2) and (3).
  • -1 the thickness of the second solder resist layer 2-2, the step (B1) in the manufacturing method (1) to (3) of the wiring substrate, the step (B2) in the manufacturing method (1) of the wiring substrate,
  • the exposed connection pad 3 is exposed depending on the amount of the solder resist layer 2, the first solder resist layer 2-1, and the second solder resist layer 2-2 in the non-exposed portion that are thinned.
  • the thickness of the surrounding solder resist layer 2 and the first solder resist layer 2-1 and the solder resist layer 2 and the first solder resist layer 2-1 that become a part of the dam for underfill damming The thickness of the second solder resist layer 2-2 is determined.
  • the amount of thin film can be adjusted as appropriate within a range of 0.01 to 500 ⁇ m.
  • the height from the surface of the solder resist layer 2 or the first solder resist layer 2-1 that has been thinned until the thickness of the connection pad becomes equal to or less than the thickness of the connection pad 3 exposed as appropriate depends on the amount of solder required later. adjust.
  • the thickness of the solder resist layer 2, the first solder resist layer 2-1, and the second solder resist layer 2-2 which are part of the dam for underfill damming, determines the size of the electronic component and the connection of the electronic component. It is adjusted as appropriate according to the size of the terminal and the amount of underfill filled between the electronic component and the wiring board.
  • step (C1) of the wiring board manufacturing method (1) the solder resist layer 2 is selectively exposed to a portion other than the region to be thinned in the subsequent step (B1).
  • step (C1) in the method (2) of manufacturing the wiring board the first solder resist layer 2-1 is selectively exposed to a portion other than the region to be thinned in the subsequent step (B1).
  • step (C2) in the manufacturing method (1) of the wiring board the solder resist layer 2 is selectively exposed to a portion other than the region to be thinned in the subsequent step (B2).
  • step (C4) in the method (2) for manufacturing the wiring board and the step (C6) in the method (3) for manufacturing the wiring substrate in the step (D), which is a subsequent step with respect to the second solder resist layer 2-2.
  • a portion other than the area to be developed is selectively exposed.
  • step (C4) in the manufacturing method (3) of the wiring board the second solder resist layer 2-2 is exposed to a portion other than the region to be thinned in the subsequent step (B3).
  • the exposed solder resist is photopolymerized, and the solder resist layer 2, the first solder resist layer 2-1, and the second solder resist layer 2-2 are cured.
  • the actinic ray 6 is exposed through the photomask 5, but it may be performed by a direct drawing method.
  • a direct drawing method for example, a xenon lamp, a high-pressure mercury lamp, a low-pressure mercury lamp, an ultra-high pressure mercury lamp, a reflected image exposure method using a UV fluorescent lamp as a light source, a contact exposure method using a photomask, a proximity method, a projection method, or a laser scanning Examples include an exposure method.
  • the “region to be thinned” on the first surface is, for example, a region around the connection pad including on the connection pad and between the connection pads. More specifically, a mounting area for mounting an electronic component and its surroundings.
  • step (C3) in the manufacturing methods (2) and (3) of the wiring board the first solder resist layer 2-1 is exposed to the region thinned in step (B1).
  • step (C5) in the manufacturing method (1) of the wiring substrate the solder resist layer 2 is exposed to the region thinned in the step (B2).
  • a method similar to the step (C1) in the wiring substrate manufacturing method (1) described above can be used.
  • the first solder resist layer 2-1 and the second solder resist layer 2-2 in the non-exposed portion are developed and removed (wiring board) Therefore, it is necessary to expose the region where the solder resist layer is to be finally formed and to photopolymerize the solder resist.
  • the portion exposed in step (C3) in the manufacturing method (2) of the wiring board includes at least the region thinned in step (B1), and the portion exposed in step (C1) and thinned in step (B1). It is preferable to include a boundary with the region.
  • the portion exposed in step (C5) in the manufacturing method (1) of the wiring board includes at least the region thinned in step (B2), and the portion exposed in step (C2) and the thin film in step (B2). It is preferable to include a boundary portion with the normalized region.
  • the exposure amount in (C5), the process (C4) in the manufacturing method (2) and (3) of the wiring board, and the process (C6) in the manufacturing method (3) of the wiring board is appropriately determined according to the photosensitivity of the solder resist. Is done. More specifically, in the step (B1) in the manufacturing method (2) of the wiring substrate, the steps (B1) and (B2) in the manufacturing method (1) of the wiring substrate, and the step (B3) in the manufacturing method (3) of the wiring substrate.
  • the solder resist is used to such an extent that the solder resist does not dissolve or swell with respect to the developing solution used in step (D) in the thinning treatment liquid used or the manufacturing method (2) and (3) of the wiring board. What is necessary is that it can be cured by photopolymerization, and it is usually 100 to 600 mJ / cm 2 .
  • step (C3) in manufacturing method (2) of wiring substrate steps (C2) and (C5) in manufacturing method (1) of wiring substrate, and steps (C3) and (C6) in manufacturing method (3) of wiring substrate
  • the exposure is preferably performed by a non-contact exposure method in an oxygen atmosphere.
  • the non-contact exposure method include a proximity method, a projection method, and a direct drawing method that does not use a photo mask, in which a gap is provided between the photo mask and the wiring board to perform non-contact exposure.
  • the surface layer of each solder resist layer Photopolymerization in the vicinity is inhibited by the influence of oxygen to become an uncured portion, and only the portion away from the surface layer is cured. Therefore, the uncured portion in the vicinity of the surface layer is removed by the steps (B2) and (D1) in the manufacturing method (1) of the wiring board and the step (D) in the manufacturing methods (2) and (3) of the wiring board.
  • the surfaces of the resist layer 2, the first solder resist layer 2-1, and the second solder resist layer 2-2 are roughened.
  • the adhesiveness with the underfill becomes stronger when the surface is roughened. It is possible to prevent stress from being concentrated on the connection part between the electronic component and the wiring board due to the impact, and the connection reliability is further improved. Adhesion with the underfill is improved by roughening the surfaces of the solder resist layer 2, the first solder resist layer 2-1, and the second solder resist layer 2-2 by non-contact exposure in an oxygen atmosphere. In addition, high connection reliability can be obtained.
  • the surface roughness Ra of the solder resist layer preferable for improving the adhesion with the underfill is 0.30 ⁇ m or more and 0.50 ⁇ m or less. When the surface roughness Ra exceeds 0.50 ⁇ m, the strength of the solder resist is lowered and insulation reliability may not be obtained.
  • the surface roughness Ra is an arithmetic average surface roughness.
  • the exposure amount in the step (C3) in the manufacturing method (2) of the wiring substrate and the steps (C2) and (C5) in the manufacturing method (1) of the wiring substrate is 1 to 5 times the exposure amount in the step (C1). Preferably, it is 1.5 times or more and 3 times or less.
  • the exposure dose in steps (C3) and (C6) in the method (3) for producing a wiring board is preferably 1 to 5 times the exposure dose in step (C4), more preferably 1 It is 5 times or more and 3 times or less.
  • the amount of exposure required to cure the solder resist to such an extent that the solder resist does not dissolve or swell is given to prevent polymerization by oxygen on the surface of the solder resist layer. Can be minimized.
  • the larger the exposure amount the more effective the suppression of polymerization inhibition is.
  • too much exposure amount is not preferable because not only the resolution of the solder resist deteriorates but also the exposure time becomes too long. .
  • step (B1) in the manufacturing method (2) and (3) of the wiring substrate and the step (B2) in the manufacturing method (1) of the wiring substrate until the thickness of the connection pad 3 is reduced by the thinning treatment liquid, The solder resist layer 2 and the first solder resist layer 2-1 in the non-exposed part are thinned to expose a part of the connection pad 3.
  • step (B1) in the manufacturing method (1) of the wiring substrate and the step (B3) in the manufacturing method (3) of the wiring substrate the solder resist of the non-exposed part is exposed to the extent that the connection pad 3 is not exposed by the thinning solution.
  • Layer 2 and second solder resist layer 2-2 are thinned. When a film-like resist is used and a support layer film is provided, the support layer film is peeled off before thinning.
  • the solder resist layer 2 and the first solder resist layer 2-1 after thinning are formed.
  • the film is thinned until the thickness of is equal to or less than the thickness of the exposed connection pad 3. If the thickness of the solder resist layer 2 and the first solder resist layer 2-1 after thinning is too thin, the electrical insulation between the exposed connection pads 3 becomes insufficient, and an electroless nickel / gold plating short circuit occurs. Or a short circuit may occur between the connection pads 3 due to solder. Therefore, the thickness of the solder resist layer 2 and the first solder resist layer 2-1 after thinning is preferably at least one third of the thickness of the connection pad 3, more preferably at least two thirds. It is good to be.
  • the thinning treatment is preferably performed with the thinning treatment surface facing up.
  • dipping treatment is effective because bubbles are not easily generated in the thinning treatment solution. In the unlikely event that bubbles are generated in the thinning solution, the bubbles will float in the thinning solution and adhere to the bottom surface of the substrate. Bubble adhesion is suppressed.
  • step (D) of the wiring board manufacturing methods (2) and (3) the second solder resist layer 2-2 in the non-exposed part is removed by development.
  • the wiring board manufacturing method (1) when an unnecessary solder resist layer 2 remains on the circuit board 1 completed up to the step (C5), the development is performed in the step (D1) after the step (C5). Then, the unnecessary solder resist layer 2 is removed.
  • a developing method a developer corresponding to the solder resist to be used is used, spray is sprayed on the surface of the circuit board, and unnecessary portions of each solder resist layer are removed.
  • a dilute alkaline aqueous solution is used as the developer, and generally a 0.3 to 3 mass% sodium carbonate aqueous solution or potassium carbonate aqueous solution is used.
  • Examples 1 to 4 are examples relating to the manufacturing method (1) of the wiring board shown in FIGS. 3-1 and 3-2.
  • Example 1 ⁇ Process (A)> Using a semi-additive method, a circuit board 1 (area 170 mm ⁇ 200 mm, conductor thickness 15 ⁇ m, board thickness 0.4 mm) having conductor wiring 7 formed on the surface was produced. On the surface, there is a conductor wiring having a line width of 25 ⁇ m and an interval of 50 ⁇ m used as the connection pad 3 for connecting electronic components. Next, using a vacuum laminator, a 25 ⁇ m thick solder resist film (manufactured by Taiyo Ink Manufacturing Co., Ltd., trade name: PFR-800 AUS410) was vacuum thermocompression bonded to the surface of the circuit board 1 (lamination temperature 75).
  • solder resist film manufactured by Taiyo Ink Manufacturing Co., Ltd., trade name: PFR-800 AUS410
  • soldering resist layer 2 was formed.
  • the thickness of the solder resist layer 2 from the surface of the insulating layer 4 was 30 ⁇ m, and the thickness on the connection pad 3 for connecting electronic components was 15 ⁇ m.
  • the circuit board 1 was immersed for 25 seconds to carry out micelle processing (thinning processing). After that, the micelle removal treatment by spraying the micelle removal liquid (liquid temperature 25 ° C.), the water washing treatment (liquid temperature 25 ° C.) and the drying treatment are performed, and the thickness of the solder resist layer 2 in the non-exposed part is the connection pad for connecting electronic components
  • the solder resist layer 2 having an average of 10 ⁇ m was thinned to 5.0 ⁇ m on the surface of 3. When observed with an optical microscope, the surface of the solder resist layer 2 was not uneven and good in-plane uniformity was obtained.
  • the surface of the solder resist layer 2 was not uneven and good in-plane uniformity was obtained.
  • the non-contact exposure in the oxygen atmosphere in the step (C2) the surface of the solder resist layer 2 in the region from the outer periphery 200 ⁇ m away to the outer periphery 400 ⁇ m away from the end of the connection pad 3 for connecting the electronic components arranged on the surface Photopolymerization was suppressed, and as a result, the thickness of the solder resist layer 2 was reduced by 0.5 ⁇ m.
  • the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , and then a thermosetting treatment was performed at 150 ° C. for 60 minutes to obtain a wiring board.
  • the conductor wiring 7 with a thickness of 15 ⁇ m is covered with the solder resist layer 2 with a thickness of 30 ⁇ m and 19.5 ⁇ m, and an underfill dam with a thickness of 10.5 ⁇ m corresponding to the step is formed. It had been.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the solder resist layer 2 having a thickness of 10.0 ⁇ m was filled between adjacent connection pads 3 for connecting an electronic component.
  • a solder resist layer having a thickness of 19.5 ⁇ m in a region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components disposed on the surface and the outer periphery 400 ⁇ m away from the ends When the surface roughness 2 was measured, the surface roughness Ra was 0.40 ⁇ m. Moreover, when the surface roughness of the soldering resist layer 2 between the adjacent connection pads 3 for electronic component connection was measured, the surface roughness Ra was 0.40 ⁇ m.
  • the arithmetic average surface roughness Ra by an ultra-deep shape measuring microscope uses a calculation formula according to JIS B0601-1994 surface roughness-definition.
  • the measurement area was 900 ⁇ m 2 and the reference length was 40 ⁇ m.
  • Example 2 Steps (A) to (B2) were performed in the same manner as in Example 1, except that the exposure dose in steps (C2) and (C5) was 200 mJ / cm 2 . As a result of observation with an optical microscope, the solder resist layer 2 was filled up to 5.0 ⁇ m below the surface of the connection pad 3 for connecting electronic components arranged on the surface.
  • the photopolymerization on the surface of the solder resist layer 2 other than the region irradiated with the active light beam 6 in the contact exposure in the step (C1) is suppressed, and the result
  • the thickness of the solder resist layer 2 having a thickness of 20 ⁇ m in the region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components arranged on the surface and the outer periphery 400 ⁇ m away from the ends was reduced by 1.0 ⁇ m.
  • the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , and then a thermosetting treatment was performed at 150 ° C. for 60 minutes to obtain a wiring board.
  • the conductor wiring 7 having a thickness of 15 ⁇ m was covered with the solder resist layer 2 having a thickness of 30 ⁇ m and 19 ⁇ m, and an underfill wetting dam having a thickness of 11 ⁇ m corresponding to the step was formed.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the solder resist layer 2 having a thickness of 10.0 ⁇ m was filled between adjacent connection pads 3 for connecting an electronic component.
  • the 19 ⁇ m-thick solder resist layer 2 in the region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components arranged on the surface and the outer periphery 400 ⁇ m away from the ends is formed.
  • the surface roughness Ra was 0.50 ⁇ m.
  • the surface roughness of the solder resist layer 2 between the adjacent connection pads 3 for connecting electronic components was measured, the surface roughness Ra was 0.50 ⁇ m.
  • Steps (A) to (B2) were carried out in the same manner as in Example 1 except that the exposure dose in steps (C2) and (C5) was 1000 mJ / cm 2 .
  • the solder resist layer 2 is filled up to 5.0 ⁇ m below the surface of the connection pad 3 for connecting electronic parts arranged on the surface, and this is due to inhibition of oxygen polymerization in the steps (C2) and (C5).
  • the film loss of the solder resist layer 2 was not confirmed.
  • the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , and then a thermosetting treatment was performed at 150 ° C. for 60 minutes to obtain a wiring board.
  • the conductor wiring 7 having a thickness of 15 ⁇ m was covered with the solder resist layer 2 having a thickness of 30 ⁇ m and 20 ⁇ m, and an underfill dam having a thickness of 10 ⁇ m corresponding to the step was formed.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the solder resist layer 2 having a thickness of 10.0 ⁇ m was filled between adjacent connection pads 3 for connecting an electronic component.
  • the solder resist layer 2 having a thickness of 20 ⁇ m in the region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components arranged on the surface and the outer periphery 400 ⁇ m away from the ends.
  • the surface roughness Ra was 0.30 ⁇ m.
  • the surface roughness of the solder resist layer 2 between the adjacent connection pads 3 for connecting electronic components was measured, the surface roughness Ra was 0.30 ⁇ m.
  • Example 4 In the steps (C2) and (C5), the steps (A) to (B2) were performed in the same manner as in Example 1 except that the exposure was performed by the contact exposure method. As a result of observation with an optical microscope, the solder resist layer 2 was filled between the connection pads 3 for electronic component connection up to 5.0 ⁇ m below the surface of the connection pads 3 for electronic component connection. In the steps (C2) and (C5), the surface of the solder resist layer 2 was not roughened because exposure was performed in a non-oxygen atmosphere by sufficiently releasing the air during contact exposure. As a result, the solder resist layer was not roughened. The thickness of 2 did not decrease.
  • the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , and then a thermosetting treatment was performed at 150 ° C. for 60 minutes to obtain a wiring board.
  • the conductor wiring 7 having a thickness of 15 ⁇ m was covered with the solder resist layer 2 having a thickness of 30 ⁇ m and 20 ⁇ m, and an underfill dam having a thickness of 10 ⁇ m corresponding to the step was formed.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the solder resist layer 2 having a thickness of 10.0 ⁇ m was filled between adjacent connection pads 3 for connecting an electronic component.
  • the solder resist layer 2 having a thickness of 20 ⁇ m in the region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components arranged on the surface and the outer periphery 400 ⁇ m away from the ends.
  • the surface roughness Ra was 0.10 ⁇ m.
  • the surface roughness of the solder resist layer 2 between the adjacent connection pads 3 for connecting electronic components was measured, the surface roughness Ra was 0.10 ⁇ m.
  • Examples 1 to 4 since there is a solder resist layer 2 having a sufficient thickness between adjacent connection pads 3 for connecting electronic components, it is ensured that an electrical short circuit due to solder occurs when electronic components are mounted. I was able to prevent it.
  • the circuit boards manufactured in Examples 1 to 4 have a dam structure for preventing underfill from overflowing from the gap between the electronic component and the circuit board to the surroundings. Prevents underfill from adversely affecting electrical operation without flowing out from the gap between the electronic component and circuit board even when sufficient underfill is filled to ensure connection reliability We were able to. Comparing Examples 1 to 4, it is manufactured in Examples 1 to 3 rather than the wiring board manufactured in Example 4 in which the surface of the solder resist layer 2 between and around the connection pads 3 for connecting electronic components is smooth. The printed wiring board had higher adhesion to the underfill and better connection reliability.
  • Comparative Example 1 is an example relating to a method of manufacturing a wiring board according to the prior art shown in FIG. ⁇ Process (A)> Using a semi-additive method, a circuit board 1 (area 170 mm ⁇ 200 mm, conductor thickness 15 ⁇ m, board thickness 0.4 mm) having conductor wiring 7 formed on the surface was produced. On the surface side, there is a conductor wiring having a line width of 25 ⁇ m and an interval of 50 ⁇ m used as the connection pad 3 for connecting electronic components.
  • solder resist film manufactured by Taiyo Ink Manufacturing Co., Ltd., trade name: PFR-800 AUS410
  • laminate temperature 75 the surface of the circuit board 1
  • C suction time 30 seconds, pressurization time 10 seconds
  • the soldering resist layer 2 was formed.
  • the thickness from the surface of the insulating layer 4 was 30 ⁇ m
  • the thickness on the connection pad 3 for connecting electronic components was 15 ⁇ m.
  • solder resist layer 2 In order to cure the solder resist layer 2, the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , and then a thermosetting treatment was performed at 150 ° C. for 60 minutes to obtain a wiring board. As a result of observation with an optical microscope, a conductor wiring 7 having a thickness of 15 ⁇ m is covered with a solder resist layer 2 having a thickness of 30 ⁇ m, and a connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m is exposed. The solder resist layer 2 having a thickness of 10.0 ⁇ m was filled between the connection pads 3.
  • the surface roughness of the solder resist layer 2 between adjacent connection pads 3 for connecting electronic components was measured.
  • the surface roughness was measured using an ultra-deep shape measuring microscope (manufactured by Keyence Corporation, product number “VK-8500”), the surface roughness Ra was 0.40 ⁇ m.
  • Comparative Example 1 when mounting an electronic component, there was a solder resist layer 2 having a sufficient thickness between adjacent connection pads 3 for connecting an electronic component, and an electrical short circuit due to solder could be reliably prevented.
  • the circuit board manufactured in Comparative Example 1 does not have a dam structure for preventing the underfill from overflowing from the gap between the electronic component and the circuit board. Therefore, when sufficient underfill is filled to ensure the connection reliability between the electronic component and the circuit board, the underfill flows out from the gap between the electronic component and the circuit board, resulting in an electrical malfunction. .
  • Examples 5 to 8 are examples relating to the manufacturing method (2) of the wiring board shown in FIGS. 4-1 and 4-2.
  • the first solder resist layer 2-1 was formed.
  • the thickness from the surface of the insulating layer 4 was 20 ⁇ m, and the thickness on the connection pad 3 for connecting electronic components was 5 ⁇ m.
  • the contact exposure was performed at an exposure amount of 200 mJ / cm 2 .
  • ⁇ Process (B1)> After the support layer film on the first solder resist layer 2-1 is peeled off, the thin film is processed with the thinning treatment surface facing upward using a 10% by mass sodium metasilicate aqueous solution (liquid temperature 25 ° C.) as the thinning treatment solution.
  • the circuit board 1 was immersed for 25 seconds in the chemical treatment solution to perform micellization treatment (thinning treatment). Thereafter, the micelle removal treatment by spraying the micelle removal liquid (liquid temperature 25 ° C.), the water washing treatment (liquid temperature 25 ° C.) and the drying treatment are performed, and the thickness of the first solder resist layer 2-1 in the non-exposed area is the electronic component.
  • the first solder resist layer 2-1 having an average of 10 ⁇ m was thinned to 5.0 ⁇ m below the surface of the connection pad 3 for connection.
  • the surface of the first solder resist layer 2-1 was free of unevenness of treatment, and good in-plane uniformity was obtained.
  • a first solder resist layer 2- of the circuit board 1 having a 15 ⁇ m-thick solder resist film (manufactured by Taiyo Ink Manufacturing Co., Ltd., trade name: PFR-800 AUS410) completed up to step (C3) 1 was vacuum thermocompression bonded (lamination temperature 75 ° C., suction time 30 seconds, pressurization time 10 seconds). Thereby, the second solder resist layer 2-2 was formed. In the second solder resist layer 2-2, the thickness from the surface of the insulating layer 4 was 30 ⁇ m.
  • C4 ⁇ Process (C4)> A photomask 5 having a pattern in which the active ray 6 is irradiated to a region outside the outer periphery 400 ⁇ m away from the end of the connection pad 3 for connecting the electronic component to the second solder resist layer 2-2 is used. Then, contact exposure was performed at an exposure amount of 200 mJ / cm 2 .
  • the photopolymerization of the surface of the first solder resist layer 2-1 between the connection pads 3 for connecting the electronic components arranged on the surface is suppressed.
  • the thickness of the solder resist layer 2-1 was reduced by 0.5 ⁇ m.
  • the entire surface is exposed at an exposure amount of 1000 mJ / cm 2 , followed by a thermosetting treatment at 150 ° C. for 60 minutes.
  • a wiring board was obtained.
  • the conductor wiring 7 having a thickness of 15 ⁇ m is covered with the first solder resist layer 2-1 and the second solder resist layer 2-2 having a thickness of 30 ⁇ m and 20 ⁇ m, and the thickness corresponding to the step is 10 ⁇ m.
  • An underfill weir dam was formed. Further, the electronic component connecting connection pads 3 having a thickness of 15 ⁇ m were exposed, and the first solder resist layer 2-1 having a thickness of 9.5 ⁇ m was filled between the adjacent electronic component connecting connection pads 3.
  • a first solder having a thickness of 20 ⁇ m in a region between the outer periphery 200 ⁇ m away from the end of the plurality of connection pads 3 for connecting electronic components arranged on the first surface and the outer periphery 400 ⁇ m away from the end When the surface roughness of the resist layer 2-1 was measured, the surface roughness Ra was 0.05 ⁇ m. Further, when the surface roughness of the first solder resist layer 2-1 in the region between adjacent electronic component connection pads 3 was measured, the surface roughness Ra was 0.40 ⁇ m.
  • Steps (A1) to (D) were performed in the same manner as in Example 5 except that the exposure dose in step (C3) was 200 mJ / cm 2 .
  • the first solder resist layer 2-1 was filled to 6.0 ⁇ m below the surface of the connection pad 3 for connecting electronic parts arranged on the surface.
  • the thickness of the solder resist layer 2-1 was reduced by 1.0 ⁇ m.
  • the entire surface is exposed at an exposure amount of 1000 mJ / cm 2 , followed by a thermosetting treatment at 150 ° C. for 60 minutes.
  • a wiring board was obtained.
  • the conductor wiring 7 having a thickness of 15 ⁇ m is covered with the first solder resist layer 2-1 and the second solder resist layer 2-2 having a thickness of 30 ⁇ m and 20 ⁇ m, and the thickness corresponding to the step is 10 ⁇ m.
  • An underfill weir dam was formed.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the first solder resist layer 2-1 having a thickness of 9.0 ⁇ m was filled between adjacent connection pads 3 for connecting an electronic component.
  • a first solder resist layer having a thickness of 20 ⁇ m in a region between an outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components arranged on the surface and an outer periphery 400 ⁇ m away from the ends
  • the surface roughness Ra was 0.05 ⁇ m.
  • the surface roughness of the first solder resist layer 2-1 in the region between adjacent electronic component connection pads 3 was measured, the surface roughness Ra was 0.50 ⁇ m.
  • Steps (A1) to (D) were performed in the same manner as in Example 5 except that the exposure amount in step (C3) was 1000 mJ / cm 2 .
  • the first solder resist layer 2-1 is filled to 5.0 ⁇ m below the surface of the connection pad 3 for connecting electronic parts arranged on the surface, which is due to inhibition of oxygen polymerization in the step (C3). No film loss of the first solder resist layer 2-1 was confirmed.
  • the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , followed by heat curing at 150 ° C. for 60 minutes. .
  • the conductor wiring 7 having a thickness of 15 ⁇ m is covered with the first solder resist layer 2-1 and the second solder resist layer 2-2 having a thickness of 30 ⁇ m and 20 ⁇ m, and the thickness corresponding to the step is 10 ⁇ m.
  • An underfill weir dam was formed.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the first solder resist layer 2-1 having a thickness of 10.0 ⁇ m was filled between adjacent connection pads 3 for connecting an electronic component.
  • a first solder resist layer having a thickness of 20 ⁇ m in a region between an outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components arranged on the surface and an outer periphery 400 ⁇ m away from the ends
  • the surface roughness Ra was 0.05 ⁇ m.
  • the surface roughness of the first solder resist layer 2-1 in the region between the adjacent electronic component connection pads 3 was measured, the surface roughness Ra was 0.30 ⁇ m.
  • Steps (A1) to (D) were carried out in the same manner as in Example 5 except that in the step (C3), the exposure was performed by the contact exposure method.
  • the first solder resist layer 2-1 was filled up to 5.0 ⁇ m below the surface of the connection pad 3 for connecting electronic parts arranged on the surface.
  • step (C3) the surface of the first solder resist layer 2-1 was not roughened because the exposure was performed in a non-oxygen atmosphere by sufficiently releasing the air during contact exposure. As a result, the first solder resist layer 2-1 was not roughened. The thickness of the resist layer 2-1 did not decrease.
  • the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , followed by heat curing at 150 ° C. for 60 minutes. .
  • the conductor wiring 7 having a thickness of 15 ⁇ m is covered with the first solder resist layer 2-1 and the second solder resist layer 2-2 having a thickness of 30 ⁇ m and 20 ⁇ m, and the thickness corresponding to the step is 10 ⁇ m.
  • An underfill weir dam was formed.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the first solder resist layer 2-1 having a thickness of 10.0 ⁇ m was filled between adjacent connection pads 3 for connecting an electronic component.
  • a first solder resist layer having a thickness of 20 ⁇ m in a region between an outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components arranged on the surface and an outer periphery 400 ⁇ m away from the ends
  • the surface roughness Ra was 0.05 ⁇ m.
  • the surface roughness of the first solder resist layer 2-1 between the adjacent connection pads 3 for connecting electronic components was measured, the surface roughness Ra was 0.10 ⁇ m.
  • Examples 5 to 8 since the first solder resist layer 2-1 having a sufficient thickness is provided between the adjacent connection pads 3 for connecting electronic components, an electrical short circuit due to solder occurs when the electronic components are mounted. It was possible to prevent this reliably.
  • the circuit boards manufactured in Examples 5 to 8 have a dam structure for preventing underfill from overflowing from the gap between the electronic component and the circuit board to the surroundings. Prevents underfill from adversely affecting electrical operation without flowing out from the gap between the electronic component and circuit board even when sufficient underfill is filled to ensure connection reliability We were able to. Comparing Examples 5 to 8, Examples 5 to 7 are more suitable than the wiring board manufactured in Example 8 in which the surface of the first solder resist layer 2-1 between the connection pads 3 for connecting electronic components is smooth. The manufactured wiring board had higher adhesion to the underfill and better connection reliability.
  • Examples 9 to 12 are examples relating to the manufacturing method (3) of the wiring board shown in FIGS. 5-1 and 5-2.
  • Example 9 ⁇ Process (A1)> Using a semi-additive method, a circuit board 1 (area 170 mm ⁇ 200 mm, conductor thickness 15 ⁇ m, board thickness 0.4 mm) having conductor wiring 7 formed on the surface was produced. On the surface, there is a conductor wiring having a line width of 25 ⁇ m and an interval of 50 ⁇ m used as the connection pad 3 for connecting electronic components. Next, using a vacuum laminator, a 15 ⁇ m thick solder resist film (manufactured by Taiyo Ink Mfg. Co., Ltd., trade name: PFR-800 AUS410) was vacuum bonded to the surface of the circuit board 1 (lamination temperature 75).
  • solder resist film manufactured by Taiyo Ink Mfg. Co., Ltd., trade name: PFR-800 AUS410
  • the first solder resist layer 2-1 was formed.
  • the thickness from the surface of the insulating layer 4 was 20 ⁇ m, and the thickness on the connection pad 3 for connecting electronic components was 5 ⁇ m.
  • ⁇ Process (B1)> After the support layer film on the first solder resist layer 2-1 is peeled off, the thin film is processed with the thinning treatment surface facing upward using a 10% by mass sodium metasilicate aqueous solution (liquid temperature 25 ° C.) as the thinning treatment solution.
  • the circuit board 1 was immersed for 25 seconds in the chemical treatment solution to perform micellization treatment (thinning treatment). Thereafter, the micelle removal treatment by spraying the micelle removal liquid (liquid temperature 25 ° C.), the water washing treatment (liquid temperature 25 ° C.) and the drying treatment are performed, and the thickness of the first solder resist layer 2-1 in the non-exposed area is the electronic component.
  • the first solder resist layer 2-1 having an average of 10 ⁇ m was thinned to 5.0 ⁇ m below the surface of the connection pad 3 for connection.
  • the surface of the first solder resist layer 2-1 was free of unevenness of treatment, and good in-plane uniformity was obtained.
  • a first solder resist layer 2- of the circuit board 1 having a 20 ⁇ m thick solder resist film manufactured by Taiyo Ink Manufacturing Co., Ltd., trade name: PFR-800 AUS410
  • step (C3) 1 was vacuum thermocompression bonded (lamination temperature 75 ° C., suction time 30 seconds, pressurization time 10 seconds).
  • the second solder resist layer 2-2 was formed.
  • the thickness from the surface of the insulating layer 4 was 30 ⁇ m.
  • C4 ⁇ Process (C4)> A photomask 5 having a pattern in which the active ray 6 is irradiated to a region outside the outer periphery 400 ⁇ m away from the end of the connection pad 3 for connecting the electronic component to the second solder resist layer 2-2 is used. Then, contact exposure was performed at an exposure amount of 200 mJ / cm 2 .
  • the second solder resist layer 2-2 having an average of 10 ⁇ m was thinned to 5.0 ⁇ m on the surface of the connection pad 3 for connection.
  • the surface of the second solder resist layer 2-2 was not uneven and good in-plane uniformity was obtained.
  • ⁇ Process (C6)> A photomask 5 having a pattern in which actinic rays 6 are irradiated to a region outside the outer periphery that is 200 ⁇ m away from the end of the connection pad 3 for connecting an electronic component with respect to the second solder resist layer 2-2 is used. Then, the exposure was performed at an exposure amount of 400 mJ / cm 2 by non-contact exposure in an oxygen atmosphere.
  • the photopolymerization of the surface of the first solder resist layer 2-1 between the connection pads 3 for connecting the electronic components arranged on the surface is suppressed.
  • the thickness of the solder resist layer 2-1 was reduced by 0.5 ⁇ m.
  • an outer periphery that is 200 ⁇ m away from the end portions of the plurality of connection pads 3 for connecting electronic components arranged on the surface and an outer periphery that is 400 ⁇ m away from the end portions The photopolymerization of the surface of the second solder resist layer 2-2 having a thickness of 20 ⁇ m in the region between them is suppressed, and as a result, the thickness of the surface of the second solder resist layer 2-2 having a thickness of 20 ⁇ m is reduced to 0.5 ⁇ m. It was decreasing.
  • the entire surface is exposed at an exposure amount of 1000 mJ / cm 2 , followed by a thermosetting treatment at 150 ° C. for 60 minutes.
  • a wiring board was obtained.
  • the conductor wiring 7 having a thickness of 15 ⁇ m is covered with the second solder resist layer 2-2 having a thickness of 30 ⁇ m and 19.5 ⁇ m, and an underfill dam having a thickness of 10.5 ⁇ m corresponding to the step is obtained.
  • a dam was formed.
  • the electronic component connecting connection pads 3 having a thickness of 15 ⁇ m were exposed, and the first solder resist layer 2-1 having a thickness of 9.5 ⁇ m was filled between the adjacent electronic component connecting connection pads 3.
  • a second solder having a thickness of 19.5 ⁇ m in a region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components disposed on the surface and the outer periphery 400 ⁇ m away from the ends
  • the surface roughness Ra was 0.40 ⁇ m.
  • the surface roughness of the first solder resist layer 2-1 in the region between adjacent electronic component connection pads 3 was measured, the surface roughness Ra was 0.40 ⁇ m.
  • Steps (A1) to (D) were performed in the same manner as in Example 9 except that the exposure dose in steps (C3) and (C6) was 200 mJ / cm 2 .
  • the first solder resist layer 2-1 was filled to 6.0 ⁇ m below the surface of the connection pad 3 for connecting electronic parts arranged on the surface.
  • the photopolymerization of the surface of the first solder resist layer 2-1 between the connection pads 3 for connecting the electronic components arranged on the surface is suppressed.
  • the thickness of the solder resist layer 2-1 was reduced by 1.0 ⁇ m.
  • an outer periphery that is 200 ⁇ m away from the end portions of the plurality of connection pads 3 for connecting electronic components arranged on the surface and an outer periphery that is 400 ⁇ m away from the end portions The photopolymerization of the surface of the second solder resist layer 2-2 having a thickness of 20 ⁇ m in the region between them is suppressed, and as a result, the thickness of the surface of the second solder resist layer 2-2 having a thickness of 20 ⁇ m is 1.0 ⁇ m. It was decreasing.
  • the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , followed by a thermosetting treatment at 150 ° C. for 60 minutes to obtain a wiring board.
  • the conductor wiring 7 having a thickness of 15 ⁇ m is covered with the first solder resist layer 2-1 and the second solder resist layer 2-2 having a thickness of 30 ⁇ m and 19 ⁇ m, and the thickness corresponding to the step is 11 ⁇ m.
  • An underfill weir dam was formed.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the first solder resist layer 2-1 having a thickness of 9.0 ⁇ m was filled between adjacent connection pads 3 for connecting an electronic component.
  • a second solder resist layer having a thickness of 19 ⁇ m is located in a region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components arranged on the surface and the outer periphery 400 ⁇ m away from the ends.
  • the surface roughness of 2-2 was measured, the surface roughness Ra was 0.50 ⁇ m.
  • the surface roughness of the first solder resist layer 2-1 in the region between adjacent electronic component connection pads 3 was measured, the surface roughness Ra was 0.50 ⁇ m.
  • Steps (A1) to (D) were performed in the same manner as in Example 9 except that the exposure dose in steps (C3) and (C6) was 1000 mJ / cm 2 .
  • the first solder resist layer 2-1 is filled to 5.0 ⁇ m below the surface of the connection pad 3 for connecting electronic components arranged on the surface, and oxygen in the steps (C3) and (C6) No decrease in the thickness of the first solder resist layer 2-1 and the second solder resist layer 2-2 due to polymerization inhibition was confirmed.
  • the entire surface is exposed at an exposure amount of 1000 mJ / cm 2 , followed by a thermosetting treatment at 150 ° C. for 60 minutes.
  • a wiring board was obtained.
  • the conductor wiring 7 having a thickness of 15 ⁇ m is covered with the first solder resist layer 2-1 and the second solder resist layer 2-2 having a thickness of 30 ⁇ m and 20 ⁇ m, and the thickness corresponding to the step is 10 ⁇ m.
  • An underfill weir dam was formed. Further, the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the first solder resist layer 2-1 having a thickness of 10.0 ⁇ m was filled between the connection pads 3 for connecting an electronic component adjacent to each other.
  • a second solder resist layer having a thickness of 20 ⁇ m is located in a region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components disposed on the surface and the outer periphery 400 ⁇ m away from the ends.
  • the surface roughness of 2-2 was measured, the surface roughness Ra was 0.30 ⁇ m.
  • the surface roughness of the first solder resist layer 2-1 in the region between the adjacent electronic component connection pads 3 was measured, the surface roughness Ra was 0.30 ⁇ m.
  • Example 12 In steps (C3) and (C6), steps (A1) to (D) were carried out in the same manner as in Example 9 except that the exposure was performed by the contact exposure method. As a result of observation with an optical microscope, the first solder resist layer 2-1 was filled up to 5.0 ⁇ m below the surface of the connection pad 3 for connecting electronic parts arranged on the surface. In the steps (C3) and (C6), the surface of the solder resist layer 2 was not roughened because exposure was performed in a non-oxygen atmosphere by sufficiently releasing the air during contact exposure. The thicknesses of the resist layer 2-1 and the second solder resist layer 2-2 did not decrease.
  • the entire surface was exposed at an exposure amount of 1000 mJ / cm 2 , followed by heat curing at 150 ° C. for 60 minutes. .
  • the conductor wiring 7 having a thickness of 15 ⁇ m is covered with the first solder resist layer 2-1 and the second solder resist layer 2-2 having a thickness of 30 ⁇ m and 20 ⁇ m, and the thickness corresponding to the step is 10 ⁇ m.
  • An underfill weir dam was formed.
  • the connection pad 3 for connecting an electronic component having a thickness of 15 ⁇ m was exposed, and the first solder resist layer 2-1 having a thickness of 10 ⁇ m was filled between the connection pads 3 for connecting an electronic component adjacent to each other.
  • a second solder resist layer having a thickness of 20 ⁇ m is located in a region between the outer periphery 200 ⁇ m away from the ends of the plurality of connection pads 3 for connecting electronic components disposed on the surface and the outer periphery 400 ⁇ m away from the ends.
  • the surface roughness of 2-2 was measured, the surface roughness Ra was 0.10 ⁇ m.
  • the surface roughness of the first solder resist layer 2-1 between the adjacent connection pads 3 for connecting electronic components was measured, the surface roughness Ra was 0.10 ⁇ m.
  • Examples 9 to 12 since the first solder resist layer 2-1 having a sufficient thickness is provided between adjacent connection pads 3 for connecting electronic components, an electrical short circuit due to solder occurs when the electronic components are mounted. It was possible to prevent this reliably.
  • the circuit boards manufactured in Examples 9 to 12 have a dam structure for preventing underfill from overflowing from the gap between the electronic component and the circuit board to the surroundings. Prevents underfill from adversely affecting electrical operation without flowing out from the gap between the electronic component and circuit board even when sufficient underfill is filled to ensure connection reliability We were able to. Comparing Examples 9 to 12, in Examples 9 to 11, the wiring board manufactured in Example 12 in which the surface of the first solder resist layer 2-1 between the connection pads 3 for connecting electronic components is smooth is used. The manufactured wiring board had higher adhesion to the underfill and better connection reliability.
  • connection pads 3 for connecting electronic components As described above, in the wiring boards manufactured according to Examples 1 to 12, a part of the connection pads 3 for connecting electronic components is exposed from the solder resist layer 2 (first solder resist layer 2-1), and And an underfill dam for preventing underfill formed by the two-stage solder resist layer 2 (the first solder resist layer 2-1 and the second solder resist layer 2-2).
  • an underfill dam for preventing underfill formed by the two-stage solder resist layer 2 (the first solder resist layer 2-1 and the second solder resist layer 2-2).
  • the connection pads 3 for connecting electronic components are arranged at high density, a solder resist layer 2 (first solder resist layer 2-1) having a sufficient thickness between the adjacent connection pads 3 for connecting electronic components.
  • the adhesive strength between the insulating layer 4 and the connection pad 3 for connecting electronic parts and the adhesive strength between the connection pad 3 for connecting electronic parts and solder are increased, and high connection reliability is obtained.
  • the steps (C2) and (C5) of the method (1) for manufacturing the wiring substrate, the step (C3) of the manufacturing method (2) of the wiring substrate, and the steps (C3) and (C6) of the manufacturing method (3) of the wiring substrate. Is performed by the non-contact exposure method in an oxygen atmosphere, the solder resist layer 2 (first solder resist layer 2-1, second solder) between the connection pads 3 for connecting the electronic parts and the surrounding area. Since the surface of the resist layer 2-2) is sufficiently roughened, the adhesion with the underfill is good and high connection reliability is obtained.
  • the method for manufacturing a wiring board according to the present invention can be applied, for example, to an application for manufacturing a wiring board having a plurality of connection pads for connecting electronic components such as semiconductor chips and other wiring boards.

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