WO2014192227A1 - 半導体基板、半導体装置、及び、半導体装置の製造方法 - Google Patents
半導体基板、半導体装置、及び、半導体装置の製造方法 Download PDFInfo
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- WO2014192227A1 WO2014192227A1 PCT/JP2014/002403 JP2014002403W WO2014192227A1 WO 2014192227 A1 WO2014192227 A1 WO 2014192227A1 JP 2014002403 W JP2014002403 W JP 2014002403W WO 2014192227 A1 WO2014192227 A1 WO 2014192227A1
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- 239000000758 substrate Substances 0.000 title claims abstract description 113
- 239000004065 semiconductor Substances 0.000 title claims abstract description 82
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 117
- 229910052796 boron Inorganic materials 0.000 claims abstract description 117
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 62
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 62
- 239000010703 silicon Substances 0.000 claims abstract description 62
- 150000004767 nitrides Chemical class 0.000 claims abstract description 16
- 230000007423 decrease Effects 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims description 11
- 238000009792 diffusion process Methods 0.000 claims description 7
- 239000002019 doping agent Substances 0.000 claims description 6
- 239000012808 vapor phase Substances 0.000 claims description 5
- 238000007740 vapor deposition Methods 0.000 claims description 2
- 230000007704 transition Effects 0.000 abstract description 12
- 230000000694 effects Effects 0.000 abstract description 9
- 239000010410 layer Substances 0.000 description 216
- 239000012535 impurity Substances 0.000 description 10
- 230000004888 barrier function Effects 0.000 description 6
- 239000010408 film Substances 0.000 description 6
- 230000006866 deterioration Effects 0.000 description 5
- 239000002346 layers by function Substances 0.000 description 4
- 238000005259 measurement Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 238000001947 vapour-phase growth Methods 0.000 description 4
- 230000003247 decreasing effect Effects 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- 206010027476 Metastases Diseases 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000009401 metastasis Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 229910004541 SiN Inorganic materials 0.000 description 1
- -1 SiO or SiN Chemical class 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
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- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Definitions
- the present invention relates to a semiconductor substrate, a semiconductor device, and a method for manufacturing the semiconductor device, and more particularly to a semiconductor substrate having a nitride semiconductor layer, a semiconductor device using the semiconductor substrate, and a method for manufacturing the semiconductor device.
- the nitride semiconductor layer is generally formed on an inexpensive silicon substrate or sapphire substrate.
- the lattice constants of these substrates and the nitride semiconductor layers are greatly different, and the thermal expansion coefficients are also different. Therefore, large strain energy is generated in the nitride semiconductor layer formed by epitaxial growth on the substrate. As a result, the nitride semiconductor layer is likely to generate cracks and crystal quality.
- Patent Document 1 discloses that the buffer layer contains boron in order to suppress the transition.
- Patent Document 2 in order to obtain a boron-containing aluminum nitride thin film (functional layer) with good crystallinity, an aluminum nitride layer containing boron and having a higher concentration as it approaches the functional layer is used as the buffer layer. Is disclosed.
- Patent Document 3 a buffer layer including a first layer made of a GaN layer containing boron and phosphorus and a second layer made of an AlInGaAsN layer containing phosphorus is used. It is disclosed that leakage current caused by electron gas is suppressed.
- a buffer layer has been provided and the configuration of the buffer layer has been optimized.
- the present invention has been made in view of the above-described problems, and includes a semiconductor substrate, a semiconductor device, and a boron substrate that do not diffuse boron to an operation layer while containing sufficient boron in a buffer layer to obtain a transition suppressing effect, and Another object is to provide a method for manufacturing a semiconductor device.
- the present invention provides a silicon-based substrate, a buffer layer provided on the silicon-based substrate and made of a nitride-based semiconductor containing boron, and an operation layer formed on the buffer layer. And the boron concentration of the buffer layer gradually decreases from the silicon-based substrate side toward the operating layer side.
- the boron concentration of the buffer layer gradually decreases from the silicon-based substrate side toward the operation layer side, the boron concentration is high in the lower layer of the buffer layer, and a transition suppressing effect is obtained.
- the pit generation in the operation layer formed on the layer can be suppressed, and the boron concentration is low in the upper layer of the buffer layer, suppressing the influence of impurities on the operation layer (deterioration of device characteristics and crystallinity due to impurities). can do.
- the buffer layer is a laminate in which a first layer made of Al y Ga 1-y N and a second layer made of Al x Ga 1-x N (0 ⁇ x ⁇ y ⁇ 1) are repeatedly laminated. And it is preferable that the said boron is contained in both the said 1st layer and the said 2nd layer. Thus, boron is contained in both the first layer made of Al y Ga 1-y N and the second layer made of Al x Ga 1-x N (0 ⁇ x ⁇ y ⁇ 1) in the buffer layer. Therefore, the metastasis can be suppressed more effectively.
- the boron concentration of the silicon substrate is higher than the boron concentration in the region of the buffer layer on the silicon substrate side.
- the boron concentration of the silicon-based substrate is higher than the boron concentration in the region on the silicon-based substrate side of the buffer layer, it is possible to suppress the transfer more effectively.
- the semiconductor substrate includes the above-described semiconductor substrate, a first electrode formed on the operation layer, and a second electrode formed on the operation layer, the first electrode and The second electrode is arranged so that a current flows from the first electrode to the second electrode through the operation layer.
- the semiconductor device is provided.
- the semiconductor device uses the semiconductor substrate in which the boron concentration of the buffer layer gradually decreases from the silicon-based substrate side toward the operation layer side, good device characteristics can be obtained. .
- a method of manufacturing a semiconductor device comprising: forming a buffer layer made of a nitride semiconductor on a silicon substrate; and forming an operation layer on the buffer layer.
- the step of forming the buffer layer includes the step of introducing boron into the buffer layer so that the boron concentration of the buffer layer gradually decreases from the silicon-based substrate side toward the operation layer side.
- the manufacturing method of the semiconductor device characterized by including is provided.
- the step of forming the buffer layer includes the step of introducing boron into the buffer layer so that the boron concentration of the buffer layer gradually decreases from the silicon-based substrate side toward the operation layer side.
- the boron concentration of the layer can be gradually decreased from the silicon-based substrate side toward the operation layer side.
- introducing boron into the buffer layer may include diffusing boron into the buffer layer from the silicon-based substrate doped with boron by thermal diffusion. In this way, boron is diffused from the silicon-based substrate doped with boron by thermal diffusion into the buffer layer, and boron is introduced into the buffer layer, so that the boron concentration of the buffer layer can be more efficiently increased. It can be gradually decreased from the substrate side toward the operation layer side.
- the step of introducing boron into the buffer layer may include doping boron from the vapor phase by introducing a dopant gas when the buffer layer is formed by vapor deposition.
- boron is doped from the vapor phase by introducing a dopant gas during vapor phase growth, and boron is introduced into the buffer layer, so that sufficient boron is obtained in the buffer layer to obtain a transition suppressing effect. It can be included.
- the buffer layer a stacked body in which a first layer made of Al y Ga 1-y N and a second layer made of Al x Ga 1-x N (0 ⁇ x ⁇ y ⁇ 1) are repeatedly stacked.
- the boron is included in both the first layer and the second layer.
- boron is included in both the first layer made of Al y Ga 1-y N and the second layer made of Al x Ga 1-x N (0 ⁇ x ⁇ y ⁇ 1) in the buffer layer.
- the metastasis can be suppressed more effectively.
- the boron concentration of the silicon substrate is higher than the boron concentration in the region of the buffer layer on the silicon substrate side.
- the boron concentration of the silicon-based substrate is higher than the boron concentration in the region on the silicon-based substrate side of the buffer layer, it is possible to suppress the transfer more effectively.
- a semiconductor substrate, a semiconductor device, and a method for manufacturing a semiconductor device in which boron is contained in the buffer layer enough to obtain a transition suppressing effect and boron does not diffuse to the operating layer. Can be provided.
- FIG. 6 It is a schematic sectional drawing which shows an example of the embodiment of the semiconductor substrate of this invention. 6 is a graph showing boron concentration profiles of semiconductor substrates of Experimental Example 1 and Experimental Example 5. It is a schematic sectional drawing which shows an example of the embodiment of the semiconductor device of this invention. It is an observation result of the center part of the operation
- the present inventors have intensively studied a semiconductor substrate in which impurities are not diffused in the operation layer even when boron doping is performed on the buffer layer.
- the boron concentration is high in the lower layer of the buffer layer, and the boron concentration is low in the upper layer of the buffer layer. It has been found that the generation of pits in the operating layer can be suppressed and the influence of impurities on the operating layer can be suppressed, and the present invention has been made.
- FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor substrate of the present invention.
- a semiconductor substrate 10 of the present invention shown in FIG. 1 includes a silicon substrate 12, an initial layer 14 provided on the silicon substrate 12, a buffer layer 16 provided on the initial layer 14, and a buffer layer 16.
- An operating layer 22 is provided.
- the silicon-based substrate 12 is a substrate made of, for example, Si or SiC.
- the initial layer 14 is a layer made of, for example, AlN.
- the buffer layer 16 may be a stacked body in which a first layer 15 made of a nitride semiconductor and a second layer 17 made of a nitride semiconductor having a composition different from that of the first layer are repeatedly stacked.
- the first layer 15 is made of, for example, Al y Ga 1-y N
- the second layer 17 is made of, for example, Al x Ga 1-x N (0 ⁇ x ⁇ y ⁇ 1).
- the first layer 15 can be AlN and the second layer 17 can be GaN.
- the operation layer 22 can include a channel layer 18 and a barrier layer 20 provided on the channel layer 18.
- the channel layer 18 is made of, for example, GaN
- the barrier layer 20 is made of, for example, AlGaN.
- the buffer layer 16 contains boron, and the boron concentration of the buffer layer 16 gradually decreases from the silicon-based substrate 12 side toward the operation layer 22 side. Since the buffer layer 16 has the boron concentration profile as described above, the boron concentration is high in the lower layer of the buffer layer 16 and a transition suppressing effect can be obtained. Can be suppressed. In addition, the boron concentration is low in the upper layer of the buffer layer, and the influence of impurities on the operation layer (deterioration of device characteristics and crystallinity due to impurities) can be suppressed.
- boron is preferably included in both the first layer 15 and the second layer 17. By including boron in both the first layer 15 and the second layer 17, it is possible to suppress the transfer more effectively.
- the boron concentration of the silicon-based substrate 12 is preferably higher than the boron concentration in the region on the silicon-based substrate side of the buffer layer 16.
- the boron concentration of the silicon-based substrate is higher than the boron concentration in the region on the silicon-based substrate side of the buffer layer, it is possible to suppress the transfer more effectively.
- FIG. 3 is a schematic sectional view showing an example of the semiconductor device of the present invention.
- a semiconductor device 11 of the present invention shown in FIG. 3 includes a silicon substrate 12, an initial layer 14 provided on the silicon substrate 12, a buffer layer 16 provided on the initial layer 14, and a buffer layer 16.
- An operating layer 22 is provided.
- the operation layer 22 includes a channel layer 18 and a barrier layer 20 provided on the channel layer 18.
- the semiconductor device 11 further includes a first electrode 26, a second electrode 28, and a control electrode 30 provided on the operation layer 22.
- the first electrode 26 and the second electrode 28 are arranged so that a current flows from the first electrode 26 to the second electrode 28 via the two-dimensional electron gas 24 formed in the channel layer 18. Has been.
- the current flowing between the first electrode 26 and the second electrode 28 can be controlled by the potential applied to the control electrode 30.
- the buffer layer 16 contains boron, and the boron concentration of the buffer layer 16 gradually decreases from the silicon-based substrate 12 side toward the operation layer 22 side. Since the buffer layer 16 has the boron concentration profile as described above, the boron concentration is high in the lower layer of the buffer layer 16 to obtain a transition suppressing effect, and pits are generated in the operation layer formed on the buffer layer. Can be suppressed. In addition, the boron concentration is low in the upper layer of the buffer layer, and the influence of impurities on the operation layer (deterioration of device characteristics and crystallinity due to impurities) can be suppressed.
- the initial layer 14 is formed on the silicon-based substrate 12. Specifically, the initial layer 14 made of AlN is grown by 10 to 300 nm by MOVPE (metal organic vapor phase epitaxy).
- MOVPE metal organic vapor phase epitaxy
- the buffer layer 16 is formed on the initial layer 14. Specifically, the first layer 15 made of AlN and the second layer 17 made of GaN are alternately grown by the MOVPE method.
- the film thickness of the first layer 15 is, for example, 3 to 7 nm, and the film thickness of the second layer 17 is, for example, 2 to 7 nm.
- the operation layer 22 is formed on the buffer layer 16. Specifically, a channel layer 18 made of GaN and a barrier layer 20 made of AlGaN are sequentially grown on the buffer layer 16 by MOVPE.
- the film thickness of the channel layer 18 is, for example, 1000 to 4000 nm
- the film thickness of the barrier layer 20 is, for example, 10 to 50 nm.
- the first electrode 26, the second electrode 28, and the control electrode 30 are formed on the barrier layer 20.
- the first electrode 26 and the second electrode 28 can be formed of, for example, a laminated film of Ti / Al
- the control electrode 30 is formed of, for example, a lower layer film made of a metal oxide such as SiO or SiN, and Ni, Au, Mo , Pt, or other metal layer.
- boron is introduced into the buffer layer 16 so that the boron concentration of the buffer layer 16 gradually decreases from the silicon substrate 12 side toward the operation layer 22 side.
- boron can be introduced into the buffer layer 16 by diffusing boron from the silicon-based substrate 12 doped with boron by thermal diffusion into the buffer layer 16.
- boron is diffused from the silicon-based substrate doped with boron at a high concentration by thermal diffusion to the buffer layer, so that the boron concentration of the buffer layer is more efficiently increased from the silicon-based substrate side to the operating layer side. It can be gradually reduced toward.
- the boron concentration of the heavily doped silicon substrate to be used is preferably, for example, 5 ⁇ 10 19 atoms / cm 3 or more.
- boron can be introduced into the buffer layer 16 by doping boron from the vapor phase by introducing a dopant gas.
- the boron concentration of the buffer layer 16 is changed from the silicon substrate 12 side to the operation layer 22 side. It can be gradually reduced toward.
- boron is doped from the vapor phase by introducing the dopant gas during the vapor phase growth, and boron is introduced into the buffer layer 16, so that the boron concentration of the silicon-based substrate 12 is not increased.
- Sufficient boron can be contained in the buffer layer 16 to obtain a transition suppressing effect.
- both thermal diffusion and gas doping may be performed.
- Example 1 A silicon single crystal substrate having a substrate resistivity of 2 m ⁇ ⁇ cm and a boron concentration of 5 ⁇ 10 19 atoms / cm 3 is used, and a buffer layer 16 and an operation layer 22 are formed thereon, as shown in FIG. Such a semiconductor substrate was produced. Boron was introduced into the buffer layer 16 by diffusing boron from the silicon substrate 12 doped with boron into the buffer layer 16 by thermal diffusion. For the semiconductor substrate of Experimental Example 1, the boron concentration profile in the depth direction of the semiconductor substrate was measured by SIMS measurement. The measurement results are shown in FIG. Further, the surface of the central portion of the operation layer 22 of the semiconductor substrate of Experimental Example 1 was observed with a microscope. The surface observation results are shown in FIG.
- Example 2 A semiconductor substrate was fabricated in the same manner as in Experimental Example 1. However, a silicon substrate having a substrate resistivity of 3 to 4 m ⁇ ⁇ cm and a boron concentration of 3 ⁇ 10 19 atoms / cm 3 was used. For the semiconductor substrate of Experimental Example 2, the surface of the central portion of the operation layer 22 was observed in the same manner as in Experimental Example 1. The pit density (pieces / cm 2 ) was calculated from the surface observation results. The results are shown in Table 1.
- Example 3 A semiconductor substrate was fabricated in the same manner as in Experimental Example 1. However, a silicon substrate having a substrate resistivity of 7 to 9 m ⁇ ⁇ cm and a boron concentration of 1 ⁇ 10 19 atoms / cm 3 was used. For the semiconductor substrate of Experimental Example 3, the surface of the central portion of the operation layer 22 was observed in the same manner as in Experimental Example 1. The pit density (pieces / cm 2 ) was calculated from the surface observation results. The results are shown in Table 1.
- Example 4 A semiconductor substrate was fabricated in the same manner as in Experimental Example 1. However, a silicon substrate having a substrate resistivity of 11 to 13 m ⁇ ⁇ cm and a boron concentration of 7.5 ⁇ 10 18 atoms / cm 3 was used. For the semiconductor substrate of Experimental Example 4, the surface of the central portion of the operation layer 22 was observed in the same manner as in Experimental Example 1. The pit density (pieces / cm 2 ) was calculated from the surface observation results. The results are shown in Table 1.
- Example 5 A semiconductor substrate was fabricated in the same manner as in Experimental Example 1. However, a silicon substrate having a substrate resistivity of 15 to 16 m ⁇ ⁇ cm and a boron concentration of 5 ⁇ 10 18 atoms / cm 3 was used.
- the semiconductor substrate of Experimental Example 5 As in Experimental Example 1, the boron concentration profile in the depth direction of the semiconductor substrate was measured by SIMS measurement. The measurement results are shown in FIG. Further, the surface of the central portion of the operation layer 22 was observed for the semiconductor substrate of Experimental Example 5. The surface observation results are shown in FIG. As can be seen from FIG. 5, many pits (white dots in the figure) are observed on the surface of the operation layer 22 of the semiconductor substrate of Experimental Example 5. Moreover, the pit density (pieces / cm 2 ) was calculated from the surface observation results. The results are shown in Table 1.
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Abstract
Description
例えば、特許文献1には、転移を抑制するために、バッファ層にボロンを含有させることが開示されている。
また、特許文献2には、結晶性のよいボロン含有窒化アルミ薄膜(機能層)を得るために、バッファ層として、ボロンを含有しその濃度が機能層に近づくほど高くなる窒化アルミ層を用いることが開示されている。
さらに、特許文献3には、ボロン、リンを含むGaN層からなる第1の層と、リンを含むAlInGaAsN層からなる第2の層とを含むバッファ層を用いることによって、バッファ層中の二次電子ガスを原因とするリーク電流を抑制することが開示されている。
すなわち、転移を抑制するために、デバイス動作層(機能層)に近い領域までバッファ層中にボロンドープを行うと、動作層に不純物が拡散し、デバイスの特性劣化を生じさせる。
このように、バッファ層のAlyGa1-yNからなる第1層、及び、AlxGa1-xN(0≦x<y≦1)からなる第2層の両方にボロンが含まれていることで、より効果的に転移抑制を行うことができる。
このように、シリコン系基板のボロン濃度が、前記バッファ層の前記シリコン系基板側の領域のボロン濃度よりも高いことで、より効果的に転移抑制を行うことができる。
このように、熱拡散によってボロンがドープされた前記シリコン系基板から前記バッファ層にボロンを拡散させて、バッファ層にボロンを導入することで、より効率よくバッファ層のボロン濃度を、前記シリコン系基板側から前記動作層側に向かって徐々に減少させることができる。
このように、気相成長中にドーパントガスを導入することによって気相からボロンをドーピングして、バッファ層にボロンを導入することで、転移抑制効果が得られるのに十分なボロンをバッファ層に含有させることができる。
このように、バッファ層のAlyGa1-yNからなる第1層、及び、AlxGa1-xN(0≦x<y≦1)からなる第2層の両方にボロンを含ませることで、より効果的に転移抑制を行うことができる。
このように、シリコン系基板のボロン濃度を、前記バッファ層の前記シリコン系基板側の領域のボロン濃度よりも高くすることで、より効果的に転移抑制を行うことができる。
前述のように、転移を抑制するために、バッファ層にボロンドープを行う必要があるが、デバイス動作層に近い領域までバッファ層中にボロンドープを行うと、動作層に不純物が拡散し、デバイスの特性劣化を生じさせるという問題点があった。
その結果、バッファ層のボロン濃度を、シリコン系基板側から動作層側に向かって徐々に減少させることで、バッファ層の下層ではボロン濃度が高くなり、バッファ層の上層ではボロン濃度が低くなり、動作層のピット発生を抑制することができるとともに、動作層への不純物の影響を抑制することができることを見出し、本発明をなすに至った。
図1に示す本発明の半導体基板10は、シリコン系基板12と、シリコン系基板12上に設けられた初期層14と、初期層14上に設けられたバッファ層16と、バッファ層16上に設けられた動作層22を有している。
ここで、シリコン系基板12は、例えば、SiまたはSiCからなる基板である。また、初期層14は、例えば、AlNからなる層である。
具体的には、第一の層15はAlNとすることができ、第二の層17はGaNとすることができる。
動作層22は、チャネル層18と、チャネル層18上に設けられたバリア層20とを有することができる。チャネル層18は例えば、GaNからなり、バリア層20は例えば、AlGaNからなる。
バッファ層16は、上記のようなボロン濃度プロファイルを有しているので、バッファ層16の下層ではボロン濃度が高く、転移抑制効果が得られ、バッファ層16上にエピタキシャル成長させる動作層のピット発生を抑制することができる。
また、バッファ層の上層ではボロン濃度が低く、動作層への不純物の影響(不純物によるデバイス特性劣化、結晶性の劣化)を抑制することができる。
ボロンが第一の層15及び第二の層17の両方に含まれていることで、より効果的に転移抑制を行うことができる。
シリコン系基板のボロン濃度が、前記バッファ層の前記シリコン系基板側の領域のボロン濃度よりも高いことで、より効果的に転移抑制を行うことができる。
図3は本発明の半導体装置の一例を示す概略断面図である。
図3に示す本発明の半導体装置11は、シリコン系基板12と、シリコン系基板12上に設けられた初期層14と、初期層14上に設けられたバッファ層16と、バッファ層16上に設けられた動作層22を有している。
動作層22は、チャネル層18と、チャネル層18上に設けられたバリア層20を有している。
半導体装置11において、第一電極26及び第二電極28は、第一電極26から、チャネル層18内に形成された二次元電子ガス24を介して、第二電極28に電流が流れるように配置されている。
第一電極26と第二電極28との間に流れる電流は、制御電極30に印可される電位によってコントロールすることができる。
バッファ層16は、上記のようなボロン濃度プロファイルを有しているので、バッファ層16の下層ではボロン濃度が高く、転移抑制効果が得られ、バッファ層上に形成される動作層のピット発生を抑制することができる。
また、バッファ層の上層ではボロン濃度が低く、動作層への不純物の影響(不純物によるデバイス特性劣化、結晶性の劣化)を抑制することができる。
まず、シリコン系基板12上に、初期層14を形成する。具体的には、MOVPE(有機金属気相成長)法によって、AlNからなる初期層14を10~300nm成長させる。
次に、初期層14上に、バッファ層16を形成する。具体的には、MOVPE法によって、AlNからなる第一の層15と、GaNからなる第二の層17とを交互に成長させる。第一の層15の膜厚は例えば、3~7nmであり、第二の層17の膜厚は例えば、2~7nmである。
ここで、このようなボロン濃度プロファイルにするには、熱拡散によってボロンがドープされたシリコン系基板12からバッファ層16にボロンを拡散させることで、バッファ層16にボロンを導入することができる。
このように、熱拡散によってボロンが高濃度にドープされたシリコン系基板からバッファ層にボロンを拡散させることで、より効率よくバッファ層のボロン濃度を、前記シリコン系基板側から前記動作層側に向かって徐々に減少させることができる。この場合、用いる高濃度ドープシリコン基板のボロン濃度としては、たとえば、5×1019atoms/cm3以上とするのが好ましい。
このとき、バッファ層16の気相成長中に、ボロンを含むドーパントガスのガス流量を減らしていくように制御することで、バッファ層16のボロン濃度をシリコン系基板12側から動作層22側に向かって徐々に減少させることができる。
このように、気相成長中にドーパントガスを導入することによって気相からボロンをドーピングして、バッファ層16にボロンを導入することで、シリコン系基板12のボロン濃度を高くしなくても、転移抑制効果が得られるのに十分なボロンをバッファ層16に含有させることができる。
もちろん、熱拡散とガスドープを両方おこなうようにしてもよい。
2mΩ・cmの基板抵抗率を有し、5×1019atoms/cm3のボロン濃度を有するシリコン単結晶基板を用いて、これにバッファ層16、動作層22を形成して図1に示したような半導体基板を作製した。
なお、熱拡散によってボロンがドープされたシリコン基板12からバッファ層16にボロンを拡散させることで、バッファ層16にボロンを導入した。
実験例1の半導体基板について、SIMS測定により、半導体基板の深さ方向のボロン濃度プロファイルを測定した。測定結果を図2に示す。
また、実験例1の半導体基板について、動作層22の中央部の表面を顕微鏡観察した。表面観察結果を図4に示す。図4からわかるように実験例1の半導体基板の動作層22表面にはピット(欠陥)が見られない。
また、表面観察結果からピット密度(個/cm2)を計算した。その結果を表1に示す。
実験例1と同様にして、半導体基板を作製した。ただし、3~4mΩ・cmの基板抵抗率を有し、3×1019atoms/cm3のボロン濃度を有するシリコン基板を用いた。
実験例2の半導体基板について、実験例1と同様にして、動作層22の中央部の表面を観察した。表面観察結果からピット密度(個/cm2)を計算した。その結果を表1に示す。
実験例1と同様にして、半導体基板を作製した。ただし、7~9mΩ・cmの基板抵抗率を有し、1×1019atoms/cm3のボロン濃度を有するシリコン基板を用いた。
実験例3の半導体基板について、実験例1と同様にして、動作層22の中央部の表面を観察した。表面観察結果からピット密度(個/cm2)を計算した。その結果を表1に示す。
実験例1と同様にして、半導体基板を作製した。ただし、11~13mΩ・cmの基板抵抗率を有し、7.5×1018atoms/cm3のボロン濃度を有するシリコン基板を用いた。
実験例4の半導体基板について、実験例1と同様にして、動作層22の中央部の表面を観察した。表面観察結果からピット密度(個/cm2)を計算した。その結果を表1に示す。
実験例1と同様にして、半導体基板を作製した。ただし、15~16mΩ・cmの基板抵抗率を有し、5×1018atoms/cm3のボロン濃度を有するシリコン基板を用いた。
実験例5の半導体基板について、実験例1と同様にして、SIMS測定により、半導体基板の深さ方向のボロン濃度プロファイルを測定した。測定結果を図2に示す。
また、実験例5の半導体基板について、動作層22の中央部の表面を観察した。表面観察結果を図5に示す。図5からわかるように実験例5の半導体基板の動作層22表面にはピット(図中の白点)が多数見られる。また、表面観察結果からピット密度(個/cm2)を計算した。その結果を表1に示す。
動作層22の表面のピット密度が小さい実験例1は、図2からわかるように、動作層22の表面のピット密度が大きい実験例5と比較して、バッファ層16中のボロン濃度が高いとともに、動作層に向かって徐々に減少している。これにより、実験例1はバッファ層16における転移抑制効果が得られたため、動作層22の表面のピット密度が小さくなったものと考えられる。
Claims (9)
- シリコン系基板と、
前記シリコン系基板上に設けられ、ボロンを含む窒化物系半導体からなるバッファ層と、
前記バッファ層上に形成された動作層とを有し、
前記バッファ層のボロン濃度は、前記シリコン系基板側から前記動作層側に向かって徐々に減少しているものであることを特徴とする半導体基板。 - 前記バッファ層は、AlyGa1-yNからなる第1層とAlxGa1-xN(0≦x<y≦1)からなる第2層とが繰り返し積層された積層体であって、
前記ボロンは、前記第1層および前記第2層の両方に含まれていることを特徴とする請求項1に記載の半導体基板。 - 前記シリコン系基板のボロン濃度は、前記バッファ層の前記シリコン系基板側の領域のボロン濃度よりも高いことを特徴とする請求項1又は請求項2に記載の半導体基板。
- 請求項1乃至請求項3のいずれか一項に記載の半導体基板と、
前記動作層上に形成された第1電極と、
前記動作層上に形成された第2電極とを有し、
前記第1電極及び前記第2電極は、前記第1電極から、前記動作層を介して、前記第2電極へと電流が流れるように配置されているものであることを特徴とする半導体装置。 - シリコン系基板上に、窒化物系半導体からなるバッファ層を形成する工程と、
前記バッファ層上に、動作層を形成する工程とを有する半導体装置の製造方法であって、
前記バッファ層を形成する工程は、
前記バッファ層のボロン濃度が前記シリコン系基板側から前記動作層側に向かって徐々に減少するように、前記バッファ層にボロンを導入する段階
を含むことを特徴とする半導体装置の製造方法。 - 前記バッファ層にボロンを導入する段階は、熱拡散によってボロンがドープされた前記シリコン系基板から前記バッファ層にボロンを拡散させる段階を含むことを特徴とする請求項5に記載の半導体装置の製造方法。
- 前記バッファ層にボロンを導入する段階は、前記バッファ層を気相成長によって形成する際に、ドーパントガスを導入することによって気相からボロンをドーピングする段階を含むことを特徴とする請求項5又は請求項6に記載の半導体装置の製造方法。
- 前記バッファ層として、AlyGa1-yNからなる第1層とAlxGa1-xN(0≦x<y<1)からなる第2層とが繰り返し積層された積層体を形成し、
前記ボロンは、前記第1層及び前記第2層の両方に含ませることを特徴とする請求項5乃至請求項7のいずれか一項に記載の半導体装置の製造方法。 - 前記シリコン系基板のボロン濃度を、前記バッファ層の前記シリコン系基板側の領域のボロン濃度よりも高くすることを特徴とする請求項5乃至請求項8のいずれか一項に記載の半導体装置の製造方法。
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- 2014-05-02 CN CN201480031048.7A patent/CN105247658B/zh active Active
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JP5756830B2 (ja) | 2015-07-29 |
US20160111273A1 (en) | 2016-04-21 |
JP2014236050A (ja) | 2014-12-15 |
CN105247658B (zh) | 2018-02-13 |
KR101821472B1 (ko) | 2018-01-23 |
CN105247658A (zh) | 2016-01-13 |
US9520286B2 (en) | 2016-12-13 |
TWI578382B (zh) | 2017-04-11 |
TW201513174A (zh) | 2015-04-01 |
KR20160015230A (ko) | 2016-02-12 |
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