WO2012036017A1 - 誘電体薄膜素子、アンチヒューズ素子及び誘電体薄膜素子の製造方法 - Google Patents
誘電体薄膜素子、アンチヒューズ素子及び誘電体薄膜素子の製造方法 Download PDFInfo
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- WO2012036017A1 WO2012036017A1 PCT/JP2011/070219 JP2011070219W WO2012036017A1 WO 2012036017 A1 WO2012036017 A1 WO 2012036017A1 JP 2011070219 W JP2011070219 W JP 2011070219W WO 2012036017 A1 WO2012036017 A1 WO 2012036017A1
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- 239000010409 thin film Substances 0.000 title claims abstract description 87
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 229910052751 metal Inorganic materials 0.000 claims abstract description 115
- 239000002184 metal Substances 0.000 claims abstract description 115
- 238000000034 method Methods 0.000 claims abstract description 42
- 238000007747 plating Methods 0.000 claims abstract description 11
- 239000010410 layer Substances 0.000 claims description 425
- 239000011241 protective layer Substances 0.000 claims description 73
- 239000003990 capacitor Substances 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 19
- 239000010408 film Substances 0.000 claims description 11
- 229910052804 chromium Inorganic materials 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 3
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 239000000758 substrate Substances 0.000 description 20
- 230000000052 comparative effect Effects 0.000 description 16
- 238000000206 photolithography Methods 0.000 description 8
- 229910004298 SiO 2 Inorganic materials 0.000 description 7
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- 230000000694 effects Effects 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 239000009719 polyimide resin Substances 0.000 description 3
- 230000002040 relaxant effect Effects 0.000 description 3
- 238000004528 spin coating Methods 0.000 description 3
- 238000000224 chemical solution deposition Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910000510 noble metal Inorganic materials 0.000 description 2
- 150000002902 organometallic compounds Chemical class 0.000 description 2
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- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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- 238000009751 slip forming Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/33—Thin- or thick-film capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
- H01L23/5223—Capacitor integral with wiring layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
- H01L23/53261—Refractory-metal alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
- H01L27/016—Thin-film circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
以下のように誘電体薄膜素子を作製した。
実験例1として、図2のような誘電体薄膜素子を作製した。
比較例1として、図7のような誘電体薄膜素子を作製した。図7の誘電体薄膜素子は、第1の表面金属層43、44が形成されており、第2の表面金属層が形成されていない構造である。それ以外は実験例1と同様の構成であり、実験例1の同様のプロセスで作製した。
比較例2として、図8のような誘電体薄膜素子を作製した。図8の誘電体薄膜素子は、第1の表面金属層が形成されておらず、第2の表面金属層45、46が開口部の内面にも形成されている構造である。それ以外は実験例1と同様の構成であり、実験例1の同様のプロセスで作製した。
比較例3として、図9のような誘電体薄膜素子を作製した。図9の誘電体薄膜素子は、第1の表面金属層と第2の表面金属層がどちらも形成されていない構造である。それ以外は実験例1と同様の構成であり、実験例1の同様のプロセスで作製した。
11 基板
12 酸化物層
13 密着層
20 容量部
21 下部電極層
22 誘電体層
23 上部電極層
24 無機絶縁層
30 保護層
31 無機保護層
32 有機保護層
33,34 開口部
41,42 配線層
43,44 第1の表面金属層
45,46 第2の表面金属層
47,48 外部電極
51 有機絶縁層
101 基板
102 下部電極層
103 誘電体層
104 上部電極層
105 保護層
107-1 配線層
107-2 配線層
Claims (8)
- 誘電体層と、前記誘電体層の上下面に形成されている一対の電極層と、を有する容量部と、
前記容量部を覆うように形成されている保護層と、
前記保護層を貫通して前記電極層のそれぞれの表面が露出するように形成されている開口部の内面に沿って形成され、前記電極層のそれぞれと接しており、前記保護層の上面まで引き出されている一対の配線層と、
前記配線層の表面上に形成されている表面金属層と、
前記配線層の前記保護層の上面まで引き出されている部分の、前記保護層と接する面とは異なる面側に、前記配線層と電気的に接続されるように形成されている外部電極と、
を備え、
前記表面金属層は、少なくとも、
前記配線層の前記開口部の内面に沿った部分を覆う第1の表面金属層と、
前記保護層の上面に形成され、前記第1の表面金属層の端部と接する第2の表面金属層と、を有し、
前記第1の表面金属層はめっき膜であり、
前記第2の表面金属層は真空薄膜法による膜であることを特徴とする、誘電体薄膜素子。 - 前記第1の表面金属層は、前記配線層の前記保護層の上面まで引き出されている部分の表面上にも形成されている、請求項1に記載の誘電体薄膜素子。
- 前記第1の表面金属層の材質はNiを主成分とする、請求項1又は2に記載の誘電体薄膜素子。
- 前記第2の表面金属層の材質はTi又はCr、あるいはNiとCrの合金を主成分とする、請求項1~3のいずれか1項に記載の誘電体薄膜素子。
- 前記配線層は複数層の構造であり、前記配線層の最下層の材質が前記第2の表面金属層と同じである、請求項1~4のいずれか1項に記載の誘電体薄膜素子。
- 請求項1~5のいずれか1項に記載の誘電体薄膜素子を備える、アンチヒューズ素子。
- 誘電体層と、前記誘電体層の上下面に形成されている一対の電極層と、を有する容量部を形成する工程と、
前記容量部を覆うように保護層を形成する工程と、
前記保護層を貫通して前記電極層のそれぞれの表面が露出するように開口部を形成する工程と、
前記電極層のそれぞれと接し、前記保護層の上面まで引き出されるように、前記開口部の内面に沿って一対の配線層を形成する工程と、
前記配線層の表面上に真空薄膜法により第2の表面金属層を形成する工程と、
前記第2の表面金属層における前記開口部の内面に沿った部分を少なくとも除去する工程と、
前記第2の表面金属層を除去した部分にめっき法により第1の表面金属層を形成する工程と、
を備える、誘電体薄膜素子の製造方法。 - 前記配線層は真空薄膜法により形成する、請求項7に記載の誘電体薄膜素子の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
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JP2012533951A JP5376186B2 (ja) | 2010-09-13 | 2011-09-06 | 誘電体薄膜素子、アンチヒューズ素子及び誘電体薄膜素子の製造方法 |
CN201180043631.6A CN103098199B (zh) | 2010-09-13 | 2011-09-06 | 电介质薄膜元件、反熔丝元件及电介质薄膜元件的制造方法 |
US13/795,677 US9460859B2 (en) | 2010-09-13 | 2013-03-12 | Dielectric thin film element, antifuse element, and method of producing dielectric thin film element |
US15/073,914 US9548161B2 (en) | 2010-09-13 | 2016-03-18 | Dielectric thin film element, antifuse element, and method of producing dielectric thin film element |
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JP2010204668 | 2010-09-13 | ||
JP2010-204668 | 2010-09-13 |
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US13/795,677 Continuation US9460859B2 (en) | 2010-09-13 | 2013-03-12 | Dielectric thin film element, antifuse element, and method of producing dielectric thin film element |
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PCT/JP2011/070219 WO2012036017A1 (ja) | 2010-09-13 | 2011-09-06 | 誘電体薄膜素子、アンチヒューズ素子及び誘電体薄膜素子の製造方法 |
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US (2) | US9460859B2 (ja) |
JP (1) | JP5376186B2 (ja) |
CN (1) | CN103098199B (ja) |
WO (1) | WO2012036017A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014090077A (ja) * | 2012-10-30 | 2014-05-15 | Murata Mfg Co Ltd | 薄膜キャパシタおよびその製造方法 |
US20160027579A1 (en) * | 2014-07-24 | 2016-01-28 | Tdk Corporation | Thin film capacitor |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103098199B (zh) * | 2010-09-13 | 2014-12-10 | 株式会社村田制作所 | 电介质薄膜元件、反熔丝元件及电介质薄膜元件的制造方法 |
KR20120039460A (ko) * | 2010-10-15 | 2012-04-25 | 삼성전자주식회사 | 반도체 패키지 |
CN105609352B (zh) * | 2016-01-12 | 2018-04-17 | 珠海创飞芯科技有限公司 | 一种薄膜开关及其制备方法 |
US10460877B2 (en) * | 2016-05-27 | 2019-10-29 | Tdk Corporation | Thin-film capacitor including groove portions |
CN109923630B (zh) * | 2016-11-02 | 2023-04-28 | 株式会社村田制作所 | 电容器 |
KR20180056257A (ko) * | 2016-11-18 | 2018-05-28 | 삼성전기주식회사 | 박막 커패시터 |
WO2018123926A1 (ja) * | 2016-12-28 | 2018-07-05 | 株式会社村田製作所 | 薄膜デバイスおよび薄膜デバイスの製造方法 |
JP7063027B2 (ja) * | 2018-03-19 | 2022-05-09 | Tdk株式会社 | 薄膜コンデンサおよび薄膜コンデンサの製造方法 |
CN111200061B (zh) * | 2019-12-20 | 2023-03-17 | 厦门市三安集成电路有限公司 | 一种半导体器件电容结构及其制作方法 |
JP7363928B2 (ja) * | 2020-01-20 | 2023-10-18 | 株式会社村田製作所 | 半導体装置及び容量装置 |
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JP2007227874A (ja) * | 2006-01-30 | 2007-09-06 | Fujitsu Ltd | 薄膜キャパシタ及びその製造方法 |
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2011
- 2011-09-06 CN CN201180043631.6A patent/CN103098199B/zh not_active Expired - Fee Related
- 2011-09-06 WO PCT/JP2011/070219 patent/WO2012036017A1/ja active Application Filing
- 2011-09-06 JP JP2012533951A patent/JP5376186B2/ja not_active Expired - Fee Related
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2013
- 2013-03-12 US US13/795,677 patent/US9460859B2/en active Active
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2016
- 2016-03-18 US US15/073,914 patent/US9548161B2/en active Active
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WO2000044043A1 (fr) * | 1999-01-22 | 2000-07-27 | Hitachi, Ltd. | Dispositif a semi-conducteurs et son procede de fabrication |
JP2004018964A (ja) * | 2002-06-18 | 2004-01-22 | Renesas Technology Corp | 半導体ウエハおよび半導体装置の製造方法 |
JP2005019522A (ja) * | 2003-06-24 | 2005-01-20 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
WO2007046173A1 (ja) * | 2005-10-18 | 2007-04-26 | Murata Manufacturing Co., Ltd. | 薄膜キャパシタ |
JP2010171386A (ja) * | 2008-12-26 | 2010-08-05 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014090077A (ja) * | 2012-10-30 | 2014-05-15 | Murata Mfg Co Ltd | 薄膜キャパシタおよびその製造方法 |
US20160027579A1 (en) * | 2014-07-24 | 2016-01-28 | Tdk Corporation | Thin film capacitor |
US9773614B2 (en) * | 2014-07-24 | 2017-09-26 | Tdk Corporation | Thin film capacitor |
Also Published As
Publication number | Publication date |
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US9460859B2 (en) | 2016-10-04 |
CN103098199B (zh) | 2014-12-10 |
US20130194714A1 (en) | 2013-08-01 |
CN103098199A (zh) | 2013-05-08 |
JP5376186B2 (ja) | 2013-12-25 |
US20160204063A1 (en) | 2016-07-14 |
JPWO2012036017A1 (ja) | 2014-02-03 |
US9548161B2 (en) | 2017-01-17 |
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