WO2011108227A1 - 発光素子用基板及びその製造方法ならびに発光装置 - Google Patents
発光素子用基板及びその製造方法ならびに発光装置 Download PDFInfo
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- WO2011108227A1 WO2011108227A1 PCT/JP2011/001017 JP2011001017W WO2011108227A1 WO 2011108227 A1 WO2011108227 A1 WO 2011108227A1 JP 2011001017 W JP2011001017 W JP 2011001017W WO 2011108227 A1 WO2011108227 A1 WO 2011108227A1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
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Definitions
- the present invention relates to a light emitting device substrate and a method of manufacturing the same. More particularly, the present invention relates to a light emitting device substrate on which a light emitting diode (hereinafter also referred to as "LED") is mounted and a method of manufacturing the substrate. The present invention also relates to a light emitting device in which a light emitting element is mounted on a light emitting element substrate.
- LED light emitting diode
- LEDs as light sources have been used for various applications because of their energy saving and long life. Particularly in recent years, the luminous efficiency has been improved also in high light quantity applications of LEDs, and LEDs are beginning to be used for lighting applications.
- the amount of light can be increased by increasing the current applied to the LEDs.
- the characteristics of the LED may be deteriorated, and it is feared that it becomes difficult to secure long life and high reliability of the LED package or module.
- increasing the current flow to the LED may increase heat generation from the LED, which may increase the temperature inside the lighting LED module or system and cause deterioration.
- heat generation from the LED which may increase the temperature inside the lighting LED module or system and cause deterioration.
- it is said that about 25% of the power consumed by white LEDs is changed to visible light, and the others become direct heat. Therefore, it is necessary to take measures against heat radiation to the LED package and module, and various heat sinks are used (for example, a heat sink is attached to the bottom of the package substrate to improve the heat radiation).
- LEDs can not be said to be highly resistant to static electricity, so designs and measures may be taken to protect LEDs from electrostatic stress (see Patent Document 1).
- a Zener diode is electrically connected in parallel with the LED, it is possible to reduce the stress applied to the LED when an overvoltage or overcurrent is applied.
- the Zener diode element 270 is connected in anti-parallel with the LED element 220, such Zener diode element 270 is strictly on the package substrate 210. It is arranged. That is, the overall size of the package is increased by the presence of the Zener diode element 270, and it can not be said that it can be said to correspond to further miniaturization of the LED product.
- the present invention has been made in view of the above circumstances. That is, it is an object of the present invention to provide a substrate for a light emitting element and a light emitting device provided with the same, which satisfy the needs for a small LED package having good heat dissipation characteristics.
- the present invention is a substrate for a light emitting element in which one of two opposing main surfaces is a mounting surface, and the light emitting element is mounted on the mounting surface,
- Protective element for light emitting element comprising a voltage dependent resistance layer embedded in the substrate and a first electrode and a second electrode electrically connected to the voltage dependent resistance layer in the substrate for light emitting element Is provided, and a substrate for a light emitting device is provided in which the light emitting device is mounted so as to overlap the voltage dependent resistance layer.
- One feature of the substrate for a light emitting element of the present invention is that the voltage-dependent resistance layer of the protective element is embedded so as to overlap with the light emitting element. That is, in the light-emitting element substrate of the present invention, one of the features is that the voltage-dependent resistance layer of the protective element is embedded in the mounting area of the light-emitting element.
- the term "light emitting element” means an element that emits light, and substantially means, for example, a light emitting diode (LED) and an electronic component including them. Therefore, the "light emitting element” in the present invention represents not only “a bare chip of LED (ie LED chip)” but also an aspect including “a discrete type in which an LED chip is molded so as to be easily mounted on a substrate”. It is used as a thing. In addition, not only the LED chip but also a semiconductor laser chip can be used.
- the term "voltage-dependent resistive layer” substantially refers to one in which the resistance changes in accordance with the voltage value applied to the layer.
- the "voltage dependent resistive layer” comprises a single layer.
- substrate substantially means a member to be a base for mounting a light emitting element. Therefore, the “substrate” in the present invention represents not only “a substantially flat plate member” but also a “member having a recess on its main surface to accommodate an LED chip or the like”. It is used as a thing.
- the surface of the voltage-dependent resistive layer is coplanar with one main surface of the substrate to constitute a part of the mounting surface. That is, in the light-emitting element substrate of the present invention, the upper surface of the voltage-dependent resistance layer of the protective element and the substrate mounting surface are substantially flush.
- the surface of the voltage-dependent resistance layer may be in the same plane as the other main surface. That is, the lower surface of the voltage-dependent resistance layer of the protection element and the rear surface of the substrate may be substantially flush.
- the first electrode of the protection element is provided in contact with the substrate exposed surface of the voltage dependent resistance layer, and the second electrode of the protection element is in contact with the first electrode. It is provided to be in contact with the substrate buried surface or to be included inside the voltage dependent resistance layer. That is, in the light emitting element substrate of the present invention, the first electrode of the protective element is provided on the surface of the substrate so as to be in contact with the light emitting element, while the voltage is applied so that the second electrode of the protective element faces the first electrode. It is provided inside the substrate in a state of being partially or totally in contact with the dependent resistance layer.
- the second electrode of the protective element faces the first electrode and is stacked on the voltage dependent resistance layer. May be provided.
- the first electrode of the protection element is provided on the surface of the substrate to be in contact with the light emitting element, while the second electrode of the protection element is included inside the voltage-dependent resistance layer so as to face the first electrode.
- the second electrode provided inside the voltage-dependent resistance layer does not have to be single, but may be plural.
- the “substrate-exposed surface of the voltage-dependent resistive layer” referred to in the present specification refers to the surface of the “surface” formed by the electrode-dependent resistive layer, which is exposed on the substrate surface.
- the “substrate-embedded surface of the voltage-dependent resistive layer” refers to a surface existing inside the substrate among “surfaces” formed by the electrode-dependent resistive layer.
- the second electrode provided inside the substrate is between the voltage-dependent resistive layer and one main surface (mounting surface) or the other main surface (back surface opposite to the mounting surface) of the substrate.
- Such an aspect may correspond to an aspect in which the second electrode has the form of "through electrode".
- the first electrode is separated into two at the surface of the voltage-dependent resistive layer. That is, the first electrode is provided in the form of being separated into two on the substrate surface including the “substrate exposed surface of the voltage dependent resistance layer” or the “substrate mounting surface”.
- the protective element for the light emitting element is a varistor element.
- the first electrode of the varistor element is divided into two at the surface of the voltage-dependent resistance layer (that is, the substrate exposed surface or the substrate mounting surface), and the second electrode formed on the substrate embedded surface of the voltage-dependent resistance layer.
- two varistor elements are connected in series to share an electrode. That is, in this aspect, the varistor element is composed of the sub varistor element A and the sub varistor element B, and the first electrode A of one of the two electrodes of the sub varistor element A and the two electrodes of the sub varistor element B One first electrode B is disposed on the surface of the substrate mounting surface.
- the other second electrode A of the sub varistor element A and the other second electrode B of the sub varistor element B are embedded in the substrate, and they are electrically connected to each other (in particular, in the substrate) It is preferable that the second electrode A of the sub varistor element A and the second electrode B of the sub varistor element B which are embedded in a single layer.
- Such an embodiment may also be referred to as a "double varistor configuration" because it includes two varistor elements as components.
- the positive electrode of the light emitting element is connected to one of the two separated first electrodes, and the negative electrode of the light emitting element is connected to the other.
- two varistor elements ie, the sub varistor element A and the sub varistor element B
- the sub varistor element A and the sub varistor element B are electrically connected in parallel to the light emitting element.
- the protective element for the light emitting element is a laminated varistor element.
- the voltage-dependent resistance layer of the multilayer varistor element is embedded in the substrate mounting region of the light emitting element.
- the surface of the voltage-dependent resistive layer of the laminated varistor element is coplanar with one main surface of the substrate and forms a part of the mounting surface (ie, the voltage-dependent resistive layer of the laminated varistor element) It is preferable that the upper surface of the substrate and the substrate mounting surface be substantially flush.
- the substrate has a two-layer structure comprising lower and upper layers of different materials.
- the upper layer be a layer defining the mounting surface, and the voltage-dependent resistive layer be embedded in the upper layer.
- the lower layer and the upper layer which are different in material are preferably the lower layer and the upper layer which are different in thermal conductivity, and the thermal conductivity of the lower layer is higher than the thermal conductivity of the upper layer in view of the heat dissipation characteristics of the substrate.
- the upper layer material of the substrate may be glass ceramic, and the lower layer material of the substrate may be alumina.
- the upper layer material of the substrate may be glass ceramic, and the lower layer material of the substrate may be aluminum nitride.
- the present invention also provides a light emitting device provided with the light emitting element substrate. Specifically, a light emitting device including the light emitting element substrate and the light emitting element mounted on the mounting surface thereof is provided.
- light emitting device substantially means “light emitting element package (especially LED package)", other than that, "a product in which a plurality of LEDs are arrayed in an array” "Etc. are also included.
- the light emitting element is an LED chip having a positive electrode and a negative electrode on the surface opposite to the light emitting surface, and the LED chip is flip chip mounted on the substrate mounting surface. ing.
- the present invention also provides a method for producing the substrate for a light emitting device. That is, there is provided a method of manufacturing a substrate for a light emitting element having a varistor element comprising a voltage dependent resistance layer and a first electrode and a second electrode electrically connected to the voltage dependent resistance layer.
- the production method of the present invention is Forming a second electrode precursor layer on one main surface of the green sheet (A); (B) forming a recess in which the second electrode precursor layer is disposed on the bottom surface by pressing the convex mold onto the green sheet from above the second electrode precursor layer; Providing a voltage-dependent resistive layer in the formed recess, that is, disposing a voltage-dependent resistive layer on the second electrode precursor layer disposed on the bottom of the recess (C) step; Firing the green sheet provided with the electrode precursor layer to obtain a substrate having the voltage-dependent resistance layer and the second electrode embedded therein (D); Forming a metal layer on the surface of the substrate and subjecting to patterning, thereby forming a first electrode in contact with the voltage dependent resistance layer (E);
- One of the features of the manufacturing method of the present invention is to manufacture a light emitting device substrate using a voltage-dependent resistance layer formed in advance. As a result, in the obtained light emitting element substrate, it is possible to obtain a varistor element having excellent voltage dependent resistance characteristics.
- a convex mold is pressed into one main surface (that is, mounting surface) of the green sheet instead of the steps (A) and (B) to form recesses in the main surface of the green sheet.
- the voltage-dependent resistance layer having the second electrode precursor layer formed on the lower surface is disposed in the green sheet recess.
- the voltage-dependent resistance layer is pushed onto the green sheet from above the second electrode precursor layer to form recesses in the green sheet. While the voltage dependent resistance layer and the second electrode precursor layer are disposed in the recess. That is, the voltage-dependent resistance layer and the second electrode precursor layer are embedded inside the green sheet by pressing the voltage-dependent resistance layer onto the green sheet from above the second electrode precursor layer.
- the voltage-dependent resistance layer on which the second electrode is formed is placed on the green sheet so that the second electrode precursor layer is on the bottom. Then, the voltage dependent resistance layer and the second electrode precursor layer are disposed in the recess while forming the recess in the green sheet. That is, the voltage-dependent resistance layer and the second electrode precursor layer are formed into a green sheet by pressing the voltage-dependent resistance layer in which the second electrode is formed onto the green sheet from above with the second electrode precursor layer facing down. Embed inside
- a “voltage-dependent resistive layer including the second electrode” is disposed on one of the main surfaces of the green sheet to form the convex.
- the mold may be pressed onto the green sheet from above the voltage-dependent resistive layer, thereby forming a recess in the green sheet in which the "voltage-dependent resistive layer including the second electrode” is disposed on the bottom.
- the voltage-dependent resistive layer and the second electrode are formed by firing a green sheet provided with a recess in which the "voltage-dependent resistive layer containing the second electrode" is disposed on the bottom. A buried substrate will be obtained.
- the light-emitting element substrate of the present invention is embedded such that the voltage-dependent resistance layer of the protective element overlaps the light-emitting element mounting surface of the substrate, the overall miniaturization of the light-emitting device (for example, LED package) is achieved. . Therefore, the light-emitting element substrate of the present invention is suitable for mounting in various applications including lighting applications, and can effectively contribute to the miniaturization of the final product.
- the protective element (particularly, the voltage-dependent resistance layer occupying a large volume and one of the electrodes) is substantially omitted from the top of the substrate.
- Space for is being created. For example, space is created for electrodes and metal patterns disposed on a mounting surface of a substrate or the like. Such an electrode or metal pattern is connected to a light emitting element that generates heat, and the material is a material having high thermal conductivity such as copper, and thus effectively contributes to the heat dissipation of the light emitting element product.
- the size of the electrode / metal pattern effectively contributing to the heat dissipation can be increased, and, for example, the thickness of the electrode / metal pattern etc. is also thick. As a result, it is possible to effectively improve the heat dissipation characteristics of the entire light emitting element product.
- a substrate excellent in heat resistance and high heat dissipation such as a ceramic substrate, can be used as a substrate on which the voltage dependent resistance layer is embedded. Can contribute to
- the voltage-dependent resistance layer can be formed as a single layer even though the protective element (in particular, the voltage-dependent resistance layer and one electrode of the varistor element) is embedded in the substrate.
- the protection element can be embedded in the substrate without particularly increasing the thickness. Therefore, since a thin substrate is realized as a light emitting element substrate incorporating a protective element, the heat from the light emitting element can be further dissipated to the outside, and the heat dissipation characteristics of the entire light emitting element product are also improved in that respect. It can improve.
- a light emitting element generally uses the substrate of the present invention in that when the temperature becomes high, the light emission efficiency (that is, the ratio of conversion of driving current to light) decreases and the luminance decreases. Since the light emitting element product is excellent in heat dissipation characteristics, it is possible to realize a light emitting element product having high luminous efficiency and higher luminance. In addition, since the heat dissipation characteristics are excellent as such, the operating life of the LED can be improved, and denaturation and discoloration due to heat of the sealing resin can be effectively prevented.
- a perspective view and a sectional view schematically showing a substrate for a light emitting element of the present invention The perspective view which showed typically the light-emitting device (LED package) of this invention
- Schematic of light emitting element and protective element Cross-sectional view schematically showing a light emitting device (LED package) of “substrate backside embedded form of voltage dependent resistance layer”
- Sectional view schematically showing “different ceramic substrate form” Process sectional drawing which showed typically the manufacturing method of the board
- a diagram schematically showing a process that can replace the process of FIG. A diagram schematically showing a process that can replace the process of FIG.
- Example of LED product according to the present invention Graph showing the results of varistor characteristic check test The perspective view which shows the structure of the conventional LED package typically (prior art)
- the voltage-dependent resistance layer of the protective element is embedded in the substrate region overlapping the light-emitting element to be mounted. That is, as shown in FIG. 1, in the light emitting element substrate 100 of the present invention, the voltage dependent resistance layer 50 of the protective element is embedded in the light emitting element mounting region 25. In the present invention, the voltage-dependent resistance layer 50 may be embedded so as to at least partially overlap the light-emitting element mounting area 25, and only a part of the voltage-dependent resistance layer 50 may be It may be in an overlapping manner.
- the material of the substrate body portion 10 of the light emitting element substrate is not particularly limited, and may be a substrate material used for a general LED package. However, it is preferable that the substrate is formed of a material having a good thermal conductivity in terms of the improvement of the heat dissipation characteristics as the light emitting device.
- the material having a good thermal conductivity include metals, ceramics, composite materials, thermally conductive filler-containing resins, and the like.
- ceramic not only has high thermal conductivity but also a small coefficient of thermal expansion, and therefore is suitable as a material of a substrate on which a light emitting element that generates heat is mounted.
- a ceramic substrate for example, an LTCC substrate
- ceramic since it can be obtained relatively easily by firing a green sheet, ceramic can be said to be suitable as the substrate material of the present invention also in that respect.
- the substrate size is relatively small.
- the main surface size that is, the W dimension / L dimension in the figure
- the major dimension of the conventional small LED package as shown in FIG. 26 is about 2.5 to 4.0 mm ⁇ about 2.5 to 4.0 mm.
- the main surface dimension of the LED package using the substrate of the present invention can be about 1.0 mm ⁇ about 1.0 mm to the same shape as the LED element.
- the substrate for a light emitting element of the present invention can realize a large scale down, it is possible to preferably miniaturize a light emitting device (LED package) provided with such a substrate.
- a thin substrate is realized as a light emitting element substrate in which a protective element is incorporated.
- the thickness of the substrate body 10 can be about 250 ⁇ m to 400 ⁇ m.
- the thickness can be suitably reduced.
- the voltage dependent resistance layer 50 of the protective element may be made of any material as long as the resistance changes in accordance with the voltage value applied to the layer.
- the voltage dependent resistive layer 50 is typically a layer of varistor material.
- the voltage-dependent resistive layer 50 may have the form of a single layer.
- the protective element can be embedded in the substrate without particularly increasing the substrate thickness.
- the varistor material of the voltage-dependent resistance layer is not particularly limited, and those used as general chip varistors can be used.
- a varistor material for example, a metal oxide based material containing zinc oxide (ZnO) or strontium titanate (SrTiO 3 ) as a main component can be used.
- ZnO zinc oxide
- strontium titanate strontium titanate
- ZnO has a large change in resistance value according to the value of applied voltage, it has a high ability to protect a light emitting element from a surge or the like, and is suitably used as a material of a voltage dependent resistance layer in the present invention. be able to.
- the size of the voltage-dependent resistive layer 50 is not particularly limited as long as it is smaller than the substrate size. That is, the width and depth dimensions of the voltage-dependent resistance layer are preferably smaller than the dimensions of the main surface of the substrate.
- the width w of the voltage-dependent resistance layer 50 as shown in FIG. 1 is preferably about 20 to 70%, more preferably about 30 to 60% of the width W of the substrate.
- the thickness t of the voltage-dependent resistive layer 50 as shown in FIG. 1 is preferably about 10 to 50%, more preferably about 10 to 40%, of the substrate thickness T.
- the thickness of the voltage-dependent resistance layer can be correlated with the varistor voltage (when the protection element is a varistor element).
- the thickness of the voltage-dependent resistive layer may be determined in accordance with the desired varistor voltage.
- the desired varistor voltage is about 10 V or less
- the thickness of the voltage-dependent resistance layer may be determined so as to obtain such a varistor voltage.
- a certain degree of electrostatic capacity is required for the voltage dependent resistance layer (varistor layer). In this respect, since the capacitance increases as the voltage-dependent resistance layer becomes thinner, the thickness of the voltage-dependent resistance layer may be determined so as to obtain a desired capacitance.
- the surface of the voltage dependent resistance layer 50 is located on the same plane as the substrate surface. That is, the upper surface of the voltage dependent resistance layer 50 is exposed from the substrate so as to be flush with the substrate surface. Then, the light emitting element 20 is mounted so as to at least partially overlap with the substrate exposed surface of the voltage dependent resistance layer 50. This means that at least a part of the top surface of the voltage dependent resistance layer 50 is exposed in the light emitting element mounting region of the substrate.
- the exposed surface of the voltage-dependent resistive layer 50 has an area smaller than the mounting area 25 of the light emitting element (see, for example, FIG. 1).
- the exposed area of the voltage dependent resistance layer 50 is preferably about 20% to 70% smaller than the mounting area 25 of the light emitting element, and more preferably about 30% to 60% smaller.
- the warpage of the substrate can be effectively reduced, the effect that the light emitting element can be mounted on the flip chip with high accuracy can be obtained.
- zinc oxide varistors which are a typical example of a voltage-dependent resistance layer, are generally weak in bending strength, the bending strength can be increased as a package by making the main surface size smaller than that of the light emitting element.
- the structure is strong against pressure stress during chip mounting.
- the voltage-dependent resistive layer is relatively expensive at first, cost reduction can be achieved without substantially impairing the required varistor characteristics.
- a “first electrode 60 of a protective element” electrically connected to the exposed surface (substrate exposed surface) of voltage-dependent resistive layer 50 is provided, and voltage-dependent resistive layer 50 is provided.
- the second electrode 70 of the protective element which is electrically connected to the substrate embedding surface of the first substrate 60, is provided opposite to the first electrode 60.
- the first electrode 60 and the second electrode 70 of the protection element substantially form the outer electrode of the protection element, and can be provided for electrical parallel connection between the protection element and the light emitting element.
- the first electrode and the second electrode are respectively directly connected to the light emitting element electrode or the substrate so that the protection element is electrically connected in parallel to the light emitting element and the protection function is exhibited.
- the material of the first electrode and the second electrode of the protective element is not particularly limited, and may be common as an electrode material of a conventional protective element.
- the material of the first electrode and the second electrode of the varistor element can be the one used as a general varistor electrode.
- at least one metal material selected from the group consisting of silver (Ag), copper (Cu), palladium (Pd), platinum (Pt) and nickel (Ni) is used as the first electrode and the first electrode of the varistor element. It can be used as the main material of 2 electrodes.
- the size of the first electrode 60 and the second electrode 70 of the protective element is not particularly limited. That is, as illustrated, the first electrode 60 is provided to be in contact with the substrate exposed surface of the voltage dependent resistance layer 50, and the second electrode 70 faces the first electrode 60 so that the substrate buried surface of the voltage dependent resistance layer 50. There is no particular limitation as long as it is provided in contact with As an example, in the configuration shown in FIG. 1, the width dimension w1 of the first electrode 60 is about 0.2 to 0.5 mm, and the width dimension w2 of the second electrode 70 is about 0.3 to 0.5 mm.
- the thickness dimension t1 of the first electrode 60 may be about 50 to 150 ⁇ m, and the thickness dimension t2 of the second electrode 70 may be about 5 to 20 ⁇ m.
- the protective elements are substantially omitted from the substrate surface, so Only space is created for other elements. Therefore, the thickness of the first electrode 60 can be increased, and for example, the thickness of the first electrode can be about 50 ⁇ m to 200 ⁇ m, preferably about 60 ⁇ m to 150 ⁇ m, and more preferably about 70 ⁇ m to 125 ⁇ m. Since the first electrode has high thermal conductivity and effectively contributes to heat dissipation, if the portion can be made thick, it is possible to effectively improve the heat dissipation characteristics of the light emitting device product.
- the wiring pattern (pattern metal layer) on the substrate mounting surface can be thickened, for example, to a thickness of about 50 ⁇ m to 200 ⁇ m, preferably about 60 ⁇ m to 150 ⁇ m, and more preferably about 70 ⁇ m to 100 ⁇ m. be able to.
- the configuration of the light emitting element substrate 100 of the present invention can be a "double varistor configuration" as shown in FIG.
- the first electrode 60 is separated into two (60a, 60b) at the substrate exposed surface of the voltage dependent resistance layer 50, and the second electrode 70 is voltage dependent. It is connected in series so as to share the two sub-electrodes 70 a and 70 b at the substrate embedded surface of the resistance layer 50.
- the second electrode 70 composed of two sub-electrodes 70a and 70b is preferably in the form of a single layer as shown.
- Such a “double varistor configuration” is suitable as a package substrate configuration because the varistor function can be improved despite the relatively simple overall configuration of the substrate.
- the varistor elements are connected in series, the varistor elements themselves are substantially embedded in the light emitting element mounting region inside the substrate.
- the LED package as a whole is suitably miniaturized and thinned.
- the substrate having such a varistor structure is also characterized in that the electrode can be taken out to the surface layer of the substrate with a very simple structure.
- the light emitting device provided with the light emitting element substrate of the present invention includes the light emitting element mounted on the mounting surface thereof.
- the LED package 150 as shown in the above-mentioned FIG. 2 can be mentioned.
- the LED package 150 is an LED chip in which the light emitting element 20 has a positive electrode and a negative electrode on the surface opposite to the light emitting surface, and the LED chip is flip chip mounted on the substrate mounting surface. It has a form.
- the LED chip one used in a general LED package can be used, and may be appropriately selected according to the application of the LED package.
- the protective element is preferably incorporated in the substrate, so the LED is protected from static electricity and surge voltage without impairing the inherent characteristics of the LED chip, and the LED malfunction is prevented. can do.
- a phosphor layer 80 is formed on the LED chip 20.
- the phosphor layer 80 is not particularly limited as long as it receives the light from the LED chip 20 and develops the desired light. That is, the type of phosphor in the phosphor layer may be determined in view of light and electromagnetic waves from the light emitting element. For example, when the LED package is used as a white LED package for lighting and the like, bright white can be obtained if the phosphor layer contains a phosphor that develops a yellowish color due to blue light emitted from the LED chip. Moreover, when the electromagnetic waves emitted from the LED chip are ultraviolet rays, phosphors that emit white directly by the ultraviolet rays may be used.
- a metal layer (pattern wiring layer) 90 is disposed on the substrate.
- the metal layer is preferably electrically connected to the positive electrode and the negative electrode of the LED chip in order to flow current to the LED chip, and the protection element and the light emitting element are electrically connected in parallel. It is preferable that the first electrode and the second electrode of the protection element are also electrically connected. If necessary, electrical conduction may be established between the metal layer on the front surface of the substrate and the metal layer on the back surface of the substrate via a via hole or through hole or via a metal layer surrounding from the side of the substrate.
- the metal layer on the back surface of the substrate may be used for mounting on another electronic component or may be used for heat dissipation as a heat sink.
- the sealing resin 30 is not particularly limited as long as it is used in a general LED package, and may be, for example, a transparent or milky white epoxy resin.
- the sealing resin 30 preferably has a lens shape as illustrated in order to improve the light utilization efficiency.
- FIG. 5 shows the LED package 150 having the “substrate backside embedded form of voltage dependent resistance layer”.
- the voltage-dependent resistive layer 50 is embedded such that the voltage-dependent resistive layer 50 of the protective element (for example, a varistor element) and the rear surface of the substrate are "flat”. That is, the voltage dependent resistance layer 50 is provided on the same plane as the bottom surface of the substrate.
- the second electrode 70 is provided in contact with the top surface of the voltage dependent resistance layer 50.
- the "metal layer on the surface of the substrate” and the "metal layer on the bottom surface of the substrate” are electrically connected through via holes, through holes, etc. or through metal layers surrounding the side of the substrate.
- the temperature dependence of the voltage dependent resistance layer is maintained because the temperature is maintained at a lower temperature than the mode where the voltage dependent resistance layer is embedded directly below the light emitting element. Leakage current can be suppressed, and an effect that efficiency can be improved can be exhibited.
- the LED package 150 which has "a penetration electrode form" in FIG. 6 is shown.
- the second electrode 70 provided inside the substrate is an electrode or a metal layer on the back surface of the substrate through a via hole 95 penetrating the substrate internal region between the back surface of the substrate and the voltage dependent resistance layer 50. Connected to 90.
- the voltage dependent resistance layer is not exposed on the surface, so that the effect of being able to suppress a reduction in resistance in the subsequent Au plating treatment of the electrode layer can be exhibited.
- it can be formed in the same process as the through hole formation which electrically connects with the electrode which is formed inside the substrate and taken out on the mounting surface side, an effect that the throughput is not increased can also be exhibited.
- FIGS. 7A to 7C show the LED package 150 having the “concave installation form”.
- the voltage-dependent resistance layer 50 and the second electrode 70 are provided in the recess 15 formed in the main surface of the substrate.
- Such a form is substantially the same as the form described above, but has features due to the difference in the manufacturing process. That is, in the LED package of the previous form, the voltage-dependent resistive layer 50 and the second electrode precursor layer 70 'are embedded in the green sheet 10' and the substrate is obtained by firing them. Therefore (for example, refer to FIG. 8 described later), in the “recess installation form” LED package, a fired substrate on which the recess 15 is formed in advance is used (refer to FIG. 14 described later). Therefore, in the “recessed form”, the voltage-dependent resistive layer 50 and the like are not substantially thermally affected, and better protection element characteristics can be obtained.
- FIG. 7 (a) corresponds to FIGS. 1 to 3
- FIG. 7 (b) corresponds to FIG. 5
- FIG. 7 (c) corresponds to FIG. 5 and FIG. Aspect corresponding to
- FIG. 8A shows an LED package 150 having a “multilayer type varistor built-in form”.
- the voltage-dependent resistive layer 50 is substantially laminated. More specifically, a plurality of internal electrodes provided inside the voltage-dependent resistance layer 50 (70A 1, 70A 2) , said internal electrodes (70A 1, 70A 2) and voltage so as to be electrically connected and externally provided external electrodes of the dependent resistance layer 50 (71A 1, 71A 2) is provided.
- the internal electrodes (70A 1 , 70A 2 ) correspond to the second electrode in the present invention.
- this “stacked type varistor built-in form” it can be obtained by embedding a chip varistor as shown in FIG.
- the laminated varistor has a large electrode area, it has an advantage in that the electrostatic discharge resistance is large.
- the Ni thin layer 105 and the Au thin layer 106 are provided on the surface of the first electrode 60. This is attributed to the manufacturing process and to the use of the Ni thin layer 105 and the Au thin layer 106 as a “resist” in forming the first electrode and the copper interconnection (see FIG. 20 for details). Will be described later).
- FIG. 9 shows the LED package 150 having the “voltage-dependent resistive layer embedded form of the second electrode”.
- the second electrode 70 is embedded in the voltage dependent resistance layer 50 as illustrated. That is, the first electrode 60 may be provided in contact with the substrate exposed surface of the voltage dependent resistance layer 50, while the second electrode 70 may be included in the voltage dependent resistance layer 50. Even in this mode, a "double varistor configuration" is possible. As shown, while the first electrode 60 is separated into two (60a, 60b) at the substrate exposed surface of the voltage dependent resistance layer 50, the second electrode 70 is two inside the voltage dependent resistance layer 50.
- the second electrode 70 composed of two sub-electrodes 70a and 70b preferably has the form of a single layer as shown) ).
- the second electrode 70 is included inside the voltage dependent resistance layer 50, it is possible to effectively prevent the deterioration of the varistor characteristics due to the diffusion of the substrate material.
- the varistor voltage of the double varistor can be substantially reduced and the capacitance can also be increased.
- the number of the “second electrodes 70 embedded in the voltage-dependent resistance layer 50" need not be one, and a plurality of second electrodes 70 may be provided (note that one embodiment of “plurality” is the above-mentioned “laminated varistor” May correspond to the "internal form”).
- FIG. 10 shows an LED package 150 having the “different ceramic substrate form”.
- the substrate body is composed of a plurality of different material layers.
- the upper layer 10A and the lower layer 10B have a two-layer structure, and the upper layer 10A in which the voltage-dependent resistive layer 50 is present consists of a low temperature fired material layer (for example, a glass ceramic substrate layer), while the lower layer 10B has a high temperature It consists of a baking material layer (for example, an alumina substrate or an aluminum nitride substrate).
- the upper-layer low-temperature fired material layer 10A is obtained by low-temperature firing at, for example, about 900 ° C., and is preferable from the viewpoint of incorporating the substrate of the voltage dependent resistance layer 50 (ie, varistor).
- the material layer can achieve high conductivity, and a substrate with excellent heat dissipation characteristics is realized (thermal conductivity of glass ceramic substrate layer: 3 to 5 W / mK, thermal conductivity of alumina substrate layer: 10) ⁇ 20 W / mK, thermal conductivity of aluminum nitride substrate layer: 100-230 W / mK).
- the heterogeneous substrate in which the upper layer / lower layer is a glass ceramic substrate layer / alumina substrate layer has a “green sheet consisting of a low temperature fired ceramic substrate (LTCC)” on a fired alumina substrate. It can obtain by embedding a varistor sintered compact with respect to the laminated
- the second electrode 70 is embedded inside the voltage-dependent resistive layer 50, and the Ni thin layer 105 and the Au thin layer 106 are provided on the surface of the first electrode 60 (FIG. 10). (B)).
- a method of manufacturing a substrate for a light emitting element provided with a varistor element including a voltage dependent resistance layer and a first electrode and a second electrode electrically connected to the voltage dependent resistance layer It assumes.
- 2nd electrode precursor layer 70 ' is formed in one main surface of green sheet 10' for comprising a board
- the second electrode precursor layer 70 ' can be obtained by applying and drying an Ag electrode paste.
- the second electrode precursor layer 70 ′ is pushed into the inside of the green sheet using the convex-shaped mold 42 to form the recesses 15 in the green sheet 10 ′.
- the second electrode precursor layer 70 ′ is disposed on the bottom of the recess 15.
- the voltage dependent resistance layer 50 is disposed in the recess 15 of the green sheet 10 'using the carrier film 47 on which the voltage dependent resistance layer 50 is placed. More specifically, the voltage-dependent resistive layer 50 is disposed to be stacked on the second electrode precursor layer 70 ′ of the recess 15.
- the green sheet 10 'in which the second electrode precursor layer 70' and the voltage dependent resistance layer 50 are provided in the recess 15 is fired.
- the substrate 10 in which the voltage-dependent resistive layer 50 and the second electrode 70 are embedded can be obtained (the second electrode 70 is a second electrode precursor due to firing).
- the firing is preferably performed by the “method in which the shrinkage at the time of firing is reduced” as described in JP-A-4-243978 and JP-A-5-102666.
- the substrate 10 in which the voltage dependent resistance layer 50 and the second electrode 70 are accurately embedded can be obtained.
- shrinkage at the time of firing is reduced
- shrinkage in the planar direction is suppressed, and there is a particular effect that only the thickness direction shrinks.
- the manufacturing method of the present invention is characterized by using a sintered voltage-dependent resistor.
- the metal layer 90 is formed on the main surface of the substrate 10 as shown in FIG. 11 (e) following the above-mentioned sintering process, the metal layer 90 is subjected to patterning as shown in FIG. 11 (f). Forming a first electrode 60 in contact with the voltage dependent resistance layer 50; Through the above steps, the light emitting device substrate 100 of the present invention can be finally obtained.
- non-shrinkage sintering method which can be suitably adopted for sintering of the above-mentioned green sheet will be described.
- the non-shrinkage sintering method it is possible to obtain a substrate with reduced shrinkage in particular in the planar direction. Therefore, by applying such a sintering method in the step (D) of the manufacturing method of the present invention, it is possible to suitably obtain the substrate 10 in which the voltage dependent resistance layer 50 and the second electrode 70 are embedded with relatively high accuracy.
- the outline of the non-shrinkage sintering method disclosed in, for example, Hei 5-102666 is as follows: [A green sheet containing at least an organic binder and a plasticizer is produced in a glass ceramic low-temperature sintered substrate material, an electrode pattern is formed with a conductor paste composition, and the desired number of green sheets and another green pattern-formed green sheet is desired. Stack. Thereafter, laminating is performed on both sides or one side of the green sheet laminate made of the low temperature sintered glass ceramic so as to be sandwiched by the green sheets made of an inorganic composition which does not sinter at the sintering temperature of the glass ceramic low temperature sintered substrate material. The laminate is fired. Thereafter, by removing the non-sintered inorganic composition, it is possible to obtain a glass ceramic substrate in which shrinkage upon firing does not occur in a planar direction. "
- the LED is electrically connected to the wiring pattern on the surface side of the substrate obtained by patterning the metal layer 90.
- Mount a light emitting element such as a chip.
- Such mounting of the LED chip is preferably performed by the GGI method.
- the GGI (Gold-to-Gold Interconnection Technology) method is a type of flip chip mounting, in which a gold bump formed on a gold pad on an LED chip and a gold pad formed on a substrate are bonded by thermocompression bonding Construction method.
- Such a GGI method is advantageous not only in that solder bumps are not used but also in that reflow and flux cleaning can be omitted, and also in terms of high reliability at high temperatures.
- gold melting may be performed using an ultrasonic wave or the like as needed in addition to load and heat.
- the voltage-dependent resistance layer 50 is less susceptible to the subsequent firing of the green sheet (in particular, the voltage-dependent resistance layer 50 is less likely to receive a chemical adverse effect from the green sheet 10 'during firing). It can maintain high quality.
- Zinc oxide type varistors are commonly used as the voltage dependent resistance layer material. Such zinc oxide type varistor is obtained by firing zinc oxide as a main component and to which about 0.5 to about 1.0 mole percent of bismuth oxide, antimony oxide, cobalt oxide and / or manganese oxide etc.
- the firing temperature is generally in the range of about 1200 ° C. to about 1350 ° C.
- the low temperature fired glass ceramic substrate (LTCC) is fired at about 900 ° C.
- high varistor characteristics particularly means that “the limited voltage characteristics are excellent” and “the amount of" leakage current "flowing to the varistor when the LED is driven”.
- the limited voltage characteristics are excellent means that it is stable against the voltage to be always applied and its fluctuation, and can be suppressed below the withstand voltage of the LED against the expected surge voltage. In particular.
- FIGS. 12 (a) to 12 (d) A method of manufacturing the “carrier film 47 placed on the voltage dependent resistance layer 50” is shown in FIGS. 12 (a) to 12 (d).
- a green sheet 50 'for forming a voltage-dependent resistance layer is prepared (see FIG. 12A), and the green sheet 50' is fired to form a voltage-dependent resistance layer 50 (see FIG. 12B).
- the carrier film 47 mounted on the voltage-dependent resistance layer 50 can be obtained by bonding the voltage-dependent resistance layer 50 and the carrier sheet 47 (note that a plurality of voltages are provided).
- the voltage dependent resistive layer 50 may be processed into a form as shown in FIG.
- the green sheets 50' After laminating a plurality of green sheets 50 'for forming the voltage-dependent resistance layer to a desired thickness, the green sheets 50' are cut to a desired size with a thin cutter to produce a plurality of unsintered voltage-dependent resistance layers. Then, the plurality of "green-state voltage-dependent resistance layers" may be fired and aligned on the carrier film.
- the manufacturing method of the present invention is capable of various modifications. This will be described below.
- FIGS. 13 (a) to 13 (e) schematically show the manufacturing process of the “direct press die 1”.
- this direct press type process after forming the second electrode precursor layer 70 'on one main surface of the green sheet 10', as shown in FIG. 13A, the voltage-dependent resistance mounted on the carrier film 47 The layer 50 is pushed from above the second electrode precursor layer 70 'toward the inside of the green sheet. Thereby, as shown in FIG. 13B, the voltage-dependent resistance layer 50 and the second electrode precursor layer 70 'are disposed in the recess while forming the recess. In other words, the voltage dependent resistance layer 50 and the second electrode precursor layer 70 'are embedded in the green sheet 10' by an external force.
- the substrate 10 in which the voltage-dependent resistance layer 50 and the second electrode 70 are embedded is obtained by firing the green sheet 10 ′ (see FIG. 13C) to form the metal layer 90. Then, the metal layer 90 is patterned (see FIG. 13E) to form a first electrode 60 in contact with the voltage-dependent resistance layer 50 (see FIG. 13D).
- FIGS. 14 (a) to 14 (e) schematically show the manufacturing process of the “direct press die 2”.
- FIG. 14A the voltage-dependent resistive layer 50 and the second electrode precursor layer 70 'mounted on the carrier film 47 are used (the manufacturing process of such a part is shown in FIG. (A) to (d)).
- the carrier film 47 carrying the voltage dependent resistance layer 50 and the second electrode precursor layer 70 ' is pushed toward the inside of the green sheet so that the second electrode precursor layer 70' is on the lower side.
- FIG. 14B the voltage-dependent resistance layer 50 and the second electrode precursor layer 70 'are disposed in the recess while forming the recess.
- the voltage dependent resistance layer 50 and the second electrode precursor layer 70 ' are embedded in the green sheet 10' by an external force.
- the substrate 10 in which the voltage-dependent resistance layer 50 and the second electrode 70 are embedded is obtained by firing the green sheet 10 ′ (see FIG. 14C) to form the metal layer 90.
- the metal layer 90 is patterned (see FIG. 14E) to form a first electrode 60 in contact with the voltage-dependent resistance layer 50 (see FIG. 14D).
- (Recessed type) 16 (a) to 16 (e) schematically show the manufacturing process of the "recessed portion arrangement type".
- This aspect is characterized by using a green sheet 10 'in which the recess 15 is formed in advance, as shown in FIG. 16 (a).
- Green sheet 10 'in which the recessed part 15 was previously formed can be formed by pressing a convex-shaped metal mold
- the substrate 10 in which the voltage-dependent resistance layer 50 and the second electrode 70 are embedded is obtained by firing the green sheet 10 '(see FIG. 16C) to form the metal layer 90. Then, the metal layer 90 is patterned (see FIG. 16E) to form a first electrode 60 in contact with the voltage-dependent resistance layer 50 (see FIG. 16D).
- FIGS. 17A and 17B schematically show the manufacturing process of the “baked concave substrate type”. This aspect is characterized by using a fired substrate on which a recess is formed in advance. If such a substrate 10 is used, as shown in FIGS. 17A and 17B, in principle, the second electrode precursor layer 70 ′ and the voltage-dependent resistance layer 50 are disposed in the recess 15,
- the substrate for a light emitting element of the present invention can be obtained by performing only the heat treatment for forming the electrode.
- the substrate for a light emitting device can be obtained by disposing the pre-fired second electrode 70 in the recess 15 instead of the second electrode precursor layer 70 ′. In such a case, in particular, since the voltage-dependent resistive layer 50 disposed in the recess is not affected by heat, high varistor characteristics can be suitably maintained. In such an embodiment, a glass sealing process may be performed if necessary.
- the manufacturing process as shown in FIGS. 11 to 17 above can be applied even when obtaining a light emitting element substrate provided with a “voltage dependent resistance layer including a second electrode therein” such as a laminated varistor. it can.
- a “voltage dependent resistance layer including a second electrode therein” such as a laminated varistor. it can.
- FIGS. 18 (a) and 18 (b) after the “voltage-dependent resistance layer 50 including the second electrode 70” is disposed on one main surface of the green sheet 10 ′, "The voltage dependent resistance layer 50 including the second electrode 70” is pushed into the inside of the green sheet using the mold 42, and a recess is formed in the green sheet 10 'while the "second electrode 70 is The voltage-dependent resistive layer 50 "may be disposed on the bottom of the recess.
- the substrate on which the voltage-dependent resistive layer and the second electrode are embedded is obtained by firing the green sheet. Then, after forming a metal layer, the metal layer is patterned to form a first electrode in contact with the voltage-dependent resistance layer.
- the performance inspection of the protective element that is, the performance inspection of the varistor
- the yield in substrate manufacture can be improved.
- the "varistor" can exhibit desired varistor characteristics if it is obtained by firing at a temperature higher than the firing temperature of the green sheet. Therefore, it is better to fire the green sheet using the varistor obtained by firing at a desired temperature in advance than to obtain the varistor at the time of firing the green sheet. Can be avoided, and as a result, desired varistor characteristics can be achieved in the final light emitting device substrate.
- the manufacturing method has been described above on the premise of manufacturing a substrate having a single voltage-dependent resistive layer, the present invention is not necessarily limited to this embodiment.
- a substrate in which a plurality of voltage-dependent resistive layers are arrayed and embedded in an array ie, “a substrate in which a plurality of light emitting elements are arrayed and embedded in an array” is obtained, It can manufacture by the process similar to the manufacturing process which has been carried out.
- FIG. 19 shows an example of a method of forming a copper wiring on an LTCC by a semi-additive method.
- FIG. 19 (a) shows a state in which a plurality of voltage-dependent resistance layers are embedded flush, and after the whole substrate is immersed in a Pd catalyst solution and dried, electroless nickel plating is performed on the whole (FIG. 19 (b )reference).
- FIG. 19 (b ) shows a state in which a plurality of voltage-dependent resistance layers are embedded flush, and after the whole substrate is immersed in a Pd catalyst solution and dried, electroless nickel plating is performed on the whole (FIG. 19 (b )reference).
- a photoresist is formed by photolithography as shown in FIG. 19 (c) on a portion where electrolytic copper plating is not desired.
- the photoresist can be formed by applying a resist on the entire surface of the substrate and then performing mask pattern exposure and resist development.
- the thickness of the photoresist layer is preferably 60 ⁇ m or more, which is the desired thickness of the copper electrode.
- a thick copper layer is formed by electrolytic copper plating as shown in FIG. 19 (d).
- the resist is peeled off, and the entire surface is thinly etched in FIG. 19F to complete the process by removing the copper surface and the underlying nickel layer.
- a thick copper electrode can be obtained, and a fine interelectrode gap can be formed.
- the distance between the electrodes is desired to be 60 ⁇ m or less in combination with the miniaturization of the element, and considering the heat dissipation, the electrode thickness is also required to be 60 ⁇ m or more.
- the process as shown in FIG. 19 is an important process in achieving various dimensions of electrodes and inter-electrode distances.
- FIG. 20 (a) shows a state in which the voltage-dependent resistive layer 50 is buried flush with the substrate 10.
- a Ti thin film 101 for example, a Ti layer having a thickness of about 60 nm
- a Cu thin film 102 for example, a Cu layer with a film thickness of about 300 nm
- the Ti thin film 101 to be the base layer can function as an adhesive strength maintenance layer and a protective layer of the ceramic substrate 10 (protection from etching solution and plating solution), while the Cu thin film 102 is low for electrolytic copper plating to be performed later It can function as a resistive common electrode.
- a photoresist 103 is formed by photolithography on portions where electrolytic copper plating is not desired (see FIG. 20C).
- the photoresist can be formed by applying a resist on the entire surface of the substrate and then performing mask pattern exposure and resist development. Then, using the Cu thin film 102 formed in advance as a common electrode, as shown in FIG. 20D, a thick copper layer 104 is formed by electrolytic copper plating.
- electrolytic nickel plating and electrolytic gold plating are performed to form a Ni plating layer 105 and an Au plating layer 106 as shown in FIG. 20 (e). Since the formation of the Ni layer 105 and the Au layer 106 can be obtained by electrolytic plating, it can be performed at low cost.
- the photoresist 103 is peeled off. Then, by using the Ni layer 105 and the Au layer 106 as a resist, the Ti thin film 101 and the Cu thin film 102 formed by the sputtering method are partially removed by etching (FIG. 20 (g) and FIG. h) see).
- the voltage-dependent resistive layer 50 does not touch the alkaline solution or the acid solution until the final step of removing the Ti thin film 101.
- the voltage-dependent resistive layer (varistor) is weak to acid and alkali, and the removal of the Ti thin film itself uses a soft etching solution of around pH 7, so this process is an easy process with low load for the voltage-dependent resistive layer. Become.
- FIG. 21 (a) shows a state in which the varistors of chip components are buried flush.
- a Ti thin film 101 (for example, a Ti layer of about 60 nm in thickness) is formed by sputtering on such a chip varistor-containing substrate 10, and a Cu thin film 102 (for example, about 300 nm) is similarly deposited thereon.
- a Cu layer of film thickness is formed (see FIG. 21 (b)).
- the Ti thin film 101 to be the base layer can function as an adhesive strength maintenance layer and a protective layer of the ceramic substrate 10 (protection from etching solution and plating solution), while the Cu thin film 102 is low for electrolytic copper plating to be performed later It can function as a resistive common electrode.
- a photoresist 103 is formed by photolithography on portions where electrolytic copper plating is not desired (see FIG. 21C).
- the photoresist can be formed by applying a resist on the entire surface of the substrate and then performing mask pattern exposure and resist development. Then, using the Cu thin film 102 formed in advance as a common electrode, as shown in FIG. 21D, a thick copper layer 104 is formed by electrolytic copper plating.
- electrolytic nickel plating and electrolytic gold plating are performed to form a Ni plating layer 105 and an Au plating layer 106 as shown in FIG. 21 (e). Since the formation of the Ni layer 105 and the Au layer 106 can be obtained by electrolytic plating, it can be performed at low cost.
- the photoresist 103 is peeled off. Then, by using the Ni layer 105 and the Au layer 106 as a resist, the Ti thin film 101 and the Cu thin film 102 formed by the sputtering method are partially removed by etching (FIG. 21 (g) and FIG. h) see).
- the chip varistor does not come in contact with the alkaline solution or the acid solution until the final step of removing the Ti thin film 101.
- the chip varistor is weak to acid and alkali, the removal of the Ti thin film itself uses a soft etching solution having a pH of around 7, so this process is also a gentle process with less load for the chip varistor.
- FIG. 22 An aspect as shown in FIG. 22 may be used. It is as follows when this is described. A plurality of green sheets for varistor are laminated to a predetermined thickness using a green sheet for zinc oxide varistor, and cut into pieces (for example, a razor blade cutter is pressed against the green on the film Only the sheet is cut), whereby an individualized green sheet is obtained. Then, for example, about 100,000 pieces of singulated green sheets are collected, fired, and aligned with the carrier film. Alternatively, after laminating, after electrode printing, cutting and baking may be performed. Furthermore, electrode printing and baking may be performed after alignment after firing in individual pieces without electrode printing.
- the present invention is not necessarily limited to this aspect.
- the voltage-dependent resistive layer 50 may be embedded so as to at least partially overlap the mounting region of the light emitting element 20.
- the thermal via 94 can be formed immediately below the light emitting element that emits heat, and a substrate with excellent heat dissipation characteristics can be realized.
- the substrate of the present invention may be a substrate (for example, a three-layer structure or a four-layer structure) composed of a plurality of layers more than two layers different from each other in material. Can be realized.
- the need for complicated stacked zinc oxide varistors is eliminated, and connection points and via holes can be omitted, so that miniaturization and low cost can be realized. Since sintered zinc oxide varistors can be used, high varistor characteristics can be obtained.
- -A copper electrode can be used as an electrode terminal common to LEDs, and it becomes a zinc oxide varistor surface electrode directly, and a package configuration excellent in heat dissipation is relatively simple.
- the electrode of the zinc oxide varistor and the electrode for mounting the LED can be substantially shared.
- the zinc oxide varistor can be provided on either the front side or the back side of the package substrate.
- First aspect a substrate for a light emitting element on which one of two opposing main surfaces is a mounting surface and the light emitting element is mounted on the mounting surface,
- the light emitting element substrate is provided with a protective element for a light emitting element including a voltage dependent resistance layer embedded in the substrate, and a first electrode and a second electrode connected to the voltage dependent resistance layer.
- Second aspect in the first aspect, the surface of the voltage-dependent resistive layer is coplanar with one main surface (mounting surface) of the substrate to constitute a part of the mounting surface. Element substrate.
- the surface of the voltage-dependent resistive layer is on the same plane as the other main surface of the substrate (that is, the main surface of the substrate facing the mounting surface) .
- the first electrode is provided to be in contact with the substrate exposed surface of the voltage dependent resistance layer, What is claimed is: 1. A substrate for a light emitting element, wherein the second electrode is in contact with the embedded surface of the voltage dependent resistance layer in a state of facing the first electrode, or is included in the voltage dependent resistance layer.
- the second electrode is provided to be in contact with the substrate embedded surface of the voltage dependent resistance layer, and
- the second electrode is a main surface (mounting surface) or the other main surface facing the main surface, and the other main surface through the via hole penetrating the substrate portion between the other main surface facing the main surface and the voltage-dependent resistance layer
- a substrate for a light emitting device which is connected to an electrode or a metal layer provided on the main surface of the substrate.
- the protective element is a varistor element.
- the first electrode is provided in a state of being divided into two so as to be in contact with the substrate exposed surface of the voltage dependent resistance layer.
- Light emitting element substrate Ninth aspect: In the sixth aspect according to the fourth aspect or the fifth aspect, the first electrode is provided in a state separated into two on the substrate exposed surface of the voltage dependent resistance layer, and the second electrode is It is provided to be in contact with the substrate embedded surface of the voltage dependent resistance layer, What is claimed is: 1. A substrate for a light emitting element, comprising a series connection of two varistor elements sharing a second electrode formed on a substrate embedded surface of a voltage dependent resistance layer.
- the positive electrode of the light emitting element is connected to one of the two separated first electrodes, and the negative electrode of the light emitting element is connected to the other of the two separated first electrodes.
- the substrate has a two-layer structure comprising lower and upper layers of different materials, and the upper layer of the two-layer structure defines a mounting surface. And a voltage-dependent resistance layer is embedded in the upper layer.
- Twelfth aspect A light emitting device comprising the light emitting element substrate according to any one of the first to eleventh aspects and a light emitting element mounted on the mounting surface thereof.
- the light emitting element is an LED chip having a positive electrode and a negative electrode on the surface opposite to the light emitting surface, and the LED chip is flip chip mounted on the mounting surface
- a light emitting device characterized by Fourteenth aspect : a method of manufacturing a light emitting element substrate having a varistor element comprising a voltage dependent resistance layer and a first electrode and a second electrode connected to the voltage dependent resistance layer, Forming a second electrode precursor layer on one main surface (mounting surface) of the green sheet (A); (B) forming a recess in which the second electrode precursor layer is disposed on the bottom surface by pressing a convex mold onto the green sheet from above the second electrode precursor layer; Providing a voltage-dependent resistive layer in the recess, in particular, providing a voltage-dependent resistive layer on the second electrode precursor layer disposed in the recess (C); Firing the green sheet provided with the voltage-dependent resistive layer and the second electrode precursor layer in the recess to obtain
- a convex mold was pressed into one main surface of the green sheet to form a recess in the main surface (mounting surface) of the green sheet, and in the step (C), the second electrode precursor layer was formed on the lower surface.
- a method of manufacturing a substrate for a light emitting device comprising disposing a voltage dependent resistance layer in a recess.
- a voltage-dependent resistance layer is pressed onto the second electrode precursor layer into a green sheet instead of the steps (B) and (C) (more specifically, Pressing the voltage-dependent resistance layer into the green sheet in such a form that the voltage-dependent resistance layer is located on the second electrode precursor layer disposed on the green sheet), forming the recess, the voltage-dependent resistance layer and A method of manufacturing a substrate for a light emitting device, comprising disposing a second electrode precursor layer in a recess.
- the voltage-dependent resistance layer on which the second electrode precursor layer is formed is replaced with the second electrode precursor layer in place of the steps (A) to (C).
- a method of manufacturing a substrate for a light emitting device wherein the voltage dependent resistance layer and the second electrode precursor layer are disposed in a recess while being pressed into a green sheet to form a recess.
- Eighteenth aspect In the above fourteenth aspect, in place of the steps (A) to (C), a voltage-dependent resistive layer including the second electrode is disposed on one main surface of the green sheet to form a convex shape A mold is pushed onto the green sheet from above the voltage-dependent resistance layer, thereby forming in the green sheet a recess in which the voltage-dependent resistance layer including the second electrode is disposed on the bottom, and (D) A process for producing a substrate for a light emitting device, comprising firing a green sheet to obtain a substrate having a voltage dependent resistance layer and a second electrode embedded therein.
- Varistor characteristic check test In order to confirm the characteristics of the voltage-dependent resistance layer embedded inside the light-emitting element substrate, the substrate shown in FIG. 8C was fabricated, and the varistor characteristics before and after the chip varistor was incorporated in the ceramic substrate were compared.
- a chip varistor of 0.6 mm ⁇ 0.3 mm ⁇ 0.3 mm (length ⁇ width ⁇ thickness) was used as the chip varistor.
- the pieces were cut into pieces and baked at 1250 ° C. for 2 hours.
- the graph which evaluated the varistor characteristic before incorporating is shown in FIG.
- the characteristics before incorporation are represented by “ ⁇ ”
- the characteristics after incorporation are represented by “ ⁇ ”.
- the varistor voltage at a current of 1 ⁇ A was about 10 V before incorporation, but the varistor voltage was also about 10 V after incorporation.
- unnecessary material diffusion was suppressed and there was no change in characteristics due to the fact that the varistor fired at a high temperature of 1250 ° C. was fired at a low temperature of 900 ° C. it is conceivable that.
- the present invention which can incorporate a fired varistor in the surface layer of the substrate, can realize a very good built-in varistor.
- thermal resistance of the substrate in the form of FIG. 9 (configuration having the second electrode inside the voltage-dependent resistance layer) is evaluated as case A, and the form of FIG.
- the thermal resistance of the substrate in different types of substrate layer / aluminum nitride substrate layer and in different types of upper layer / lower layer being ceramic substrate layer / alumina substrate layer was evaluated.
- a copper electrode pattern as shown in FIG. 26 was formed by carrying out the process shown in FIG. 21 on the surface layer of the glass ceramic substrate in which such voltage dependent resistance layers were integrally laminated and fired integrally.
- the thickness t1 of the copper electrode obtained in this manner was 70 ⁇ m.
- Ni plating (plating thickness 5 ⁇ m) and Au plating (plating thickness: 0.5 ⁇ m) were applied to the surface layer of the copper electrode.
- the thermal conductivity of the glass ceramic was 3.5 W / mK, and the thermal conductivity of the voltage-dependent resistance layer was 25 W / mK.
- the LED chip was flip-chip mounted on the produced "glass-ceramic substrate having a voltage-dependent resistive layer".
- the chip size of the LED was 0.5 mm square.
- a plurality of 30 ⁇ m high Au bumps are formed (the proportion of the bump cross-sectional area to the chip size is 40%), and a 70 ⁇ m thick first electrode (a Ni-Au plated film is further formed on Cu) It is implemented by ultrasonic method.
- a sealing resin was supplied between the LED chip and the first electrode to be thermally cured.
- a phosphor layer was coated on an LED chip and formed, and then a lens was integrally molded. Finally, each piece was cut into pieces of 2.0 mm square to complete.
- the ratio of the wiring pattern to the substrate area is about 80%, and the heat of the LED chip is quickly diffused laterally by the copper electrode to increase the cross-sectional area Heat is dissipated from the substrate above.
- the thermal resistance value of the substrate in the obtained LED package was measured.
- the measurement method was measured using a Si diode chip of the same shape instead of the LED because all the power consumed by the LED was not converted to heat but was converted to light. That is, a constant low current was applied to the diode and the diode voltage was measured.
- the temperature measurement the temperature of the lower surface of the substrate was measured, the junction temperature of the diode was determined from the temperature dependency of the diode voltage, and the thermal resistance was determined from the difference from the mounting temperature at the lower portion of the substrate.
- the substrate of the LED package is a heterogeneous substrate (a substrate in which the upper layer / lower layer is a ceramic substrate layer / aluminum nitride substrate layer, and a heterogeneous form in which the upper layer / lower layer is a ceramic substrate layer / alumina substrate layer)
- a heterogeneous substrate a substrate in which the upper layer / lower layer is a ceramic substrate layer / aluminum nitride substrate layer, and a heterogeneous form in which the upper layer / lower layer is a ceramic substrate layer / alumina substrate layer
- the package substrate in which the lower layer substrate was a 96% alumina substrate layer with a thermal conductivity of 18 W / mK, and the lower layer substrate was an aluminum nitride substrate layer (AlN) with a thermal conductivity of 170 W / mk The thermal resistance of the package substrate was evaluated.
- the thickness of the entire substrate was 400 ⁇ m, the same as in case A.
- the glass ceramic layer incorporating the voltage-dependent resistance layer is 100 ⁇ m, and the 96% alumina substrate layer and the aluminum nitride substrate layer are 300 ⁇ m.
- the thermal resistance value of the substrate in the obtained LED package was measured in the same manner as in case A.
- the thermal resistance value R th is 10.36 ° C./W
- the thermal resistance value R th was 6.38 ° C./W.
- the LED package using different substrates has better heat dissipation characteristics.
- the substrate is made of alumina or aluminum nitride having higher strength than glass ceramic, not only the heat dissipation characteristic is excellent but also the bending strength is high and the structure is also excellent.
- the LED using the light-emitting element substrate of the present invention has high luminance and is miniaturized, and therefore, can be suitably used for various lighting applications, as well as a display device (liquid crystal screen) backlight light source It can be suitably used in a wide range of applications such as camera flash applications and in-vehicle applications.
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Abstract
Description
発光素子用基板には、その基板に埋設された電圧依存抵抗層とその電圧依存抵抗層に電気的に接続された第1電極と第2電極とを含んでなる「発光素子用の保護素子」が設けられており、発光素子が電圧依存抵抗層に重なるように実装される発光素子用基板が提供される。
グリーンシートの一方の主面に第2電極前駆体層を形成する(A)工程と、
凸形状金型を第2電極前駆体層の上からグリーンシートに押し込んで、その第2電極前駆体層が底面に配された凹部をグリーンシートに形成する(B)工程と、
形成された凹部に電圧依存抵抗層を供する、即ち、凹部の底面に配された第2電極前駆体層上に電圧依存抵抗層を配する(C)工程と
凹部に電圧依存抵抗層および第2電極前駆体層が供されたグリーンシートを焼成し、電圧依存抵抗層および第2電極が埋設された基板を得る(D)工程と、
基板表面に金属層を形成した後でパターニングに付し、それによって、電圧依存抵抗層と接する第1電極を形成する(E)工程
を含んで成る。
本発明の発光素子用基板は、実装される発光素子と重なる基板領域に保護素子の電圧依存抵抗層が埋め込まれている。つまり、図1に示すように、本発明の発光素子用基板100では、その発光素子実装領域25において保護素子の電圧依存抵抗層50が埋設されている。尚、本発明では、発光素子実装領域25と少なくとも部分的にオーバーラップするように電圧依存抵抗層50が埋設されていればよく、電圧依存抵抗層50の一部のみが発光素子実装領域25と重なるような態様であってもよい。
図5に「電圧依存抵抗層の基板背面埋め込み形態」を有するLEDパッケージ150を示す。図示するように、保護素子(例えばバリスタ素子)の電圧依存抵抗層50と基板背面とが“面一”になるように、電圧依存抵抗層50が埋め込まれている。つまり、電圧依存抵抗層50が基板底面と同一平面上にあるように設けられている。第2電極70は、電圧依存抵抗層50の上面と接するように設けられている。かかる形態では、ビアホールやスルホールなどを介してあるいは基板側面から周り込む金属層などを介して「基板表面の金属層」と「基板底面の金属層」との電気的導通がなされている。かかる形態であっても、「電圧依存抵抗層の基板背面埋め込み形態」では、特に発光素子直下に電圧依存抵抗層が埋設される形態より低温で保持されるため、電圧依存抵抗層の温度特性による漏れ電流を抑制することができ、効率が改善できるといった効果が奏され得る。
図6に「貫通電極形態」を有するLEDパッケージ150を示す。図示するように、基板内部に設けられている第2電極70は、基板背面と電圧依存抵抗層50との間にある基板内部領域を貫通するビアホール95を介して、基板背面の電極や金属層90に接続されている。この「貫通電極形態」では、特に電圧依存抵抗層が表面に露出しない構成となるため、以降の電極層のAuめっき処理などの際に低抵抗化されることが抑制できるといった効果が奏され得る。また、基板内部に構成し実装面側に取り出す電極と電気的な接続を行うスルーホール形成と同じプロセスで形成できるのでスループットが増加しないといった効果も奏され得る。
図7(a)~(c)に「凹部設置形態」を有するLEDパッケージ150を示す。図示するように、基板主面に形成された凹部15に電圧依存抵抗層50および第2電極70が設けられている。かかる形態は、実質的に上述した形態と同じものであるものの、製造プロセスの相違に起因した特徴を有している。つまり、これまでの形態のLEDパッケージでは、グリーンシート10’に電圧依存抵抗層50および第2電極前駆体層70’を埋め込んで、それらを焼成して基板を得ているものであるのに対して(例えば後述する図8参照)、「凹部設置形態」のLEDパッケージでは、予め凹部15が形成された焼成済み基板を用いている(後述する図14参照)。従って、「凹部設置形態」では電圧依存抵抗層50などは熱的影響を実質的に受けておらず、より良好な保護素子特性が得られることになる。
図8(a)に「積層型バリスタ内蔵形態」を有するLEDパッケージ150を示す。図示するように、電圧依存抵抗層50が実質的に積層したような形態となっている。より具体的には、電圧依存抵抗層50の内部に設けられた複数の内部電極(70A1,70A2)と、該内部電極(70A1,70A2)と電気的に接続されるように電圧依存抵抗層50の外部に設けられた外部電極(71A1,71A2)とが設けられている。かかる場合、内部電極(70A1,70A2)が本発明にいう第2電極に相当する。この「積層型バリスタ内蔵形態」では、図8(b)に示すようなチップバリスタを基板に埋設することを通じて得ることができる。積層型バリスタゆえに、電極面積が大きいので、静電気耐量が大きい点で利点がある。ちなみに、特に図8(c)に示されるように、第1電極60の表面にはNi薄層105とAu薄層106が設けられている。これは、製造プロセスに起因したものであり、第1電極や銅配線の形成に際してNi薄層105およびAu薄層106を“レジスト”として用いることに起因している(詳細は図20を参照して後述する)。
図9に「第2電極の電圧依存抵抗層埋め込み形態」を有するLEDパッケージ150を示す。かかる態様は、図示するように、第2電極70が電圧依存抵抗層50の内部に埋設される態様である。つまり、第1電極60は電圧依存抵抗層50の基板露出面と接するように設けられている一方、第2電極70は電圧依存抵抗層50の内部に含まれている態様であってもよい。かかる態様であっても“ダブル・バリスタ構成”が可能である。図示するように、第1電極60が電圧依存抵抗層50の基板露出面にて2つ(60a、60b)に分離されている一方、第2電極70が電圧依存抵抗層50の内部にて2つのサブ電極70aおよび70bを共有するように直列接続されてなる(2つのサブ電極70aおよび70bから構成される第2電極70は、図示するように単一層の形態を有していることが好ましい)。このように第2電極70が電圧依存抵抗層50の内部に含まれている態様では、基板材料の拡散に起因したバリスタ特性の劣化防止を効果的に図ることができる。また、実質的にダブル・バリスタのバリスタ電圧を小さくでき、静電容量も大きくできるといった効果も奏され得る。かかる「電圧依存抵抗層50の内部に埋設された第2電極70」は、1つである必要はなく、複数設けてもよい(ちなみに、“複数”の一態様が、上記の「積層型バリスタ内蔵形態」に相当し得る)。
図10に「異種セラミック基板形態」を有するLEDパッケージ150を示す。かかる態様は、基板ボディが複数の異なる材質層から構成されている態様である。図示される態様では、上層10Aおよび下層10Bの2層構造となっており、電圧依存抵抗層50が存在する上層10Aが低温焼成材層(例えばガラスセラミック基板層)から成る一方、下層10Bが高温焼成材層(例えばアルミナ基板または窒化アルミ基板)から成る。かかる場合、上層の低温焼成材層10Aは、例えば約900℃の低温焼成で得られたものであり、電圧依存抵抗層50(即ち、バリスタ)の基板内蔵の点で好ましい一方、下層の高温焼成材層は高伝導性を達成できるようになっており、放熱特性の優れた基板が実現される(ガラスセラミック基板層の熱伝導率:3~5W/mK、アルミナ基板層の熱伝導率:10~20W/mK、窒化アルミ基板層の熱伝導率:100~230W/mK)。図10に示される異種基板(例えば上層/下層がガラスセラミック基板層/アルミナ基板層となった異種基板)は、焼成済みのアルミナ基板上に「低温焼成セラミック基板(LTCC)から成るグリーンシート」が積層された構成に対してバリスタ焼結体を埋設することによって得ることができる。図示される態様では、第2電極70が電圧依存抵抗層50の内部に埋設されていると共に、第1電極60の表面にはNi薄層105とAu薄層106が設けられている(図10(b)参照)。
次に、本発明の発光素子用基板の製造方法について説明する。図11(a)~(f)に本発明の製造方法を実施するためのプロセスを示している。
『ガラスセラミック低温焼結基板材料に少なくとも有機バインダ、可塑剤を含むグリーンシートを作製し、導体ペースト組成物で電極パターンを形成し、前記生シートと別の電極パターン形成済みグリーンシートとを所望枚数積層する。しかる後、前記低温焼結ガラスセラミックよりなるグリーンシート積層体の両面もしくは片面に、前記ガラスセラミック低温焼結基板材料の焼成温度では焼結しない無機組成物よりなるグリーンシートで挟み込むように積層し、前記積層体を焼成する。しかる後、焼結しない無機組成物を取り除くことにより焼成時の収縮が平面方向で起こらないガラスセラミック基板を得ることができる』
図13(a)~(e)に「直接プレス型1」の製造プロセス態様を模式的に示す。かかる直接プレス型のプロセスでは、グリーンシート10’の一方の主面に第2電極前駆体層70’を形成した後、図13(a)に示すように、キャリアフィルム47に載せた電圧依存抵抗層50を第2電極前駆体層70’の上からグリーンシート内部に向かって押し込む。これにより、図13(b)に示すように、凹部を形成しながらその凹部に電圧依存抵抗層50および第2電極前駆体層70’を配置する。換言すれば、外力によって電圧依存抵抗層50および第2電極前駆体層70’をグリーンシート10’に埋め込む。以後は、上述の製造方法と同様、グリーンシート10’の焼成により電圧依存抵抗層50および第2電極70が埋設された基板10を得て(図13(c)参照)、金属層90を形成して(図13(d)参照)、その金属層90をパターニングして(図13(e)参照)、電圧依存抵抗層50と接する第1電極60を形成する。
図14(a)~(e)に「直接プレス型2」の製造プロセス態様を模式的に示す。かかる直接プレス型2のプロセスでは、図14(a)に示すように、キャリアフィルム47に載せた電圧依存抵抗層50および第2電極前駆体層70’を用いる(かかる部分の製造プロセスは図15(a)~(d)を参照のこと)。電圧依存抵抗層50および第2電極前駆体層70’を載せたキャリアフィルム47を第2電極前駆体層70’が下側になるようにしてグリーンシートの内部に向かって押し込む。これにより、図14(b)に示すように、凹部を形成しながらその凹部に電圧依存抵抗層50および第2電極前駆体層70’を配置する。即ち、外力によって電圧依存抵抗層50および第2電極前駆体層70’をグリーンシート10’に埋め込む。以後は、上述の製造方法と同様、グリーンシート10’の焼成により電圧依存抵抗層50および第2電極70が埋設された基板10を得て(図14(c)参照)、金属層90を形成して(図14(d)参照)、その金属層90をパターニングして(図14(e)参照)、電圧依存抵抗層50と接する第1電極60を形成する。
図16(a)~(e)に「凹部配置型」の製造プロセス態様を模式的に示す。かかる態様は、図16(a)に示すように、予め凹部15が形成されたグリーンシート10’を用いることを特徴としている。予め凹部15が形成されたグリーンシート10’は、グリーンシート10’の主面に凸形状金型を押し込むことによって形成することができる。そして、図16(b)に示すように、キャリアフィルム47に載せた電圧依存抵抗層50および第2電極前駆体層70’をグリーンシート10’の凹部15に配置する。以後は、上述の製造方法と同様、グリーンシート10’の焼成により電圧依存抵抗層50および第2電極70が埋設された基板10を得て(図16(c)参照)、金属層90を形成して(図16(d)参照)、その金属層90をパターニングして(図16(e)参照)、電圧依存抵抗層50と接する第1電極60を形成する。
図17(a)および(b)に「焼成済み凹部基板型」の製造プロセス態様を模式的に示す。かかる態様は、予め凹部が形成された焼成済みの基板を用いることを特徴としている。このような基板10を用いれば、図17(a)および(b)に示すように、原則、第2電極前駆体層70’および電圧依存抵抗層50をその凹部15に配して、第2電極を形成する熱処理のみを施すことによって、本発明の発光素子用基板を得ることができる。また、第2電極前駆体層70’の代わりに、予め焼成済みの第2電極70を凹部15に配すことによっても発光素子用基板を得ることができる。かかる場合には特に、凹部に配された電圧依存抵抗層50は熱の影響を受けないので、高いバリスタ特性を好適に維持できる。かかる態様では、必要に応じてガラス封止処理を施してもよい。
上記の図11~17で示したような製造プロセスは、積層型バリスタなどの「第2電極が内部に含まれた電圧依存抵抗層」を備えた発光素子用基板を得る場合でも適用することができる。例えば、図18(a)および(b)に示すように、「第2電極70を内部に含んだ電圧依存抵抗層50」をグリーンシート10’の一方の主面に配した後、凸形状金型42を用いて「第2電極70を内部に含んだ電圧依存抵抗層50」をグリーンシート内部へと押し込んで、グリーンシート10’に対して凹部を形成しつつ、「第2電極70を内部に含んだ電圧依存抵抗層50」が凹部の底面に配された状態としてよい。以後は、上述の製造方法と同様、グリーンシートの焼成により「電圧依存抵抗層および第2電極が埋設された基板」を得る。そして、金属層を形成した後、その金属層をパターニングして電圧依存抵抗層と接する第1電極を形成する。このような製造プロセスでは、埋設に先立って保護素子の性能検査(即ち、バリスタの性能検査)を行うことができるので、基板製造における歩留りが向上し得る。また、このような製造プロセスでは、予め別途で焼成して得られたバリスタを用いることができるので、上述したように最終的な発光用基板において高いバリスタ特性を得ることもできる。“バリスタ”というものは、グリーンシートの焼成温度よりも高い温度でもって焼成して得る方が所望のバリスタ特性を呈し得る。それゆえ、バリスタをグリーンシートの焼成に際して得るよりも、所望の温度で予め焼成して得られたバリスタを用いてグリーンシートの焼成を行った方が「バリスタ形成時の不十分な焼成(焼け不足)」を回避でき、その結果、最終的な発光素子用基板において所望のバリスタ特性を達成できるようになる。
● また、上記では、基板が異種基板となる場合では、上層と下層とから成る2層構造の基板について説明してきたものの、本発明は必ずしもかかる態様に限定されない。つまり、本発明の基板としては、相互に材質の異なる2層よりも多い複数層から成る基板(例えば、3層構造ないしは4層構造)であってもよく、これによっても同様に放熱特性の優れた基板を実現することができる。
・複雑な積層型酸化亜鉛バリスタが不要となり、接続箇所やビアホールなどを省略できるので小型化と低コストが実現できる。
・焼結済の酸化亜鉛バリスタを利用できるので、高いバリスタ特性を得ることができる。
・LEDと共通の電極端子として銅電極が利用でき、かつダイレクトに酸化亜鉛バリスタ表面電極となり、放熱性に優れたパッケージ構成が比較的シンプルである。
・酸化亜鉛バリスタの電極とLED実装用電極が実質的に共用できる。
・酸化亜鉛バリスタはパッケージ基板の表面側、裏面側のどちらにも設けることができる。
第1態様:対向する2つの主面の一方を実装面とし、その実装面に発光素子が実装される発光素子用の基板であって、
発光素子用基板には、その基板に埋設された電圧依存抵抗層と該電圧依存抵抗層に接続された第1電極と第2電極とを含んでなる発光素子用の保護素子が設けられており、発光素子が電圧依存抵抗層に重なるように実装される発光素子用基板。
第2態様:上記第1態様において、電圧依存抵抗層の表面が基板の一方の主面(実装面)と同一平面上にあって実装面の一部を構成していることを特徴とする発光素子用基板。
第3態様:上記第1態様において、電圧依存抵抗層の表面が基板の他方の主面(即ち、実装面と対向する基板主面)と同一平面上にあることを特徴とする発光素子用基板。
第4態様:上記第2態様または第3態様において、第1電極が電圧依存抵抗層の基板露出面と接するように設けられており、
第2電極が第1電極に対向した状態で電圧依存抵抗層の基板埋設面と接している又は電圧依存抵抗層の内部に含まれていることを特徴とする発光素子用基板。
第5態様:上記第4態様において、第2電極が電圧依存抵抗層の基板埋設面と接するように設けられており、また、
第2電極は、一方の主面(実装面)又はその主面と対向する他方の主面と電圧依存抵抗層との間の基板部分を貫通するビアホールを介して前記一方の主面又は前記他方の主面に設けられた電極又は金属層に接続されていることを特徴とする発光素子用基板。
第6態様:上記の第1態様~第5態様のいずれかにおいて、保護素子がバリスタ素子であることを特徴とする発光素子用基板。
第7態様:上記第6態様において、バリスタ素子が積層バリスタ素子(またはチップバリスタ)であることを特徴とする発光素子用基板。
第8態様:上記第1態様~第7態様のいずれかにおいて、第1電極が、電圧依存抵抗層の基板露出面と接するように2つに分離された状態で設けられていることを特徴とする発光素子用基板。
第9態様:上記第4態様または第5態様に従属する上記第6態様において、第1電極が電圧依存抵抗層の基板露出面にて2つに分離された状態で設けられ、第2電極が前記電圧依存抵抗層の基板埋設面と接するように設けられており、
バリスタ素子は電圧依存抵抗層の基板埋設面に形成された第2電極を共有する2つのバリスタ素子が直列接続されてなることを特徴とする発光素子用基板。
第10態様:上記第8態様において、分離された2つの第1電極の一方に発光素子の正電極が接続され、分離された2つの第1電極の他方に発光素子の負電極が接続されることを特徴とする発光素子用基板。
第11態様:上記の第1態様~第10態様のいずれかにおいて、基板が相互に材質の異なる下層と上層とから成る2層構造となっており、2層構造の上層が実装面を規定している層であって電圧依存抵抗層が上層に埋設されていることを特徴とする発光素子用基板。
第12態様:上記の第1態様~第11態様のいずれかの発光素子用基板と、その実装面に実装された発光素子とを有して成る発光装置。
第13態様:上記第12態様において、発光素子が、発光面の反対側の面に正電極と負電極とを有するLEDチップであって、そのLEDチップが実装面上にフリップチップ実装されたことを特徴とする発光装置。
第14態様:電圧依存抵抗層とその電圧依存抵抗層に接続された第1電極と第2電極とを含んでなるバリスタ素子を有する発光素子用基板の製造方法であって、
グリーンシートの一方の主面(実装面)に第2電極前駆体層を形成する(A)工程と、
凸形状金型を第2電極前駆体層の上からグリーンシートに押し込んで、第2電極前駆体層が底面に配された凹部を該グリーンシートに形成する(B)工程と、
凹部に電圧依存抵抗層を供する、特に、凹部に配された第2電極前駆体層の上に電圧依存抵抗層を供する(C)工程と、
凹部に電圧依存抵抗層および第2電極前駆体層が供されたグリーンシートを焼成し、電圧依存抵抗層および第2電極が埋設された基板を得る(D)工程と、
基板に金属層を形成した後でパターニングに付し、それによって、電圧依存抵抗層と接する第1電極を形成する(E)工程
を含んで成る発光素子用基板の製造方法。
第15態様:上記第14態様において、前記(A)および(B)工程に代えて、
グリーンシートの一方の主面に凸形状金型を押し込んで、グリーンシートの主面(実装面)に凹部を形成し、前記(C)工程では、下面に第2電極前駆体層が形成された電圧依存抵抗層を凹部に配置することを特徴とする発光素子用基板の製造方法。
第16態様:上記第14態様において、前記(B)および(C)工程に代えて、電圧依存抵抗層を第2電極前駆体層の上からグリーンシートへと押し込んで(より具体的には、グリーンシート上に配された第2電極前駆体層の上に電圧依存抵抗層が位置するような形態で電圧依存抵抗層をグリーンシートへと押し込んで)、凹部を形成しながら電圧依存抵抗層および第2電極前駆体層を凹部に配置することを特徴とする発光素子用基板の製造方法。
第17態様:上記第14態様において、前記(A)~(C)工程に代えて、第2電極前駆体層が形成された電圧依存抵抗層を第2電極前駆体層が下になるようにグリーンシートへと押し込んで、凹部を形成しながら電圧依存抵抗層および第2電極前駆体層を凹部に配置することを特徴とする発光素子用基板の製造方法。
第18態様:上記第14態様において、前記(A)~(C)工程に代えて、第2電極を内部に含んた電圧依存抵抗層をグリーンシートの一方の主面に配して、凸形状金型を電圧依存抵抗層の上からグリーンシートに押し込み、それによって、第2電極を内部に含んた電圧依存抵抗層が底面に配された凹部を前記グリーンシートに形成し、また
前記(D)工程では、グリーンシートを焼成して電圧依存抵抗層および第2電極が埋設された基板を得ることを特徴とする発光素子用基板の製造方法。
発光素子用基板の内部に埋設された電圧依存抵抗層の特性を確認するため、図8(c)で示される基板を作製し、チップバリスタのセラミック基板への内蔵前後におけるバリスタ特性を比較した。
本発明のような「電圧依存抵抗層が内蔵されたセラミック基板」の放熱特性について確認試験を行った。
ガラスセラミックよりなるグリーンシートと、電圧依存性抵抗層の焼結体とを積層し、900℃で1時間(空気中)の焼成に付した。ガラスセラミック・グリーンシートは焼成後の厚みがT=400μmであって、内蔵した電圧依存性抵抗層のサイズはw=0.5mm角であり、内部の電極(第2電極)のサイズはw2=350μm角であった。バリスタ電圧の基準となる内部の第2電極の上面とガラスセラミック基板の表面までの距離tは20μmであった(T、w、w2およびtについては図1参照のこと)。
ケースBにおいては、LEDパッケージの基板が異種基板(上層/下層がセラミック基板層/窒化アルミ基板層となった基板、および、上層/下層がセラミック基板層/アルミナ基板層となった異種形態)となった場合の熱抵抗評価を上記ケースAと同様に検討した。
10A 基板ボディの上層
10B 基板ボディの下層
10’ グリーンシート
20 発光素子(例えばLEDチップ)
30 封止樹脂
25 発光素子実装領域
42 凸形状金型
47 キャリアフィルム
50 電圧依存抵抗層
50’ 電圧依存抵抗層形成用のグリーンシート
60 第1電極
60a,60b 第1電極のサブ電極
70 第2電極
70’ 第2電極前駆体層
70a,70b 第2電極のサブ電極
70A1,70A2 電圧依存抵抗層の内部の第2電極
71A1,71A2 外部電極
80 蛍光体層
90 金属層(パターン配線層)
94 サーマルビアまたはサーマルビアホール
95 ビアまたはビアホール
97 スルーホール
98 バンプ
100 本発明の発光素子用基板
101 Ti薄膜
102 Cu薄膜
105 Niめっき層
106 Auめっき層
110 保護素子
150 LEDパッケージ
200 従来のLEDパッケージ(従来技術)
210 パッケージ基板
220 LED素子
270 ツェナーダイオード素子
Claims (17)
- 対向する2つの主面の一方を実装面とし、該実装面に発光素子が実装される発光素子用の基板であって、
前記基板には、該基板に埋設された電圧依存抵抗層と該電圧依存抵抗層に接続された第1電極と第2電極とを含んでなる発光素子用の保護素子が設けられており、前記発光素子が前記電圧依存抵抗層に重なるように実装される発光素子用基板。 - 前記電圧依存抵抗層の表面が前記基板の前記一方の主面と同一平面上にあって前記実装面の一部を構成していることを特徴とする、請求項1に記載の発光素子用基板。
- 前記電圧依存抵抗層の表面が前記基板の他方の主面と同一平面上にあることを特徴とする、請求項1に記載の発光素子用基板。
- 前記電圧依存抵抗層の基板露出面と接するように前記第1電極が設けられ、前記第2電極が前記第1電極に対向した状態で前記電圧依存抵抗層の基板埋設面と接するように又は前記電圧依存抵抗層の内部に含まれるように設けられていることを特徴とする、請求項2に記載の発光素子用基板。
- 前記第2電極が前記電圧依存抵抗層の基板埋設面と接するように設けられており、また
前記第2電極が、前記一方の主面又は前記他方の主面と前記電圧依存抵抗層との間の基板部分を貫通するビアホールを介して前記一方の主面又は前記他方の主面に設けられた電極又は金属層に接続されていることを特徴とする、請求項4に記載の発光素子用基板。 - 前記保護素子がバリスタ素子であることを特徴とする、請求項1に記載の発光素子用基板。
- 前記第1電極が前記電圧依存抵抗層の基板露出面にて2つに分離されていることを特徴とする、請求項4に記載の発光素子用基板。
- 前記保護素子がバリスタ素子であって、前記第2電極が前記第1電極に対向した状態で前記電圧依存抵抗層の基板埋設面と接するように設けられており、また
前記バリスタ素子は前記電圧依存抵抗層の基板埋設面に形成された第2電極を共有する2つのバリスタ素子が直列接続されてなることを特徴とする、請求項7に記載の発光素子用基板。 - 前記分離された2つの第1電極の一方に発光素子の正電極が接続され、該分離された2つの第1電極の他方に該発光素子の負電極が接続されることを特徴とする、請求項7に記載の発光素子用基板。
- 前記基板が相互に材質の異なる下層と上層とから成る2層構造となっており、該上層が前記実装面を規定している層であって、前記電圧依存抵抗層が該上層に埋設されていることを特徴とする、請求項1に記載の発光素子用基板。
- 請求項1に記載の発光素子用基板と、前記実装面に実装された発光素子とを有して成る発光装置。
- 前記発光素子が、発光面の反対側の面に正電極と負電極とを有するLEDチップであって、該LEDチップが前記実装面上にフリップチップ実装されていることを特徴とする、請求項11に記載の発光装置。
- 電圧依存抵抗層と該電圧依存抵抗層に接続された第1電極と第2電極とを含んでなるバリスタ素子を有する発光素子用基板の製造方法であって、
グリーンシートの一方の主面に第2電極前駆体層を形成する(A)工程と、
凸形状金型を前記第2電極前駆体層の上から前記グリーンシートに押し込んで、前記第2電極前駆体層が底面に配された凹部を該グリーンシートに形成する(B)工程と、
前記凹部に電圧依存抵抗層を供する(C)工程と、
前記凹部に電圧依存抵抗層および第2電極前駆体層が供されたグリーンシートを焼成し、電圧依存抵抗層および第2電極が埋設された基板を得る(D)工程と、
前記基板に金属層を形成した後でパターニングに付し、それによって、前記電圧依存抵抗層と接する第1電極を形成する(E)工程
を含んで成る、発光素子用基板の製造方法。 - 前記(A)および(B)工程に代えて、グリーンシートの一方の主面に凸形状金型を押し込んで、該グリーンシートの該主面に凹部を形成し、
前記(C)工程では、下面に第2電極前駆体層が形成された電圧依存抵抗層を該凹部に配置することを特徴とする、請求項13に記載の発光素子用基板の製造方法。 - 前記(B)および(C)工程に代えて、電圧依存抵抗層を前記第2電極前駆体層の上からグリーンシートへと押し込んで、前記凹部を形成しながら該電圧依存抵抗層および該第2電極前駆体層を該凹部に配置することを特徴とする、請求項13に記載の発光素子用基板の製造方法。
- 前記(A)~(C)工程に代えて、第2電極前駆体層が形成された電圧依存抵抗層を該第2電極前駆体層が下になるようにグリーンシートへと押し込んで、前記凹部を形成しながら該電圧依存抵抗層および該第2電極前駆体層を該凹部に配置することを特徴とする、請求項13に記載の発光素子用基板の製造方法。
- 前記(A)~(C)工程に代えて、前記第2電極を内部に含んだ前記電圧依存抵抗層をグリーンシートの一方の主面に配して、凸形状金型を前記電圧依存抵抗層の上から前記グリーンシートに押し込み、それによって、前記第2電極を内部に含んだ前記電圧依存抵抗層が底面に配された凹部を前記グリーンシートに形成し、また
前記(D)工程では、前記グリーンシートを焼成して前記電圧依存抵抗層および前記第2電極が埋設された基板を得ることを特徴とする、請求項13に記載の発光素子用基板の製造方法。
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