WO2010083705A1 - 一种薄膜温差电池及其制作方法 - Google Patents

一种薄膜温差电池及其制作方法 Download PDF

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Publication number
WO2010083705A1
WO2010083705A1 PCT/CN2009/075419 CN2009075419W WO2010083705A1 WO 2010083705 A1 WO2010083705 A1 WO 2010083705A1 CN 2009075419 W CN2009075419 W CN 2009075419W WO 2010083705 A1 WO2010083705 A1 WO 2010083705A1
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Prior art keywords
layer
film layer
film
substrate
type thermoelectric
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PCT/CN2009/075419
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English (en)
French (fr)
Inventor
范平
张东平
郑壮豪
粱广兴
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深圳大学
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Application filed by 深圳大学 filed Critical 深圳大学
Priority to US13/126,076 priority Critical patent/US9299907B2/en
Priority to JP2011545613A priority patent/JP5468088B2/ja
Priority to EP09838672.5A priority patent/EP2381497B1/en
Publication of WO2010083705A1 publication Critical patent/WO2010083705A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • H10N10/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • H10N10/10Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects
    • H10N10/17Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects characterised by the structure or configuration of the cell or thermocouple forming the device

Definitions

  • the present invention relates to the field of thermoelectric technology, and in particular to a thin film temperature difference battery and a manufacturing method thereof.
  • Thermoelectric cells are devices that use temperature differences to convert thermal energy directly into electrical energy due to the Seebeck effect.
  • the thermoelectric cell works by combining two different metals or two different types of thermoelectric conversion materials, one end of the ⁇ type and the ⁇ type semiconductor, and placing them at a high temperature, and the other end is open and given a low temperature. Since the thermal excitation at the high temperature end is strong, the hole and electron concentrations are also higher than the low temperature end. Under the carrier concentration gradient, holes and electrons diffuse toward the low temperature end, thereby forming a potential difference at the low temperature open end; By connecting a number of pairs of ⁇ -type and ⁇ -type thermoelectric conversion materials to form a module, a sufficiently high voltage can be obtained to form a thermoelectric generator.
  • the temperature difference battery As a clean energy source, the temperature difference battery has a series of advantages such as no noise, no harmful substances, high reliability and long life. It can provide stable power output for a long time, safely and continuously.
  • the main purpose is to cut the thermoelectric material wire into pieces and then solder it to form a temperature difference battery.
  • thermoelectric single The body substrate and the ⁇ -type thermoelectric unit substrate are separately manufactured separately, so that in the manufacturing process of the micro-film temperature difference battery, the conductive layer connecting the ⁇ -type and the ⁇ -type thermoelectric unit is fabricated on the substrate and the thermoelectric unit. It can be carried out without peeling.
  • the process of manufacturing a temperature difference battery by the above method is complicated
  • the film portion of the single-cell temperature difference battery also involves only a single-layer film, and the performance of the temperature difference battery is also limited [6]
  • An object of the present invention is to provide a thin film temperature difference battery and a manufacturing method thereof, which are improved in the performance of the above-mentioned prior art, and the performance of the thin film temperature difference battery is improved, and the manufacturing process is simple.
  • the technical solution of the present invention is as follows:
  • a thin film temperature difference battery comprising a substrate
  • one side of the substrate is sequentially and repeatedly plated with a P-type thermoelectric material film layer, an insulating material film layer, and an N-type thermoelectric material film layer;
  • a set of the P-type thermoelectric material film layer, the insulating material film layer and the N-type thermoelectric material film layer form a three-layer film, the three-layer film P-type thermoelectric material film layer and the N-type thermoelectric material film layer Connecting at one end of the insulating material film layer to form a PN junction;
  • a film layer of insulating material is separated between two adjacent PN junctions, and a three-layer film PN junction on both sides of the phase isolation material film layer is connected from one end of the phase isolation material film layer to form a The series connection between the PN junctions;
  • An electrode is taken from the outermost film layer of the last three film on one side of the substrate and the other electrode is taken out from the upper side of the substrate.
  • the thickness of the substrate is: 0.1 mm to 100 mm, and the thickness of the P-type thermoelectric material film layer is: lnm to ⁇ ; the thickness of the ⁇ -type thermoelectric material film layer is: lnm to 10 ⁇ .
  • the shape of the substrate is a regular rectangle, or a square, or an arbitrary irregular shape.
  • the exposed side shape of the substrate is a plane or a curved surface.
  • the substrate is an insulating material substrate, a ⁇ -type thermoelectric material substrate or a ⁇ -type thermoelectric material substrate.
  • Another film temperature difference battery including a substrate,
  • the two sides of the substrate are sequentially and repeatedly plated with a ruthenium-type thermoelectric material film layer, an insulating material film layer, and a ⁇ -type thermoelectric material film layer;
  • a set of the ⁇ -type thermoelectric material film layer, the insulating material film layer and the ⁇ -type thermoelectric material film layer form a three-layer film, the three-layer film ⁇ -type thermoelectric material film layer and the ⁇ -type thermoelectric material film layer Connecting at one end of the insulating material film layer to form a knot;
  • a film layer of insulating material is separated between adjacent two of the tantalum junctions, and three layers of film knots on both sides of the film layer of the phase insulating material are connected from one end of the film layer of the phase insulating material material to form a The tandem connection between the knots;
  • the electrodes are taken out from the outermost film layers of the last three layers of the film on both sides of the substrate, respectively.
  • a method for fabricating a film temperature difference battery comprising the steps of: [24] using a substrate to shield the side of the substrate;
  • an electrode is reserved on one side of the substrate
  • the other electrode is taken from the outermost film layer of the PN junction of the last three-layer film.
  • the main structure of the thin film temperature difference battery is formed.
  • Another method for fabricating a film temperature difference battery comprising the steps of:
  • the beneficial effects of the present invention are: forming a P-type thermoelectric material film layer, an insulating material film layer and an N-type thermoelectric material film layer on the substrate to form a three-layer film
  • the PN junction may have a plurality of three-layer film PN junctions connected in series, and a PN junction of each of the three-layer films in the series is separated by a thin film of insulating material, and a PN junction respectively from the substrate and the last three-layer film.
  • the outermost film layer leads to the electrode.
  • the invention adopts a P-type thermoelectric material film layer, an insulating material film layer and an N-type thermoelectric material film layer to form a three-layer film PN junction to form a thermocouple, in the process of plating the insulating material film layer, Taking a method of intentionally shielding one end or the other end of the substrate and the plated film layer, the P-type or N-type material is directly deposited on one end or the other end of the substrate and the plated film layer to form a connection end of the PN junction or The series connection between the two PN junctions does not require a process of specifically connecting the P-type and N-type thermoelectric materials, so that the process for manufacturing the thermoelectric battery is relatively simple, due to the characteristics of the thin film thermoelectric material, and the multilayer film structure is a plurality of three layers.
  • the PN junction series structure of the membrane greatly improves the performance of the produced membrane temperature difference battery.
  • FIG. 1A is a schematic diagram of a process for fabricating a thin film temperature difference battery according to Embodiment 1 of the present invention
  • FIG. 2 is a schematic diagram of a process for fabricating a thin film temperature difference battery according to a second embodiment of the present invention
  • FIG. 3 is a schematic diagram of a process for fabricating a thin film temperature difference battery according to Embodiment 3 of the present invention.
  • FIGS. 4a-4h are schematic diagrams of processes for fabricating a thin film temperature difference battery according to Embodiment 4 of the present invention.
  • 5a-5g are schematic diagrams of processes for fabricating a thin film temperature difference battery according to Embodiment 5 of the present invention.
  • the present invention provides a thin film temperature difference battery and a method for fabricating the same, and the present invention will be further described in detail below with reference to the accompanying drawings.
  • FIG. 1a is a schematic diagram of the end face structure of the film temperature difference battery.
  • the film temperature difference battery provided by the embodiment includes: an insulating substrate 101, The extraction electrode 102, the P-type thermoelectric material film layer 103, the insulating material film layer 104, the N-type thermoelectric material film layer 105, the insulating material film layer 106, the P-type thermoelectric material film layer 107, the insulating material film layer 108, the N-type
  • the thermoelectric material thin film layer 109 is taken out from the electrode 110.
  • Figure la is to reserve an electrode 102 on one side of the insulating substrate 1;
  • Figure lb is a predetermined electrode surface of the insulating substrate, plating a P-type thermoelectric material film layer 103;
  • Figure lc is coated on the P-type thermoelectric material film layer 103 plated with an insulating material film layer 104;
  • Figure Id is a plating film of the N-type thermoelectric material film 105 on the plated insulating material film layer 104;
  • Figure lh is coated on the insulating material film layer 108 N-type thermoelectric material film layer 109;
  • thermoelectric material film layer 118 insulating material film layer 118, N-type thermoelectric material film layer 119.
  • thermoelectric material film layer and an N-type thermoelectric material film layer are connected at one end of the insulating material film layer to form a three-layer film PN junction;
  • a film layer of insulating material is separated between two adjacent PN junctions, and a three-layer film PN junction on both sides of the film layer of the phase isolation material is connected from one end of the film layer of the phase isolation material to form the PN junction.
  • the other electrode 110 is taken out from the N-type thermoelectric material film layer 119 of the PN junction of the last three-layer film.
  • the main structure of the thin film temperature difference battery as shown in Fig. li is formed.
  • the materials for thermoelectric cells are generally metal and semiconductor.
  • the P-type and N-type thermoelectric materials referred to in the embodiments of the present invention may be two different metal materials or two different semiconductor materials, that is, two different metal material films or two different semiconductor materials are used for plating.
  • a thermocouple In the production process, a P-type thermoelectric material film may be firstly plated, and then an N-type thermoelectric material film may be plated; or an N-type thermoelectric material film may be sequentially plated, and then a P-type thermoelectric material film may be plated.
  • thermoelectric thin films can be used in a variety of processes for film fabrication.
  • the techniques used to fabricate thermoelectric thin films include vacuum evaporation coating, molecular beam epitaxy ( MBE ), magnetron sputtering, ion beam sputtering, pulsed laser deposition, electrochemical atomic layer epitaxy (ECALE), and metals.
  • Embodiments of the present invention provide: Embodiment 1 describes a process for specifically fabricating a temperature difference cell of a thin film by combining ion beam sputtering:
  • the equipment is an ultra-high vacuum ion beam sputter coater.
  • the Seebeck coefficients are P-type and N-type metals S b, Bi and insulating material A1 2 0 3 as targets, and the target purity is 99.99%, which are respectively placed on the target of the rotatably selective sputtering target.
  • the substrate is ultrasonically cleaned by an organic solvent, and then placed on the coating chamber fixture; the fixture is designed with a device that can intentionally block the ends and sides of the substrate separately, so that it can be separately Deliberately occluding the ends and sides of the substrate.
  • the coating was sequentially adjusted at room temperature, and the target was subjected to ion beam sputtering.
  • the coating process is:
  • Step 1 As shown in Fig. la, the glass substrate 101 is provided with the surface of the electrode 102, covering all sides of the substrate 101.
  • Step 2 As shown in FIG. 1b, on the surface of the reserved electrode 102 of the substrate 101, the Sb film layer 103 is plated to a thickness of 300 nm ;
  • Step 3 As shown in FIG. 1c, one end and all sides of the mask substrate 101 and the Sb film layer 103 are plated, and the A1 2 0 3 film layer 104 is plated on the plated Sb film layer 103.
  • the thickness is 500 nm;
  • Step 4 As shown in Figure Id, the occluded substrate 101 and all sides of the plated film layer, in the plated Al 2
  • Bi plating film layer 105 a thickness of 300nm, Sb and Bi thin film layer 103 is deposited a thin film layer 105 joined to form a PN junction at one end of the first film layer 104 A1 2 0 3;
  • Step 5 As shown in FIG. 38, the other end and all sides of the mask substrate 101 and the film-coated layer are further plated with an A1 2 0 3 film layer 106 on the basis of the Bi film layer 105, and the thickness is 500nm;
  • Step 6 As shown in Figure If, the occlusion substrate 101 and all sides of the plated film layer are in A1 2 0 3
  • the Sb film layer 107 is plated on the basis of the film layer 106 to a thickness of 300 nm; and the Sb film layer 107 and the Bi film layer 105 are deposited and connected at one end of the A1 2 0 3 film layer 106, which will become the first PN junction and the second. a connection between PN junctions;
  • Step 7 As shown in Figure lg, the mask substrate 101 and one end of the film layer and all sides, the Sb film layer 107 is plated with A1 2 0 3 film layer 108, the thickness of 500nm;
  • Step 8 As shown in Figure lh, the occlusion substrate 101 and all sides of the coated film layer are at A1 2 0 3
  • the film layer 108 is plated with a Bi film layer 109 having a thickness of 300 nm, and the Sb film layer 107 and the Bi film layer 109 are
  • One end of the A1 2 0 3 film layer 108 is deposited to form a second PN junction; [76] a first PN junction and a second PN junction are connected in series through one end of the A1 2 0 3 film layer 106;
  • Step 9 As shown in Figure li, repeat steps 5-8 of plating 106-109 of the fabrication process to form A1 2 0 3 film layer 116, Sb film 117, A1 2 0 3 film layer 118, Bi
  • the film 119 can complete the series connection of a PN junction and the deposited PN junction.
  • the PN junction of a plurality of three-layer films can be connected in series, and the PN junction of each of the three-layer films in series is separated by a thin film of insulating material.
  • the background vacuum of the deposition was 4.5 x 10- 4 Pa and the working vacuum was 4.1 x 10 -2 Pa.
  • the working gas is 99.99% high-purity Ar gas with a flow rate of 4 sccm.
  • Ion beam deposition process parameters screen voltage 1KV, anode voltage 75V, acceleration voltage 220V, cathode voltage 7V, cathode current 11A, beam current 14mA.
  • thermoelectric battery After the PN junction series structure in which one or more three-layer films are plated on the substrate 101, the other electrode 110 is taken out from the Bi film layer 119 of the last PN junction, and a film as shown in FIG. Main structure of thermoelectric battery
  • the P-type thermoelectric material film layer may be plated first, and then the N-type thermoelectric material film layer may be plated; or the N-type thermoelectric material film layer may be first plated, and then the P-type thermoelectric material may be plated. Film layer.
  • Embodiment 1 combines a magnetron sputtering method to describe a specific manufacturing process of the film temperature difference battery:
  • the device is a three-target magnetron sputtering coating machine. Metal Sb, Bi and A1 are used as targets, and the target purity is 99.99%.
  • the substrate is ultrasonically cleaned by an organic solvent, and then placed on the coating chamber fixture; the fixture is designed with a device that can intentionally block the ends and sides of the substrate separately, so that it can be separately Deliberately concealing the ends and sides of the substrate.
  • the film was deposited to have a background vacuum of 4.5 x 10-3 Pa and a working vacuum of 4.5 x 10 -iPa.
  • the Sb and Bi films are plated, and the sputtering method is performed by a direct current sputtering method.
  • the working gas is 99.99% high-purity Ar gas, and the flow rate is 50 sccm; the plated A1 2 0 3
  • the film was prepared by a DC reactive sputtering method, and the working gas was 99.99% high-purity Ar gas, the flow rate was 50 s ccm, the reaction gas was 99.99% high-purity 0 2 , and the flow rate was 50 sccm.
  • the coating process is:
  • Step 1 As shown in FIG. la, the glass substrate 101 is provided with a surface-reserving electrode 102, covering all sides of the substrate 101.
  • Step 2 As shown in FIG. 1b, on the surface of the reserved electrode 102 of the substrate 101, a Sb film layer 103 is plated, and the thickness is
  • Step 3 As shown in FIG. 1c, one end and all sides of the mask substrate 101 and the Sb film layer 103 are plated, and the A1 2 0 3 film layer 104 is plated on the plated Sb film layer 103.
  • the thickness is 500 nm;
  • Step 4 As shown in FIG. 1D, on both sides of the mask substrate 101 and the film-coated layer, a Bi film layer 105 is plated on the plated A1 2 0 3 film layer 104 to a thickness of 300 nm. Sb film layer 103
  • a Bi film layer 105 is deposited at one end of the A1 2 0 3 film layer 104 to form a first PN junction
  • Step 5 As shown in FIG. 38, the other end and all sides of the mask substrate 101 and the film-coated layer are further plated with an A1 2 0 3 film layer 106 on the basis of the Bi film layer 105, and the thickness is 500nm;
  • Step 6 As shown in Figure If, the occlusion substrate 101 and all sides of the coated film layer are at A1 2 0 3
  • the Sb film layer 107 is plated on the basis of the film layer 106 to a thickness of 300 nm; and the Sb film layer 107 and the Bi film layer 105 are deposited and connected at one end of the A1 2 0 3 film layer 106, which will become the first PN junction and the second. a connection between PN junctions;
  • Step 7 As shown in Figure lg, the occlusion substrate 101 and one end of the film layer and all sides, the Sb film layer 107 is plated with A1 2 0 3 film layer 108, the thickness of 500nm;
  • Step 8 As shown in Figure lh, the occlusion substrate 101 and all sides of the coated film layer are at A1 2 0 3
  • the film layer 108 is plated with a Bi film layer 109 having a thickness of 300 nm and an Sb film layer 107.
  • Bi film layer 109 is deposited and connected at one end of the A1 2 0 3 film layer 108 to form a second PN junction;
  • the first PN junction and the second PN junction are connected in series through one end of the film layer 106;
  • Step 9 Repeat step 5 - step 8 of plating 106-109 in this process as shown in Figure l to form A1 2 0 3 film layer 116
  • Sb film 117, A1 2 0 3 film layer 118, Bi film 119 can complete a PN junction in series with the deposited PN junction, can have a plurality of three-layer film PN junction in series, each three layers in series There is a thin film of insulating material between the PN junctions of the film.
  • the other electrode 110 is taken out from the Bi film layer 119 of the last PN junction, thereby forming a film temperature difference as shown in FIG.
  • the main structure of the battery is taken out from the Bi film layer 119 of the last PN junction, thereby forming a film temperature difference as shown in FIG.
  • the main structure of the battery is taken out from the Bi film layer 119 of the last PN junction, thereby forming a film temperature difference as shown in FIG.
  • a P-type thermoelectric material film layer may be firstly plated, and then an N-type thermoelectric material film layer may be plated; or an N-type thermoelectric material film layer may be firstly plated, and then a P-type thermoelectric material may be plated. Film layer.
  • the thin film temperature difference battery can be fabricated not only on an insulating substrate but also on a P-type thermoelectric material (or metal) substrate or an N-type thermoelectric material (or metal) substrate. If it is in P-type thermoelectric material
  • the cross-sectional structure of the novel thin film temperature difference battery of the P-type thermoelectric material substrate is shown in Fig. 2h.
  • the film temperature difference battery provided by this embodiment comprises: a P-type thermoelectric material substrate 201, an insulating material film layer 202, an N-type thermoelectric material film layer 203, an insulating material film layer 204, a P-type thermoelectric material film layer 205, and an insulating material film layer.
  • Figure 2a is a layer of insulating material film 202 on one side of a P-type thermoelectric material substrate 201;
  • Figure 2b is a plating film of insulating material film 202 is coated with N-type thermoelectric material film layer 203;
  • Figure 2c is a 203 layer of insulating material film layer 204 on the coated N-type thermoelectric material film layer;
  • Figure 2d is a P-type thermoelectric material film layer 205 is plated on the plated insulating material film layer 204;
  • FIG. 2e is coated with a thin film layer 206 of insulating material on the plated P-type thermoelectric material film layer 205;
  • Figure 2f on the basis of the plated insulating material film layer 206 is plated N-type thermoelectric material film layer 207;
  • Figure 2g repeats the steps of plating 204-207 in the fabrication process to form an insulating material film layer 214, a P-type thermoelectric material film 215, an insulating material film layer 216, and an N-type thermoelectric material film 217,
  • a series of PN junctions having a plurality of three layers may be connected, and a layer of insulating material is separated by a layer of insulating material between the PN junctions of each of the three layers.
  • the P-type thermoelectric material film layer and the N-type thermoelectric material film layer of the three-layer film are connected at one end of the insulating material film layer to form a PN junction; a layer of insulating material is separated between adjacent PN junctions, and separated by a three-layer film PN junction on both sides of the insulating material film layer is connected from one end of the phase isolation material film layer to form a series connection between the PN junctions
  • the electrode 208 is taken out from the N-type thermoelectric material film layer 217 of the PN junction of the last three-layer film, and the electrode 209 is taken out on the uncoated side of the P-type thermoelectric material substrate 201 to form a P-type thermoelectric device as shown in FIG. 2h.
  • the material is the main structure of the film temperature difference battery of the substrate.
  • the production step may be as long as the P-type thermoelectric material film layer and the N-type thermoelectric material film layer are sequentially reversed.
  • the PN junction of a plurality of three-layer films is also plated on the other side of the P-type thermoelectric material substrate 201 in series, in series.
  • a thin film of insulating material is interposed between the PN junctions of each of the three films to form a thin film temperature difference battery provided in the third embodiment.
  • the battery comprises: a P-type thermoelectric material as a substrate of a film temperature difference battery structure 301, an insulating material film layer 302, an N-type thermoelectric material film layer 303, an insulating material film layer 304, a P-type thermoelectric material film layer 305
  • the electrodes 306, 307 are taken out.
  • Figure 3a is the structure of the film temperature difference battery structure of Figure 2gP type thermoelectric material substrate 301
  • FIG. 3b is a thin film temperature difference cell structure of the P-type thermoelectric material substrate provided in the second embodiment, the other side of the base 301 is coated with an insulating material film layer 302;
  • FIG. 3c is a plating film 303 of N-type thermoelectric material on the plated insulating material film layer 302;
  • FIG. 3d is a plating film 304 of insulating material on the plated N-type thermoelectric material film layer 303;
  • Figure 3e is a P-type thermoelectric material film layer 305 is plated on the plated insulating material film layer 304;
  • FIG. 3fS is a step of over-plating 302-305 to form an insulating material film layer 312, a P-type thermoelectric material film layer 31
  • the insulating material film layer 314, the N-type thermoelectric material film layer 315 can complete a series connection of a PN junction and a deposited PN junction, a series connection of a plurality of three-layer film PN junctions, and a series connection of each three-layer film p There is a thin layer of insulating material between the N junctions.
  • the P-type thermoelectric material film layer and the N-type thermoelectric material film layer of the three-layer film are connected at one end of the insulating material film layer to form a pN junction; and a layer of insulating material is separated between adjacent two pN junctions, And a three-layer film PN junction on both sides of the phase isolation material film layer is connected from one end of the phase isolation material film layer to form a series connection between the PN junctions.
  • the electrodes 306, 307 are taken from the N-type thermoelectric material film layer of the PN junction of the last three-layer film of each of the P-type thermoelectric material substrates to form a double-sided P-type thermoelectric material as shown in FIG. 3g.
  • the film temperature difference of the substrate is the structure of the battery body.
  • the production steps may be performed by sequentially replacing the P-type and N-type thermoelectric material films.
  • the insulating substrate film temperature difference battery of the first embodiment may also have the following structure:
  • FIG. 4h Another structural cross-sectional view of the thin film temperature difference battery of the insulating substrate of the present invention is shown in FIG. 4h.
  • the film temperature difference battery provided in the fourth embodiment includes: an insulating substrate 401, a P-type thermoelectric material film 402, an N-type thermoelectric material film 403, an insulating material film layer 404, a P-type thermoelectric material film layer 405, and an insulating material film layer 406.
  • the N-type thermoelectric material thin film layer 407 is taken out from the electrodes 408 and 409. among them:
  • Figure 4a is a P-type thermoelectric material film layer 402 is plated on one side of the insulating substrate 401;
  • Figure 4b is on the other side of the insulating substrate 401, plating N-type thermoelectric material film layer 403;
  • FIG. 4c is a plating film 404 of insulating material on the plated N-type thermoelectric material film layer 403;
  • Figure 4d is a P-type thermoelectric material film layer 405 is plated on the plated insulating material film layer 404;
  • Figure 4 f is based on the insulating material film layer 406 plating N-type thermoelectric material film layer 407;
  • FIG. 4g repeats the steps of plating 404-407 to form a thin film of insulating material 414, a film of P-type thermoelectric material 415, a film layer of insulating material 416, and a film of N-type thermoelectric material 417, which can complete a PN junction and have been deposited.
  • the series connection of the PN junctions may be a series connection of PN junctions of a plurality of three-layer films, and a layer of insulating material is separated between the PN junctions of each of the three layers of the series.
  • the P-type thermoelectric material film layer and the N-type thermoelectric material film layer of the three-layer film are connected at one end of the insulating material film layer to form a PN junction; and a layer of insulating material is separated between the adjacent two PN junctions, and separated by A three-layer film PN junction on both sides of the insulating material film layer is connected from one end of the phase insulating material film layer to form a series connection between the PN junctions.
  • the electrodes 408, 409 are taken out from the N-type thermoelectric material film layer of the PN junction of the last three-layer film of each of the two sides of the insulating substrate,
  • the film temperature difference battery provided in the fifth embodiment includes: a base 501 of the film temperature difference cell structure of FIG. 4g, an insulating material film layer 502, an N-type thermoelectric material film layer 503, an insulating material film layer 504, and a P-type thermoelectric material film layer 505.
  • the electrodes 506, 507 are taken out.
  • Figure 5a is the basis of the structure of the film temperature difference of Figure 4g 501;
  • Figure 5b shows the basis of the P-type thermoelectric material film layer on the other side of the insulating substrate of the film of the 4g film temperature difference battery.
  • FIG. 5c is a plating film 503 of N-type thermoelectric material on the plated insulating material film layer 502;
  • Figure 5d is a plating film 504 of insulating material on the plated N-type thermoelectric material film layer 503;
  • Figure 5e is a P-type thermoelectric material film layer 505 on the insulating material film layer 504;
  • An insulating thin-film layer 514, P-type thermoelectric material thin-film layer 515, a PN junction can be completed with the series of the PN junction has been deposited, there may be a plurality of PN junctions connected in series of three-layer film, each of PN junctions in series three-layer film There is a thin film of insulating material separated by a layer.
  • the P-type thermoelectric material film layer and the N-type thermoelectric material film layer of the three-layer film are connected at one end of the insulating material film layer to form a PN junction; and a layer of insulating material is separated between the adjacent two PN junctions, And a three-layer film PN junction on both sides of the phase isolation material film layer is connected from one end of the phase isolation material film layer to form a series connection between the PN junctions.
  • the P-type thermoelectric material film layer in the process of manufacturing the film temperature difference battery, may be sequentially plated, and then the N-type thermoelectric material film layer may be plated; or the N-type thermoelectric material film layer may be firstly plated. After plating a P-type thermoelectric material film.
  • the shape of the substrate material is a regular rectangle, or a square, or an arbitrary irregular shape.
  • the thickness of the substrate is from 0.1 mm to 100 mm, and a thicker or thinner substrate may also be used.
  • the substrate is an insulating material substrate, a P-type thermoelectric material substrate or an N-type thermoelectric material substrate, and other material substrates may also be used.
  • the P-type and N-type thermoelectric materials of each PN junction in the film temperature difference cell structure may be the same or different.
  • some PN junctions are composed of two different metal film layers and insulating material film layers, and some PN junctions are composed of another pair of P-type and N-type thermoelectric material film layers and insulating material film layers. .
  • the film layer of the insulating material is plated, and one end is always intentionally shielded.
  • the manufacturing process of the second embodiment to the fifth embodiment can also be specifically performed by the magnetron sputtering method and the ion beam sputtering method as in the first embodiment, and the manufacturing process of the second embodiment to the fifth embodiment can be specifically completed, and other manufacturing processes can also be utilized. Methods.
  • thermoelectric phenomenon itself is reversible.
  • Semiconductor temperature difference power generation and semiconductor refrigeration are two aspects of the thermoelectric phenomenon and are mutually reversible.
  • the main structure of the thermoelectric battery of this embodiment is the main structure of the thermoelectric cooler.

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说明书
Title of Invention:一种薄膜温差电池及其制作方法
[1] 或
[2] 本发明涉及温差电技术领域, 特别涉及一种薄膜温差电池及其制作方法。
[3]
[4] 温差电池就是利用温度差异制成的电池, 由于塞贝克效应, 使热能直接转化为 电能的装置。 温差电池的工作原理是, 将两种不同的金属或两种不同类型的热 电转换材料 Ρ型和 Ν型半导体的一端结合并将其置于高温状态, 另一端开路并给 以低温。 由于高温端的热激发作用较强, 空穴和电子浓度也比低温端高, 在这 种载流子浓度梯度的驱动下, 空穴和电子向低温端扩散, 从而在低温开路端形 成电势差; 如果将许多对 Ρ型和 Ν型热电转换材料连接起来组成模块, 就可得到 足够高的电压, 形成一个温差发电机。
[5] 温差电池作为一种清洁能源, 具有无噪音、 无有害物质排放、 可靠性高、 寿命 长等一系列优点, 它能长期、 安全、 连续地提供稳定的电能输出。 目前, 主要 是将热电材料线切割成片, 再焊接, 形成温差电池; 制作微型温差电池的方法 中, 主要有两类, 一类方法是: 在同一个基片上涂敷感光胶, 通过两次光刻的 方法在感光胶上先后形成 Ρ型和 Ν型微区, 之后又先后在 Ρ型和 Ν型微区内沉积 Ρ 型和 Ν型温差电材料。 这种制造方法难度大, 特别是在连接温差电单体的导电层 制造工序中, 需要把基片与其上已沉积好的温差电单体整个剥离; 另一类方法 是: Ρ型温差电单体基片和 Ν型温差电单体基片分开独立制造, 使得在微型薄膜 温差电池的制造过程中, 连接 Ρ型和 Ν型温差电单体的导电层的制造在基片与温 差电单体不剥离的条件下就可以进行。 利用上述方法制造温差电池的工艺复杂
, 单体温差电池的薄膜部分也只涉及单层薄膜, 温差电池的性能也受到了限制 [6] 咖容
[7] 本发明的目的是, 针对上述现有技术存在的缺陷提供了一种薄膜温差电池及其 制作方法, 该薄膜温差电池的性能得到了提高, 且该制作工艺简单。 [8] 本发明的技术方案如下:
[9] 一种薄膜温差电池, 包括基片,
[10] 所述基片的一面依次并反复镀制有 P型热电材料薄膜层、 绝缘材料薄膜层和 N 型热电材料薄膜层;
[11] 一组所述 P型热电材料薄膜层、 绝缘材料薄膜层和 N型热电材料薄膜层形成一 个三层膜, 所述三层膜的 P型热电材料薄膜层和 N型热电材料薄膜层在绝缘材料 薄膜层的一端连接, 形成一个 PN结;
[12] 相邻两个所述 PN结间有一层绝缘材料薄膜层相隔, 且所述相隔绝缘材料薄膜 层两侧的三层膜 PN结从所述相隔绝缘材料薄膜层的一端连接, 形成所述 PN结间 的串联;
[13] 从所述基片一面的最后一个三层膜最外的薄膜层引出一个电极和从所述基片的 上面引出另一个电极。
[14] 其中, 所述基片的厚度为: 0.1mm至 100mm, 所述 P型热电材料薄膜层的厚度 为: lnm至 ΙΟμηι; 所述 Ν型热电材料薄膜层的厚度为: lnm至 10μηι。
[15] 其中, 所述基片的形状是规则的矩形、 或者方形、 或者是任意的不规则形状。
[16] 其中, 所述基片裸露的侧面形状是平面或者是曲面。
[17] 其中, 所述基片为绝缘材料基片、 Ρ型热电材料基片或者 Ν型热电材料基片。
[18] 另一种薄膜温差电池, 包括基片,
[19] 所述基片的两面依次并反复镀制有 Ρ型热电材料薄膜层、 绝缘材料薄膜层和 Ν 型热电材料薄膜层;
[20] 一组所述 Ρ型热电材料薄膜层、 绝缘材料薄膜层和 Ν型热电材料薄膜层形成一 个三层膜, 所述三层膜的 Ρ型热电材料薄膜层和 Ν型热电材料薄膜层在绝缘材料 薄膜层的一端连接, 形成一个 ΡΝ结;
[21] 相邻两个所述 ΡΝ结间有一层绝缘材料薄膜层相隔, 且所述相隔绝缘材料薄膜 层两侧的三层膜 ΡΝ结从所述相隔绝缘材料薄膜层的一端连接, 形成所述 ΡΝ结间 的串联;
[22] 分别从所述基片两面的最后一个三层膜的 ΡΝ结的最外的薄膜层引出电极。
[23] 一种薄膜温差电池的制作方法, 包括步骤: [24] 选用基片, 将所述基片的侧面遮档住;
[25] 在所述基片一面预留一电极;
[26] 在所述基片预留电极的面镀制 P型热电材料薄膜层;
[27] 档住所述基片及已镀薄膜层的一端和全部侧面, 在所述 P型热电材料薄膜层上 镀制绝缘材料薄膜层;
[28] 档住基片及已镀薄膜层的侧面, 在镀制的绝缘材料薄膜层上镀制 N型热电材料 薄膜层形成一个三层膜, 所述三层膜的 P型热电材料薄膜层和 N型热电材料薄膜 层在前述被档住的一端连接, 形成一个 PN结;
[29] 重复上述过程形成多个 PN结;
[30] 在相邻两个所述 PN结间镀制一层绝缘材料薄膜层相隔, 且镀制所述相隔绝缘 材料薄膜层吋, 档住所述基片及已镀薄膜层的另一端及全部侧面, 与所述相隔 绝缘材料薄膜层相邻的两个三层膜 PN结从所述被档端连接, 形成所述两个 PN结 间的串联。
[31] 从最后一个三层膜的 PN结的最外的薄膜层引出另一电极。 形成薄膜温差电池 的主体结构。
[32] 另一种薄膜温差电池的制作方法, 包括步骤:
[33] 选用基片, 将所述基片的侧面遮档住;
[34] 在所述基片的一面镀制 P型热电材料薄膜层;
[35] 档住所述基片及已镀薄膜层的一端和全部侧面, 在所述 P型热电材料薄膜层上 镀制绝缘材料薄膜层;
[36] 档住基片及已镀薄膜层的侧面, 在镀制的绝缘材料薄膜层上镀制 N型热电材料 薄膜层形成一个三层膜, 所述三层膜的 P型热电材料薄膜层和 N型热电材料薄膜 层在前述被档住的一端连接, 形成一个 PN结;
[37] 重复上述过程形成多个 PN结;
[38] 在相邻两个所述 PN结间镀制一层绝缘材料薄膜层相隔, 且镀制所述相隔绝缘 材料薄膜层吋, 档住所述基片及已镀薄膜层的另一端及全部侧面, 与所述相隔 绝缘材料薄膜层相邻的两个三层膜 PN结从所述被档端连接, 形成所述两个 PN结 间的串联; [39] 在所述基片的另一面重复上述过程再形成多个串联的三层膜 PN结, 分别从所 述基片两面的最后一个三层膜的 PN结的最外的薄膜层引出电极。 形成薄膜温差 电池的主体结构。
[40] 本发明的有益效果为: 本发明提供的薄膜温差电池及其制作方法是在基片上镀 制 P型热电材料薄膜层、 绝缘材料薄膜层和 N型热电材料薄膜层形成一个三层膜 的 PN结, 可以有多个三层膜的 PN结串联, 串联的每个三层膜的 PN结间有一层绝 缘材料薄膜层相隔, 以及分别从基片上面、 最后一个三层膜的 PN结的最外薄膜 层引出电极。 本发明釆用镀制 P型热电材料薄膜层、 绝缘材料薄膜层和 N型热电 材料薄膜层形成一个三层膜的 PN结, 来形成温差电偶, 在镀制绝缘材料薄膜层 过程中, 釆取有意遮档基片及已镀薄膜层的一端或另一端的方法, 使 P型或 N型 材料在基片及已镀薄膜层的一端或另一端直接沉积, 成为一个 PN结的连接端或 两个 PN结间的串联端, 不必有专门连接 P型和 N型热电材料的过程, 使得制造该 温差电池的工艺比较简单, 由于薄膜热电材料的特性, 且多层膜结构为多个三 层膜的 PN结串联结构, 使得制作出的薄膜温差电池的性能也大幅度提高。
[41] 國綱
[42] 图 la-图 li为本发明实施例一提供的制作薄膜温差电池的过程示意图;
[43] 图 2a-图 2h为本发明实施例二提供的制作薄膜温差电池的过程示意图;
[44] 图 3a-图 3g为本发明实施例三提供的制作薄膜温差电池的过程示意图;
[45] 图 4a-图 4h为本发明实施例四提供的制作薄膜温差电池的过程示意图;
[46] 图 5a-图 5g为本发明实施例五提供的制作薄膜温差电池的过程示意图。
[47] t ^
[48] 本发明提供了一种薄膜温差电池及其制作方法, 为使本发明的目的、 技术方案 及优点更加清楚、 明确, 以下参照附图并举实施例对本发明进一步详细说明。
[49] 实施例一:
[50] 本发明实施例一的具体制作工艺过程如图 la-图 li所示, 其中图 li是该薄膜温差 电池的端面结构示意图, 该实施例提供的薄膜温差电池包括: 绝缘基片 101, 引 出电极 102, P型热电材料薄膜层 103, 绝缘材料薄膜层 104, N型热电材料薄膜 层 105, 绝缘材料薄膜层 106, P型热电材料薄膜层 107,绝缘材料薄膜层 108, N型 热电材料薄膜层 109, 引出电极 110。
[51] 图 la是在绝缘基片 1一面预留电极 102;
[52] 图 lb是在绝缘基片的预留电极面, 镀制 P型热电材料薄膜层 103;
[53] 图 lc是在镀制的 P型热电材料薄膜层 103上镀制绝缘材料薄膜层 104;
[54] 图 Id是在镀制的绝缘材料薄膜层 104上镀制 N型热电材料薄膜层 105;
[55] 图 le在 N型热电材料薄膜层 105的基础上再镀制绝缘材料薄膜层 106;
[56] 图 1 f在绝缘材料薄膜层 106的基础上镀制 P型热电材料薄膜层 107;
[57] 图 lg在 P型热电材料薄膜层 107上镀制绝缘材料薄膜层 108;
[58] 图 lh在绝缘材料薄膜层 108上镀制 N型热电材料薄膜层 109;
[59] 图 li重复镀制 106-109的步骤, 形成绝缘材料薄膜层 116, P型热电材料薄膜层 11
7,绝缘材料薄膜层 118, N型热电材料薄膜层 119。
[60] P型热电材料薄膜层和 N型热电材料薄膜层在绝缘材料薄膜层的一端连接, 形 成一个三层膜的 PN结;
[61] 相邻两个 PN结间有一层绝缘材料薄膜层相隔, 且相隔绝缘材料薄膜层两侧的 三层膜 PN结从所述相隔绝缘材料薄膜层的一端连接, 形成所述 PN结间的串联; [62] 从最后一个三层膜的 PN结的 N型热电材料薄膜层 119引出另一电极 110。 形成如 图 li所示的薄膜温差电池的主体结构。
[63] 之后可进行划片、 装架、 封装等常规后续工艺步骤, 完成本发明薄膜温差电池 的制作。
[64] 温差电池的材料一般有金属和半导体两种。 本发明实施例所指的 P型和 N型热 电材料, 可以是两种不同的金属材料或者两种不同的半导体材料, 即釆用镀制 两种不同的金属材料薄膜或两种不同的半导体材料来形成温差电偶。 制作过程 中, 可以依次先镀制 P型热电材料薄膜, 后镀制 N型热电材料薄膜; 也可以依次 先镀制 N型热电材料薄膜, 后镀制 P型热电材料薄膜。
[65] P型和 N型热电材料薄膜的制作技术, 可以釆用薄膜制作的各种工艺。 用于制 作热电薄膜的技术主要有真空蒸发镀膜法、 分子束外延法 (MBE) 、 磁控溅射 法、 离子束溅射法、 脉冲激光沉积法、 电化学原子层外延法 (ECALE) 、 金属 有机化合物气相沉积法 (MOCVD) 和连续离子层吸附与反应法 (SILAR) 等。 [66] 本发明实施例提供: 以实施例一结合离子束溅射法, 描述该薄膜温差电池具体 制作的过程:
[67] 设备为超高真空离子束溅射镀膜机。 选用塞贝克系数分别为 P型和 N型的金属 S b、 Bi和绝缘材料 A1203为靶材, 靶材纯度为 99.99% , 分别安置在可转动选择溅 射靶材的靶位。 以普通钠钙玻璃作为基片, 有机溶剂对基片进行超声波清洗, 然后放入镀膜室内夹具上; 夹具被设计有可以分别对基片的两端和侧面进行有 意遮档的装置, 便于可以分别对基片的两端和侧面进行有意遮档。 镀膜在室温 条件下, 依次调整靶材, 釆用离子束溅射方法进行。 镀膜流程为:
[68] 步骤 1 : 如图 la所示, 玻璃基片 101—面预留电极 102, 遮档基片 101的全部侧面
[69] 步骤 2: 如图 lb所示, 在基片 101的预留电极 102面, 镀制 Sb薄膜层 103, 厚度为 300nm;
[70] 步骤 3: 如图 lc所示, 遮档基片 101及已镀 Sb薄膜层 103的一端及全部侧面, 在 已镀制的 Sb薄膜层 103上镀制 A1203薄膜层 104, 厚度为 500nm;
[71] 步骤 4: 如图 Id所示, 遮档基片 101及已镀薄膜层的全部侧面, 在已镀制的 Al2
03薄膜层 104上镀制 Bi薄膜层 105, 厚度为 300nm, Sb薄膜层 103和 Bi薄膜层 105 在 A1203薄膜层 104的一端沉积连接形成第一个 PN结;
[72] 步骤 5: 如图 le所示, 遮档基片 101及已镀薄膜层的另一端及全部侧面, 在 Bi薄 膜层 105的基础上再镀制 A1203薄膜层 106, 厚度为 500nm;
[73] 步骤 6: 如图 If所示, 遮档基片 101及已镀薄膜层的全部侧面, 在 A1203
薄膜层 106的基础上镀制 Sb薄膜层 107, 厚度为 300nm; , Sb薄膜层 107和 Bi薄膜 层 105在 A1203薄膜层 106的一端沉积连接, 将成为第一个 PN结与第二个 PN结间 的连接端;
[74] 步骤 7: 如图 lg所示, 遮档基片 101及已镀薄膜层的一端及全部侧面, 在 Sb薄膜 层 107上镀制 A1203薄膜层 108, 厚度为 500nm;
[75] 步骤 8: 如图 lh所示, 遮档基片 101及已镀薄膜层的全部侧面, 在 A1203
薄膜层 108上镀制 Bi薄膜层 109, 厚度为 300nm, Sb薄膜层 107和 Bi薄膜层 109在
A1203薄膜层 108的一端沉积连接形成第二个 PN结; [76] 第一个 PN结和第二个 PN结通过 A1203薄膜层 106的一端串联连接;
[77] 步骤 9: 如图 li所示, 重复本制作过程的镀制 106-109的步骤 5-8, 形成 A1203薄 膜层 116, Sb薄膜 117,A1203薄膜层 118, Bi薄膜 119, 就可完成一个 PN结与已沉 积的 PN结的串联, 可以有多个三层膜的 PN结串联, 串联的每个三层膜的 PN结间 有一层绝缘材料薄膜层相隔。 沉积制作的本底真空度 4.5x 10- 4Pa, 工作真空 4.1xlO-2Pa。 工作气体为 99.99%的高纯 Ar气, 流量为 4sccm。 离子束沉积工艺参 数: 屏极电压 1KV , 阳极电压 75V, 加速电压 220V , 阴极电压 7V , 阴极电流 11A , 束流 14mA。
[78] 得到在基片 101镀制一个或多个三层膜的 PN结串联结构后, 从最后一个 PN结的 Bi薄膜层 119引出另一电极 110, 就形成了如图 li所示的薄膜温差电池的主体结构
[79] 上述制作过程中, 可以依次先镀制 P型热电材料薄膜层,后镀制 N型热电材料薄 膜层; 也可以依次先镀制 N型热电材料薄膜层,后镀制 P型热电材料薄膜层。
[80] 本发明实施例还提供: 以实施例一结合磁控溅射法, 描述该薄膜温差电池具体 制作过程:
[81] 设备为三靶磁控溅射镀膜机。 选用金属 Sb、 Bi和 A1为靶材, 靶材纯度为 99.99%
, 分别安置在三个直流溅射靶位。 以普通钠钙玻璃作为基片, 有机溶剂对基片 进行超声波清洗, 然后放入镀膜室内夹具上; 夹具被设计有可以分别对基片的 两端和侧面进行有意遮档的装置, 便于可以分别对基片的两端和侧面进行有意 遮 ί当。 在室温条件下, 沉积制作薄膜的本底真空度 4.5x 10- 3Pa, 工作真空 4.5x10 -iPa。 镀制 Sb、 Bi薄膜, 釆用直流溅射方法进行, 工作气体为 99.99%的高纯 Ar气 , 流量为 50sccm; 镀制的 A1203
薄膜, 釆用直流反应溅射方法进行, 工作气体为 99.99%的高纯 Ar气, 流量为 50s ccm, 反应气体为 99.99%的高纯 02, 流量为 50sccm。 镀膜流程为:
[82] 步骤 1 : 如图 la所示, 玻璃基片 101—面预留电极 102, 遮档基片 101的全部侧面
[83] 步骤 2: 如图 lb所示, 在基片 101的预留电极 102面, 镀制 Sb薄膜层 103, 厚度为
300nm; [84] 步骤 3: 如图 lc所示, 遮档基片 101及已镀 Sb薄膜层 103的一端及全部侧面, 在 已镀制的 Sb薄膜层 103上镀制 A1203薄膜层 104, 厚度为 500nm;
[85] 步骤 4: 如图 Id所示, 遮档基片 101及已镀薄膜层的全部侧面, 在已镀制的 A120 3薄膜层 104上镀制 Bi薄膜层 105, 厚度为 300nm, Sb薄膜层 103
和 Bi薄膜层 105在 A1203薄膜层 104的一端沉积连接形成第一个 PN结;
[86] 步骤 5: 如图 le所示, 遮档基片 101及已镀薄膜层的另一端及全部侧面, 在 Bi薄 膜层 105的基础上再镀制 A1203薄膜层 106, 厚度为 500nm;
[87] 步骤 6: 如图 If所示, 遮档基片 101及已镀薄膜层的全部侧面, 在 A1203
薄膜层 106的基础上镀制 Sb薄膜层 107, 厚度为 300nm; , Sb薄膜层 107和 Bi薄膜 层 105在 A1203薄膜层 106的一端沉积连接, 将成为第一个 PN结与第二个 PN结间 的连接端;
[88] 步骤 7: 如图 lg所示, 遮档基片 101及已镀薄膜层的一端及全部侧面, 在 Sb薄膜 层 107上镀制 A1203薄膜层 108, 厚度为 500nm;
[89] 步骤 8: 如图 lh所示, 遮档基片 101及已镀薄膜层的全部侧面, 在 A1203
薄膜层 108上镀制 Bi薄膜层 109, 厚度为 300nm, Sb薄膜层 107
和 Bi薄膜层 109在 A1203薄膜层 108的一端沉积连接形成第二个 PN结;
[90] 第一个 PN结和第二个 PN结通过薄膜层 106的一端串联连接;
[91] 步骤 9: 如图 li重复本过程中镀制 106-109的步骤 5-步骤 8, 形成 A1203薄膜层 116
, Sb薄膜 117, A1203薄膜层 118, Bi薄膜 119, 就可完成一个 PN结与已沉积的 PN 结的串联, 可以有多个三层膜的 PN结串联, 串联的每个三层膜的 PN结间有一层 绝缘材料薄膜层相隔。
[92] 得到在基片 101镀制一个或多个三层膜的 PN结串联结构后, 从最后一个 PN结的 Bi薄膜层 119引出另一电极 110, 就形成了如图 li所示薄膜温差电池的主体结构。
[93] 该制作过程中, 可以依次先镀制 P型热电材料薄膜层, 后镀制 N型热电材料薄 膜层; 也可以依次先镀制 N型热电材料薄膜层, 后镀制 P型热电材料薄膜层。
[94] 实施例二:
[95] 该薄膜温差电池不但可以在绝缘基片上制作, 也可以在 P型热电材料 (或金属 ) 的基片上或 N型热电材料 (或金属) 的基片上制作。 如果是在 P型热电材料的 基片上制作, 该 P型热电材料基片新型薄膜温差电池的断面构造示意图如图 2h所 示。 该实施例提供的薄膜温差电池包括: P型热电材料基片 201, 绝缘材料薄膜层 202, N型热电材料薄膜层 203,绝缘材料薄膜层 204, P型热电材料薄膜层 205, 绝 缘材料薄膜层 206, N型热电材料薄膜层 207, 引出电极 208、 209。 其中:
[96] 图 2a是在 P型热电材料基片 201的一面镀制绝缘材料薄膜层 202;
[97] 图 2b是在镀制的绝缘材料薄膜层 202上镀制 N型热电材料薄膜层 203;
[98] 图 2c是在镀制的 N型热电材料薄膜层上 203镀制绝缘材料薄膜层 204;
[99] 图 2d是在镀制的绝缘材料薄膜层 204上镀制 P型热电材料薄膜层 205;
[100] 图 2e在镀制的 P型热电材料薄膜层 205上镀制绝缘材料薄膜层 206;
[101] 图 2f在镀制的绝缘材料薄膜层 206的基础上镀制 N型热电材料薄膜层 207;
[102] 图 2g重复本制作过程镀制 204-207的步骤, 形成绝缘材料薄膜层 214, P型热电 材料薄膜 215,绝缘材料薄膜层 216, N型热电材料薄膜 217,
[103] 完成一个 PN结与已沉积的 PN结的串联, 可以有多个三层膜的 PN结的串联, 串 联的每个三层膜的 PN结间, 有一层绝缘材料薄膜层相隔。 所述三层膜的 P型热电 材料薄膜层和 N型热电材料薄膜层在绝缘材料薄膜层的一端连接, 形成一个 PN 结; 相邻两个 PN结间有一层绝缘材料薄膜层相隔, 且相隔绝缘材料薄膜层两侧 的三层膜 PN结从所述相隔绝缘材料薄膜层的一端连接, 形成所述 PN结间的串联
[104] 从最后一个三层膜的 PN结的 N型热电材料薄膜层 217引出电极 208, 在 P型热电 材料基片 201没镀膜的一面引出电极 209, 形成如图 2h所示以 P型热电材料为基片 的薄膜温差电池的主体结构。
[105] 作为本实施例二的一种改进, 如果将 N型热电材料作为基片, 制作步骤只要 P 型热电材料薄膜层与 N型热电材料薄膜层依次对调即可。
[106] 实施例三:
[107] 本发明实施例还可以有其他变化型式。 如: 在图 2g所示 P型热电材料作为基片 的薄膜温差电池结构的基础上, 在该 P型热电材料基片 201另一面同样镀制有多 个三层膜的 PN结串联, 串联的每个三层膜的 PN结间有一层绝缘材料薄膜层相隔 , 形成实施例三提供的薄膜温差电池。 如图 3g所示, 该实施例提供的薄膜温差 电池包括: P型热电材料作为基片的薄膜温差电池结构的基础 301, 绝缘材料薄膜 层 302, N型热电材料薄膜层 303, 绝缘材料薄膜层 304, P型热电材料薄膜层 305
, 引出电极 306、 307。
[108] 图 3a就是图 2gP型热电材料基片的薄膜温差电池结构基础 301
[109] 图 3b是在实施例二提供的 P型热电材料基片的薄膜温差电池结构为基础 301的另 一面镀制绝缘材料薄膜层 302;
[110] 图 3c是在镀制的绝缘材料薄膜层 302上镀制 N型热电材料薄膜层 303;
[111] 图 3d是在镀制的 N型热电材料薄膜层 303上镀制绝缘材料薄膜层 304;
[112] 图 3e是在镀制的绝缘材料薄膜层 304上镀制 P型热电材料薄膜层 305;
[113] 图 3fS复镀制 302-305的步骤, 形成绝缘材料薄膜层 312, P型热电材料薄膜层 31
3 ,
绝缘材料薄膜层 314, N型热电材料薄膜层 315, 就可完成一个 PN结与已沉积 PN 结的串联, 可以有多个三层膜的 PN结的串联, 串联的每个三层膜的 pN结间, 有 一层绝缘材料薄膜层相隔。 其中, 所述三层膜的 P型热电材料薄膜层和 N型热电 材料薄膜层在绝缘材料薄膜层的一端连接, 形成一个 pN结; 相邻两个 pN结间有 一层绝缘材料薄膜层相隔, 且相隔绝缘材料薄膜层两侧的三层膜 PN结从所述相 隔绝缘材料薄膜层的一端连接, 形成所述 PN结间的串联。
[114] 从 P型热电材料基片两面各自的最后一个三层膜的 PN结的 N型热电材料薄膜层 引出电极 306、 307 , 形成如图 3g所示的双面镀制的 P型热电材料基片的薄膜温差 电池主体结构。
[115] 作为本实施例三的一种改进, 如果是 N型热电材料的基片, 制作步骤只要 P型 与 N型热电材料薄膜依次对调即可。
[116] 实施例四:
[117] 实施例一的绝缘基片薄膜温差电池也可以有如下结构:
[118] 如图 4h所示是本发明的绝缘基片的薄膜温差电池的另一种构造断面示意图。 该 实施例四提供的薄膜温差电池包括: 绝缘基片 401, P型热电材料薄膜 402, N型 热电材料薄膜 403, 绝缘材料薄膜层 404, P型热电材料薄膜层 405, 绝缘材料薄 膜层 406, N型热电材料薄膜层 407, 引出电极 408、 409。 其中: [119] 图 4a是在绝缘基片 401的一面镀制 P型热电材料薄膜层 402;
[120] 图 4b是在绝缘基片 401的另一面, 镀制 N型热电材料薄膜层 403;
[121] 图 4c是在镀制的 N型热电材料薄膜层 403上镀制绝缘材料薄膜层 404;
[122] 图 4d是在镀制的绝缘材料薄膜层 404上镀制 P型热电材料薄膜层 405;
[123] 图 4e在 P型热电材料薄膜层 405的基础上再镀制绝缘材料薄膜层 406;
[124] 图 4 f在绝缘材料薄膜层 406的基础上镀制 N型热电材料薄膜层 407;
[125] 图 4g重复镀制 404-407的步骤, 形成绝缘材料薄膜层 414, P型热电材料薄膜 415, 绝缘材料薄膜层 416, N型热电材料薄膜 417, 就可完成一个 PN结与已沉积 PN结 的串联, 可以有多个三层膜的 PN结的串联, 串联的每个三层膜的 PN结间有一层 绝缘材料薄膜层相隔。 所述三层膜的 P型热电材料薄膜层和 N型热电材料薄膜层 在绝缘材料薄膜层的一端连接, 形成一个 PN结; 相邻两个 PN结间有一层绝缘材 料薄膜层相隔, 且相隔绝缘材料薄膜层两侧的三层膜 PN结从所述相隔绝缘材料 薄膜层的一端连接, 形成所述 PN结间的串联。 从绝缘基片两面各自的最后一个 三层膜的 PN结的 N型热电材料薄膜层引出电极 408、 409,
[126] 实施例五:
[127] 在图 4g所示结构的基础上, 在绝缘基片的另一面镀有 P型热电材料薄膜的基础 上, 同样镀制多个三层膜的 PN结串联, 串联的每个三层膜的 PN结间有一层绝缘 材料薄膜层相隔。 如图 5g所示。 该实施例五提供的薄膜温差电池包括: 以图 4g 薄膜温差电池结构的基础 501, 绝缘材料薄膜层 502, N型热电材料薄膜层 503, 绝缘材料薄膜层 504, P型热电材料薄膜层 505, 引出电极 506、 507。
[128] 图 5a是图 4g薄膜温差电池结构的基础 501;
[129] 图 5b是在图 4g薄膜温差电池的绝缘基片另一面镀有 P型热电材料薄膜层的基础 5
01上, 镀制绝缘材料薄膜层 502;
[130] 图 5c是在镀制的绝缘材料薄膜层 502上镀制 N型热电材料薄膜层 503;
[131] 图 5d是在镀制的 N型热电材料薄膜层 503上镀制绝缘材料薄膜层 504;
[132] 图 5e是在绝缘材料薄膜层 504上镀制 P型热电材料薄膜层 505;
[133] 图 5fS复镀制 502-505的步骤, 形成绝缘材料薄膜层 512, N型热电材料薄膜层 5
13, 绝缘材料薄膜层 514, P型热电材料薄膜层 515, 就可完成一个 PN结与已沉积 PN 结的串联, 可以有多个三层膜的 PN结串联, 串联的每个三层膜的 PN结间有一层 绝缘材料薄膜层相隔。 其中, 所述三层膜的 P型热电材料薄膜层和 N型热电材料 薄膜层在绝缘材料薄膜层的一端连接, 形成一个 PN结; 相邻两个 PN结间有一层 绝缘材料薄膜层相隔, 且相隔绝缘材料薄膜层两侧的三层膜 PN结从所述相隔绝 缘材料薄膜层的一端连接, 形成所述 PN结间的串联。
[134] 从绝缘基片两面各自的最后一个三层膜的 PN结的 N型热电材料薄膜层引出电极
506、 507, 形成如图 5g所示双面镀制绝缘基片的薄膜温差电池的主体结构。
[135] 本实施例五提供薄膜温差电池的制作过程中, 可以依次先镀制 P型热电材料薄 膜层, 后镀制 N型热电材料薄膜层; 也可以依次先镀制 N型热电材料薄膜层后镀 制 P型热电材料薄膜。
[136] 上述所有实施例中, 基片材料的形状是规则的矩形、 或者方形、 或者是任意的 不规则形状。 所述基片的厚度为: 0.1mm至 100mm, 也可以选用更厚或更薄的基 片。 所述基片为绝缘材料基片、 P型热电材料基片或者 N型热电材料基片, 也可 以选用其他材料基片。 薄膜温差电池结构中的每个 PN结的 P型和 N型热电材料可 以是相同的, 也可以是不同的。 即在整个薄膜温差电池结构中, 有的 PN结由两 种不同金属薄膜层和绝缘材料薄膜层组成, 有的 PN结由另一对 P型和 N型热电材 料薄膜层和绝缘材料薄膜层组成。 镀制绝缘材料薄膜层吋, 总有一端要被有意 遮档。 其中实施例二至实施例五的制作过程也可以和实施例一一样利用磁控溅 射法和离子束溅射法来具体完成该实施例二至实施例五的制作过程, 也可以利 用其他的方法。 如: 真空蒸发镀膜法、 分子束外延法 (MBE) 、 脉冲激光沉积 法、 电化学原子层外延法 (ECALE) 、 金属有机化合物气相沉积法 (MOCVD) 和连续离子层吸附与反应法 (SILAR) 等。 完成上述方法后, 可进行划片、 装架 、 封装等常规后续工艺步骤。
[137] 热电现象本身是可逆的,半导体温差发电和半导体致冷是热电现象的两个方面, 互相可逆。 对于同一个 PN结,若施加温差则可用来发电,若对其通电,则可用于在 一端致冷。 因此, 本实施例的温差电池的主体结构, 同吋也就是温差电致冷器 的主体结构。 应说明的是, 以上实施例仅用以说明本发明的技术方案而非限制, 尽管参照较 佳实施例对本发明进行了详细说明, 本领域的普通技术人员应当理解, 可以对 本发明的技术方案进行修改或者等同替换, 而不脱离本发明技术方案的精神和 范围, 其均应涵盖在本发明的权利要求范围当中。

Claims

权利要求书
一种薄膜温差电池, 其特征在于, 包括基片,
所述基片的一面依次并反复镀制有 P型热电材料薄膜层、 绝缘材料 薄膜层和 N型热电材料薄膜层;
一组所述 P型热电材料薄膜层、 绝缘材料薄膜层和 N型热电材料薄 膜层形成一个三层膜, 所述三层膜的 P型热电材料薄膜层和 N型热 电材料薄膜层在绝缘材料薄膜层的一端连接, 形成一个 PN结; 相邻两个所述 PN结间镀有一层绝缘材料薄膜层相隔, 且所述相隔 绝缘材料薄膜层两侧的三层膜 PN结从所述相隔绝缘材料薄膜层的 一端连接, 形成所述 PN结间的串联;
从所述基片的一面最外的薄膜层引出一个电极和从所述基片的上 面引出另一个电极。
如权利要求 1所述温差电池, 其特征在于, 所述基片的厚度为: 0.1 mm至 100mm, 所述 P型热电材料薄膜层的厚度为: lnm至 ΙΟμηι; 所述 Ν型热电材料薄膜层的厚度为: lnm至 10μηι。
如权利要求 1所述薄膜温差电池, 其特征在于, 所述基片的形状是 规则的矩形、 或者方形。
如权利要求 1所述薄膜温差电池, 其特征在于, 所述基片裸露的侧 面形状是平面或者是曲面。
如权利要求 1所述薄膜温差电池, 其特征在于, 所述基片为绝缘材 料基片、 Ρ型热电材料基片或者 Ν型热电材料基片。
一种薄膜温差电池, 其特征在于, 包括基片,
所述基片的两面依次并反复镀制有 Ρ型热电材料薄膜层、 绝缘材料 薄膜层和 Ν型热电材料薄膜层; 一组所述 Ρ型热电材料薄膜层、 绝 缘材料薄膜层和 Ν型热电材料薄膜层形成一个三层膜, 所述三层膜 的 Ρ型热电材料薄膜层和 Ν型热电材料薄膜层在绝缘材料薄膜层的 一端连接, 形成一个 ΡΝ结;
相邻两个所述 ΡΝ结间镀有一层绝缘材料薄膜层相隔, 且所述相隔 绝缘材料薄膜层两侧的三层膜 PN结从所述相隔绝缘材料薄膜层的 一端连接, 形成所述 PN结间的串联;
分别从所述基片两面的最外的薄膜层引出电极。
[Claim 7] 一种薄膜温差电池的制作方法, 其特征在于, 包括步骤:
选用基片, 将所述基片的侧面遮档住;
在所述基片一面预留一电极;
在所述基片预留电极的面镀制 P型热电材料薄膜层;
档住所述基片及已镀薄膜层的一端和全部侧面, 在所述 P型热电材 料薄膜层上镀制绝缘材料薄膜层;
档住基片及已镀薄膜层的侧面, 在镀制的绝缘材料薄膜层上镀制 N 型热电材料薄膜层形成一个三层膜, 所述三层膜的 P型热电材料薄 膜层和 N型热电材料薄膜层在前述被档住的一端连接, 形成一个 P N结;
重复上述过程形成多个 PN结;
在相邻两个所述 PN结间镀制一层绝缘材料薄膜层相隔, 且镀制所 述相隔绝缘材料薄膜层吋, 档住所述基片及已镀薄膜层的另一端 及全部侧面, 与所述相隔绝缘材料薄膜层相邻的两个三层膜 PN结 从所述被档端连接, 形成所述两个 PN结间的串联。
从最后一个三层膜的 PN结的最外的薄膜层引出另一电极, 形成薄 膜温差电池的主体结构。
[Claim S] 一种薄膜温差电池的制作方法, 其特征在于, 在基片的两面镀制 多层膜, 包括步骤:
选用基片, 将所述基片的侧边遮档住;
在所述基片的一面镀制 P型热电材料薄膜层; 档住所述基片及已镀薄膜层的一端和全部侧面, 在所述 P型热电材 料薄膜层上镀制绝缘材料薄膜层;
档住基片及已镀薄膜层的侧面, 在镀制的绝缘材料薄膜层上镀制 N 型热电材料薄膜层形成一个三层膜, 所述三层膜的 P型热电材料薄 膜层和 N型热电材料薄膜层在前述被档住的一端连接, 形成一个 P N结;
重复上述过程形成多个 PN结;
在相邻两个所述 PN结间镀制一层绝缘材料薄膜层相隔, 且镀制所 述相隔绝缘材料薄膜层吋, 档住所述基片及已镀薄膜层的另一端 及全部侧面, 与所述相隔绝缘材料薄膜层相邻的两个三层膜 PN结 从所述被档端连接, 形成所述两个 PN结间的串联;
从最后一个三层膜的 PN结的最外的薄膜层引出一电极; 在所述基片的另一面重复上述过程再形成多个串联的三层膜 PN结 , 分别从所述基片两面的最后一个三层膜 PN结的最外的薄膜层引 出电极。 形成薄膜温差电池的主体结构。
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