WO2010027231A3 - 리드 프레임 및 그 제조방법 - Google Patents

리드 프레임 및 그 제조방법 Download PDF

Info

Publication number
WO2010027231A3
WO2010027231A3 PCT/KR2009/005057 KR2009005057W WO2010027231A3 WO 2010027231 A3 WO2010027231 A3 WO 2010027231A3 KR 2009005057 W KR2009005057 W KR 2009005057W WO 2010027231 A3 WO2010027231 A3 WO 2010027231A3
Authority
WO
WIPO (PCT)
Prior art keywords
lead frame
manufacturing
rough
copper layer
copper
Prior art date
Application number
PCT/KR2009/005057
Other languages
English (en)
French (fr)
Other versions
WO2010027231A2 (ko
Inventor
박창화
김은진
손진영
박경택
조인국
Original Assignee
엘지이노텍주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지이노텍주식회사 filed Critical 엘지이노텍주식회사
Priority to CN2009801394703A priority Critical patent/CN102171820A/zh
Priority to US13/062,245 priority patent/US8945951B2/en
Priority to JP2011525988A priority patent/JP2012502462A/ja
Publication of WO2010027231A2 publication Critical patent/WO2010027231A2/ko
Publication of WO2010027231A3 publication Critical patent/WO2010027231A3/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85439—Silver (Ag) as principal constituent
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

실시예는 리드 프레임 및 그 제조방법에 관한 것이다. 실시예에 따른 리드 프레임은 구리 기판; 및 상기 구리 기판의 표면에 표면 조도가 110-300nm인 러프 구리층을 포함한다.
PCT/KR2009/005057 2008-09-05 2009-09-07 리드 프레임 및 그 제조방법 WO2010027231A2 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2009801394703A CN102171820A (zh) 2008-09-05 2009-09-07 引线框及其制造方法
US13/062,245 US8945951B2 (en) 2008-09-05 2009-09-07 Lead frame and manufacturing method thereof
JP2011525988A JP2012502462A (ja) 2008-09-05 2009-09-07 リードフレーム及びその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020080087689A KR101241735B1 (ko) 2008-09-05 2008-09-05 리드 프레임 및 그 제조방법
KR10-2008-0087689 2008-09-05

Publications (2)

Publication Number Publication Date
WO2010027231A2 WO2010027231A2 (ko) 2010-03-11
WO2010027231A3 true WO2010027231A3 (ko) 2010-06-24

Family

ID=41797680

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2009/005057 WO2010027231A2 (ko) 2008-09-05 2009-09-07 리드 프레임 및 그 제조방법

Country Status (6)

Country Link
US (1) US8945951B2 (ko)
JP (1) JP2012502462A (ko)
KR (1) KR101241735B1 (ko)
CN (1) CN102171820A (ko)
TW (1) TW201011885A (ko)
WO (1) WO2010027231A2 (ko)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101646094B1 (ko) * 2011-12-12 2016-08-05 해성디에스 주식회사 리드 프레임 및 이를 이용하여 제조된 반도체 패키지
WO2013089376A1 (en) * 2011-12-12 2013-06-20 Samsung Techwin Co., Ltd Lead frame and semiconductor package manufactured by using the same
CN107154392B (zh) * 2016-03-02 2019-11-26 顺德工业股份有限公司 导线架
US11000915B2 (en) * 2016-03-31 2021-05-11 Texas Instruments Incorporated Stabilized transient liquid phase metal bonding material for hermetic wafer level packaging of MEMS devices
WO2017179447A1 (ja) * 2016-04-12 2017-10-19 古河電気工業株式会社 リードフレーム材およびその製造方法
US9653385B1 (en) * 2016-05-26 2017-05-16 Sdi Corporation Lead frame
CN107447237B (zh) * 2016-05-30 2021-04-20 史莱福灵有限公司 具有降低的接触噪声的滑环
WO2018074035A1 (ja) 2016-10-18 2018-04-26 株式会社デンソー 電子装置及びその製造方法
JP6479265B2 (ja) * 2016-12-27 2019-03-06 古河電気工業株式会社 リードフレーム材およびその製造方法ならびに半導体パッケージ
TWI613768B (zh) * 2017-03-20 2018-02-01 矽品精密工業股份有限公司 電子封裝件及其製法
JP7016677B2 (ja) * 2017-11-21 2022-02-07 新光電気工業株式会社 リードフレーム、半導体装置、リードフレームの製造方法
CN117766503A (zh) * 2021-09-03 2024-03-26 大日本印刷株式会社 引线框及其制造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990016567A (ko) * 1997-08-18 1999-03-15 윤종용 반도체 칩 패키지의 리드 프레임 표면 처리 방법 및 그 리드프레임
KR20000007350A (ko) * 1998-07-02 2000-02-07 유무성 다중 도금층을 가지는 반도체 리이드프레임
KR100819800B1 (ko) * 2005-04-15 2008-04-07 삼성테크윈 주식회사 반도체 패키지용 리드 프레임
KR20080048526A (ko) * 2005-09-06 2008-06-02 유니셈 (모리셔스) 홀딩스 리미티드 반도체 패키지들을 위한 다이 패드

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH061798B2 (ja) * 1985-07-17 1994-01-05 株式会社神戸製鋼所 リ−ドフレ−ム
US5343073A (en) 1992-01-17 1994-08-30 Olin Corporation Lead frames having a chromium and zinc alloy coating
JP3228789B2 (ja) 1992-07-11 2001-11-12 新光電気工業株式会社 樹脂用インサート部材の製造方法
KR940010455B1 (ko) 1992-09-24 1994-10-22 김영길 고강도, 우수한 전기전도도 및 열적안정성을 갖는 동(Cu)합금 및 그 제조방법
US6376921B1 (en) * 1995-11-08 2002-04-23 Fujitsu Limited Semiconductor device, method for fabricating the semiconductor device, lead frame and method for producing the lead frame
KR0157257B1 (ko) 1995-12-08 1998-11-16 정훈보 석출물 성장 억제형 고강도, 고전도성 동합금 및 그 제조방법
JP3550875B2 (ja) 1996-05-14 2004-08-04 ソニー株式会社 リードフレームとこれを用いた半導体装置
US6037653A (en) * 1997-03-25 2000-03-14 Samsung Aerospace Industries, Ltd. Semiconductor lead frame having multi-layered plating layer including copper-nickel plating layer
KR100275381B1 (ko) * 1998-04-18 2000-12-15 이중구 반도체 패키지용 리드프레임 및 리드프레임도금방법
JP2001127229A (ja) * 1999-11-01 2001-05-11 Nec Corp リードフレーム及びそのリードフレームを用いた樹脂封止型半導体装置
US6864423B2 (en) * 2000-12-15 2005-03-08 Semiconductor Component Industries, L.L.C. Bump chip lead frame and package
JP2002299538A (ja) * 2001-03-30 2002-10-11 Dainippon Printing Co Ltd リードフレーム及びそれを用いた半導体パッケージ
JP3841768B2 (ja) * 2003-05-22 2006-11-01 新光電気工業株式会社 パッケージ部品及び半導体パッケージ
JP2005023405A (ja) * 2003-07-02 2005-01-27 Shinko Electric Ind Co Ltd 電解銅めっき液及び電解銅めっき方法
JP2005213573A (ja) * 2004-01-29 2005-08-11 Matsushita Electric Ind Co Ltd 粗化銅めっき液及びそのめっき方法
JP4857594B2 (ja) * 2005-04-26 2012-01-18 大日本印刷株式会社 回路部材、及び回路部材の製造方法
US20090146280A1 (en) * 2005-11-28 2009-06-11 Dai Nippon Printing Co., Ltd. Circuit member, manufacturing method of the circuit member, and semiconductor device including the circuit member
US7462926B2 (en) * 2005-12-01 2008-12-09 Asm Assembly Automation Ltd. Leadframe comprising tin plating or an intermetallic layer formed therefrom
US20070246158A1 (en) 2006-04-21 2007-10-25 3M Innovative Properties Company Wiring board, production process thereof and connection method using same
KR101204092B1 (ko) * 2008-05-16 2012-11-22 삼성테크윈 주식회사 리드 프레임 및 이를 구비한 반도체 패키지와 그 제조방법
KR20100103015A (ko) * 2009-03-12 2010-09-27 엘지이노텍 주식회사 리드 프레임 및 그 제조방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990016567A (ko) * 1997-08-18 1999-03-15 윤종용 반도체 칩 패키지의 리드 프레임 표면 처리 방법 및 그 리드프레임
KR20000007350A (ko) * 1998-07-02 2000-02-07 유무성 다중 도금층을 가지는 반도체 리이드프레임
KR100819800B1 (ko) * 2005-04-15 2008-04-07 삼성테크윈 주식회사 반도체 패키지용 리드 프레임
KR20080048526A (ko) * 2005-09-06 2008-06-02 유니셈 (모리셔스) 홀딩스 리미티드 반도체 패키지들을 위한 다이 패드

Also Published As

Publication number Publication date
CN102171820A (zh) 2011-08-31
TW201011885A (en) 2010-03-16
KR101241735B1 (ko) 2013-03-08
US8945951B2 (en) 2015-02-03
JP2012502462A (ja) 2012-01-26
WO2010027231A2 (ko) 2010-03-11
KR20100028791A (ko) 2010-03-15
US20110272184A1 (en) 2011-11-10

Similar Documents

Publication Publication Date Title
WO2010027231A3 (ko) 리드 프레임 및 그 제조방법
WO2009142391A3 (ko) 발광소자 패키지 및 그 제조방법
WO2010112786A3 (fr) Procede de fabrication d'une structure a surface texturee pour dispositif a diode electroluminescente organique et structure a surface texturee
EP2458620A3 (en) Fabrication of graphene electronic devices using step surface contour
WO2010139342A8 (en) Lens and method for manufacturing same
WO2006036297A3 (en) Organic electroluminescence device and method of production of same
EP2357660A4 (en) METHOD FOR PRODUCING A COMPOSITE SUBSTRATE WITH LAMINATED SEMICONDUCTOR WITH A LARGE BAND GAP
WO2005091370A8 (en) Method for manufacturing integrated circuit
TW200735348A (en) Semiconductor heterostructure and method for forming a semiconductor heterostructure
WO2011063089A3 (en) Surface-modified adhesives
SG131872A1 (en) Layer arrangement for the formation of a coating on a surface of a substrate,coating method,and substrate with a layer arrangement
WO2011065796A3 (ko) 안티 글레어 글래스 제조 방법
WO2006095566A8 (en) Nitride semiconductor light-emitting device and method for fabrication thereof
WO2009075793A3 (en) Controlling thickness of residual layer
ATE504543T1 (de) Verbund aus mindestens zwei halbleitersubstraten sowie herstellungsverfahren
WO2011025149A3 (ko) 반도체 기판 제조 방법 및 발광 소자 제조 방법
WO2009084933A3 (en) Solar cell, mehtod of manufacturing the same, and method of texturing solar cell
WO2008110883A3 (en) Methods for manufacturing laminate, device applied herewith, laminate obtained herewith, method for encasing substrates and encased substrate obtained herewith
WO2010023853A3 (ja) 薄膜付きガラス基板の製造方法
WO2009002644A8 (en) Methods of making hierarchical articles
WO2010009716A3 (de) Strahlungsemittierende vorrichtung und verfahren zur herstellung einer strahlungsemittierenden vorrichtung
TW200746276A (en) Method for bonding a semiconductor substrate to a metal substrate
WO2010011009A9 (ko) 전자부품 모듈용 금속 기판과 이를 포함하는 전자부품 모듈 및 전자부품 모듈용 금속 기판 제조방법
TW201130046A (en) Semiconductor device and process for production of semiconductor device
WO2012067444A3 (ko) 산화막이 형성된 도전성 필름 및 그 제조방법

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200980139470.3

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 09811730

Country of ref document: EP

Kind code of ref document: A2

ENP Entry into the national phase

Ref document number: 2011525988

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 13062245

Country of ref document: US

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205 DATED 24.05.2011)

122 Ep: pct application non-entry in european phase

Ref document number: 09811730

Country of ref document: EP

Kind code of ref document: A2