WO2006093107A1 - チップ抵抗器とその製造方法 - Google Patents
チップ抵抗器とその製造方法 Download PDFInfo
- Publication number
- WO2006093107A1 WO2006093107A1 PCT/JP2006/303666 JP2006303666W WO2006093107A1 WO 2006093107 A1 WO2006093107 A1 WO 2006093107A1 JP 2006303666 W JP2006303666 W JP 2006303666W WO 2006093107 A1 WO2006093107 A1 WO 2006093107A1
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- WO
- WIPO (PCT)
- Prior art keywords
- main
- electrode
- surface electrode
- auxiliary
- insulating substrate
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/02—Housing; Enclosing; Embedding; Filling the housing or enclosure
- H01C1/024—Housing; Enclosing; Embedding; Filling the housing or enclosure the housing or enclosure being hermetically sealed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/003—Thick film resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/02—Housing; Enclosing; Embedding; Filling the housing or enclosure
- H01C1/032—Housing; Enclosing; Embedding; Filling the housing or enclosure plural layers surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49099—Coating resistive material on a base
Definitions
- the present invention relates to a chip resistor and a manufacturing method thereof.
- the chip resistor of the present invention has a chip-type insulating substrate and at least one resistance film formed on the substrate. External connection terminals are connected to both ends of the resistance film, respectively.
- the resistance film is covered with a protective coat.
- the upper surface of the protective coat is not flat, and the central portion thereof is highly protruding. For this reason, when the chip resistor is moved by a vacuum suction type collet, the collet does not adhere to the protective coating properly, or cracks occur in the protective coating. It was.
- each external connection terminal includes a portion (hereinafter referred to as “upper surface electrode”) extending from the upper surface of the insulating substrate, and the upper surface electrode is in contact with the resistance film. It is said that.
- the upper surface electrode is formed of a conductive paste mainly composed of silver, and the thickness thereof is set to be thin in order to facilitate the formation of the resistance film.
- the upper surface electrode is corroded by the atmosphere, and in a serious case, the upper surface electrode may be disconnected. This is because silver, which is a major component of the top electrode, reacts with sulfur gas (hydrogen sulfide, etc.) in the atmosphere to form silver sulfide.
- Patent Documents 1 and 2 listed below propose techniques for dealing with the above-described problems.
- a relatively thick auxiliary upper surface electrode is formed on each upper surface electrode (hereinafter referred to as “main upper surface electrode”) connected to the resistance film.
- Patent Document 1 Japanese Patent Application Laid-Open No. 8-236302
- Patent Document 2 Japanese Patent Laid-Open No. 2002-184602
- the auxiliary upper surface electrode is formed from a silver-based conductive paste, and in this case, corrosion due to sulfur components in the atmosphere, etc. at the boundary portion between the auxiliary upper surface electrode and the protective coat. Can occur. Then, it proceeds to the main upper surface electrode under this corrosive force.
- the auxiliary upper surface electrode is formed of a nickel-based conductive paste.
- damage such as cracking may occur at the boundary between the auxiliary upper surface electrode and the protective coat. Through the damage, sulfur components in the atmosphere reach the main upper surface electrode and corrode the main upper surface electrode.
- the present invention has been conceived under the circumstances described above, and an object of the present invention is to provide a technique that can solve or reduce the above-described conventional problems.
- a chip resistor provided by the first aspect of the present invention includes an insulating substrate having a main surface, a main upper surface electrode formed on the main surface of the insulating substrate, a main resistor portion, and the main resistor.
- the auxiliary upper surface electrode includes an inner end portion that overlaps the upper surface of the end portion of the resistive film.
- the protective coat is configured to overlap the inner end portion of the auxiliary upper surface electrode.
- the main upper surface electrode is formed of a silver-based conductive paste
- the auxiliary upper surface electrode is formed of a silver-based conductive paste containing Pd.
- the chip resistor of the present invention further includes a side electrode formed on an end surface perpendicular to the main surface of the insulating substrate and connected to the main upper surface electrode.
- a method for manufacturing the chip resistor In the manufacturing method, a main upper surface electrode is formed on an upper surface of an insulating substrate, and a resistance film having an end portion directly overlapping the upper surface of the main upper surface electrode is formed on the upper surface of the insulating substrate. An auxiliary upper electrode having an inner end portion directly overlapping the upper surface of the end portion of the resistive film is formed on the main upper surface electrode, and an end portion overlapping the inner end portion of the auxiliary upper surface electrode; Each of the steps includes forming a protective coat on the resistive film, and forming a side electrode electrically connected to the auxiliary upper surface electrode on the end surface of the insulating substrate.
- the main upper surface electrode, the resistance film, and the auxiliary upper surface electrode are formed by firing a coated material paste. At this time, firing for forming the main upper surface electrode, the resistance film and the auxiliary upper surface electrode may be performed simultaneously.
- a chip resistor provided by the third aspect of the present invention includes a main surface, an insulating substrate including two end surfaces spaced apart in the longitudinal direction of the main surface, and the main surface of the insulating substrate.
- the formed main upper surface electrode has a main resistance portion and an end portion, the main resistance portion is in contact with the main surface of the insulating substrate, and the end portion overlaps the upper surface of the main upper surface electrode.
- the chip resistor further includes a side electrode formed on one end face of the insulating substrate and configured to partially overlap the upper surface of the additional electrode.
- the chip resistor further includes a metal plating layer formed on the additional electrode and the side electrode.
- the additional electrode is formed of a silver-based conductive paste containing Pd or a base metal-based conductive paste.
- a method for manufacturing the chip resistor It is.
- a main upper surface electrode and a resistance film partially overlapping the upper surface of the main upper surface electrode are formed on the upper surface of the insulating substrate, and the width of the main upper surface electrode is larger than that of the main upper surface electrode.
- An undercoat having a large auxiliary upper surface electrode, having a main portion and an extension connected to the main portion, the main portion covering the resistance film, and the extended portion overlapping the upper surface of the auxiliary upper surface electrode An undercoat having a width larger than the upper surface electrode and smaller than the auxiliary upper surface electrode is formed, an overcoat is formed on the upper surface of the main portion of the undercoat, and the extension portion of the undercoat is formed.
- Each step of forming an additional electrode on the upper surface of the overcoat has a width larger than that of the extension and partially overlaps the upper surface of the overcoat.
- a side electrode is formed on an end surface of the insulating substrate so that a part of the side electrode overlaps a part of an upper surface of the additional electrode, and the additional electrode And a step of forming a metal plating layer on the surface of the side electrode.
- FIG. 1 is a cross-sectional view showing a chip resistor according to a first embodiment of the present invention.
- FIG. 2 is a cross-sectional view illustrating a first step in the manufacturing method of the chip resistor.
- FIG. 3 is a cross-sectional view illustrating a second step in the manufacturing method.
- FIG. 4 is a cross-sectional view illustrating a third step in the manufacturing method.
- FIG. 5 is a cross-sectional view illustrating a fourth step in the manufacturing method.
- FIG. 6 is a cross-sectional view illustrating a fifth step in the manufacturing method.
- FIG. 7 is a cross-sectional view illustrating a sixth step in the manufacturing method.
- FIG. 8 is a cross-sectional view showing a chip resistor according to a second embodiment of the present invention.
- FIG. 9 is a sectional view taken along line IX-IX in FIG.
- FIG. 10 is a perspective view illustrating a first step in the method of manufacturing the chip resistor in FIG. 8.
- FIG. 11 is a perspective view illustrating a second step in the method of manufacturing the chip resistor in FIG. 8.
- FIG. 12 is a cross-sectional view taken along the line XII— in FIG.
- FIG. 13 is a perspective view for explaining a third step in the method of manufacturing the chip resistor in FIG. 8.
- FIG. 14 is a sectional view taken along line XIV—XIV in FIG.
- FIG. 15 is a sectional view taken along line XV—XV in FIG.
- FIG. 16 is a perspective view illustrating a fourth step in the method of manufacturing the chip resistor in FIG. 8.
- FIG. 17 is a sectional view taken along line XVII-XVII in FIG.
- FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG.
- FIG. 19 is a perspective view illustrating a fifth step in the method of manufacturing the chip resistor in FIG. 8.
- FIG. 20 is a sectional view taken along line XX—XX in FIG.
- FIG. 21 is a perspective view illustrating a sixth step in the method of manufacturing the chip resistor in FIG. 8.
- FIG. 22 is a sectional view taken along line XXII—XXII in FIG.
- FIG. 23 is a cross-sectional view taken along the line ⁇ - ⁇ in FIG.
- FIG. 24 is a cross-sectional view illustrating a seventh step in the method of manufacturing the chip resistor in FIG. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 shows a chip resistor 1 according to a first embodiment of the present invention.
- the chip resistor 1 includes an insulating substrate 2, which includes an upper surface (main surface), a lower surface opposite to the upper surface, and two end surfaces spaced from each other via the upper surface (and the lower surface).
- a pair of lower surface electrodes 3 are formed on the lower surface of the insulating substrate 2.
- the bottom electrode 3 is provided at both ends (the right end and the left end in the figure) of the insulating substrate 2 in a state of being separated from each other.
- a pair of main upper surface electrodes 4 are formed on the upper surface of the insulating substrate 2. These main upper surface electrodes 4 are also provided at both ends of the substrate 2 in a state of being separated from each other.
- a resistance film 5 is formed on the upper surface of the insulating substrate 2 so as to be positioned between the two main upper surface electrodes 4. More specifically, the resistance film 5 includes a main resistance portion (a portion that substantially functions as a resistor) and two end portions 5a spaced apart from each other via the main resistance portion. As shown in Fig. 1, the main resistor is the force that is in direct contact with the top surface of the insulating substrate 2. The part 5a is in a state of riding on the upper surface of the corresponding one main upper surface electrode 4. That is, the resistance film 5 is configured to partially overlap the upper surface of each main upper surface electrode 4.
- auxiliary upper surface electrode 6 is formed on the upper surface of each main upper surface electrode 4. As can be seen from FIG. 1, the auxiliary upper surface electrode 6 has a larger thickness than the main upper surface electrode 4. In addition, the inner end portion 6 a of the auxiliary upper surface electrode 6 is configured to directly overlap the upper surface of the end portion 5 a of the resistance film 5. As a result, the end 5a of the resistive film 5 is sandwiched between the main upper surface electrode 4 and the auxiliary upper surface electrode 6 when viewed in the vertical direction in FIG. /
- a protective coat that covers the resistance film 5 is formed between the two auxiliary upper surface electrodes 6.
- this protective coat has a two-layer structure, and includes an undercoat 7 that directly covers the main resistance portion of the resistive film 5, an overcoat 8 formed on the undercoat 7, It consists of. Both the undercoat 7 and the overcoat 8 also form a glass force, for example. Both ends of the protective coat (more precisely, both ends of the overcoat 8) are configured to abut against or overlap the inner end 6a of the corresponding one of the auxiliary upper surface electrodes 6.
- a large step is generated between the upper surface of the overcoat 8 and the upper surface of the auxiliary upper surface electrode 6 by appropriately setting the thickness of the auxiliary upper surface electrode 6. It is possible to avoid it.
- an additional electrode for adjusting the thickness may be formed on the auxiliary upper surface electrode 6.
- Each side electrode 9 is electrically connected to both the corresponding lower surface electrode 3 and auxiliary upper surface electrode 6. As shown in FIG. 1, the lower end portion of each side electrode 9 partially overlaps the lower surface of the lower surface electrode 3, and the upper end portion partially overlaps the upper surface of the auxiliary upper surface electrode 4. In the case of using the additional electrode for adjusting the thickness described above, the side electrode 9 is formed so as to be electrically connected to the additional electrode in addition to the lower surface electrode 3 and the auxiliary upper surface electrode 6.
- a metal plating layer 10 is formed on the surfaces of the lower surface electrode 3, the auxiliary upper surface electrode 6 and the side surface electrode 9.
- the metal plating layer 10 has a two-layer structure, and includes a base layer and a soldering layer formed on the base layer.
- the underlayer is formed so as to cover the surfaces of the lower surface electrode 3, the auxiliary upper surface electrode 6, and the side surface electrode 9, and has, for example, a nickel plating force. Meanwhile, the soldering layer For example, tin or soldering force is also obtained.
- the end portion 5 a of the resistance film 5 exists below the boundary portion between the auxiliary upper surface electrode 6 and the overcoat 8. For this reason, even when corrosion due to sulfur components in the atmosphere occurs at the boundary portion, this corrosion can be prevented from proceeding to the main upper surface electrode 4 by the end portion 5a of the resistance film. Further, it is possible to prevent air from entering the main upper surface electrode 4 from the boundary portion.
- both auxiliary upper surface electrodes 6 are in direct contact with the resistance film 5. Therefore, energization of the resistance film 5 can be performed through both the auxiliary upper surface electrode 6 and the main upper surface electrode 4. That is, the resistance (specific resistance) at the external connection terminal can be greatly reduced.
- each auxiliary upper surface electrode 6 may be formed of a silver-based conductive paste containing Pd. In this case, in addition to reducing the specific resistance of the auxiliary upper surface electrode 6, it is also possible to reduce the occurrence of corrosion in the auxiliary upper surface electrode 6.
- chip resistor 1 can be manufactured, for example, by the steps described below.
- a pair of lower surface electrodes 3 and a pair of main upper surface electrodes 4 are formed on an insulating substrate 2 (first step). These electrodes can be formed by applying a silver-based conductive paste by screen printing and then baking the applied paste at a high temperature.
- the lower surface electrode 3 may be formed first, and then the main upper surface electrode 4 may be formed, or the lower surface electrode 3 and the main upper surface electrode 4 may be formed simultaneously.
- a resistance film 5 is formed on the upper surface of the insulating substrate 2 (second step).
- the resistance film 5 can be formed by applying a predetermined resistance material paste by screen printing and then baking the applied paste at a high temperature.
- the end portion 5 a of the resistance film 5 is configured to partially overlap the upper surface of the main upper surface electrode 4.
- auxiliary upper surface electrodes 6 are formed on the upper surfaces of the main upper surface electrodes 4 (third step).
- the auxiliary upper surface electrode 6 can be formed by applying a silver-based conductive paste (or silver-based conductive paste containing Pd) by screen printing and then baking the applied paste at a high temperature.
- the auxiliary upper surface electrode 6 is partially formed by the main upper surface electrode.
- the inner end 6 a is in contact with the upper surface of 4 and partially overlaps the upper surface of the resistive film 5.
- the firing of the material paste is performed in each of the first, second, and third steps, but the present invention is not limited to this.
- firing for forming the main upper surface electrode 4 is performed collectively. It may be.
- an undercoat 7 is formed to cover the main resistance portion (the portion between both end portions 5a) of the resistance film 5 (fourth step).
- the undercoat 7 can be formed by applying a glass paste by screen printing and then baking the applied paste at the soft temperature of the glass. After the undercoat 7 is formed, trimming adjustment is performed on the resistance film 5 so that the resistance value becomes a predetermined value.
- an overcoat 8 that covers the undercoat 7 is formed (fifth step).
- the overcoat 8 can be formed by applying a glass paste by screen printing and then baking the applied paste at the softening temperature of the glass.
- the glass paste used to form the overcoat 8 may be the same type as the glass paste used to form the undercoat 7 or may be of a different type! /.
- a large step may be formed between the upper surface of the overcoat 8 and the upper surface of the auxiliary upper surface electrode 6.
- an additional electrode for adjusting the step may be formed on the upper surface of the auxiliary upper surface electrode 6.
- side electrodes 9 are formed on each side surface 2a of the insulating substrate 2 (sixth step).
- the side electrode 9 can be formed by applying a silver-based conductive paste and baking the applied paste at a high temperature.
- Each side electrode 9 is connected to the lower surface electrode 3 and the upper surface electrodes 4 and 6.
- a metal plating layer 10 (see FIG. 1) is formed on the surfaces of the lower surface electrode 3, the auxiliary upper surface electrode 6 (or additional electrode), and the side electrode 9. As a result, the chip resistor 1 shown in FIG. 1 is obtained.
- the metal plating layer 10 can be formed by a barrel plating process, for example.
- FIG. 8 shows a chip resistor 11 according to the second embodiment of the present invention.
- the chip resistor 11 includes a rectangular parallelepiped insulating substrate 12.
- a pair of main upper surface electrodes 14 and a resistance film 15 connected to these electrodes are formed on the upper surface (main surface) of the insulating substrate 12.
- the two main upper surface electrodes 14 are separated from each other in the longitudinal direction of the insulating substrate 12.
- Each main upper surface electrode 14 has a predetermined width dimension W0.
- the “width dimension” is a dimension measured in a horizontal direction (“width direction”) perpendicular to the longitudinal direction of the insulating substrate 12 (or its upper surface).
- the resistance film 15 has a main resistance portion (a portion that substantially functions as a resistor) that is in direct contact with the upper surface of the insulating substrate 12 and two end portions that are separated from each other via the main resistance portion. ing. Each end portion is configured to overlap the upper surface of the corresponding one main upper surface electrode 14.
- a first auxiliary upper surface electrode 16 is laminated on the upper surface of each main upper surface electrode 14.
- Each first auxiliary upper surface electrode 16 has a predetermined width dimension W1 (see FIG. 13).
- the width dimension W 1 of the first auxiliary upper surface electrode 16 is set to be larger than the width dimension WO of the main upper surface electrode 14.
- the width dimension W1 is the same as the width dimension of the insulating substrate 12.
- a protective coat is formed on the upper surface of the resistance film 15 to cover the resistance film.
- This protective coat has a two-layer structure and consists of an undercoat 17 and an overcoat 18.
- the undercoat 17 directly covers the resistive film 15.
- An end 17a of the undercoat 17 (hereinafter referred to as “extension 17a”) extends to the end surface 12a of the insulating substrate 12 while being in contact with the upper surface of the first auxiliary upper surface electrode 16.
- the width dimension W2 of the extension 17a is set to a value between the width dimension WO of the main upper surface electrode 14 and the width dimension W1 of the first auxiliary upper surface electrode 16. (That is, the relationship W0 ⁇ W2 ⁇ W1 holds).
- the upper surface of each first auxiliary upper surface electrode 16 has two uncovered portions 16a (see FIG. 16) that are not covered by the extension portions 17a.
- the overcoat 18 is formed on the upper surface of the undercoat 17. However, when viewed in the longitudinal direction of the substrate 12, the overcoat 18 is formed shorter than the undercoat 17 and does not cover the left and right extensions 17 a of the undercoat 17.
- each extension portion 17a of the undercoat 17 On the upper surface of each extension portion 17a of the undercoat 17, a second auxiliary member covering the extension portion 17a is provided.
- An auxiliary upper surface electrode (“additional electrode”) 20 is formed.
- the second auxiliary upper surface electrode 20 has a predetermined width dimension W3 (see FIG. 21).
- the width dimension W3 is set to be larger than the width dimension W2 in the extension 17a of the undercoat 17 (W2 ⁇ W3) 0 Therefore, each second auxiliary upper surface electrode 20 is not covered with the first auxiliary upper surface electrode 16. Directly overlaps 16a (see Figure 9). Further, as shown in FIG. 8, each second auxiliary upper surface electrode 20 is configured to partially overlap the upper surface of the overcoat 18 at the inner end thereof.
- Each side electrode 19 is formed on each of both end faces 12a of the insulating substrate 12. Each side electrode 19 partially overlaps the upper surface of the corresponding second auxiliary upper surface electrode 20. Each side electrode 19 is formed so as to partially overlap the lower surface of the insulating substrate 12.
- a metal plating layer 21 is formed on the surfaces of the second auxiliary upper surface electrode 20 and the side surface electrode 19.
- the metal plating layer 21 has a two-layer structure having an underlayer and a soldering layer force formed on the underlayer.
- the underlayer is formed by, for example, nickel plating treatment.
- the soldering layer is formed by, for example, a plating process using tin or solder.
- the side electrode 19 and the metal plating layer 21 are electrically and reliably conducted to the main upper surface electrode 14 via the second auxiliary upper surface electrode 20 and the first auxiliary upper surface electrode 16. be able to. Further, the step between the upper surface of the overcoat 18 and the upper surface of the second auxiliary upper surface electrode 20 is reduced by the lamination of the first auxiliary upper surface electrode 16, the extension 17a of the undercoat 17, and the second auxiliary upper surface electrode 20. Or it can be eliminated.
- the main upper surface electrode 14 is covered with the first and second auxiliary upper surface electrodes 16, 20 and an extension 17a of the undercoat 17 between these auxiliary upper surface electrodes. .
- the air reaches the main upper surface electrode 14 and the first auxiliary upper surface electrode 16 and the This can be reliably prevented by the extension 17a of the coat 17.
- the chip resistor 11 according to the second embodiment can be manufactured by the method described below.
- a pair of left and right main upper surface electrodes 14 are formed on the upper surface of the insulating substrate 12 (first step).
- the main upper surface electrode 14 is made from a silver conductive paste. It can be formed by applying the applied paste by baking and baking the applied paste.
- a resistance film 15 is formed on the upper surface of the insulating substrate 2 and between the main upper surface electrodes 14 (second step). Both ends of the resistance film 15 are configured to be electrically connected to both main upper surface electrodes 14.
- the resistive film 15 can be formed by application of a resistive material base by screen printing and subsequent firing.
- the resistance film 15 may be formed first, and then the pair of main upper surface electrodes 14 may be formed. In this case, each main upper surface electrode 14 partially overlaps the resistance film 15. Also, a pair of left and right bottom electrodes may be formed on the bottom surface of the insulating substrate 2. In this case, the first step is performed after the bottom electrode is formed.
- a glass coat (not shown) that covers only the resistance film 15 is formed. Thereafter, a trimming process for adjusting the resistance value of the resistance film 15 to a predetermined resistance value is performed.
- the first auxiliary upper surface electrode 16 is formed on the upper surface of each main upper surface electrode 14 (third step).
- the first auxiliary upper surface electrode 16 can be formed by applying a conductive material paste by screen printing and then firing the applied paste.
- the width dimension W1 of the first auxiliary upper surface electrode 16 is made larger than the width dimension WO of the main upper surface electrode 14.
- the first auxiliary upper surface electrode 16 covers the main upper surface electrode 14 as a whole.
- the first auxiliary upper surface electrode 16 can be formed using a conductive paste mainly composed of silver.
- the first auxiliary upper surface electrode 16 may be formed using a silver-based conductive paste containing Pd.
- the first auxiliary upper-surface electrode 16 is a conductive paste containing a base metal such as -ketal and the like and containing no silver (hereinafter referred to as a silver paste). Or “base metal conductive paste”).
- base metal conductive paste When the silver conductive paste or the silver conductive paste containing Pd is used, the resistance (specific resistance) of the first auxiliary upper surface electrode 16 can be kept low.
- an undercoat 17 covering the resistance film is formed on the upper surface of the resistance film 15 (fourth step).
- the undercoat 17 can be formed by application of glass paste by screen printing and subsequent firing.
- the undercoat 17 integrally includes an extension portion 17a that covers the first auxiliary upper surface electrode 16 and extends to the left and right end surfaces 12a of the insulating substrate 12.
- the width dimension W2 of the extension 17a of the undercoat 17 is set to an intermediate value between the width dimension WO of the main upper surface electrode 14 and the width dimension W1 of the first auxiliary upper surface electrode 16.
- the as a result, the first auxiliary upper surface electrode 16 has an uncovered portion 16a that is not covered with the extension portion 17a.
- an overcoat 18 is formed on a portion of the upper surface of the undercoat 17 excluding the extension portion 17a (fifth step).
- the overcoat 18 can be formed by applying a glass paste by screen printing and baking the applied paste. Alternatively, it can be formed by applying a liquid synthetic resin by screen printing and then curing the resin.
- the second auxiliary upper surface electrode 20 that covers the extension 17a is formed on the upper surface of the extension 17a in the undercoat 17 (sixth step).
- the width dimension W3 of the second auxiliary upper surface electrode 20 is set to be larger than the width dimension W2 of the extension portion 17a of the undercoat 17.
- the second auxiliary upper surface electrode 20 overlaps with the uncovered portion 16a of the first auxiliary upper surface electrode 16 at locations on the left and right sides thereof.
- a part of the second auxiliary upper surface electrode 20 is configured to overlap the end portion of the overcoat 18.
- the second auxiliary upper surface electrode 20 can be formed using the same conductive paste as the first auxiliary upper surface electrode 16.
- side electrodes 19 are formed on each end surface 12a of the insulating substrate 12.
- the side electrode 19 is formed so as to overlap a part of the upper surface of the second auxiliary upper surface electrode 20 and a part of the lower surface of the insulating substrate 12.
- the side electrode 19 is configured to overlap a part of the lower electrode.
- the side electrode 19 and the second auxiliary upper surface electrode 20 A metal plating layer 21 (see FIG. 8) is formed on the surface (8th step). Thereby, the chip resistor 11 of the second embodiment is obtained.
- a metal plating layer 21 is also formed on the surface of the lower electrode.
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- Microelectronics & Electronic Packaging (AREA)
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- Manufacturing & Machinery (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/883,856 US7786842B2 (en) | 2005-03-02 | 2006-02-28 | Chip resistor and manufacturing method thereof |
CN2006800067471A CN101133466B (zh) | 2005-03-02 | 2006-02-28 | 芯片电阻器及其制造方法 |
EP06714803A EP1855294A1 (en) | 2005-03-02 | 2006-02-28 | Chip resistor and manufacturing method thereof |
KR1020077020061A KR100908345B1 (ko) | 2005-03-02 | 2006-02-28 | 칩 저항기와 그 제조 방법 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005057692A JP2006245218A (ja) | 2005-03-02 | 2005-03-02 | チップ抵抗器とその製造方法 |
JP2005-057692 | 2005-03-02 | ||
JP2005-192423 | 2005-06-30 | ||
JP2005192423A JP4198133B2 (ja) | 2005-06-30 | 2005-06-30 | チップ抵抗器とその製造方法 |
Publications (1)
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WO2006093107A1 true WO2006093107A1 (ja) | 2006-09-08 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2006/303666 WO2006093107A1 (ja) | 2005-03-02 | 2006-02-28 | チップ抵抗器とその製造方法 |
Country Status (5)
Country | Link |
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US (1) | US7786842B2 (ja) |
EP (1) | EP1855294A1 (ja) |
KR (1) | KR100908345B1 (ja) |
TW (1) | TW200707475A (ja) |
WO (1) | WO2006093107A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008078293A (ja) * | 2006-09-20 | 2008-04-03 | Matsushita Electric Ind Co Ltd | チップ部品およびその製造方法 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
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JP5225598B2 (ja) * | 2007-03-19 | 2013-07-03 | コーア株式会社 | 電子部品およびその製造法 |
JP2010161135A (ja) * | 2009-01-07 | 2010-07-22 | Rohm Co Ltd | チップ抵抗器およびその製造方法 |
CN103392212B (zh) | 2011-02-24 | 2016-10-05 | 松下知识产权经营株式会社 | 片式电阻器及其制造方法 |
KR102054966B1 (ko) * | 2012-11-15 | 2019-12-12 | 삼성전기주식회사 | 인쇄회로기판 제조 방법 |
US10134510B2 (en) * | 2014-04-24 | 2018-11-20 | Panasonic Intellectual Property Management Co., Ltd. | Chip resistor and method for manufacturing same |
US9336931B2 (en) | 2014-06-06 | 2016-05-10 | Yageo Corporation | Chip resistor |
DE112015004416T5 (de) * | 2014-09-25 | 2017-07-13 | Koa Corporation | Chip-Widerstand und Herstellungsverfahren für Chip-Widerstand |
US10312317B2 (en) | 2017-04-27 | 2019-06-04 | Samsung Electro-Mechanics Co., Ltd. | Chip resistor and chip resistor assembly |
JP7086985B2 (ja) * | 2017-11-02 | 2022-06-20 | ローム株式会社 | チップ抵抗器 |
TWI707366B (zh) * | 2020-03-25 | 2020-10-11 | 光頡科技股份有限公司 | 電阻元件 |
KR20220121379A (ko) * | 2021-02-25 | 2022-09-01 | 삼성전기주식회사 | 칩 저항 부품 |
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JPH09246001A (ja) * | 1996-03-08 | 1997-09-19 | Matsushita Electric Ind Co Ltd | 抵抗組成物およびこれを用いた抵抗器 |
EP1018750A4 (en) * | 1997-07-03 | 2008-02-27 | Matsushita Electric Ind Co Ltd | RESISTANCE AND ITS MANUFACTURING PROCESS |
TW424245B (en) * | 1998-01-08 | 2001-03-01 | Matsushita Electric Ind Co Ltd | Resistor and its manufacturing method |
JPH11204301A (ja) * | 1998-01-20 | 1999-07-30 | Matsushita Electric Ind Co Ltd | 抵抗器 |
JP2002025802A (ja) * | 2000-07-10 | 2002-01-25 | Rohm Co Ltd | チップ抵抗器 |
JP2002184602A (ja) | 2000-12-13 | 2002-06-28 | Matsushita Electric Ind Co Ltd | 角形チップ抵抗器 |
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2006
- 2006-02-28 EP EP06714803A patent/EP1855294A1/en not_active Withdrawn
- 2006-02-28 KR KR1020077020061A patent/KR100908345B1/ko not_active IP Right Cessation
- 2006-02-28 US US11/883,856 patent/US7786842B2/en active Active
- 2006-02-28 WO PCT/JP2006/303666 patent/WO2006093107A1/ja active Application Filing
- 2006-03-02 TW TW095107041A patent/TW200707475A/zh not_active IP Right Cessation
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JPH08316002A (ja) * | 1995-05-15 | 1996-11-29 | Rohm Co Ltd | 電子部品及び複合電子部品 |
JPH09205003A (ja) * | 1996-01-23 | 1997-08-05 | Taiyoushiya Denki Kk | チップ抵抗器及びその製造方法 |
JPH10275706A (ja) * | 1998-05-06 | 1998-10-13 | Matsushita Electric Ind Co Ltd | 角形チップ抵抗器 |
JP2000138102A (ja) * | 1998-11-04 | 2000-05-16 | Matsushita Electric Ind Co Ltd | 抵抗器およびその製造方法 |
JP2000173802A (ja) * | 1998-12-01 | 2000-06-23 | Rohm Co Ltd | チップ型抵抗器の構造 |
WO2003046934A1 (fr) * | 2001-11-28 | 2003-06-05 | Rohm Co.,Ltd. | Pave resisitf et procede de fabrication correspondant |
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JP2008078293A (ja) * | 2006-09-20 | 2008-04-03 | Matsushita Electric Ind Co Ltd | チップ部品およびその製造方法 |
Also Published As
Publication number | Publication date |
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TW200707475A (en) | 2007-02-16 |
EP1855294A1 (en) | 2007-11-14 |
US7786842B2 (en) | 2010-08-31 |
KR20070101371A (ko) | 2007-10-16 |
TWI300942B (ja) | 2008-09-11 |
KR100908345B1 (ko) | 2009-07-20 |
US20080129443A1 (en) | 2008-06-05 |
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