WO2004075298A1 - Soiウエーハの製造方法及びsoiウエーハ - Google Patents
Soiウエーハの製造方法及びsoiウエーハ Download PDFInfo
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- WO2004075298A1 WO2004075298A1 PCT/JP2004/001557 JP2004001557W WO2004075298A1 WO 2004075298 A1 WO2004075298 A1 WO 2004075298A1 JP 2004001557 W JP2004001557 W JP 2004001557W WO 2004075298 A1 WO2004075298 A1 WO 2004075298A1
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- Prior art keywords
- oxide film
- buried oxide
- thickness
- soi
- heat treatment
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 60
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 43
- 238000010438 heat treatment Methods 0.000 claims abstract description 102
- 239000001301 oxygen Substances 0.000 claims abstract description 63
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 63
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 62
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 62
- 239000010703 silicon Substances 0.000 claims abstract description 62
- -1 oxygen ions Chemical class 0.000 claims abstract description 35
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 29
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 26
- 239000007789 gas Substances 0.000 claims description 19
- 230000003647 oxidation Effects 0.000 claims description 14
- 238000007254 oxidation reaction Methods 0.000 claims description 14
- 229910052786 argon Inorganic materials 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 7
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 3
- 229910052717 sulfur Inorganic materials 0.000 claims description 3
- 229910052799 carbon Inorganic materials 0.000 claims description 2
- 230000001131 transforming effect Effects 0.000 abstract 1
- 239000010408 film Substances 0.000 description 211
- 235000012431 wafers Nutrition 0.000 description 167
- 238000005468 ion implantation Methods 0.000 description 12
- 230000000052 comparative effect Effects 0.000 description 8
- 230000007423 decrease Effects 0.000 description 8
- 238000005530 etching Methods 0.000 description 6
- 230000003746 surface roughness Effects 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000007864 aqueous solution Substances 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 229910001882 dioxygen Inorganic materials 0.000 description 3
- 239000012212 insulator Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26533—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
Definitions
- the present invention relates to a method for manufacturing an SOI wafer having an SOI (Silicon insulnator) structure in which a silicon layer is formed on an insulator, and an SOI wafer manufactured by the method.
- SOI Silicon insulnator
- SOI wafers which have an SOI structure in which a silicon layer (SOI layer) is formed on an insulator, excel in high-speed, low power consumption, high withstand voltage, environmental resistance, etc. of devices.
- SOI layer silicon layer
- the SOI wafer As a typical method of manufacturing the SOI wafer, there are a bonding method and a SIMOX (.Separanationyb-iomn-implanatedoxxygen) method.
- the bonding method an oxide film is formed on at least one of the bond wafer that forms the SOI layer and the base wafer that serves as the support substrate, and the bond wafer and the base wafer are bonded via the formed oxide film. Later, the SOI wafer is manufactured by thinning the bond wafer.
- the SI MOX method is to manufacture SOI wafers (SI MO X wafers) by implanting oxygen ions into silicon wafers and then performing heat treatment to form a buried oxide film in the silicon wafers.
- a silicon wafer 11 that has been subjected to mirror polishing or the like is prepared (step (a ′)), and then 50 (b ′) is performed in step (b ′).
- Oxygen ions (o) are introduced into the wafer from one main surface of the silicon wafer heated to about 0 ° C.
- the oxygen ion implantation layer 12 is formed by performing ion implantation of +). At this time, the ion implantation conditions are such that the implantation energy is usually 150 to 200 keV, and the dose of oxygen ions is 1.5 ⁇ 1 to form a continuous buried oxide film. 0 1 A high dose of about 8 cm 2 or more is required.
- an oxide film forming heat treatment for changing the oxygen ion implanted layer 12 formed on the wafer into a buried oxide film 13 in the step (c ′) is performed, for example, at a temperature of 130 ° C. or more in an inert gas atmosphere.
- the SOI wafer 15 having the SOI layer 14 formed on the buried oxide film 13 can be manufactured.
- the SOI wafer manufactured by the SIMOX method easily achieves excellent film thickness uniformity because the thickness of the SOI layer and the buried oxide film are determined by the ion implantation energy and dose during oxygen ion implantation. It has the advantage of being able to obtain SOI wafers from a single silicon wafer without the need for two wafers as in the bonding method described above, resulting in relatively low cost. It is possible to manufacture with.
- SOI wafers having a thin buried oxide film are required.
- the thickness of the buried oxide film of the SOI wafer will be further reduced from lOOnm to 50 nm or less.
- the SOI wafer manufactured by the above-described SIMOX method is superior to the SOI wafer manufactured by the above-mentioned bonding method in terms of film thickness uniformity and manufacturing cost, but is present in the SOI layer.
- the crystallinity of the SOI layer is inferior and the surface roughness of the SOI layer is large. Therefore, SI MO X In the production of SOI wafers by the method, it is also desired to improve the crystallinity of the SOI layer and the surface quality. Disclosure of the invention
- an object of the present invention is to use a SIMOX method to provide a buried oxide film having a small thickness and high completeness
- An object of the present invention is to provide a method for manufacturing an SOI wafer capable of manufacturing a high-quality SOI wafer excellent in crystallinity and surface quality.
- the oxygen ion implanted layer is implanted into the silicon wafer.
- a method for producing an SOI wafer having an SOI layer on a buried oxide film by performing an oxide film forming heat treatment for changing to a buried oxide film the method comprises the steps of: forming a buried oxide film on the silicon wafer; The buried oxide film is formed so as to be thicker than the buried oxide film of the wafer, and then the silicon wafer on which the buried oxide film is formed is subjected to a heat treatment to reduce the thickness of the buried oxide film.
- a method for manufacturing a SOI wafer is provided.
- the thickness of the buried oxide film is more than the thickness of the buried oxide film desired in the manufactured SOI wafer.
- a buried oxide film is formed so as to be thicker, and then a silicon wafer is subjected to a heat treatment to reduce the thickness of the buried oxide film.
- a high-quality SOI wafer having a buried oxide film with reduced thickness and improved integrity can be easily manufactured.
- the portion where the thickness is reduced is reduced to a silicon layer having good crystallinity, and further, a heat treatment for reducing the buried oxide film thickness is performed.
- the SOI layer grows in a solid layer using the silicon layer having good crystallinity as a seed, so that the crystallinity of the SOI layer becomes extremely good, and at the same time, the surface roughness of the SOI layer is improved to improve the surface quality be able to.
- the heat treatment for reducing the thickness of the buried oxide film is preferably performed at a temperature of 100 ° C. or more in an atmosphere of a hydrogen gas, an argon gas, or a mixed gas thereof.
- the thickness of the oxide film can be effectively reduced, and a buried oxide film having a desired thin thickness can be reliably obtained. Also, the crystallinity and surface quality of the SOI layer can be reliably improved.
- the concentration of oxygen contained in the heat treatment atmosphere of the heat treatment for reducing the thickness of the buried oxide film is 10 ppm or less.
- the material of the evaporator and / or heat treatment tube used in the heat treatment for reducing the thickness of the buried oxide film is S i, S i C, or at least these coated on the inner wall surface. Is preferred.
- the material of the evaporator and / or the heat treatment tube is mainly composed of oxygen-free S i, S i c
- the oxygen concentration in the heat treatment atmosphere can be kept low, so that the heat treatment for reducing the thickness of the buried oxide film as described above ⁇ ⁇ ⁇ ⁇ ⁇ Etching that occurs on the surface of the wafer can be reliably prevented.
- the silicon oxide wafer when forming an embedded oxide film in the silicon wafer, after performing the oxide film forming heat treatment, the silicon oxide wafer is subjected to an internal oxidation process of the embedded oxide film. It is preferred to do so.
- the buried oxide is formed after the silicon If a buried oxide film is formed by adding an internal oxidation process of the film, that is, an IT0X process, it is easy to make the thickness of the buried oxide film larger than the thickness of the buried oxide film of the SOI wafer to be manufactured. Becomes possible. Furthermore, for example, in the case where a buried oxide film is formed by implanting oxygen ions at a low dose, the quality of the buried oxide film is improved by performing this ITOX treatment, and the buried oxide film has high integrity and extremely high quality. High quality SOI wafers can be manufactured.
- a sacrificial oxidation process is further performed to adjust the thickness of the SOI layer.
- a thermal oxide film is further formed on the SOI layer, and the oxide film is removed, that is, a so-called sacrificial oxidation process is performed.
- the damage layer generated on the surface of the SOI layer can be removed, and the thickness of the SOI layer can be adjusted while further improving the crystal quality of the SOI layer. .
- an SOI wafer manufactured by the method for manufacturing an SOI wafer according to the present invention.
- the SOI wafer manufactured by the method for manufacturing an SOI wafer according to the present invention has a buried oxide film having a small thickness and a high degree of completeness, and has a very good crystallinity and surface quality of the SOI layer. SIMOX II Eha.
- the buried oxide film thickness of the SOI wafer can be less than 50 nm.
- the SOI I / O wafer of the present invention can be a very high quality SIO I / O wafer having a buried oxide film thickness of less than 50 nm which has been conventionally difficult to manufacture.
- FIG. 1 shows an example of a method for manufacturing an SOI wafer by the SIMOX method according to the present invention.
- FIG. 2 is a flow chart showing a method for manufacturing an SOI wafer by the conventional SIMOX method.
- Figure 3 shows the relationship between the heat treatment time of the heat treatment to reduce the thickness of the buried oxide film and the amount of decrease in the thickness of the buried oxide film, and the thickness of the SOI layer formed on the SOI wafer and the thickness of the buried oxide film. It is the graph which showed the relationship of the decrease amount.
- buried oxide films formed on SOI wafers are required to be as thin as 100 nm or less. It is considered that the demand will be further advanced, and that it is necessary to manufacture an SOI ⁇ wafer having a buried oxide film thickness of, for example, 50 nm or less, such as 20 nm or 1 O nm.
- the present inventors have conducted intensive studies and studies on a method for manufacturing an SOI wafer having a thin buried oxide film and improved integrity using the SIMOX method.
- the buried oxide film is formed so as to be thicker than the buried oxide film of the SOI wafer finally manufactured.
- the thickness of the buried oxide film of the SOI wafer manufactured by the SIMOX method can be reduced.
- the present inventors have found that a high-quality SOI wafer having a buried oxide film having a smaller thickness and higher completeness than the conventional one and having extremely good crystallinity and surface quality of the SOI layer can be manufactured. I made it.
- FIG. 1 is a flowchart showing an example of a method of manufacturing an SOI wafer by the SIMOX method according to the present invention.
- a mirror-polished silicon wafer 1 is prepared (step (a)). If the silicon wafer is mirror-polished as described above, the flatness of the mirror-polished surface of the wafer is almost maintained at the manufactured SOI wafer, so that an SOI wafer having high flatness can be obtained.
- Oxygen ions (0 + ) are ion-implanted to a predetermined depth from one main surface of the silicon wafer 1 heated to about C to form an oxygen ion-implanted layer 2.
- the ion implantation conditions are not particularly limited.
- the implantation energy is set to about 150 to 200 keV, which is generally widely used, and the dose amount is set to the amount of oxidation to be performed later.
- Ion implantation is performed at a low dose of about 4.0 ⁇ 10 17 / cm 2 in order to prevent the occurrence of threading dislocations in the film formation heat treatment. At this time, if necessary, the implantation of oxygen ions can be performed separately.
- an oxide film forming heat treatment for changing the oxygen ion implanted layer 2 into a buried oxide film 3 is performed in a step (c).
- the heat treatment conditions for the oxide film formation heat treatment are not particularly limited as long as the oxygen ion implanted layer can be changed to a buried oxide film.For example, in an argon gas atmosphere having an oxygen concentration of 1% or less, a temperature of 130 ° C.
- the buried oxide film 3 can be formed by performing a heat treatment at a temperature of not less than C and not more than the melting point of silicon for 3 to 6 hours. At this time, since the buried oxide film 3 has a low dose of oxygen ions, the film thickness is small and a pinhole is easily formed.
- step (d) an internal oxidation treatment (ITOX treatment) of the buried oxide film is performed on the silicon wafer to improve the quality of the buried oxide film.
- ITOX treatment internal oxidation treatment
- a silicon wafer on which the buried oxide film 3 is formed is subjected to ITOX treatment in an oxygen gas atmosphere at a temperature of 115 ° C. to a temperature lower than the melting point of silicon for several hours, thereby obtaining a silicon oxide.
- a thicker buried oxide film 4 can be formed in the wafer.
- the ITOX treatment is performed. Although not necessary, even in this case, the quality of the buried oxide film can be improved by adding the ITOX treatment.In addition, when the ITOX treatment is performed on the silicon wafer, A thermal oxide film 5 is formed.
- the thermal oxide film 5 formed on the wafer surface is removed by etching, chemical mechanical polishing, or the like, and then, in step (e), the buried oxide film 4 is formed on the silicon wafer on which the thick buried oxide film 4 is formed.
- a heat treatment is performed to reduce the thickness of the film.
- an SOI wafer 8 having a buried oxide film 6 having a reduced thickness to a desired thickness and an SOI layer 7 on the buried oxide film 6 is manufactured. can do.
- the thickness of the buried oxide film 6 of the finally obtained SOI wafer 8 is determined by the product standard. In the present invention, the thickness is 10 nm or less, further 50 nm or less, and 5 nm or less. It is possible to form a very thin buried oxide film having a thickness less than or equal to.
- the heat treatment to reduce the thickness of the buried oxide film was performed after the ITOX treatment.However, the ITOX treatment was performed after the heat treatment to reduce the buried oxide film, or these steps were repeated to further improve the quality of the buried oxide film. It is also possible. Further, in the present invention, since the heat treatment is performed to reduce the thickness of the buried oxide film, the portion where the film thickness is reduced is reduced to a silicon layer having good crystallinity. During this time, the SOI layer is grown as a solid layer using the silicon layer having good crystallinity as a seed, so that the crystallinity of the SOI layer can be improved. It can also improve quality.
- the thermal oxide film 5 thus formed remains on the wafer surface, it is difficult to reduce the thickness of the buried oxide film. Therefore, if an oxide film is formed on the surface of the silicon wafer, a heat treatment for removing the oxide film on the wafer surface as described above and reducing the thickness of the buried oxide film without the oxide film on the wafer surface is performed as described above. It is preferred to do so.
- the heat treatment conditions for the heat treatment for reducing the thickness of the buried oxide film can be determined as necessary, and are not particularly limited.
- the heat treatment may be performed in a hydrogen gas, argon gas, or mixed gas atmosphere thereof.
- the thickness of the buried oxide film can be effectively reduced, and the product specification can be reduced to, for example, 100 to 100 nm, such as 10 to 80 nm.
- a buried oxide film having a thickness of less than nm can be easily obtained.
- the thermal oxide film formed on the surface of the wafer was removed after the ITOX treatment, and a thickness of 276 nm was deposited on the buried oxide film.
- Three silicon wafers with a thick SOI layer were prepared.
- each silicon wafer was subjected to heat treatment to reduce the thickness of the buried oxide film in an atmosphere of 100% argon gas at 1200 ° C. for 1, 2, or 4 hours.
- the reduction in the thickness of the buried oxide film under the heat treatment conditions was measured.
- the thickness reduction of the buried oxide film was measured by measuring the thickness of the buried oxide film of the silicon wafer before and after the heat treatment using a multilayer spectroscopic ellipsometer (manufactured by SOPRA).
- a silicon wafer with a 160 nm thick SOI layer on the buried oxide A silicon wafer is prepared, and a heat treatment is performed on the silicon wafer at a temperature of 1200 ° C. for 1 hour in an atmosphere of 100% argon gas to reduce the thickness of the buried oxide film.
- the thickness reduction was measured.
- the measurement results are also shown in FIG.
- Fig. 3 by reducing the thickness of the SOI layer formed on the buried oxide film from 276 nm to 16 O nm, the amount of reduction in the thickness of the buried oxide film during heat treatment is increased. This indicates that the amount of reduction in the thickness of the buried oxide film changes according to the thickness of the SOI layer. Therefore, when performing a heat treatment to reduce the thickness of the buried oxide film, it is desirable to control the thickness of the SOI layer formed on the buried oxide film to determine the heat treatment conditions.
- the concentration of oxygen contained in the heat treatment atmosphere is higher than 10 ppni, the surface of the SOI wafer is etched during the heat treatment and the surface of the SOI layer is etched. Roughness and film thickness uniformity may be deteriorated. Therefore, when performing a heat treatment to reduce the thickness of the buried oxide film, it is preferable that the concentration of oxygen contained in the heat treatment atmosphere be 10 ppm or less, whereby the surface of the SOI wafer is etched during the heat treatment. Thus, an SOI wafer on which an SOI layer having excellent surface roughness and film thickness uniformity is formed can be manufactured.
- the heat treatment apparatus used for performing the heat treatment for reducing the thickness of the buried oxide film is not particularly limited, and a generally used heat treatment apparatus can be used.
- a quartz boat or quartz tube which is commonly used, is used for an e-boat for holding an e-chamber or for a heat treatment tube for forming a reaction chamber, the influence of oxygen contained as a main component in them will cause
- the surface of the SOI wafer may be etched and the surface roughness and the film thickness uniformity of the SOI layer may be deteriorated.
- the material of the e-boat and / or the heat treatment tube used in the heat treatment for reducing the thickness of the buried oxide film of the present invention is made of Si, Sic not containing oxygen as a main component, or at least these on the inner wall surface. It is preferable to use those coated.
- the “Ahaboat” heat treatment tube made of such a material the oxygen concentration in the heat treatment atmosphere can be kept low, ⁇ ⁇ ⁇ ⁇ ⁇ Etching that occurs on the surface of the wafer can be reliably prevented.
- a so-called sacrificial oxidation is performed in which a thermal oxide film is formed on the SOI layer after the heat treatment for reducing the thickness of the buried oxide film and the oxide film is removed.
- a treatment is performed.
- a heat treatment in an oxidizing atmosphere is performed to form an oxide film on the surface of the SOI layer, and then, the HF film is formed on the surface of the SOI layer using HF. What is necessary is just to remove by etching with the aqueous solution containing. If etching is performed with an aqueous solution containing HF in this manner, only the oxide film is removed by etching, and an SOI wafer in which contaminants such as damage and heavy metals have been removed by sacrificial oxidation can be obtained.
- the damage layer formed on the surface of the SOI wafer by oxygen ion implantation can be reliably removed, and the crystal quality of the SOI layer can be further improved. Since the thickness of the SOI layer can be adjusted while increasing the SOI quality, a higher quality SOI wafer can be manufactured.
- a mirror-polished silicon wafer having a diameter of 20 Omm was prepared, and an SOI wafer having a buried oxide film having a thickness of 80 ⁇ as a product standard was manufactured by the SIMOX method.
- oxygen is removed from one main surface of the silicon wafer heated to about 500 ° C.
- the ions were implanted under the conditions of an implantation energy of 180 keV and a dose of 4 ⁇ 10 17 / cm 2 to form an oxygen ion implanted layer in the wafer.
- heat treatment for forming an oxide film was performed at 135 ° C. for 4 hours in an argon gas atmosphere having an oxygen concentration of 0.5% to change the oxygen ion implanted layer in the silicon wafer into a buried oxide film.
- the operation was performed at 350 for 4 hours to increase the thickness of the buried oxide film in the silicon wafer.
- the resulting silicon wafer was placed in an argon gas atmosphere (oxygen concentration 1 O ppm or less) at 1200 ° C.
- argon gas atmosphere oxygen concentration 1 O ppm or less
- a heat treatment was performed for 4 hours to reduce the thickness of the buried oxide film, and the thickness of the buried oxide film was reduced by 30 ⁇ to manufacture an SOI wafer having a buried oxide film having a thickness of 80 nm.
- ITOX treatment is performed at 135 ° C for 4 hours in a mixed gas atmosphere of argon gas and oxygen gas (oxygen concentration: 70%), and the buried oxide film in the silicon wafer is thickened to a thickness of 11 O nm.
- An SOI wafer with a buried oxide film was fabricated (no heat treatment was performed to reduce the thickness of the buried oxide film).
- each SOI wafer was immersed in an HF aqueous solution, and then formed on the HF defect and buried oxide film formed in the SOI layer of each SOI wafer.
- the pinhole was observed with an optical microscope and its density was measured. The results of these measurements are shown in Table 1 below, together with the above-mentioned SOI II wafer manufacturing conditions.
- Heat-treated tube material SiC
- wafer port material Si
- Table 1 the SOI wafer of the present invention (Example 1) has a thin buried oxide film thickness of 8 O nm. However, it can be seen that it has a buried oxide film of the same quality as that of the conventional IMOX-treated SIMOX II wafer (Comparative Example 1). In contrast, the SOI wafer of Comparative Example 2 has an embedded Since the I OX treatment was not performed to form the oxide film, pinholes were significantly generated in the buried oxide film, and the quality of the buried oxide film was extremely low.
- a plurality of SOI wafers each having a buried oxide film with a thickness of 80 nm manufactured under the same conditions as in Example 1 above were prepared, and these were prepared under the argon gas atmosphere (oxygen concentration lO ppm or less).
- the final buried oxide film thickness is 40 ⁇ m, 20 nm, and 10 nm.
- a 5 nm SOI wafer was obtained.
- the HF defect density and the pinhole density of these SOI wafers were measured in the same manner as in Example 1. As a result, they were found to be equivalent to those of Example 1 and Comparative Example 1.
- the SIMOX method is used in which an SOI wafer can be manufactured from one wafer without using a bonding method that requires two wafers when manufacturing an SOI wafer. Even in this case, a high-quality SOI wafer having a buried oxide film thickness of less than 50 nm, which cannot be obtained by the conventional SIMOX method, can be obtained.
- the present invention is not limited to the above embodiment.
- the above embodiment is an exemplification, and has substantially the same configuration as the technical idea described in the claims of the present invention. It is included in the technical scope of the invention.
- the SOI wafer is manufactured mainly by injecting oxygen ions at a low dose (dose / window).
- the present invention is not limited to this. Do oxygen ion injection at dose
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Abstract
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Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04711028A EP1596437A4 (en) | 2003-02-19 | 2004-02-13 | METHOD OF MANUFACTURING SOI WAFERS AND SOI WAFERS |
US10/544,374 US7524744B2 (en) | 2003-02-19 | 2004-02-13 | Method of producing SOI wafer and SOI wafer |
JP2005502689A JP4442560B2 (ja) | 2003-02-19 | 2004-02-13 | Soiウエーハの製造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2003-040875 | 2003-02-19 | ||
JP2003040875 | 2003-02-19 |
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WO2004075298A1 true WO2004075298A1 (ja) | 2004-09-02 |
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PCT/JP2004/001557 WO2004075298A1 (ja) | 2003-02-19 | 2004-02-13 | Soiウエーハの製造方法及びsoiウエーハ |
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US (1) | US7524744B2 (ja) |
EP (1) | EP1596437A4 (ja) |
JP (1) | JP4442560B2 (ja) |
KR (1) | KR100947815B1 (ja) |
CN (1) | CN100418194C (ja) |
TW (1) | TW200416814A (ja) |
WO (1) | WO2004075298A1 (ja) |
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JP2011512685A (ja) * | 2008-02-20 | 2011-04-21 | エス.オー.アイ.テック シリコン オン インシュレータ テクノロジーズ | 酸化物溶解後の酸化 |
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FR2912259B1 (fr) * | 2007-02-01 | 2009-06-05 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat du type "silicium sur isolant". |
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KR101431780B1 (ko) | 2007-03-19 | 2014-09-19 | 소이텍 | 패턴화된 얇은 soi |
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JP5493345B2 (ja) * | 2008-12-11 | 2014-05-14 | 信越半導体株式会社 | Soiウェーハの製造方法 |
KR100987794B1 (ko) | 2008-12-22 | 2010-10-13 | 한국전자통신연구원 | 반도체 장치의 제조 방법 |
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FR2964495A1 (fr) * | 2010-09-02 | 2012-03-09 | Soitec Silicon On Insulator | Procede de fabrication d'une structure seoi multiple comportant une couche isolante ultrafine |
FR2972564B1 (fr) | 2011-03-08 | 2016-11-04 | S O I Tec Silicon On Insulator Tech | Procédé de traitement d'une structure de type semi-conducteur sur isolant |
FR2998418B1 (fr) * | 2012-11-20 | 2014-11-21 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat de type semi-conducteur sur isolant |
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CN103579109B (zh) * | 2013-11-01 | 2016-06-08 | 电子科技大学 | 一种光电集成电路的制造方法 |
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- 2004-02-13 JP JP2005502689A patent/JP4442560B2/ja not_active Expired - Fee Related
- 2004-02-13 US US10/544,374 patent/US7524744B2/en not_active Expired - Fee Related
- 2004-02-13 CN CNB2004800034553A patent/CN100418194C/zh not_active Expired - Fee Related
- 2004-02-13 EP EP04711028A patent/EP1596437A4/en not_active Withdrawn
- 2004-02-13 WO PCT/JP2004/001557 patent/WO2004075298A1/ja active Application Filing
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JP2011504655A (ja) * | 2007-11-23 | 2011-02-10 | エス. オー. アイ. テック シリコン オン インシュレーター テクノロジーズ | 精密な酸化物の溶解 |
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Also Published As
Publication number | Publication date |
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US20060051945A1 (en) | 2006-03-09 |
TW200416814A (en) | 2004-09-01 |
US7524744B2 (en) | 2009-04-28 |
JP4442560B2 (ja) | 2010-03-31 |
CN100418194C (zh) | 2008-09-10 |
TWI344667B (ja) | 2011-07-01 |
JPWO2004075298A1 (ja) | 2006-06-01 |
EP1596437A1 (en) | 2005-11-16 |
EP1596437A4 (en) | 2009-12-02 |
KR100947815B1 (ko) | 2010-03-15 |
CN1748312A (zh) | 2006-03-15 |
KR20050100665A (ko) | 2005-10-19 |
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