WO2004034369A1 - 定電流回路、駆動回路および画像表示装置 - Google Patents
定電流回路、駆動回路および画像表示装置 Download PDFInfo
- Publication number
- WO2004034369A1 WO2004034369A1 PCT/JP2003/008870 JP0308870W WO2004034369A1 WO 2004034369 A1 WO2004034369 A1 WO 2004034369A1 JP 0308870 W JP0308870 W JP 0308870W WO 2004034369 A1 WO2004034369 A1 WO 2004034369A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- voltage
- circuit
- transistor
- node
- constant current
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
- G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
- G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
- G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0404—Matrix technologies
- G09G2300/0408—Integration of the drivers onto the display substrate
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0254—Control of polarity reversal in general, other than for liquid crystal displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD
Definitions
- the present invention relates to a constant current circuit, a drive circuit, and an image display device, and more particularly, to a constant current circuit, a drive circuit, and an image display device that eliminate the influence of the characteristics of transistors included in the circuit.
- a constant current circuit which allows a constant current to flow regardless of load fluctuations, is one of the fundamental and most important circuits in semiconductor integrated circuits.
- a current mirror type circuit is generally used for a constant current circuit.
- a current mirror type constant current circuit one of the two transistors connected to each gate is diode-connected, and the capacity ratio of both transistors to a certain reference current flowing through that transistor (specifically, A constant current that is twice as large as the channel width can flow through the other transistor connected to the load circuit at an independent potential.
- the current setting accuracy depends on whether or not the current driving capability of the transistors constituting the current mirror is as designed.
- the drive current Id of a transistor is expressed by the following equation (1).
- V gs indicates a gate voltage
- V th indicates a threshold voltage
- / 3 indicates conductance. That is, the setting accuracy of the drive current is affected by the conductance determined by the transistor manufacturing process and the gate voltage, that is, the power supply voltage, and the threshold voltage Vth of the transistor.
- the drain is connected via a resistor R.
- the first transistor connected to the By driving the second transistor, which is connected to the drain of one transistor and has the same capacity ratio as the first transistor, with a current mirror circuit with the capacity ratio of the two transistors of K: 1, it is possible to reduce the manufacturing deviation.
- a constant current circuit is disclosed that can reduce the variation in current and can set the current independently of the threshold voltages of the first and second transistors.
- a constant current circuit using a current mirror including a constant current circuit described in Japanese Patent Application Laid-Open No. Hei 5-191611 discloses a structure in which a threshold voltage V of two transistors constituting a current mirror is used. It is assumed that th is equal.
- the first and second transistors also form a current mirror, and the first and second transistors It is assumed that the threshold voltages V th are the same, and that the two transistors forming the current mirror circuit for driving the first and second transistors have the same threshold voltage.
- a threshold voltage V th1 of a transistor through which a reference current flows (hereinafter, also referred to as a “reference transistor”) and a transistor through which a drive current flows (hereinafter, referred to as a “drive transistor”) among two transistors constituting the current mirror circuit. If the threshold voltage V th2 is different, the setting accuracy of the drive current is degraded. Further, when the threshold voltage V th2 is higher than the threshold voltage V th 1, the drive transistor may be turned off even though the reference transistor is turned on, and the drive current may not flow. .
- TF TJ or“ TFT element ” a transistor formed on a silicon substrate
- TFT element a transistor formed on a silicon substrate
- the threshold voltage varies greatly, and when a constant current circuit is composed of TFTs, the above-mentioned problem becomes prominent.
- TFT liquid crystal display devices which have been the mainstay in the field of flat panel displays
- electroluminescent display devices (hereinafter referred to as “EL display devices”) composed of low-temperature polysilicon TFTs, which have been attracting attention in recent years, are also referred to.
- the peripheral circuit conventionally configured by an external LSI is replaced with the same It is desired to integrally mold on a substrate. This is because if the peripheral circuit as well as the image display unit can be integrally formed on the same glass substrate, the size of the image display device can be reduced.
- gradation display is performed by changing the voltage applied to the pixel. That is, in the liquid crystal display device, a voltage modulation method of changing the transmittance of the liquid crystal by changing the voltage applied to the pixel is generally adopted. Also, in an EL display device, by changing the voltage applied to a pixel, the current supplied to an organic light emitting diode, which is a current-driven light emitting element provided for each pixel, is changed to thereby provide an organic light emitting diode. Is changed.
- a voltage generator that generates a plurality of voltages (hereinafter, also referred to as “grayscale voltages”) for driving pixels at a display luminance corresponding to image data.
- a circuit is provided.
- This voltage generation circuit which functions as a gradation display, is required to have high operation stability, and in order to achieve the high stability operation, the stable operation of the constant current circuit included in the voltage generation circuit is important. It becomes.
- a drive circuit analog amplifier
- receives a gray scale voltage generated by a voltage generation circuit and outputs a display voltage corresponding to the gray scale voltage to a data line to which a pixel is connected the same as in the voltage generation circuit
- high operation stability is required, and high-accuracy display voltage output without offset is required.
- the stable operation of the constant current circuit included therein is important.
- the present invention has been made in order to solve such a problem, and an object of the present invention is to provide a constant current device that eliminates the influence of variations in the threshold voltage of transistors constituting a circuit. Is to provide a circuit.
- the constant current circuit is determined in accordance with the transistor connected between the first node and the second node and the threshold voltage of the transistor, and is used for turning on the transistor.
- the image display device includes a plurality of image display elements arranged in a matrix and a plurality of image display elements arranged corresponding to the rows of the plurality of image display elements and sequentially selected at a predetermined cycle. Scanning lines, a plurality of data lines arranged corresponding to the columns of the plurality of image display elements, and a voltage generator for generating at least one voltage level corresponding to the display luminance of each of the plurality of image display elements. Circuit, at least one buffer circuit that maintains at least one voltage level generated by the voltage generation circuit, amplifies and outputs current, and pixel data corresponding to each image display element in the row to be scanned.
- a data line driver that selects a voltage level indicated by at least one voltage level for each image display element of a scanning target row and activates a plurality of data lines at the selected voltage level.
- Each of the at least one buffer circuit includes an internal circuit that receives one of at least one voltage level, amplifies and outputs a current, and a constant current circuit that supplies a constant current to the internal circuit.
- the constant current circuit determines a transistor connected between the internal circuit and the first node, and determines a first voltage for turning on the transistor, which is determined according to a threshold voltage of the transistor.
- the transistor comprises a voltage holding circuit, and the transistor receives the first voltage at its gate, and makes the current in the internal circuit constant.
- the drive circuit is a drive circuit that outputs an output voltage according to the input voltage, wherein the first transistor connected between the first power supply node and the output node.
- the compensation circuit holds the offset voltage and outputs a first voltage obtained by shifting the input voltage by the held offset voltage to the gate electrode of the first transistor.
- a second transistor connected to a power supply node of the second transistor, and a second voltage for turning on the second transistor, which is determined according to a threshold voltage of the second transistor.
- a first voltage holding circuit the second transistor receiving the second voltage at the gate electrode, and making the current in the first transistor connected to the output node constant,
- the first transistor receives the first voltage output from the offset compensation circuit at its gate electrode, and outputs an output voltage having the same potential as the input voltage to the output node.
- the drive circuit is a drive circuit that outputs an output voltage according to the input voltage, and includes a first conductive type connected between the first power supply node and the output node.
- a first transistor a first constant current circuit connected between the output node and the second power supply node, receiving the first voltage, and shifting the received first voltage by a predetermined amount.
- a level shift circuit that outputs a second voltage; and an offset compensation circuit that compensates for an offset voltage generated according to a threshold voltage of the first transistor of the first conductivity type.
- a second constant current circuit connected between the third power supply node and the gate electrode of the first transistor of the first conductivity type; and a gate electrode of the first transistor of the first conductivity type and the second constant current circuit.
- the offset compensation circuit holds a voltage difference between a threshold voltage of the first transistor of the first conductivity type and a threshold of the first transistor of the second conductivity type.
- a voltage obtained by shifting the input voltage by the retained voltage difference is output as a first voltage to the gate electrode of the first transistor of the second conductivity type, and the first constant current circuit outputs A second transistor of a first conductivity type connected between the power supply node of the first transistor and a threshold voltage of a second transistor of the first conductivity type, and a first conductivity type
- a first voltage holding circuit for holding a third voltage for turning on the second transistor of the first transistor, wherein the second transistor of the first conductivity type receives the third voltage at the gate electrode, and Connect to node
- the second constant current circuit is provided between the third power supply node and the good electrode of the first transistor of the first conductivity type.
- the second transistor of the second conductivity type which is determined according to the second transistor of the second conductivity type to be connected and the threshold voltage of the second transistor of the second conductivity type, is turned on. And a second voltage holding circuit for holding a fourth voltage for receiving the second voltage.
- the second transistor of the second conductivity type receives the fourth voltage at the gate electrode, and the second transistor of the first conductivity type.
- the current in the first transistor of the second conductivity type connected to the gate electrode of the first transistor is made constant, and the first transistor of the second conductivity type is connected to the first transistor output from the offset compensation circuit.
- a second voltage obtained by shifting the first voltage by the threshold voltage of the first transistor to the gate electrode of the first transistor of the first conductivity type is output to the first transistor of the first conductivity type.
- the second voltage output from the level shift circuit is received by the good electrode, and an output voltage having the same potential as the input voltage is output to the output node.
- the image display device includes a plurality of image display elements arranged in a matrix and a plurality of image display elements arranged corresponding to the rows of the plurality of image display elements and sequentially selected at a predetermined cycle. Scanning lines, a plurality of data lines arranged corresponding to the columns of the plurality of image display elements, and a voltage generation circuit for generating at least one voltage corresponding to the display luminance of each of the plurality of image display elements.
- a decoding circuit for selecting a voltage specified by pixel data corresponding to each image display element of the scanning target row from at least one voltage for each image display element of the scanning target row, and a voltage selected by the decoding circuit. And a drive circuit receiving the voltage from the decode circuit and activating the plurality of data lines with a corresponding voltage.
- the constant current circuit includes a voltage holding circuit that holds a voltage set based on a threshold voltage of a driving transistor through which a current flows, and the driving transistor gates the voltage held by the voltage holding circuit. And apply a current.
- FIG. 1 is a circuit diagram showing a configuration of a constant current circuit according to Embodiment 1 of the present invention.
- FIG. 2 is a diagram showing an operation state of the constant current circuit shown in FIG. 1 at the time of current driving.
- FIG. 3 is a circuit diagram showing a configuration of a constant current circuit according to Embodiment 2 of the present invention.
- FIG. 4 is a diagram showing an operation state of the constant current circuit shown in FIG. 3 at the time of current driving.
- FIG. 5 is a circuit diagram showing a configuration of a differential amplifier according to Embodiment 3 of the present invention.
- FIG. 6 is a diagram showing an operation state when the differential amplifier according to Embodiment 3 of the present invention is active. is there.
- FIG. 7 is a circuit diagram showing a modified example of the differential amplifier shown in FIG.
- FIG. 8 is a circuit diagram showing a configuration of a differential amplifier according to Embodiment 4 of the present invention.
- FIG. 9 is a diagram showing an operation state of the differential amplifier according to Embodiment 4 of the present invention when activated. is there.
- FIG. 10 is a circuit diagram showing a modified example of the differential amplifier shown in FIG.
- FIG. 11 is a schematic block diagram showing an overall configuration of a color liquid crystal display device according to Embodiment 5 of the present invention.
- FIG. 12 is a circuit diagram showing a configuration of the pixel shown in FIG.
- FIG. 13 is a circuit diagram showing a configuration of the voltage generating circuit shown in FIG.
- FIG. 14 is a circuit diagram showing a configuration of the buffer circuit shown in FIG.
- FIG. 15 is a circuit diagram showing a configuration of the first amplifier circuit shown in FIG.
- FIG. 16 is a circuit diagram showing a configuration of the second amplifier circuit shown in FIG.
- FIG. 17 is a circuit diagram showing a configuration of a pixel of an EL display device according to Embodiment 6 of the present invention.
- FIG. 18 is a schematic block diagram showing an overall configuration of a color liquid crystal display device according to Embodiment 7 of the present invention.
- FIG. 19 is a circuit diagram showing a configuration of the analog amplifier shown in FIG.
- FIG. 20 is a circuit diagram showing a configuration of the analog amplifier according to the eighth embodiment.
- FIG. 21 is a circuit diagram showing a configuration of an analog amplifier according to the ninth embodiment.
- 2 2 is a circuit diagram showing an analog amplifier arrangement in accordance with the first 0 embodiment ( FIG. 23 is a circuit diagram showing a configuration of the analog amplifier according to Embodiment 11;
- FIG. 24 is a circuit diagram showing a configuration of the analog amplifier according to Embodiment 12;
- FIG. 1 is a circuit diagram showing a configuration of a constant current circuit according to Embodiment 1 of the present invention.
- constant current circuit 1 includes N-type transistor N1, capacitor C1, switches S1 to S3, and resistance element R101.
- the N-type transistor N1 is a drive transistor for flowing a constant current, and is connected between the node 2 and a node 8 to which a constant voltage VL is applied, and has a gate connected to the node 4.
- N-type transistor N1 may be an N-type TFT or an N-type Balta transistor.
- Capacitor C 1 is provided to hold the gate voltage of N-type transistor N 1, and is connected between nodes 4 and 8.
- Switches S1 to S3 switch between voltage setting for setting the gate voltage of N-type transistor N1 and current driving.
- Switch S1 is connected between resistor element R101 and node 2
- switch S2 is connected between node 10 and node 2 to which a load requiring a constant current is connected.
- Switch S3 is connected between nodes 2 and 4.
- the resistive element R 101 is provided to supply a predetermined current to the node 2 at the time of voltage setting, and is provided between the switch S 1 and the node 6 to which the predetermined voltage VH having a higher voltage V is applied. Connected.
- the constant current circuit 1 has two operation modes of the voltage setting operation for setting the gate voltage of the N-type transistor N1 and the current driving operation of the original function.
- FIG. 1 shows an operation state at the time of voltage setting
- FIG. 2 described later shows an operation state at the time of current drive.
- the voltage setting operation in the constant current circuit 1 will be described.
- switches S 1 and S 3 are turned on, and switch S 2 is turned off. So Then, current flows from node 6 to node 8 through resistor RIO1, switch S1 and diode-connected N-type transistor N1, and the voltage level at node 4 is equal to that of N-type transistor N1.
- the voltage level becomes higher than the threshold voltage V th1 (V thl + ⁇ th).
- the capacitor C1 is charged with a charge corresponding to the voltage level of the node 4.
- FIG. 2 is a diagram illustrating an operation state of the constant current circuit 1 during current driving.
- switch S2 When C1 is charged and switches S1 and S3 are turned off, switch S2 is turned on ⁇ currently, current flows from node 10 to node 8 via switch S2 and N-type transistor N1.
- the voltage of the node 4 that is, the gate voltage of the N-type transistor N1
- V thl + ⁇ the voltage level higher than the threshold voltage V th1 by the capacitor C 1
- the type transistor N1 can flow a constant current.
- the capacitor C1 may be connected to another node as long as the node C is a node to which a constant voltage is applied.
- the constant current circuit 1 can be applied to a general-purpose operational amplifier as long as it is a usage method that can secure a time for switching the switches S1 to S3.
- operational amplifiers There are various applications of operational amplifiers.For example, if an operational amplifier is used in a sample-and-hold circuit, it is possible to secure time to switch switches S1 to S3 before sampling a signal.
- the constant current circuit 1 can be applied to the operational amplifier.
- the gate voltage is maintained when the N-type transistor N 1 that is the driving transistor flows a constant current.
- the N-type transistor N1 is driven based on the held voltage, a constant current can be stably supplied even when the threshold voltage of the N-type transistor N1 has a large variation. .
- FIG. 3 is a circuit diagram showing a configuration of a constant current circuit according to Embodiment 2 of the present invention.
- constant current circuit 1A includes P-type transistor P1, capacitor 'C2, switches S4 to S6, and resistance element R102.
- the P-type transistor P1 is a driving transistor that allows a constant current to flow, and is connected between a node 16 to which a constant voltage VH is applied and a node 12, and the gut is connected to the node 14.
- the P-type transistor P 1 may be a P-type TFT or a P-type bulk transistor.
- Capacitor C2 is provided to hold the gate voltage of P-type transistor P1, and is connected between nodes 16 and 14.
- Switches S4 to S6 switch between voltage setting for setting the gate voltage of P-type transistor P1 and current driving.
- Switch S4 is connected between node 12 and resistor element R101, and switch S5 is connected between node 20 and node 12 where a load requiring a constant current is connected.
- switch S 6 is connected between nodes 12 and 14.
- the resistance element R 102 is provided to allow a predetermined current to flow through the node 12 when setting the voltage, and is provided between the switch S 4 and the node 18 to which the predetermined voltage VL lower than the voltage VH is applied. Connected.
- the constant current circuit 1A has a configuration in which the polarity of the constant current circuit 1 according to the first embodiment is reversed.
- FIG. 3 shows an operation state at the time of voltage setting
- FIG. 4 described later shows an operation state at the time of current drive.
- the voltage setting operation in the constant current circuit 1 A will be described.
- switches S4 and S6 are turned on, and switch S5 is turned off. Then, a current flows from the node 16 to the node 18 through the diode-connected P-type transistor P1, the switch S4 and the resistor R102, and the voltage level of the node 14 becomes the P-type.
- the voltage level is based on the threshold voltage Vth2 of the transistor P1 (VH-IVth2I1- ⁇ V2).
- the capacitor C2 is charged with a charge corresponding to the voltage level of the node 14. Then, although not shown, when the charging of the capacitor C2 is completed, the switches S4 and S6 are turned off, and the voltage level of the node 14 is held at (VH-IV th2 I- ⁇ V2) by the capacitor C2. Is done.
- FIG. 4 is a diagram showing an operation state of the constant current circuit 1 A at the time of current driving.
- the charge corresponding to the voltage level (VH—IVth2I— ⁇ V2) is charged in the capacitor C2, and when the switches S4 and S6 are turned off, the switch S5 is turned on. Then, a current flows from node 16 to node 20 via P-type transistor P1 and switch S5.
- the P-type transistor P1 can pass a constant current. It should be noted that the value of the current flowing through the P-type transistor P1 depends on ⁇ 2, and this AV2 can be adjusted by adjusting the resistance of the resistor R102.
- the capacitor C2 is connected to the node 16, but may be connected to another node as long as a constant voltage is applied.
- the constant current circuit 1 ⁇ ⁇ ⁇ according to the second embodiment is a general-purpose circuit that can secure a time for switching the switches S4 to S6. Applicable to operational amplifiers.
- the same effect as the constant current circuit 1 according to the first embodiment can be obtained by the constant current circuit 1A according to the second embodiment.
- Embodiment 3 shows a case where constant current circuit 1 according to Embodiment 1 is applied to a differential amplifier.
- FIG. 5 is a circuit diagram showing a configuration of the differential pump according to the third embodiment.
- the differential amplifier according to the third embodiment includes a constant current circuit 1 according to the first embodiment and a differential circuit 30.
- the N-type transistor N1 of the constant current circuit 1 is configured by an N-type TFT. Since the configuration of constant current circuit 1 has already been described, description thereof will not be repeated.
- the differential circuit 30 includes N-type TFT elements N2 and N3 and resistance elements R103 and R104. And N-type TFT element N2 is connected between resistance element R103 and node 10, and receives input signal IN1 at its gate. N-type TFT element N3 is connected between resistance element R104 and node 10, and receives input signal IN2 at its gate. Resistance element R103 is connected between node 6 and N-type TFT element N2, and resistance element R104 is connected between node 6 and N-type TFT element N3.
- transistors constituting a circuit are formed of TFTs, and are formed on a glass substrate or a resin substrate.
- FIG. 5 shows an operation state when a voltage is set to the constant current circuit 1.
- the switch S2 is OFF, and the differential circuit 30 is electrically separated from the constant current circuit 1 and inactivated. Since the operation of constant current circuit 1 when setting the voltage has already been described in the first embodiment, description thereof will not be repeated.
- FIG. 6 is a diagram showing an operation state when the differential amplifier according to the third embodiment is activated. Referring to FIG. 6, when activated, switches S1 and S3 are turned off and switch S2 is turned on, and differential circuit 30 is activated.
- this differential amplifier is composed of a TFT, but operates stably because the constant current circuit 1 is used as the constant current source.
- the charge held in the capacitor C1 is the gate leak current of the N-type TFT element N1, the leak current of the capacitor C1 itself, or the leak current of the switch S3. Therefore, the refresh operation, that is, the above-described voltage setting operation is performed at predetermined intervals.
- the differential amplifier according to the third embodiment since the constant current circuit for activating the differential amplifier is configured by the constant current circuit 1 according to the first embodiment, the differential amplifier is configured by a TFT. Even if the operation is stable.
- FIG. 7 is a circuit diagram showing a modified example of the differential amplifier shown in FIG.
- this differential amplifier has the same configuration as the differential amplifier shown in FIG. A constant current circuit 1 B is provided in place of the constant current circuit 1.
- Constant current circuit 1B includes an N-type TFT element N4 instead of resistance element R101 in the configuration of constant current circuit 1.
- Other configurations are the same as those of the differential amplifier shown in FIG.
- the N-type TFT element N4 forms a depletion-type transistor whose source is connected to the gate.
- the current Id flowing through the depletion type transistor is expressed by the following equation (2) because the gate voltage Vgs with respect to the source is 0V.
- V th indicates a threshold voltage
- i3 indicates conductance. That is, the current Id flowing through the N-type TFT element N4 is a constant current independent of the voltages VH and VL.
- the node 4 can supply a constant current to the N-type TFT element N 4 Is set to a constant voltage level each time, and the constant current ⁇ : flowing to the node 10 by the constant current circuit 1B does not vary for each voltage setting operation. As a result, the operation of the differential amplifier becomes more stable.
- the depletion-type N-type TFT element N4 capable of supplying a constant current is used as the current supply circuit when setting the voltage in the constant current circuit.
- the set voltage in the constant current circuit 1B for each voltage setting operation becomes constant, and the operation of the differential amplifier is further stabilized.
- Embodiment 4 shows a case where constant current circuit 1A according to Embodiment 2 is applied to a differential amplifier.
- FIG. 8 is a circuit diagram showing a configuration of the differential amplifier according to the fourth embodiment.
- the differential amplifier according to the fourth embodiment includes a constant current circuit 1A according to the second embodiment and a differential circuit 3OA.
- the P-type transistor P1 of the constant current circuit 1A is configured by a P-type TFT. Since the configuration of constant current circuit 1 A has already been described, description thereof will not be repeated.
- the differential circuit 30 A is composed of P-type TFT elements P 2 and P 3 and resistance elements R 105 and R 10 6 is provided.
- P-type TFT element P2 is connected between node 20 and resistance element R105, and receives input signal IN3 at its gate.
- P-type TFT element P3 is connected between node 20 and resistance element R106, and receives input signal IN4 at its gate.
- Resistive element R 105 is connected between P-type TFT element P 2 and node 18, and resistive element R 106 is connected between P-type TFT element P 3 and node 18.
- transistors constituting a circuit are formed of TFTs, and are formed on a glass substrate or a resin substrate.
- FIG. 8 shows an operation state when a voltage is set to the constant current circuit 1 A. 'At the time of voltage setting, switch S5 is OFF, and differential circuit 3OA is electrically separated from constant current circuit 1A and inactivated. Since the operation of constant current circuit 1 A when setting the voltage has already been described in the second embodiment, description thereof will not be repeated.
- FIG. 9 is a diagram showing an operation state when the differential amplifier according to the fourth embodiment is activated.
- switches S4 and S6 are turned off, and switch S5 is turned on, so that differential circuit 3OA is activated.
- this differential amplifier is also composed of a TFT, but operates stably because the constant current circuit 1A is used as the constant current source.
- the charge held in the capacitor C2 is the gate leak current of the P-type TFT element P1, the leak current of the capacitor C2 itself, or the leak current of the switch S6. Therefore, the refresh operation, that is, the voltage setting operation is performed at predetermined intervals.
- the differential amplifier is configured by a TFT, but may be configured by a bulk transistor.
- the constant current circuit that activates the differential amplifier is configured by the constant current circuit 1 A according to the second embodiment. , The operation is stable.
- FIG. 10 is a circuit diagram showing a modified example of the differential amplifier shown in FIG.
- this differential amplifier has the same configuration as the differential amplifier shown in FIG.
- a constant current circuit 1G is provided in place of the constant current circuit 1A.
- the constant current circuit 1C includes an N-type TFT element N5 instead of the resistance element R102 in the configuration of the constant current circuit 1A.
- Other configurations are the same as those of the differential amplifier shown in FIG.
- the N-type TFT element N5 forms a depletion-type transistor in which the source is connected to the gate. Therefore, as described in the modification of the third embodiment, the current Id flowing through the N-type TFT element N5 is a constant current independent of the voltages VH and VL.
- the node 14 can maintain a constant voltage level every time by the N-type TFT element N5 that can supply a constant current. , And the value of the constant current flowing to the node 20 by the constant current circuit 1 C does not vary for each voltage setting operation. As a result, the operation of the differential amplifier becomes more stable.
- Embodiment 5 shows a case where the constant current circuit according to Embodiments 1 and 2 is applied to a liquid crystal display device.
- FIG. 11 is a schematic block diagram showing an overall configuration of a color liquid crystal display device according to Embodiment 5 of the present invention.
- a color liquid crystal display device 100 includes a display unit 102, a horizontal scanning circuit 104, and a vertical scanning circuit 106.
- the display unit 102 includes a plurality of pixels 118 arranged in a matrix. Each pixel 118 has a color filter of one of the three primary colors of R (red), G (green), and B (blue). Pixels (R) and pixels (G) adjacent in the column direction are provided. And the pixel (B) constitute one display unit 120. Further, a plurality of scanning lines SL are arranged corresponding to a row of pixels 118 (hereinafter, also referred to as “line J”), and a plurality of data lines DL are arranged corresponding to columns of pixels 118.
- the horizontal scanning circuit 104 includes a shift register 108, first and second data latch circuits 110, 112, a voltage generating circuit 114, and a data line driver 116. including.
- the shift register 108 receives the clock signal CLK, and sequentially outputs a pulse signal to the data latch circuit 110 in synchronization with the clock signal CLK.
- the first data latch circuit 110 receives 6-bit pixel data DATA from the shift register 108 to select one voltage from the 64 levels of drive voltages output from the voltage generation circuit 114 described later, and receives from the shift register 108 The pixel data DATA is latched internally in synchronization with the pulse signal.
- the second data latch circuit 112 receives the latch signal LT generated when the pixel data DATA for one line is taken into the first data latch circuit 110, and receives the latch signal LT.
- the latched pixel data DATA for one line is taken in from the first data latch circuit 110 and latched.
- the voltage generating circuit 114 generates 64 levels of driving voltages V1 to V64 in order to display 64 gradations in each pixel 118.
- the data line driver 116 receives the pixel data for one line from the second data latch circuit 112 and the drive voltages V1 to V64 output from the voltage generation circuit 114, and responds to the pixel data.
- the drive voltage is selected for each pixel, and is simultaneously output to the data lines DL arranged in the column direction.
- the vertical scanning circuit 106 sequentially activates the scanning lines SL arranged in the row direction at a predetermined timing.
- the pixel data DATA is sequentially taken into the first data latch circuit 110 according to the pulse signal output from the shift register 108 in synchronization with the clock signal CLK. Then, the second data latch circuit 112 is loaded into the first data latch circuit 110 according to the latch signal LT received at the timing when the pixel data DATA for one line is captured. One line of pixel data DATA is fetched from the first data latch circuit 110 and latched, and the one line of pixel data DATA is output to the data line driver 116.
- the data line driver 116 drives each pixel from the 64-level drive voltage VI to V 64 received from the voltage generation circuit 114 based on one line of pixel data received from the second data latch circuit 112. Select the voltage to correspond to one line of pixels. Drive voltages are simultaneously output to the corresponding data lines DL. Then, when the vertical scanning circuit 106 activates the scanning line SL corresponding to the row to be scanned, the pixels 118 connected to the scanning line SL are simultaneously activated, and each pixel 118 is connected to the corresponding data line. Display is performed at a luminance according to the drive voltage applied to the DL, whereby one line of pixel data is displayed. An image is displayed on the display unit 102 by sequentially performing the above operation for each scanning line arranged in the row direction.
- FIG. 12 is a circuit diagram showing a configuration of the pixel 118 shown in FIG. In FIG. 12, the pixel 118 connected to the data line DL (R) and the scanning line SL (n) is shown, but the configuration is the same for other pixels.
- pixel 118 includes an N-type TFT element N 11, a liquid crystal display element P, and a capacitor C 11.
- the N-type TFT element N 11 is connected between the data line DL (R) and the liquid crystal display element PX, and has a gate connected to the scanning line SL (n).
- the liquid crystal display element PX has a pixel electrode connected to the N-type T element 11 and a counter electrode to which a counter electrode potential Vcom is applied.
- One of the capacitors C11 is connected to the pixel electrode, and the other is fixed to the common potential Vss.
- the brightness (reflectance) of the liquid crystal display element PX changes by changing the orientation of the liquid crystal according to the potential difference between the pixel electrode and the counter electrode.
- the brightness (reflectance) corresponding to the drive voltage applied from the data line DL (R) via the N-type TFT element N 11 can be displayed on the liquid crystal display element PX.
- the display shifts to the image display of the next scanning line SL (n + 1).
- the scanning line SL (n) is inactivated and the N-type TFT element Nl 1 is turned off, but the capacitor CI 1 holds the potential of the pixel electrode even during the OFF period of the N-type TFT element Nl 1 Therefore, the liquid crystal display element PX can maintain the luminance (reflectance) according to the pixel data.
- FIG. 13 is a circuit diagram showing a configuration of voltage generating circuit 114 shown in FIG. Referring to FIG. 13, voltage generation circuit 114 is provided corresponding to nodes ND 100 and ND 200, resistance elements R 1 to R 65, nodes ND 1 to ND 64, and —KND 1 to ND 64. And 64 buffer circuits 130 having a constant current circuit therein.
- the resistance elements R1 to R65 are connected in series by the nodes ND1 to ND64 between the nodes ND100 and ND200 to form a ladder resistance circuit. Then, the voltage between the nodes ND100 and ND200 is divided by the ladder resistance circuit, and 64-level drive voltages V1 to V64 are generated at the nodes ND1 to ND64.
- Each buffer circuit 130 has a sufficient current drive to drive the data line DL and the pixel, is connected to the corresponding node of the nodes ND1 to ND64, and outputs a voltage of the same level as the input voltage. .
- the voltage applied to the nodes ND100 and ND200 changes at a predetermined period such as every line or every frame.
- FIG. 14 is a circuit diagram showing a configuration of buffer circuit 130 shown in FIG.
- buffer circuit 130 includes first and second amplifying circuits 132 and 134 having a constant current circuit therein, resistance element R 136, node 138, and a power.
- the first amplifier circuit 132 is connected between the node NDi and the output node 140
- the second amplifier circuit 134 is connected between the node 138 and the output node 140.
- Resistance element R 136 is connected between nodes ND i and 138.
- the first and second amplifier circuits 132 and 134 constitute a push-pull amplifier. That is, the first amplifier circuit 132 charges the output node 140 with a small current driving force, and when the voltage level of the output node 140 exceeds the voltage level of the node NDi, the first amplifier circuit 132 has a sufficient current driving force. Discharges the charge from the output node 140.
- the second amplifier circuit 134 charges the output node 140 with a sufficient current driving force when the voltage level of the output node 140 falls below the voltage level of the node 138. If the first and second amplifying circuits 132 and 134 operate simultaneously, a large current flows from the second amplifying circuit 134 to the first amplifying circuit 132.
- FIG. 15 is a circuit diagram showing a configuration of the first amplifier circuit 132 shown in FIG.
- the first amplifier circuit 132 includes P-type TFT elements P101 and P102, N-type TFT elements N101 to N103, and constant current circuits 150a and 150b.
- Output node 216 is connected to output node 140 shown in FIG.
- N-type TFT element N103 is connected between output node 216 and ground node Vss, and has a gate connected to node 212.
- Vss ground node
- the voltage level of the node 212 increases, so that the current flowing through the N-type TFT element N103 increases and the output node 216 is connected to the ground node.
- the amount of charge discharged to V ss increases. Therefore, the voltage level of output node 216 decreases.
- the constant current circuit 150a includes a P-type TFT element P132a, a capacitor C132a, a switch S104a to S106a, a resistance element R132a, and nodes 202 and 204.
- the P-type TFT element P 132 a is a transistor that flows a constant current, is connected between the power supply node Vdd and the node 202, and has a gate connected to the node 204.
- Capacitor C 132 a is a voltage holding capacitor that holds the gate voltage of P-type TFT element P 132 a, and is connected between power supply node Vdd and node 204.
- Switches S104a to S106a are switched between voltage setting for setting the gate voltage of P-type TFT element P1 32a and current driving, and switch S104a is connected to node 202 and resistance element R1.
- Switch S 105a is connected between node 210 and node 202 to which the differential circuit is connected, and switch S 1 06a is connected between nodes 202 and 204.
- Resistive element R 1 32a is provided to allow a predetermined current to flow to node 202 when setting a voltage, and is connected between switch S 104a and ground node V ss.
- the constant current circuit 150a has the same configuration as the constant current circuit 1A described in the second embodiment. Therefore, even if the transistor that passes a constant current is composed of the P-type TFT element P 132a, a constant current can be passed through the differential circuit without being affected by the variation in the threshold voltage. The operating circuit does not malfunction.
- the constant current circuit 15 Ob includes a P-type TFT element P 132 b, a capacitor CI 32 b, switches S 104 b to S 106 b, a resistance element R 132 b, and nodes 206 and 208. . Since the configuration of constant current circuit 150b is the same as that of constant current circuit 150a, description thereof will not be repeated.
- Constant current circuit 150b is provided to increase the voltage level of output node 216 to the voltage level of node NDi. That is, when the voltage level of output node 216 becomes higher than the voltage level of node NDi, N-type TFT element N103 is activated, and the voltage level of output node 216 decreases. When the voltage level of the output node 216 becomes lower than the voltage level of the node 138 shown in FIG. 14, the P-type TFT element included in the second amplifier circuit 134 described later in FIG. As a result, the voltage level of output node 216 rises.
- the input voltage of the second amplifier circuit 134 is controlled by the resistor R 136 so that the voltage of the node NDi is not changed so that the first and second amplifier circuits 132 and 134 do not operate simultaneously. Since it is below the level, the voltage level at output node 216 will only rise to the voltage level at node 138. Therefore, a constant current circuit 150b is provided to raise the voltage level of output node 216 to the voltage level of node NDi.
- the constant current circuit provided to increase the voltage level of the output node 216 to the voltage level of the node NDi malfunctions, that is, if it does not operate, the voltage level of the output node 216 becomes higher than the voltage level of the node NDi. It will have an offset. That is, the driving voltage applied to the pixel has an offset. You. Therefore, it is important to stabilize the operation of the constant current circuit.
- the provision of the above-described constant current circuit 150b allows the operation of the constant current circuit to be stabilized. Has been planned.
- FIG. 16 is a circuit diagram showing a configuration of the second amplifier circuit 134 shown in FIG.
- the second amplifier circuit 134 includes P-type TFT elements P 11 1 to P 113, N-type TFT elements N 11 1 and N 11 12, a constant current circuit 152, It comprises a power supply node V dd, a ground node V ss, nodes 230 to 235, and an output quad 236.
- Output node 236 is connected to output node 140 shown in FIG.
- the P-type TFT elements P11, P112 and the N-type TFT elements N11, Ni12 constitute a differential circuit.
- the P-type TFT element P 113 is connected between the power supply node Vdd and the output node 236, and the gate is connected to the node 232.
- the voltage level of the output node 236 is lower than the voltage level of the node 138, the voltage level of the node 232 decreases, so that the current flowing through the P-type TFT element P113 increases and the output from the power supply node V dd
- the amount of charge supplied to the node 236 increases. Therefore, the voltage level of output node 236 rises.
- the constant current circuit 152 includes an N-type TFT element N134, a capacitor C134, switches S101 to S103, a resistance element R134, and nodes 222 and 224.
- the N-type TFT element N 134 is a transistor that flows a constant current, is connected between the node 222 and the ground node Vss, and has a gate connected to the node 224.
- Capacitor C134 is a voltage holding capacitor that holds the gate voltage of N-type TFT element N134, and is connected between node 224 and ground node Vss.
- Switches S101 to S103 are switched between voltage setting for setting the gate voltage of N-type TFT element N134 and current driving, and switch S101 is connected between resistance element R134 and node 222.
- the switch S102 is connected between the node 230 and the node 222 to which the differential circuit is connected, and the switch S103 is connected between the node 222 and the node 224.
- the resistor R134 is provided to allow a predetermined current to flow to the node 222 when setting the voltage, and is connected to the power supply node Vdd and the switch. H is connected between S 101.
- the constant current circuit 152 has the same configuration as the constant current circuit 1 described in the first embodiment. Therefore, even if the transistor that allows a constant current to be formed is an N-type TFT element N1 34, a constant current can be passed through the differential circuit without being affected by variations in the threshold voltage. The differential circuit does not malfunction.
- the resistance element R 1 Although 3 2 a, R 1 3 2 b, and R 1 3 4 are used, as described in Embodiment 3, the resistance elements R 1 3 2 a, R 1 3 2 b, and R l 3 4 are used.
- a depletion type N-type TFT element may be used.
- the operations of the first and second amplifying circuits 132, 134 that is, the operations of the voltage generating circuit 114 including them, are more stable. I do.
- the gradation display in each pixel is at 64 levels, but the gradation display is not limited to 64 levels, and may be more or less.
- the number of bits of pixel data DATA and the number of resistive elements and buffer circuits in the voltage generation circuit 114 vary depending on the number of levels of gradation display.
- the overall configuration is essentially different from the configuration described above. However, the configuration in the case where the number of levels of gradation display is different is omitted because it is the same as that described above.
- the constant current circuit constituted by the TFT is used. Since the operation of the TFT is stabilized, it is possible to prevent a malfunction of the voltage generating circuit due to the variation of the threshold voltage of the TFT.
- Embodiment 6 shows a case where the constant current circuit according to Embodiments 1 and 2 is applied to an EL display device.
- an EL display device by changing the voltage applied to the pixel, the current supplied to the organic light emitting diode, which is a current-driven light emitting element provided for each pixel, is changed to display the organic light emitting diode. Change the brightness. Then, a plurality of voltage levels corresponding to a plurality of levels of display luminance in each pixel are generated.
- the configuration of the peripheral circuit including the voltage generating circuit can be the same as that of the liquid crystal display device.
- the EL display device 100A according to the sixth embodiment has the same configuration as the liquid crystal display device 100 according to the fifth embodiment except for the pixels. Therefore, description of the configuration other than the pixels of EL display device 100A will not be repeated.
- FIG. 17 is a circuit diagram showing a configuration of pixel 118 A of EL display device 10 OA according to the sixth embodiment. Although FIG. 17 shows the pixel 118A connected to the data line DL (R) and the scanning line SL (n), the configuration is the same for the other pixels.
- pixel 118A includes an N-type TFT element N21, a P-type TFT element P21, an organic light emitting diode OLED, a capacitor C21, and a node 250.
- the N-type TFT element N21 is connected between the data line DL (R) and the node 250, and has a gate connected to the scanning line SL (n).
- the P-type TFT element P21 is connected between the power supply node Vdd and the organic light emitting diode OLED, and the gate is connected to the node 250.
- the organic light emitting diode OLED is connected between the P-type TFT element P21 and the common electrode Vss.
- Capacitor C21 is connected between node 250 and common electrode Vss.
- the organic light-emitting diode OLED is a current-driven light-emitting element, and its display luminance changes according to the supplied current.
- the power source of the organic light-emitting diode O LED is connected to the common electrode V ss in a “power source common configuration”.
- a ground voltage or a predetermined negative voltage is applied to the common electrode Vss.
- the amount of current supplied to the organic light-emitting diode O LED is changed according to the level of the driving voltage applied from the data line DL (R) through the N-type TFT element N21. 21 changes. Therefore, the display brightness of the organic light emitting diode OLED changes according to the level of the driving voltage applied from the data line DL (R).
- the scanning line SL (n) is activated, a driving voltage is applied from the data line DL (R) to the gate of the P-type TFT element P21, and a driving current is supplied to the organic light emitting diode O LED. Scanning to shift to the image display of the scanning line SL (n + 1) The scanning line SL (n) is inactivated and the N-type TFT element N21 is turned off.However, even during the OFF period of the N-type TFT element N21, since the capacitor C21 holds the potential of the node 250, organic light emission is performed.
- the diode OLE D can maintain the luminance according to the pixel data.
- the constant current circuits 150a and 150b in the first amplification circuit 132 and the constant current circuits in the second amplification circuit 134 A depletion type N-type TFT element or a P-type TFT element having a gate connected to the source may be used in place of the resistance elements R 132a, R 132b, and R 134 used in 152.
- the operations of the first and second amplifier circuits 132 and 134 that is, the operations of the voltage generation circuit 114 including them, are further stabilized.
- the gradation display in each pixel is 64 levels, but the gradation display is not limited to 64 levels, and may be more or less. This is the same as the liquid crystal display device 100 according to the fifth embodiment.
- the EL display device 10 OA when the voltage generating circuit is integrally formed on the same glass substrate together with the image display unit, the operation of the constant current circuit constituted by the TFT is performed. Is stabilized, it is possible to prevent the voltage generating circuit from malfunctioning due to variation in the threshold voltage of the TFT.
- the constant current circuit according to the first embodiment is also applied to an analog amplifier that outputs a display voltage corresponding to a selected gradation voltage to the data line DL. Is done.
- FIG. 18 is a schematic block diagram showing an overall configuration of a color liquid crystal display device according to Embodiment 7 of the present invention.
- a color liquid crystal display device 100B has a horizontal scanning circuit 104A in place of the horizontal scanning circuit 104 in the configuration of the color liquid crystal display device 100 according to the fifth embodiment shown in FIG. Prepare.
- the horizontal scanning circuit 104A includes a data line driver 116A in place of the data line driver 116 shown in FIG.
- the driver 1 16 A includes a decoding circuit 122 and an analog amplifier 124.
- the decode circuit 122 receives one line of pixel data output from the second data latch circuit 112 and the gradation voltages V1 to V64 output from the voltage generation circuit 114, and responds to the pixel data. To select a gradation voltage for each pixel. Then, the decoding circuit 122 outputs the selected gradation voltages for one line to the analog amplifier 124 at the same time.
- the analog amplifier 124 receives the grayscale voltage for one line output from the decode circuit 122 with high impedance, and outputs the same display voltage as the received grayscale voltage to the corresponding data line DL with low impedance. I do.
- color liquid crystal display device 100B are the same as those of color liquid crystal display device 100 shown in FIG. 11, and therefore, description thereof will not be repeated.
- FIG. 19 is a circuit diagram showing a configuration of analog amplifier 124 shown in FIG.
- an analog amplifier that receives a gray scale voltage selected by the decode circuit 122 and outputs a corresponding display voltage is provided for each data line DL.
- the j-th (j is a natural number)
- the analog amplifier 1 24.j corresponding to the data line DL is shown, and the analog amplifiers corresponding to the other data lines DL have the same circuit configuration.
- analog amplifier 124.j includes N-type TFT element N200, constant current circuit 300, switches S200 to S206, capacitors C200, C2Q2, and power supply voltage VH2, It comprises power supply nodes 380, 382 to which VL2 is applied, respectively, and nodes 350-360. Node 360 is connected to a corresponding data line DL (not shown).
- N-type TFT element N200 is connected between power supply node 380 and node 356, and the gate is connected to node 352.
- a power supply voltage VH 2 of, for example, 10 V is applied to power supply node 380.
- the constant current circuit 300 is connected to the node 356 to which the source of the N-type TFT element N200 is connected.
- the N-type TFT element N200 receives the voltage corresponding to the input voltage V inj at a high impedance at the gate, and outputs the voltage. Performs a source follower operation that outputs voltage V outj to node 360 with low impedance.
- the constant current circuit 300 includes an N-type TFT element N202, a capacitor C204, switches S208 to S212, a resistance element R200, a power supply node 384, and nodes 36 to 366.
- Consists of The N-type TFT element N202 is a transistor that flows a constant current, is connected between the node 364 and the power supply node 382, and has a gate connected to the node 366.
- Capacitor C 204 is a voltage holding capacitor that holds the gate voltage of N-type TFT element N 202, and is connected between node 366 and power supply node 382. For example, a power supply voltage VH2 of 10 V and a power supply voltage VL2 of 0 V are applied to power supply nodes 384 and 382, respectively.
- Switches S208 to S212 switch between the voltage setting for setting the gate voltage of N-type TFT element N202 and the current driving.
- Switch S208 is connected between the resistive element R200 and node 362
- switch S210 is connected between node 356 and node 364
- switch S212 is connected Connected between nodes 362 and 366.
- Resistance element R200 is provided to allow a predetermined current to flow through N-type TFT element N202 when setting a voltage, and is connected between power supply node 380 and switch S208.
- the constant current circuit 300 has the same configuration as the constant current circuit 1 described in the first embodiment. Therefore, even if the transistor that conducts a constant current is composed of the N-type TFT element N202, the N-type TFT element N200, which is a driver transistor, is not affected by the variation in the threshold voltage. Since this current can flow, this analog amplifier 1 24.j does not malfunction.
- Switches S 200 to S 204 and capacitor C 200 constitute an offset compensation circuit that compensates for an offset between input voltage Vinj and output voltage Voutj generated by threshold voltage Vthn in N-type TFT element N200.
- Switch S 200 is connected between input node 350 receiving input voltage V inj and node 35 2.
- Switch S 202 is connected between nodes 354 and 358.
- Switch S204 is connected between input node 350 and node 354.
- this offset compensation circuit will be described.
- the switches S200, S202, and S204 are turned ON, ON, and OFF, respectively.
- the gate voltage of N-type TFT element N 200 becomes input voltage V inj
- the potentials of nodes 356 and 358 become V inj ⁇ V thn. Therefore, capacitor C 200 is charged to the potential difference V thn between input potential V inj and the potential at node 358.
- the 04 is turned OFF, OFF, and ON, respectively. Then, the potential of the node 354 becomes V inj, and accordingly, the potential of the node 352, that is, the gate potential of the N-type TFT element N 200 becomes V inj + Vthn. Therefore, the potential of the nodes 356 and 358 becomes V inj. That is, the output voltage Voutj becomes the input voltage Vinj, and the offset voltage is canceled.
- the use of the constant current circuit 300 allows the offset compensation circuit to operate stably and with high accuracy. That is, since the constant current circuit 300 can stably supply a constant current without malfunction, the capacitor C 200 in the offset compensation circuit corresponds to the threshold voltage V thn that generates an offset. Is charged stably and with high precision. Therefore, the gate voltage of the N-type TFT element N200 in the operation mode is stabilized and increased in accuracy, and as a result, a high-accuracy output voltage Voutj having no offset is output.
- the capacitor C 202 represents the capacitance of the node 360 to which the data line DL is connected, and the switch S 206 connects the capacitor C 200 to the node C 200 in the setting mode so that the charging of the capacitor C 200 is terminated early. It is provided to separate from 360. When the capacity of the capacitor C 202 is small, the switch S 206 need not be provided.
- analog amplifier 124 since analog amplifier 124 includes constant current circuit 300, malfunction of analog amplifier 124 due to variation in TFT threshold voltage can be prevented. . Further, since the analog amplifier 124 includes an offset compensation circuit that operates together with the constant current circuit 300, the analog amplifier 124 can output a display voltage with no offset with respect to the gradation voltage received from the decode circuit 122 and with high accuracy. Can be. Therefore, even if the peripheral circuit including the analog amplifier 124 is integrally formed on the same glass substrate together with the image display unit, the color liquid crystal display device 100B operates stably and with high accuracy.
- the color liquid crystal display device includes an analog amplifier 124A instead of analog amplifier 124 in the configuration of color liquid crystal display device 100B according to the seventh embodiment.
- FIG. 20 is a circuit diagram showing a configuration of analog amplifier 124A according to the eighth embodiment.
- the analog amplifier is provided for each data line D ladder
- FIG. 20 shows an analog amplifier 124 A.j corresponding to the j-th data line DL
- Analog amplifiers corresponding to other data lines DL also have the same circuit configuration.
- analog amplifier 124 A.j includes constant current circuit 30 OA instead of constant current circuit 300 in the configuration of analog amplifier 124.j in the seventh embodiment shown in FIG. .
- the constant current circuit 300 A includes an N-type TFT element N202 to N210, a capacitor C204, a switch S208 to S212, a resistance element R202 to R206, a power supply node 384, and a node 362 to 372. Become. A power supply potential VH 2 is applied to the power supply node 384.
- N-type TFT element N204 is connected between power supply node 384 and switch S208, and the gate is connected to node 372.
- N-type TFT elements N206, N208, and N210 are connected in series between resistance element R202 and power supply node 382.
- Each of the N-type TFT elements N206, N208, and N210 forms an enhancement-type transistor in which the gate is connected to the drain.
- the resistive elements R 204 and R 206 are connected in series between the node 368 and the node 370, and determine the voltage between the drain and the source of the N-type TFT element N 206 based on the resistance ratio of the resistive elements R 204 and R 206. Divide pressure.
- the gate of the N-type TFT element N204 is connected to a node 372 connecting the resistors R204 and R206.
- the other circuits have already been described with reference to FIG. 19, and thus description thereof will not be repeated.
- the threshold voltage V thn is assumed to have no variation between the N-type TFT elements N 202 to N 210, and the variation of the threshold voltage in the following is the variation with respect to the design value. Represents.
- the threshold voltage of the N-type TFT elements N 202 to N 210 constituting this constant current circuit 300 A is V thn
- the resistance values of the resistance elements R 204 and R 206 are R 1 and R 2, respectively
- the power supply voltage VL 2 Is the ground level (OV)
- the potential of the node 372, that is, the gate potential of the N-type TFT element N204 is as follows.
- Vg 2 XV t hn + Vt h nXR l / (R 1 + R2) (3)
- the resistance values Rl and R2 are set to values sufficiently larger than the ON resistance of the N-type TFT element N206.
- the gate voltage of the N-type TFT element N204 depends on the threshold voltage Vthn. Therefore, even if the threshold voltage V thn varies in the N-type TFT element N 204, the gate voltage V g also varies with the variation, so that the N-type TFT element due to the variation in the threshold voltage V thn The stable operation margin of N204 is improved.
- the gate voltage Vg can be adjusted by adjusting the resistance values Rl and R2. Therefore, the amount of current flowing through the N-type TFT element N204, that is, the amount of current flowing through the constant current circuit 30OA can be adjusted by the resistance values! ⁇ 1 and R2 of the resistance elements R204 and 206.
- the operations of the constant current circuit and the analog amplifier including the same are further stabilized, and the operation stability of the liquid crystal display device is further improved.
- the amount of current flowing through the constant current circuit 30 OA can be adjusted. Power can also be reduced.
- the analog amplifiers 124 and 124A in the seventh and eighth embodiments are push-type in which an N-type TFT element N200 as a driver transistor is connected between a power supply node 380 and an output node.
- N200 N-type TFT element
- the pull type key A analog amplifier is shown.
- the color liquid crystal display device according to the ninth embodiment includes an analog amplifier 124B instead of the analog amplifier 124 in the configuration of the color liquid crystal display device 10OB according to the seventh embodiment.
- FIG. 21 is a circuit diagram showing a configuration of analog amplifier 124B according to the ninth embodiment.
- the analog amplifier is provided for each data line D ladder, and FIG. 21 shows an analog amplifier 124 B.j corresponding to the j-th data line DL.
- Analog amplifiers corresponding to other data lines DL also have the same circuit configuration.
- analog amplifier 1 24 B.j includes a P-type TFT element P 200, a constant current circuit 302, switches S 220 to S 226, capacitors C 220 C 222, and power supply nodes 380 and 382. And nodes 400 to 410. Node 410 is connected to a corresponding data line DL (not shown).
- P-type TFT element P 200 is connected between node 406 and power supply node 382, and has a gate connected to node 402.
- Power supply node 382 is applied with power supply voltage VL2 of, for example, a ground potential (0V).
- a constant current circuit 302 is connected to the node 406 to which the source of the P-type TFT element P 200 is connected.
- the P-type TFT element P 200 receives a voltage corresponding to the input voltage V inj at a gate with high impedance. Performs a source follower operation to output the output voltage Voutj to the node 410 with low impedance.
- the constant current circuit 302 includes a P-type TFT element P202, a capacitor C224, switches S228 to S232, a resistance element R220, a power supply node 386, and nodes 4i2 to 416.
- the P-type TFT element P 202 is a transistor that flows a constant current, is connected between the power supply nodes 380 and 414, and has a gate connected to the node 416.
- Capacitor C 224 is a voltage holding capacitor that holds the gate voltage of P-type TFT element P 202, and is connected between power supply node 380 and node 416.
- Switches S 228 to S 232 are switched between at the time of voltage setting for setting the gate voltage of P-type TFT element P 202 and at the time of current driving.
- Switch S 228 is connected to node 41 2
- Switch S 230 is connected between node 414 and node 406, and switch S 232 is connected between node 416 and node 4 12 .
- Resistive element R220 is provided to allow a predetermined current to flow through P-type TFT element P202 when setting a voltage, and is connected between switch S228 and power supply node 386.
- the constant current circuit 302 has the same configuration as the constant current circuit 1A described in the second embodiment. Therefore, even if a transistor that flows a constant current is composed of the P-type TFT element P202, a constant current flows through the P-type TFT element P200, which is the driver transistor, without being affected by variations in the threshold voltage.
- the analog amplifier 124 B.j does not malfunction.
- the switches S220 to S224 and the capacitor C220 constitute an offset compensating circuit for compensating for an offset between the input voltage Vinj and the output voltage Voutj generated by the threshold voltage Vth in the P-type TFT element P200.
- Switch S220 is connected between input node 400 and node 402, which receive input voltage Vinj.
- Switch S 222 is connected between nodes 408 and 404.
- Switch S 224 is connected between input node 400 and node 404.
- the switches S220, S222, and S224 are turned ON, ON, and OFF, respectively. Then, the gate voltage of P-type TFT element P 200 becomes input voltage V inj, and the potentials of nodes 406 and 408 become V inj + IV tp
- the setting mode ends, and switches S220, S222, and S224 are turned OFF, OFF, and ON, respectively.
- the potential of the node 404 becomes V inj
- the potential of the node 402 that is, the gate potential of the P-type TFT element P 200 becomes V inj —IV thp
- the use of the constant current circuit 302 allows the offset compensation circuit to operate stably and with high accuracy.
- the capacitor C 220 in the offset compensation circuit has a threshold voltage V th at which an offset is generated.
- the corresponding charge is charged stably and with high precision. Therefore, the gate voltage of the P-type TFT element P200 in the operation mode is stabilized and increased in accuracy, and as a result, a highly accurate output voltage Vo utj without offset is output.
- the capacitor C 222 represents the capacitance of the node 410 to which the data line DL is connected, and the switch S 226 connects the capacitor C 220 to the node so that the charging of the capacitor C 220 ends early in the setting mode. It is provided to separate from 410. When the capacitance of the capacitor C 222 is small, the switch S 226 may not be provided.
- the liquid crystal display device according to the ninth embodiment including the pull-type analog amplifier 124B can also provide the same effects as in the seventh embodiment.
- the color liquid crystal display device includes an analog amplifier 124C instead of analog amplifier 124 in the configuration of color liquid crystal display device 100B according to the seventh embodiment.
- FIG. 22 is a circuit diagram showing a configuration of analog amplifier 124C according to the tenth embodiment.
- an analog amplifier is provided for each data line DL.
- an analog amplifier 124C, j corresponding to the j-th data line DL is shown.
- the analog amplifier corresponding to the data line DL has the same circuit configuration.
- analog amplifier 124 C.j includes a constant current circuit 302 A instead of constant current circuit 302 in the configuration of analog amplifier 124 B. j in the ninth embodiment shown in FIG. .
- the constant current circuit 302A includes a P-type TFT element P202 to P210, a capacitor C224, a switch S228 to S232, a resistance element R222 to R226, a power supply node 386, and nodes 412 to 422. Power, ran. Power supply node 386 is supplied with power supply potential VL2.
- P-type TFT element P 204 is connected between switch S 228 and power supply node 386, and has a gate connected to node 422.
- P-type TFT elements P 206, P 208, and P 210 are connected in series between power supply node 380 and resistance element R 222.
- Each of the P-type TFT elements P 206, P 208, and P 210 forms an enhancement-type transistor having a gate connected to a drain.
- the resistance elements R 224 and R 226 are connected in series between the node 418 and the node 420, and determine the voltage between the source and the drain of the P-type TFT element P 206 based on the resistance ratio of the resistance elements R 2 24 and R 226. And partial pressure.
- the gate of the P-type TFT element P 204 is connected to a node 422 connecting the resistors R 224 and R 226.
- the threshold voltage V thp is assumed to have no variation between the P-type TFT elements P 202 to P 210, and the variation of the threshold voltage in the following is the variation with respect to the design value. It represents.
- the threshold voltage of the P-type TFT elements P 202 to P 210 constituting the constant current circuit 302 A is V thp
- the resistance values of the resistance elements R 224 and R 226 are R 3 and R 4, respectively
- the node 422 That is, the gate potential of the P-type TFT element P204 is as follows.
- V g VH2-2 X I V t h p I-I V t h p
- the resistance values R3 and R4 are set to values sufficiently larger than the ON resistance of the P-type TFT element P206.
- the gate voltage of the P-type TFT element P 204 depends on the threshold voltage V thp. Therefore, even if the threshold voltage V thp varies in the P-type TFT element P 204, the gate voltage V g also varies with the variation, so that the P-type TFT element P 204 due to the variation in the threshold voltage V thp The stable operation margin of 204 is improved.
- the gate voltage Vg can be adjusted. Therefore, the amount of current flowing through the P-type TFT element P 204, that is, the amount of current flowing through the constant current circuit 302 A can be adjusted by the values of the resistance values 3 and R 4 of the resistance elements R 2 24 and 1 226.
- the liquid crystal display device including the pull-type analog amplifier 124C can achieve the same effect as that of the eighth embodiment.
- the color liquid crystal display device includes an analog amplifier 124D instead of analog amplifier 124 in the configuration of color liquid crystal display device 100B according to the seventh embodiment.
- FIG. 23 is a circuit diagram showing a configuration of analog amplifier 124D in the eleventh embodiment.
- an analog amplifier is provided for each data line DL
- an analog amplifier 124D.j corresponding to the j-th data line DL is shown.
- the analog amplifier corresponding to the data line DL has the same circuit configuration.
- analog amplifier 124D.j is connected between the gate electrode of N-type TFT element N200 and node 352 in the configuration of analog amplifier 124.j according to the seventh embodiment shown in FIG. It further includes a level shift circuit 500 provided.
- the level shift circuit 500 includes a P-type TFT element P250, a constant current circuit 302, and power supply nodes 388 and 390 to which power supply voltages VH1 and VL1 are applied, respectively.
- P-type TFT element P 250 is connected between node 374 and power supply node 390, and has a gate connected to node 352.
- the constant current circuit 302 is the constant current circuit shown in FIG. 21, and is connected between the power supply node 388 and the node 374.
- Node 374 is connected to the gate of N-type TFT element N200.
- the P-type TFT element P250 performs a source follower operation. The rest of the configuration is as described in FIG.
- the level shift circuit 50 0 outputs a potential obtained by shifting the potential input to the level shift circuit 500 by IV thp I.
- the gate voltage of the P-type TFT element P250 becomes the input voltage Vinj, and the potential of the node 374 Is V inj +
- the setting mode ends, and switches S200, S202, and S204 are turned OFF, OFF, and ON, respectively.
- the potential of the node 354 becomes V inj
- the potential of the node 352 that is, the gate potential of the P-type TFT element P250 becomes V inj + V thn —
- the reason for providing such a level shift circuit 500 is that, according to the analog amplifier 124.j in the seventh embodiment shown in FIG. 19, even if the offset compensation circuit is provided, the parasitic capacitance of the node 352 is not Although there is a possibility that a non-negligible offset error may occur depending on the size, the magnitude of the threshold voltage of the P-type TFT element P 250 included in the level shift circuit 500 is determined by the If the voltage can be designed to be close to the voltage, the offset voltage itself caused by the threshold voltage can be reduced.
- the color liquid crystal display device includes an analog amplifier 124E instead of analog amplifier 124 in the configuration of color liquid crystal display device 100B according to the seventh embodiment.
- FIG. 24 is a circuit diagram showing a configuration of an analog amplifier 124E according to the twelfth embodiment.
- an analog amplifier is provided for each data line DL
- FIG. 24 shows an analog amplifier 124E.j corresponding to the j-th data line DL, and other data
- the analog amplifier corresponding to line DL has the same circuit configuration.
- analog amplifier 124E.j includes a constant current circuit 30OA shown in FIG. 20 instead of constant current circuit 300 in the configuration of analog amplifier 124D.j shown in FIG.
- a level shift circuit 500A is included in place of the level shift circuit 500.
- the level shift circuit 50OA includes a constant current circuit 302A shown in FIG. 22 instead of the constant current circuit 302 in the configuration of the level shift circuit 500.
- analog amplifier 124E.j Other configurations of analog amplifier 124E.j are the same as those of analog amplifier 124D.j in the eleventh embodiment.
- the same effects as in the seventh embodiment can be obtained, and the operation of the analog amplifier is further stabilized by the constant current circuits 30OA and 302A.
- the operation stability of the liquid crystal display device is further improved.
- the color liquid crystal display device includes an analog amplifier 124F instead of analog amplifier 124 in the configuration of color liquid crystal display device 100B according to the seventh embodiment.
- FIG. 25 is a circuit diagram showing a configuration of analog amplifier 124F according to the thirteenth embodiment.
- the analog amplifier is provided for each data line DL, and in FIG. 25, an analog amplifier 124F.j corresponding to the j-th data line DL is shown.
- the analog amplifier corresponding to the data line DL has the same circuit configuration.
- analog amplifier 124F.j has the same structure as analog amplifier 124B.j according to the ninth embodiment shown in FIG. And a level shift circuit 502 provided between them.
- the level shift circuit 502 includes an N-type TFT element N250, a constant current circuit 300, and power supply nodes 388 and 3 to which the power supply voltages VH1 and VL1 are applied, respectively. It consists of 90.
- N-type TFT element N 250 is connected between power supply node 388 and node 424, and the gate is connected to node 402.
- the constant current circuit 300 is the constant current circuit shown in FIG. 19, and is connected between the node 424 and the power supply node 390.
- the node 424 is connected to the gate of the P-type TFT element P200.
- the N-type TFT element N250 performs a source follower operation. The other configuration is as already described with reference to FIG.
- the level shift circuit 502 outputs a potential obtained by shifting the potential input to the level shift circuit 502 by one Vthn.
- the gate voltage of the N-type TFT element N250 becomes the input voltage Vinj, and the potential of the node 424 Is V inj-V thn, and the potentials of the nodes 406 and 408 are V inj-V th n +
- the setting mode ends, and switches S200, S202, and S204 are turned OFF, OFF, and ON, respectively.
- the potential of the node 404 becomes V inj
- the potential of the node 402 that is, the gate potential of the N-type TFT element N250 becomes V inj + V thn — j V t hp
- the color liquid crystal display device includes the analog amplifier 124 G in place of the analog amplifier 124 in the structure of the color liquid crystal display device 1 O OB according to the embodiment 7.
- FIG. 26 is a circuit diagram showing a configuration of analog amplifier 124 G according to Embodiment 14.
- an analog amplifier is provided for each data line DL
- FIG. 26 shows an analog amplifier 124 G.j corresponding to the j-th data line DL.
- the analog amplifiers corresponding to the other data lines DL also have the same circuit configuration.
- analog amplifier 124 G.j has a configuration similar to that of analog amplifier 122 F.j shown in FIG. 25 in place of constant current circuit 302 in FIG. It includes the constant current circuit 302 A shown, and includes a level shift circuit 502 A in place of the level shift circuit 502.
- the level shift circuit 500 A is a constant current circuit 300 A shown in FIG. 20 instead of the constant current circuit 300 in the configuration of the level / shift circuit 502.
- analog amplifier 124 G.j is the same as the configuration of analog amplifier 124 F.j in the thirteenth embodiment.
- Embodiments 7 to 14 described above a case has been described in which the constant current circuits according to Embodiments 1 and 2 are applied to an analog amplifier in a liquid crystal display device. Embodiments corresponding to Embodiment 5 are described. Similarly to Embodiment 6, the analog amplifier described in Embodiments 7 to 14 can be applied to the EL display device described in Embodiment 6.
- the embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive.
- the scope of the present invention is defined by the terms of the claims, rather than the description of the embodiments, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims. You. Industrial applicability
- the constant current circuit according to the present invention includes a voltage holding circuit that holds a voltage set based on a threshold voltage of a driving transistor through which a current flows, and the driving transistor uses a voltage held by the voltage holding circuit as a good Since the current flows when the threshold voltage of the drive transistor varies due to manufacturing, the influence is eliminated and the operation of the constant current circuit is stabilized.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Nonlinear Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electromagnetism (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of El Displays (AREA)
- Amplifiers (AREA)
- Electronic Switches (AREA)
- Control Of Electrical Variables (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/498,047 US7317441B2 (en) | 2002-10-09 | 2003-07-11 | Constant current circuit, drive circuit and image display device |
JP2004542806A JP4201765B2 (ja) | 2002-10-09 | 2003-07-11 | 画像表示素子のデータ線駆動回路および画像表示装置 |
KR1020047008878A KR100616338B1 (ko) | 2002-10-09 | 2003-07-11 | 구동회로 및 화상표시장치 |
DE10392172.9T DE10392172B4 (de) | 2002-10-09 | 2003-07-11 | Konstantstromschaltung, Treiberschaltung und Bildanzeigevorrichtung |
TW092122068A TWI240237B (en) | 2002-10-09 | 2003-08-12 | Constant current circuit, driving circuit and image display device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP0210502 | 2002-10-09 | ||
JPPCT/JP02/10502 | 2002-10-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004034369A1 true WO2004034369A1 (ja) | 2004-04-22 |
Family
ID=32089043
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2003/008870 WO2004034369A1 (ja) | 2002-10-09 | 2003-07-11 | 定電流回路、駆動回路および画像表示装置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7317441B2 (ja) |
JP (1) | JP4201765B2 (ja) |
KR (1) | KR100616338B1 (ja) |
CN (1) | CN100472596C (ja) |
DE (1) | DE10392172B4 (ja) |
TW (1) | TWI240237B (ja) |
WO (1) | WO2004034369A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005010683A (ja) * | 2003-06-20 | 2005-01-13 | Sanyo Electric Co Ltd | 表示装置 |
JP2005010684A (ja) * | 2003-06-20 | 2005-01-13 | Sanyo Electric Co Ltd | 表示装置 |
JP2006071992A (ja) * | 2004-09-02 | 2006-03-16 | Sony Corp | 信号出力装置及び映像表示装置 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1577870B1 (en) | 2002-12-27 | 2010-09-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and display device using the same |
KR100515300B1 (ko) * | 2003-10-07 | 2005-09-15 | 삼성에스디아이 주식회사 | 전류 샘플/홀드 회로와 전류 샘플/홀드 방법 및 이를이용한 역다중화 장치와 디스플레이 장치 |
JP2005311591A (ja) * | 2004-04-20 | 2005-11-04 | Matsushita Electric Ind Co Ltd | 電流駆動装置 |
JP2007078797A (ja) * | 2005-09-12 | 2007-03-29 | Koninkl Philips Electronics Nv | 液晶表示装置 |
KR101196711B1 (ko) * | 2006-06-05 | 2012-11-07 | 삼성디스플레이 주식회사 | 레벨 쉬프트 회로 및 이를 탑재한 표시장치 |
US7709893B2 (en) * | 2007-01-31 | 2010-05-04 | Infineon Technologies Ag | Circuit layout for different performance and method |
US8402096B2 (en) | 2008-06-24 | 2013-03-19 | Microsoft Corporation | Automatic conversation techniques |
WO2011071573A2 (en) * | 2009-09-02 | 2011-06-16 | Arizona Board Of Regents, For And On Behalf Of Arizona State University | Amplifiers with depletion and enhancement mode thin film transistors and related methods |
EP2716065A1 (en) * | 2011-05-30 | 2014-04-09 | Sony Mobile Communications AB | Reducing a disturbance on a signal path of a semiconductor switch |
KR102334014B1 (ko) * | 2017-06-30 | 2021-12-01 | 엘지디스플레이 주식회사 | 유기발광 표시장치 |
US11012079B1 (en) * | 2019-12-19 | 2021-05-18 | Bae Systems Information And Electronic Systems Integration Inc. | Continuous tuning of digitally switched voltage-controlled oscillator frequency bands |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62122488U (ja) * | 1986-01-28 | 1987-08-04 | ||
JPH10254412A (ja) * | 1997-03-14 | 1998-09-25 | Fujitsu Ltd | サンプリングホールド回路 |
JPH1173165A (ja) * | 1997-08-29 | 1999-03-16 | Sony Corp | ソースフォロワ回路およびこれを用いた液晶表示装置の出力回路 |
WO2000041028A1 (fr) * | 1999-01-08 | 2000-07-13 | Seiko Epson Corporation | Dispositif d'affichage a cristaux liquides, dispositif electronique et alimentation servant a faire fonctionner ledit dispositif d'affichage a cristaux liquides |
JP2002175035A (ja) * | 2000-12-07 | 2002-06-21 | Sony Corp | 表示装置用タイミング発生回路、アクティブマトリクス型表示装置および携帯端末 |
JP2002228427A (ja) * | 2001-02-02 | 2002-08-14 | Fukui Prefecture | ダイヤモンド研磨角度検査装置 |
Family Cites Families (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60252924A (ja) | 1984-09-28 | 1985-12-13 | Hitachi Ltd | 定電流回路 |
JPS62122488A (ja) | 1985-11-22 | 1987-06-03 | Toshiba Corp | X線撮影装置 |
JP2800523B2 (ja) | 1992-01-14 | 1998-09-21 | 日本電気株式会社 | 定電流回路 |
JPH06214665A (ja) | 1993-01-20 | 1994-08-05 | Hitachi Ltd | 定電流回路と液晶駆動回路 |
US5548241A (en) * | 1994-12-20 | 1996-08-20 | Sgs-Thomson Microelectronics, Inc. | Voltage reference circuit using an offset compensating current source |
JP3417514B2 (ja) | 1996-04-09 | 2003-06-16 | 株式会社日立製作所 | 液晶表示装置 |
JPH10173456A (ja) * | 1996-12-11 | 1998-06-26 | Fujitsu Ltd | 信号増幅回路 |
US5808501A (en) | 1997-03-13 | 1998-09-15 | Burr-Brown Corporation | Voltage level shifter and method |
US6229506B1 (en) * | 1997-04-23 | 2001-05-08 | Sarnoff Corporation | Active matrix light emitting diode pixel structure and concomitant method |
WO1998057375A1 (fr) * | 1997-06-11 | 1998-12-17 | Seiko Epson Corporation | Composant a semi-conducteur, affichage a cristaux liquides et appareil electronique les comprenant |
US6087885A (en) * | 1997-09-11 | 2000-07-11 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device allowing fast and stable transmission of signals |
JP3252897B2 (ja) * | 1998-03-31 | 2002-02-04 | 日本電気株式会社 | 素子駆動装置および方法、画像表示装置 |
GB9812742D0 (en) | 1998-06-12 | 1998-08-12 | Philips Electronics Nv | Active matrix electroluminescent display devices |
GB9900231D0 (en) | 1999-01-07 | 1999-02-24 | Street Graham S B | Method and apparatus for control of viewing zones |
JP3482159B2 (ja) * | 1999-07-28 | 2003-12-22 | シャープ株式会社 | 電源装置、及びこれを用いた液晶表示装置 |
JP3475903B2 (ja) * | 2000-03-31 | 2003-12-10 | セイコーエプソン株式会社 | 差動増幅装置、半導体装置、電源回路及びそれを用いた電子機器 |
JP4428813B2 (ja) * | 2000-05-17 | 2010-03-10 | 三菱電機株式会社 | アナログ出力回路 |
JP4770001B2 (ja) * | 2000-06-22 | 2011-09-07 | 日本テキサス・インスツルメンツ株式会社 | 駆動回路及び電圧ドライバ |
TWI292143B (en) * | 2000-07-07 | 2008-01-01 | Seiko Epson Corp | Circuit, driver circuit, organic electroluminescent display device electro-optical device, electronic apparatus, method of controlling the current supply to an organic electroluminescent pixel, and method for driving a circuit |
JP3736399B2 (ja) | 2000-09-20 | 2006-01-18 | セイコーエプソン株式会社 | アクティブマトリクス型表示装置の駆動回路及び電子機器及び電気光学装置の駆動方法及び電気光学装置 |
JP3759394B2 (ja) | 2000-09-29 | 2006-03-22 | 株式会社東芝 | 液晶駆動回路および負荷駆動回路 |
JP3594126B2 (ja) * | 2000-10-13 | 2004-11-24 | 日本電気株式会社 | 電流駆動回路 |
EP1343134A4 (en) * | 2000-12-06 | 2008-07-09 | Sony Corp | TIME CONTROL GENERATION CIRCUIT FOR A DISPLAY AND DISPLAY THEREOF |
JP3846293B2 (ja) * | 2000-12-28 | 2006-11-15 | 日本電気株式会社 | 帰還型増幅回路及び駆動回路 |
JP2002215095A (ja) * | 2001-01-22 | 2002-07-31 | Pioneer Electronic Corp | 発光ディスプレイの画素駆動回路 |
US6661180B2 (en) | 2001-03-22 | 2003-12-09 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device, driving method for the same and electronic apparatus |
JP3813477B2 (ja) * | 2001-09-12 | 2006-08-23 | シャープ株式会社 | 電源装置およびそれを備えた表示装置 |
TW529006B (en) * | 2001-11-28 | 2003-04-21 | Ind Tech Res Inst | Array circuit of light emitting diode display |
JP2003228427A (ja) | 2002-02-01 | 2003-08-15 | Sony Corp | 定電流回路および固体撮像装置 |
JP4350463B2 (ja) * | 2002-09-02 | 2009-10-21 | キヤノン株式会社 | 入力回路及び表示装置及び情報表示装置 |
-
2003
- 2003-07-11 US US10/498,047 patent/US7317441B2/en not_active Expired - Lifetime
- 2003-07-11 JP JP2004542806A patent/JP4201765B2/ja not_active Expired - Fee Related
- 2003-07-11 KR KR1020047008878A patent/KR100616338B1/ko not_active IP Right Cessation
- 2003-07-11 WO PCT/JP2003/008870 patent/WO2004034369A1/ja active Application Filing
- 2003-07-11 CN CNB038017113A patent/CN100472596C/zh not_active Expired - Fee Related
- 2003-07-11 DE DE10392172.9T patent/DE10392172B4/de not_active Expired - Fee Related
- 2003-08-12 TW TW092122068A patent/TWI240237B/zh not_active IP Right Cessation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62122488U (ja) * | 1986-01-28 | 1987-08-04 | ||
JPH10254412A (ja) * | 1997-03-14 | 1998-09-25 | Fujitsu Ltd | サンプリングホールド回路 |
JPH1173165A (ja) * | 1997-08-29 | 1999-03-16 | Sony Corp | ソースフォロワ回路およびこれを用いた液晶表示装置の出力回路 |
WO2000041028A1 (fr) * | 1999-01-08 | 2000-07-13 | Seiko Epson Corporation | Dispositif d'affichage a cristaux liquides, dispositif electronique et alimentation servant a faire fonctionner ledit dispositif d'affichage a cristaux liquides |
JP2002175035A (ja) * | 2000-12-07 | 2002-06-21 | Sony Corp | 表示装置用タイミング発生回路、アクティブマトリクス型表示装置および携帯端末 |
JP2002228427A (ja) * | 2001-02-02 | 2002-08-14 | Fukui Prefecture | ダイヤモンド研磨角度検査装置 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005010683A (ja) * | 2003-06-20 | 2005-01-13 | Sanyo Electric Co Ltd | 表示装置 |
JP2005010684A (ja) * | 2003-06-20 | 2005-01-13 | Sanyo Electric Co Ltd | 表示装置 |
JP4502603B2 (ja) * | 2003-06-20 | 2010-07-14 | 三洋電機株式会社 | 表示装置 |
JP4502602B2 (ja) * | 2003-06-20 | 2010-07-14 | 三洋電機株式会社 | 表示装置 |
JP2006071992A (ja) * | 2004-09-02 | 2006-03-16 | Sony Corp | 信号出力装置及び映像表示装置 |
JP4596243B2 (ja) * | 2004-09-02 | 2010-12-08 | ソニー株式会社 | 信号出力装置及び映像表示装置 |
Also Published As
Publication number | Publication date |
---|---|
JP4201765B2 (ja) | 2008-12-24 |
CN1602513A (zh) | 2005-03-30 |
DE10392172T5 (de) | 2004-11-18 |
JPWO2004034369A1 (ja) | 2006-02-09 |
TW200410185A (en) | 2004-06-16 |
US20050156917A1 (en) | 2005-07-21 |
TWI240237B (en) | 2005-09-21 |
US7317441B2 (en) | 2008-01-08 |
DE10392172B4 (de) | 2016-10-06 |
CN100472596C (zh) | 2009-03-25 |
KR100616338B1 (ko) | 2006-08-29 |
KR20040071713A (ko) | 2004-08-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100709280B1 (ko) | 시프트 레지스터 회로 | |
EP2369571B1 (en) | Display device and its driving method | |
US8922540B2 (en) | Output circuit, data driver, and display device | |
US7623109B2 (en) | Display device | |
US8289246B2 (en) | Electric current driving type display device and pixel circuit | |
US8514161B2 (en) | Current-driven display device | |
JP4867657B2 (ja) | 電圧供給回路、表示装置、および電子機器、並びに電圧供給方法 | |
US20110096059A1 (en) | Display device and method of driving the same | |
US7688298B2 (en) | Digital/analog conversion device and display device having the same | |
WO2006103797A1 (ja) | 表示装置およびその駆動方法 | |
JP4201765B2 (ja) | 画像表示素子のデータ線駆動回路および画像表示装置 | |
US7586468B2 (en) | Display device using current driving pixels | |
WO2004042691A1 (ja) | サンプルホールド回路およびそれを用いた画像表示装置 | |
US7391393B2 (en) | Low power and high density source driver and current driven active matrix organic electroluminescent device having the same | |
TWI694431B (zh) | 畫素電路與顯示裝置 | |
KR20090003894A (ko) | 전류구동 픽셀 회로 및 이를 이용한 유기발광소자 픽셀회로 | |
TWI717996B (zh) | 畫素驅動電路 | |
KR100979384B1 (ko) | 아날로그 버퍼회로 | |
JP2005094221A (ja) | ソースフォロワ回路およびそれを備える表示装置 | |
KR100597312B1 (ko) | 액정표시장치용 저전력 소스 드라이버 | |
JP2005010684A (ja) | 表示装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 2004542806 Country of ref document: JP |
|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): CN DE JP KR US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 20038017113 Country of ref document: CN |
|
WWE | Wipo information: entry into national phase |
Ref document number: 10498047 Country of ref document: US Ref document number: 1020047008878 Country of ref document: KR |
|
RET | De translation (de og part 6b) |
Ref document number: 10392172 Country of ref document: DE Date of ref document: 20041118 Kind code of ref document: P |
|
WWE | Wipo information: entry into national phase |
Ref document number: 10392172 Country of ref document: DE |
|
REG | Reference to national code |
Ref country code: DE Ref legal event code: 8629 |
|
REG | Reference to national code |
Ref country code: DE Ref legal event code: 8607 |