WO2002091432A3 - Mikroelektronische struktur mit einer wasserstoffbarrierenschicht - Google Patents

Mikroelektronische struktur mit einer wasserstoffbarrierenschicht Download PDF

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Publication number
WO2002091432A3
WO2002091432A3 PCT/EP2002/004422 EP0204422W WO02091432A3 WO 2002091432 A3 WO2002091432 A3 WO 2002091432A3 EP 0204422 W EP0204422 W EP 0204422W WO 02091432 A3 WO02091432 A3 WO 02091432A3
Authority
WO
WIPO (PCT)
Prior art keywords
hydrogen
barrier layer
microelectronic structure
hydrogen barrier
sensitive dielectric
Prior art date
Application number
PCT/EP2002/004422
Other languages
English (en)
French (fr)
Other versions
WO2002091432A2 (de
Inventor
Walter Hartner
Zvonimir Gabric
Matthias Kroenke
Guenther Schindler
Original Assignee
Infineon Technologies Ag
Walter Hartner
Zvonimir Gabric
Matthias Kroenke
Guenther Schindler
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Walter Hartner, Zvonimir Gabric, Matthias Kroenke, Guenther Schindler filed Critical Infineon Technologies Ag
Priority to JP2002588598A priority Critical patent/JP2004525525A/ja
Priority to KR1020037014243A priority patent/KR100614291B1/ko
Priority to US10/476,579 priority patent/US7276300B2/en
Publication of WO2002091432A2 publication Critical patent/WO2002091432A2/de
Publication of WO2002091432A3 publication Critical patent/WO2002091432A3/de

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors

Abstract

Es wird eine mikroelektronische Struktur mit einem verbesserten Schutz eines wasserstoffempfindlichen Dielektrikums vor einer Wasserstoffkontamination vorgeschlagen. Dazu ist vorgesehen, das wasserstoffempfindliche Dielektrikum (14) zumindest mit einem Zwischenoxid (18) zu bedecken, dessen Materialstärke mindestens das Fünffache der Dicke des wasserstoffempfindlichen Dielektrikums beträgt. Das Zwischenoxid (18) dient gleichzeitig als Intermetalldielektrikum, und trägt somit auf seiner Oberseite eine Metallisierung. Das ausreichend dicke Zwischenoxid (18) absorbiert den eventuell bei der Abscheidung einer Wasserstoffbarrierenschicht (22, 26) freiwerdenden Wasserstoff und schützt so das wasserstoffempfindliche Dielektrikum (14).
PCT/EP2002/004422 2001-05-03 2002-04-22 Mikroelektronische struktur mit einer wasserstoffbarrierenschicht WO2002091432A2 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002588598A JP2004525525A (ja) 2001-05-03 2002-04-22 水素防護層を備えた超小型電子構造体
KR1020037014243A KR100614291B1 (ko) 2001-05-03 2002-04-22 수소 배리어 층을 포함하는 마이크로일렉트로닉 구조물
US10/476,579 US7276300B2 (en) 2001-05-03 2002-04-22 Microelectronic structure having a hydrogen barrier layer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10121657.2 2001-05-03
DE10121657A DE10121657B4 (de) 2001-05-03 2001-05-03 Mikroelektronische Struktur mit Wasserstoffbarrierenschicht

Publications (2)

Publication Number Publication Date
WO2002091432A2 WO2002091432A2 (de) 2002-11-14
WO2002091432A3 true WO2002091432A3 (de) 2003-05-01

Family

ID=7683582

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2002/004422 WO2002091432A2 (de) 2001-05-03 2002-04-22 Mikroelektronische struktur mit einer wasserstoffbarrierenschicht

Country Status (6)

Country Link
US (1) US7276300B2 (de)
JP (1) JP2004525525A (de)
KR (1) KR100614291B1 (de)
CN (1) CN100429762C (de)
DE (1) DE10121657B4 (de)
WO (1) WO2002091432A2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4800627B2 (ja) * 2004-03-24 2011-10-26 セイコーエプソン株式会社 強誘電体メモリ素子
JP4178414B2 (ja) * 2004-12-27 2008-11-12 セイコーエプソン株式会社 強誘電体膜、強誘電体キャパシタおよび強誘電体メモリ
KR100639219B1 (ko) * 2005-05-27 2006-10-30 주식회사 하이닉스반도체 반도체 소자의 캐패시터 형성방법
KR101954452B1 (ko) 2012-05-14 2019-03-06 전북대학교산학협력단 촉매층을 포함하는 능동형 수소 확산 방지막
CN104076067A (zh) * 2014-06-10 2014-10-01 桂林电子科技大学 一种氢敏感纳米复合材料及其制备方法
CN114892150B (zh) * 2022-04-29 2023-12-05 广东伟智创科技有限公司 Mocvd双腔体生长氧化物薄膜设备及使用方法

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0642167A2 (de) * 1993-08-05 1995-03-08 Matsushita Electronics Corporation Halbleiterbauelement mit Kondensator und Herstellungsverfahren
US5481490A (en) * 1993-10-12 1996-01-02 Olympus Optical Co., Ltd. Ferroelectric memory
JPH09293869A (ja) * 1996-04-25 1997-11-11 Nec Corp 半導体装置およびその製造方法
JPH10223852A (ja) * 1997-02-03 1998-08-21 Matsushita Electron Corp 強誘電体メモリ装置及びその製造方法
JPH1187633A (ja) * 1997-09-02 1999-03-30 Fujitsu Ltd 半導体装置の製造方法
WO2000046843A1 (de) * 1999-02-03 2000-08-10 Infineon Technologies Ag Mikroelektronische struktur
US6121083A (en) * 1997-08-21 2000-09-19 Nec Corporation Semiconductor device and method of fabricating the same
JP2001015696A (ja) * 1999-06-29 2001-01-19 Nec Corp 水素バリヤ層及び半導体装置
US6249014B1 (en) * 1998-10-01 2001-06-19 Ramtron International Corporation Hydrogen barrier encapsulation techniques for the control of hydrogen induced degradation of ferroelectric capacitors in conjunction with multilevel metal processing for non-volatile integrated circuit memory devices
US20010021554A1 (en) * 2000-02-25 2001-09-13 Joachim Hopfner Method for fabricating a semiconductor component

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3131982B2 (ja) * 1990-08-21 2001-02-05 セイコーエプソン株式会社 半導体装置、半導体メモリ及び半導体装置の製造方法
EP0513894B1 (de) * 1991-05-08 1996-08-28 Koninklijke Philips Electronics N.V. Verfahren zur Herstellung einer Halbleiteranordnung mit einem Kondensator mit einem ferroelektrischen Dieletrikum und Halbleiteranordnung mit einem derartigen Kondensator
JP3265593B2 (ja) 1991-10-02 2002-03-11 松下電器産業株式会社 半導体装置の製造方法
US6027947A (en) * 1996-08-20 2000-02-22 Ramtron International Corporation Partially or completely encapsulated top electrode of a ferroelectric capacitor
US5902131A (en) * 1997-05-09 1999-05-11 Ramtron International Corporation Dual-level metalization method for integrated circuit ferroelectric devices
US6060766A (en) * 1997-08-25 2000-05-09 Advanced Micro Devices, Inc. Protection of hydrogen sensitive regions in semiconductor devices from the positive charge associated with plasma deposited barriers or layers
US6177351B1 (en) * 1997-12-24 2001-01-23 Texas Instruments Incorporated Method and structure for etching a thin film perovskite layer
TW434877B (en) 1998-12-03 2001-05-16 Matsushita Electronics Corp Semiconductor memory device and method for manufacturing the same
KR20010004368A (ko) 1999-06-28 2001-01-15 김영환 강유전체 메모리 소자 및 그 제조 방법
EP1218928A1 (de) * 1999-09-28 2002-07-03 Symetrix Corporation Halbleiteranordnungen mit barrierschichten und verfahren zur herstellung
US7442944B2 (en) 2004-10-07 2008-10-28 Varian Semiconductor Equipment Associates, Inc. Ion beam implant current, spot width and position tuning

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0642167A2 (de) * 1993-08-05 1995-03-08 Matsushita Electronics Corporation Halbleiterbauelement mit Kondensator und Herstellungsverfahren
US5481490A (en) * 1993-10-12 1996-01-02 Olympus Optical Co., Ltd. Ferroelectric memory
JPH09293869A (ja) * 1996-04-25 1997-11-11 Nec Corp 半導体装置およびその製造方法
JPH10223852A (ja) * 1997-02-03 1998-08-21 Matsushita Electron Corp 強誘電体メモリ装置及びその製造方法
US6121083A (en) * 1997-08-21 2000-09-19 Nec Corporation Semiconductor device and method of fabricating the same
JPH1187633A (ja) * 1997-09-02 1999-03-30 Fujitsu Ltd 半導体装置の製造方法
US6249014B1 (en) * 1998-10-01 2001-06-19 Ramtron International Corporation Hydrogen barrier encapsulation techniques for the control of hydrogen induced degradation of ferroelectric capacitors in conjunction with multilevel metal processing for non-volatile integrated circuit memory devices
WO2000046843A1 (de) * 1999-02-03 2000-08-10 Infineon Technologies Ag Mikroelektronische struktur
JP2001015696A (ja) * 1999-06-29 2001-01-19 Nec Corp 水素バリヤ層及び半導体装置
US6455882B1 (en) * 1999-06-29 2002-09-24 Nec Corporation Semiconductor device having a hydrogen barrier layer
US20010021554A1 (en) * 2000-02-25 2001-09-13 Joachim Hopfner Method for fabricating a semiconductor component

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
HONG S-K ET AL: "PROTECTION OF SRBI2TA2O9 FERROELECTRIC CAPACITORS FROM HYDROGEN DAMAGE BY OPTIZIMED METALLIZATION FOR MEMORY APPLICATIONS", APPLIED PHYSICS LETTERS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, vol. 77, no. 1, 3 July 2000 (2000-07-03), pages 76 - 78, XP000958517, ISSN: 0003-6951 *
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 03 27 February 1998 (1998-02-27) *
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 13 30 November 1998 (1998-11-30) *
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 08 30 June 1999 (1999-06-30) *
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 16 8 May 2001 (2001-05-08) *

Also Published As

Publication number Publication date
KR20040000449A (ko) 2004-01-03
US20040191532A1 (en) 2004-09-30
WO2002091432A2 (de) 2002-11-14
DE10121657A1 (de) 2002-11-28
CN100429762C (zh) 2008-10-29
US7276300B2 (en) 2007-10-02
KR100614291B1 (ko) 2006-08-21
CN1513203A (zh) 2004-07-14
DE10121657B4 (de) 2010-02-11
JP2004525525A (ja) 2004-08-19

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