US20200235023A1 - Integrated circuit packaging structure and manufacturing method thereof - Google Patents

Integrated circuit packaging structure and manufacturing method thereof Download PDF

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Publication number
US20200235023A1
US20200235023A1 US16/294,951 US201916294951A US2020235023A1 US 20200235023 A1 US20200235023 A1 US 20200235023A1 US 201916294951 A US201916294951 A US 201916294951A US 2020235023 A1 US2020235023 A1 US 2020235023A1
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Prior art keywords
heat dissipation
slurry
packaging
encapsulation material
dissipation structure
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US16/294,951
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English (en)
Inventor
Peng Chen
Houde Zhou
Baohua Zhang
Chao Gu
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Yangtze Memory Technologies Co Ltd
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Yangtze Memory Technologies Co Ltd
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Application filed by Yangtze Memory Technologies Co Ltd filed Critical Yangtze Memory Technologies Co Ltd
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD. reassignment YANGTZE MEMORY TECHNOLOGIES CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEN, PENG, GU, Chao, ZHANG, BAOHUA, ZHOU, HOUDE
Priority to US16/923,075 priority Critical patent/US11476173B2/en
Publication of US20200235023A1 publication Critical patent/US20200235023A1/en
Abandoned legal-status Critical Current

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    • H01L2924/1815—Shape

Definitions

  • the present disclosure relates to an integrated circuit (IC) packaging structure and a manufacturing method thereof, and more particularly, to an IC packaging structure including a heat dissipation structure and a manufacturing method thereof.
  • IC integrated circuit
  • an integrated circuit (IC) package is a step configured to encapsulate one or more semiconductor dies of integrated circuits with a molding compound for keeping the semiconductor dies from being damaged by external factors.
  • a heat sink is disposed above the molding compound for heat dissipation.
  • the heat dissipation performance is limited because the heat transfer coefficient of the molding compound is too low, and the total size of the IC package will be increased significantly by the heat sink especially when a higher cooling capability is demanded.
  • An integrated circuit (IC) packaging structure and a manufacturing method thereof are provided in the present disclosure.
  • a trench is formed in an encapsulation material, and a heat dissipation structure is at least partially disposed in the trench for reducing the distance between the heat dissipation structure and a die encapsulated by the encapsulation material.
  • the cooling capability of the IC packaging structure may be improved accordingly without increasing the size of the IC packaging structure significantly.
  • an integrated circuit (IC) packaging structure includes a packaging substrate, one or a plurality of dies disposed on the packaging substrate, an encapsulation material, at least one trench, and a heat dissipation structure.
  • the encapsulation material is disposed on the packaging substrate and configured to encapsulate the one or the plurality of the dies on the packaging substrate.
  • the at least one trench is disposed in the encapsulation material. At least a part of the heat dissipation structure is disposed in the at least one trench.
  • a heat transfer coefficient of the heat dissipation structure is higher than a heat transfer coefficient of the encapsulation material.
  • the heat dissipation structure is isolated from the one or the plurality of the dies by the encapsulation material.
  • the heat dissipation structure includes a first portion disposed in the at least one trench and a second portion disposed on a surface of the encapsulation material.
  • the first portion is directly connected with the second portion.
  • a material composition of the second portion is identical to a material composition of the first portion.
  • a material composition of the second portion is different from a material composition of the first portion.
  • the first portion includes first metal particles
  • the second portion includes second metal particles
  • a dimension of each of the second metal particles is larger than a dimension of each of the first metal particles
  • the encapsulation material comprises an epoxy molding compound (EMC).
  • EMC epoxy molding compound
  • a manufacturing method of an IC packaging structure includes the following steps.
  • One or a plurality of dies is disposed on a packaging substrate.
  • An encapsulation material is formed on the packaging substrate.
  • the encapsulation material is configured to encapsulate the one or the plurality of the dies on the packaging substrate.
  • At least one trench is formed in the encapsulation material.
  • a heat dissipation structure is formed on the encapsulation material, and at least a part of the heat dissipation structure is formed in the at least one trench.
  • the step of forming the heat dissipation structure includes the following steps.
  • a first slurry is formed in the at least one trench.
  • a first curing process is performed to the first slurry for forming a first portion of the heat dissipation structure.
  • the step of forming the heat dissipation structure further includes forming a second slurry on a surface of the encapsulation material after forming the first slurry in the at least one trench.
  • the step of forming the heat dissipation structure further includes performing a second curing process to the second slurry for forming a second portion of the heat dissipation structure on the surface of the encapsulation material, wherein the second slurry is formed after the first curing process.
  • the second slurry is formed before the first curing process, and the second slurry is cured by the first curing process to be a second portion of the heat dissipation structure on the surface of the encapsulation material.
  • a material composition of the second slurry is identical to a material composition of the first slurry.
  • a material composition of the second slurry is different from a material composition of the first slurry.
  • the first slurry comprises first metal particles
  • the second slurry comprises second metal particles
  • a dimension of each of the second metal particles is larger than a dimension of each of the first metal particles
  • the manufacturing method further includes performing a cutting process after the step of forming the heat dissipation structure.
  • the manufacturing method further includes performing a cutting process after the step of forming the encapsulation material and before the step of forming the at least one trench.
  • a heat transfer coefficient of the heat dissipation structure is higher than a heat transfer coefficient of the encapsulation material.
  • FIG. 1 is a schematic drawing illustrating an integrated circuit (IC) packaging structure according to a first embodiment of the present disclosure.
  • FIG. 2 is a flowchart of a manufacturing method of the IC packaging structure shown in FIG. 1 according to an embodiment of the present disclosure.
  • FIG. 3 is a schematic drawing illustrating an IC packaging structure according to a second embodiment of the present disclosure.
  • FIG. 4 is a schematic drawing illustrating a second portion of a heat dissipation structure in the IC packaging structure according to the second embodiment of the present disclosure.
  • FIG. 5 is a flowchart of a manufacturing method of the IC packaging structure shown in FIG. 3 according to an embodiment of the present disclosure.
  • FIG. 6 is a flowchart of a manufacturing method of the IC packaging structure shown in FIG. 3 according to another embodiment of the present disclosure.
  • FIG. 7 is a schematic drawing illustrating a manufacturing method of the IC packaging structure shown in FIG. 3 according to further another embodiment of the present disclosure.
  • FIG. 8 is a schematic drawing illustrating an IC packaging structure according to a third embodiment of the present disclosure.
  • FIG. 9 is a schematic drawing illustrating a manufacturing method of the IC packaging structure shown in FIG. 8 according to an embodiment of the present disclosure.
  • FIG. 10 is a flowchart of a manufacturing method of an IC packaging structure according to a fourth embodiment of the present disclosure.
  • FIG. 11 is a schematic drawing illustrating the manufacturing method of the IC packaging structure according to the fourth embodiment of the present disclosure.
  • FIG. 12 is a flowchart of a manufacturing method of an IC packaging structure according to a fifth embodiment of the present disclosure.
  • FIG. 13 is a schematic drawing illustrating the manufacturing method of the IC packaging structure according to the fifth embodiment of the present disclosure.
  • references in the specification to “one embodiment,” “an embodiment,” “some embodiments,” etc. indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure or characteristic in connection with other embodiments whether or not explicitly described.
  • terminology may be understood at least in part from usage in context.
  • the term “one or more” as used herein, depending at least in part upon context may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense.
  • terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context.
  • the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.
  • spatially relative terms such as “beneath,” “below,” “lower,” “above,” “upper,” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures.
  • the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures.
  • the apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
  • FIG. 1 is a schematic drawing illustrating an integrated circuit (IC) packaging structure according to a first embodiment of the present disclosure.
  • an IC packaging structure 101 includes a packaging substrate 10 , one or a plurality of dies 22 disposed on the packaging substrate 10 , an encapsulation material 40 , at least one trench TR, and a heat dissipation structure 50 .
  • the encapsulation material 40 is disposed on the packaging substrate 10 and configured to encapsulate the one or the plurality of the dies 22 on the packaging substrate 10 .
  • the figures in the present disclosure are simplified schematic drawings for illustrative purposes, and the dies 22 are fully covered and encapsulated by the encapsulation material actually.
  • the at least one trench TR is disposed in the encapsulation material 40 . At least a part of the heat dissipation structure 50 is disposed in the at least one trench TR.
  • the cooling capability of the IC packaging structure 101 may be improved by the heat dissipation structure 50 because the heat dissipation structure 50 becomes closer to the dies 22 by being disposed in the trench TR within the encapsulation material 40 , and the size of the IC packaging structure will not be increased by the heat dissipation structure 50 .
  • the heat dissipation structure 50 in the present disclosure may be applied in different types of IC packaging technology, such as a ball grid array (BGA) package, a quad flat package (QFP), a quad flat no-leads (QFN) package, a land grid array (LGA) package, a pin grid array (PGA) package, or other suitable IC packaging technology.
  • the packaging substrate 10 may be formed by suitable insulating materials and/or dielectric materials.
  • the packaging substrate 10 may include a plastic substrate, such as an epoxy substrate, a bismaleimide triazine (BT) resin substrate, or a substrate made of other suitable materials capable of providing physical support to the dies 22 .
  • the packaging substrate 10 may include multiple layers of conductive wires (not shown) disposed in the insulating material, and different layers of the conductive wires may be connected with one another by a connection via in the packaging substrate 10 .
  • the dies 22 may be disposed on a first surface of the packaging substrate 10
  • a plurality of connection structures 60 (such as solder balls in BGA package) may be disposed on a second surface of the packaging substrate 10
  • the second surface may be opposite to the first surface in a vertical direction Z.
  • the vertical direction Z may be regarded as a thickness direction of the packaging substrate 10 , but not limited thereto.
  • each of the dies 22 may be electrically connected to the packaging substrate 10 by a bonding wire 30 (such as an aluminum wire, a copper wire, a silver wire, or a gold wire), and the dies 22 may be electrically connected to the connection structures 60 via the bonding wires 30 and the packaging substrate 10 , but not limited thereto.
  • a bonding wire 30 such as an aluminum wire, a copper wire, a silver wire, or a gold wire
  • Each of the dies 22 may be a die for any suitable purposes.
  • each of the dies 22 may be an IC die including circuits for date storage, compute, and/or processing. Some of the dies 22 may be stacked in the vertical direction Z.
  • a second die 22 B may be disposed on a first die 22 A in the vertical direction Z.
  • the second die 22 B may be smaller than the first die 22 A for providing a required bonding area on the first die 22 A, but not limited thereto.
  • the dimensions of the dies 22 stacked in the vertical direction Z may be substantially equal to one another, and the dies 22 may be shifted respectively in a horizontal direction perpendicular to the vertical direction Z for providing a required bonding area on each die 22 .
  • medium layers 20 may be disposed between the die 22 and the packaging substrate 10 and/or between the dies 22 , and each of the medium layers 20 may be an adhesive film, a polymer film, and/or a spacer film.
  • the encapsulation material 40 may include a plastic material, such as an epoxy molding compound (EMC), or other suitable insulation materials.
  • EMC epoxy molding compound
  • a heat transfer coefficient of the heat dissipation structure 50 may be higher than a heat transfer coefficient of the encapsulation material 40 .
  • the heat dissipation structure 50 may include metal, such as silver, or other suitable materials having respectively higher heat transfer coefficient.
  • the thermal conductivity of silver is about 429 W/(m ⁇ K)
  • the thermal conductivity of EMC is about 0.8 W/(m ⁇ K).
  • the heat dissipation structure 50 in this embodiment may be regarded as a heat dissipation structure embedded in the encapsulation material 40 for providing a better heat transfer path from the dies 22 to the surface of the IC packaging structure 101 .
  • Apart of the encapsulation material 40 is still located between the heat dissipation structure 50 and the dies 22 in the vertical direction Z.
  • the trench TR does not penetrate the encapsulation material 40 above the dies 22 , and the heat dissipation structure 50 may be isolated from the one or the plurality of the dies 22 by the encapsulation material 40 .
  • the heat dissipation structure 50 may be disposed corresponding to at least one of the dies 22 in the vertical direction Z, but not limited thereto.
  • the location of the heat dissipation structure 50 and/or the depth of the trench TR may be further modified according to the heat distribution on the stacked dies 22 and/or the circuits in the packaging substrate 10 .
  • a manufacturing method of the IC packaging structure 101 may include the following steps.
  • One or a plurality of dies 22 is disposed on the packaging substrate 10 .
  • the encapsulation material 40 is formed on the packaging substrate 10 .
  • the encapsulation material 40 is configured to encapsulate the one or the plurality of the dies 22 on the packaging substrate 10 .
  • At least one trench TR is formed in the encapsulation material 40 .
  • a heat dissipation structure 50 is formed on the encapsulation material 40 , and at least a part of the heat dissipation structure 50 is formed in the at least one trench TR.
  • FIG. 2 is a flowchart of a manufacturing method of the IC packaging structure 101 in FIG. 1 according to an embodiment of the present disclosure.
  • the method of forming the heat dissipation structure 50 may include but is not limited to the following steps.
  • step S 11 the at least one trench TR is formed in the encapsulation material 40 .
  • the trench TR may be formed by a laser engraving process, an etching process, or other suitable approaches.
  • step S 12 a first slurry P 1 may be formed in the at least one trench TR.
  • the first slurry P 1 may include metal, metallic compounds, adhesives, dispersing agents, solvents, or other suitable components.
  • the first slurry P 1 may be a sliver slurry including silver particles, but not limited thereto.
  • a first curing process is performed to the first slurry P 1 for forming the heat dissipation structure 50 in the trench TR.
  • the first curing process may include a thermal curing process, an irradiation curing process, or other suitable curing approaches according to the curing requirements of the first slurry P 1 .
  • the first slurry P 1 may be cured and solidified to be the heat dissipation structure 50 located in the trench TR. It is worth noting that the method of forming the heat dissipation structure 50 is not limited to the steps described above.
  • the heat dissipation structure 50 may be formed by other suitable approaches performed outside the trench TR (e.g. metal injection molding) and be placed in the trench TR subsequently.
  • the cooling capability of the IC packaging structure 101 may be improved without increasing the size of the IC packaging structure 101 because the heat dissipation structure 50 is disposed in the trench TR within the encapsulation material 40 and the heat dissipation structure 50 with a higher heat transfer coefficient becomes closer to the dies 22 on the packaging substrate 10 .
  • FIG. 3 is a schematic drawing illustrating an IC packaging structure 102 according to a second embodiment of the present disclosure.
  • FIG. 4 is a schematic drawing illustrating a second portion 50 B of the heat dissipation structure 50 in the IC packaging structure 103 .
  • the difference between the IC packaging structure 102 and the IC packaging structure in the first embodiment described above is that the heat dissipation structure 50 in the IC packaging structure 102 may include a first portion 50 A disposed in the at least one trench TR and a second portion 50 B disposed on a surface of the encapsulation material 40 .
  • the first portion 50 A may be directly connected with the second portion 50 B.
  • the material composition of the second portion 50 B may be identical to the material composition of the first portion 50 A, such as the materials of the heat dissipation structure 50 described in the first embodiment, but not limited thereto. In some embodiments, the material composition of the second portion 50 B may be different from the material composition of the first portion 50 A. For example, as shown in FIG. 4 , the second portion 50 B of the heat dissipation structure 50 disposed on the top surface of the encapsulation material 40 may have an uneven surface for increasing the surface area of the second portion 50 B and enhancing the cooling capacity of the heat dissipation structure 50 . In some embodiments, a plurality of metal particles (not shown) may be used to form the uneven surface of the second portion 50 B.
  • the first portion 50 A of the heat dissipation structure 50 may include first metal particles (such as silver powders, not shown), the second portion 50 B of the heat dissipation structure 50 may include second metal particles (not shown), and a dimension of each of the second metal particles may be larger than a dimension of each of the first metal particles because larger metal particles are required for forming the uneven surface of the second portion 50 B, but not limited thereto.
  • the roughness of the uneven surface of the second portion 50 B may be controlled by adjusting the dimension of the metal particles used in the second portion 50 B.
  • the uneven surface of the second portion 50 B may also be formed by other suitable approaches.
  • the thickness of the second portion 50 B in the vertical direction Z may be about 0.01 millimeter or less than 0.01 millimeter, and the cooling capability of the IC packaging structure 102 may be further improved by the second portion 50 B without increasing the size of the IC packaging structure 102 significantly.
  • FIG. 5 is a flowchart of a manufacturing method of the IC packaging structure 102 according to an embodiment of the present disclosure.
  • FIG. 6 is a flowchart of a manufacturing method of the IC packaging structure 102 according to another embodiment of the present disclosure.
  • FIG. 7 is a schematic drawing illustrating a manufacturing method of the IC packaging structure 102 according to further another embodiment of the present disclosure.
  • a method of forming the heat dissipation structure 50 may include but is not limited to the following steps.
  • step S 21 the at least one trench TR is formed in the encapsulation material 40 .
  • step S 22 the first slurry P 1 may be formed in the at least one trench TR. Subsequently, in step S 23 , the first curing process is performed to the first slurry P 1 .
  • the first slurry P 1 may be cured and solidified by the first curing process to be the first portion 50 A of the heat dissipation structure 50 in the trench TR.
  • step S 24 may be carried on to form a second slurry P 2 on the surface of the encapsulation material 40 .
  • the second slurry P 2 may be formed after the step of forming the first slurry P 1 in the at least one trench TR and may be formed after the first curing process, but not limited thereto. Subsequently, in step S 25 , a second curing process may be performed to the second slurry P 2 for forming the second portion 50 B of the heat dissipation structure 50 on the surface of the encapsulation material 40 .
  • the second curing process may include a thermal curing process, an irradiation curing process, or other suitable curing approaches according to the curing requirements of the second slurry P 2 .
  • the second slurry P 2 may be cured and solidified to be the second portion 50 B of the heat dissipation structure 50 on the surface of the encapsulation material 40 .
  • the second slurry P 2 may be formed on the surface of the encapsulation material 40 by a spray coating process or other suitable approaches.
  • the material composition of the second slurry P 2 may be identical to the material composition of the first slurry P 1 described in the first embodiment.
  • the material composition of the second slurry P 2 may be different from the material composition of the first slurry P 1 .
  • the first slurry P 1 may include the first metal particles
  • the second slurry P 2 may include the second metal particles
  • the dimension of each of the second metal particles may be larger than the dimension of each of the first metal particles.
  • the first slurry P 1 and the second slurry P 2 may be cured and solidified by the first curing process and the second curing process respectively, and the first curing process may be different from the second curing process especially when the material composition of the second slurry P 2 may be different from the material composition of the first slurry P 1 , but not limited thereto.
  • the process condition of the second curing process may also be substantially identical to the process condition of the first curing process.
  • the second slurry P 2 may be further formed on side surfaces of the encapsulation material 40 , and the second slurry P 2 on the side surfaces of the encapsulation material 40 may be cured and solidified to be the second portion 50 B of the heat dissipation structure 50 on the side surfaces of the encapsulation material 40 .
  • a method of forming the heat dissipation structure 50 may include but is not limited to the following steps.
  • step S 31 the at least one trench TR is formed in the encapsulation material 40 .
  • step S 32 the first slurry P 1 may be formed in the at least one trench TR.
  • step S 33 the second slurry P 2 may be on the surface of the encapsulation material 40 and the first slurry P 1 .
  • step S 34 the first curing process is performed to the first slurry P 1 and the second slurry P 2 for forming the first portion 50 A and the second portion 50 B of the heat dissipation structure 50 respectively.
  • the second slurry P 2 may be formed before the first curing process, and the second slurry P 2 is cured and solidified by the first curing process to be the second portion 50 B of the heat dissipation structure 50 on the surface of the encapsulation material 40 .
  • the heat dissipation structure 50 including the first portion 50 A and the second portion 50 B connected to the first portion 50 A may be formed by other suitable approaches (e.g. metal injection molding) independently and be combined with the encapsulation material 40 having the trench TR formed therein subsequently.
  • FIG. 8 is a schematic drawing illustrating an IC packaging structure 103 according to a third embodiment of the present disclosure
  • FIG. 9 is a schematic drawing illustrating a manufacturing method of the IC packaging structure 103 according to an embodiment of the present disclosure.
  • the difference between the IC packaging structure 103 and the IC packaging structure in the second embodiment described above is that more than one trench TR may be formed in the encapsulation material 40 , and the heat dissipation structure 50 in the IC packaging structure 103 may include a plurality of first portions 50 A disposed in the trenches TR respectively.
  • the amount of the trenches TR, the shapes of the trenches TR, and/or the depth of each of the trenches TR may be further modified according to the heat distribution on the stacked dies 22 and/or the circuits in the packaging substrate 10 .
  • the heat dissipation structure 50 in the IC packaging structure 103 may be formed by a method similar to the method shown in FIG. 5 or the method shown in FIG. 6 described above.
  • the heat dissipation structure 50 including the first portions 50 A and the second portion 50 B connected to the first portions 50 A may be formed by other suitable approaches independently and be combined with the encapsulation material 40 having the trenches TR formed therein subsequently.
  • FIG. 10 is a flowchart of a manufacturing method of an IC packaging structure according to a fourth embodiment of the present disclosure
  • FIG. 11 is a schematic drawing illustrating the manufacturing method of the IC packaging structure in this embodiment.
  • the manufacturing method of the IC packaging structure may include the following steps.
  • a plurality of dies 22 may be disposed on the packaging substrate 10 .
  • At least some of the dies 22 may be disposed separated from one another in a horizontal direction orthogonal to the vertical direction Z, and the horizontal direction (such as a first direction D 1 shown in FIG. 11 ) may be parallel to the top surface of the packaging substrate 10 , but not limited thereto.
  • the encapsulation material 40 is formed on the packaging substrate 10 and encapsulates the dies 22 on the packaging substrate 10 .
  • step S 41 at least one trench TR is formed in the encapsulation material 40 .
  • step S 42 the first slurry is formed in the trench TR.
  • step S 43 the first curing process is performed to the first slurry.
  • step S 44 the second slurry is formed on the encapsulation material 40 .
  • step S 45 the second curing process is performed.
  • the steps S 41 -S 45 may be similar to the manufacturing method described in FIG. 5 and details of the steps S 41 -S 45 will not be redundantly described.
  • the manufacturing method of the steps S 41 -S 45 may be replaced by the manufacturing method described in FIG. 6 .
  • a cutting process may be performed.
  • the cutting process may be performed along cutting lines CL for separating some of the dies on the packaging substrate 10 , and the cutting process may be regarded as a singulation process, but not limited thereto.
  • the cutting process may be performed after the step of forming the heat dissipation structure 50 , but not limited thereto.
  • the trench TR may be a straight line pattern elongated in the first direction D 1 , and the dies 22 arranged in the first direction D 1 may be separated from one another by the cutting process.
  • three IC packaging structure 102 shown in FIG. 3 may be formed after performing the cutting process to the structure shown in FIG. 11 , but not limited thereto.
  • the projection shape of the trench TR in the vertical direction Z may be further modified according to the heat distribution on the dies 22 and/or the circuits in the packaging substrate 10 .
  • FIG. 12 is a flowchart of a manufacturing method of an IC packaging structure according to a fifth embodiment of the present disclosure
  • FIG. 13 is a schematic drawing illustrating the manufacturing method of the IC packaging structure in this embodiment.
  • FIG. 3 may be regarded as a schematic drawing in a step subsequent to FIG. 13 .
  • the manufacturing method of the IC packaging structure may include the following steps.
  • a plurality of dies 22 may be disposed on the packaging substrate 10 .
  • the encapsulation material 40 is formed on the packaging substrate 10 and encapsulates the dies 22 on the packaging substrate 10 .
  • step S 51 the cutting process is performed.
  • the cutting process may be performed along cutting lines CL for separating some of the dies on the packaging substrate 10 , and the cutting process may be regarded as a singulation process, but not limited thereto.
  • step S 52 at least one trench TR is formed in the encapsulation material 40 after the cutting process.
  • step S 53 the first slurry is formed in the trench TR.
  • step S 54 the first curing process is performed to the first slurry.
  • step S 55 the second slurry is formed on the encapsulation material 40 .
  • the second curing process is performed.
  • the steps S 52 -S 56 may be similar to the manufacturing method described in FIG.
  • the manufacturing method of the steps S 52 -S 56 may be replaced by the manufacturing method described in FIG. 6 .
  • the cutting process may be performed after the step of forming the encapsulation material 40 and before the step of forming the at least one trench TR.
  • the heat dissipation structure is at least partially disposed in the trench formed in the encapsulation material for reducing the distance between the heat dissipation structure and the dies encapsulated by the encapsulation material.
  • the cooling capability of the IC packaging structure may be improved accordingly without increasing the size of the IC packaging structure significantly.

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  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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  • Organic Chemistry (AREA)
  • Composite Materials (AREA)
  • Ceramic Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
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US20200335410A1 (en) 2020-10-22
TW202029422A (zh) 2020-08-01
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CN109863596A (zh) 2019-06-07
TWI746939B (zh) 2021-11-21
JP2022511450A (ja) 2022-01-31
EP3850666B1 (en) 2023-05-24
KR102603421B1 (ko) 2023-11-17
US11476173B2 (en) 2022-10-18
KR20210062698A (ko) 2021-05-31
CN109863596B (zh) 2020-05-26
JP7414822B2 (ja) 2024-01-16
WO2020150893A1 (en) 2020-07-30

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