US20180340056A1 - Buffer sheet composition and buffer sheet - Google Patents

Buffer sheet composition and buffer sheet Download PDF

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Publication number
US20180340056A1
US20180340056A1 US15/755,869 US201615755869A US2018340056A1 US 20180340056 A1 US20180340056 A1 US 20180340056A1 US 201615755869 A US201615755869 A US 201615755869A US 2018340056 A1 US2018340056 A1 US 2018340056A1
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United States
Prior art keywords
electronic component
buffer sheet
substrate
underfill material
composition
Prior art date
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Abandoned
Application number
US15/755,869
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English (en)
Inventor
Yuta Koseki
Daisuke Fujimoto
Kumpei Yamada
Naoya Suzuki
HItoshi Onozeki
Hiroshi Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
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Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Assigned to HITACHI CHEMICAL COMPANY, LTD. reassignment HITACHI CHEMICAL COMPANY, LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FUJIMOTO, DAISUKE, TAKAHASHI, HIROSHI, YAMADA, Kumpei, KOSEKI, Yuta, ONOZEKI, HITOSHI, SUZUKI, NAOYA
Publication of US20180340056A1 publication Critical patent/US20180340056A1/en
Abandoned legal-status Critical Current

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    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L21/00—Compositions of unspecified rubbers
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Definitions

  • the present disclosure relates to a buffer sheet composition and a buffer sheet.
  • Electronic components such as semiconductor devices are generally placed in packages in order to protect the devices from external environment to secure various reliabilities, and to facilitate the mounting of the devices to substrates.
  • packages and packages in which a low pressure transfer molding method is used for sealing electronic components are widely used.
  • This type of package is produced by fixing an electronic component to tabs formed on a metal lead frame, electrically connecting an electrode on a surface of the electronic component and inner leads with gold wires, and then sealing the electronic component, the gold wires, and a part of the lead frame with an epoxy resin composition.
  • Such resin-sealed packages have a larger outer size relative to the size of the electronic component included therein. Therefore, package forms are shifting from a pin insertion type to a surface mounting type from the viewpoint of high-density packaging, and efforts for achieving a reduction in size and thickness of the packages have been actively made.
  • the packages have a structure in which an electronic component is mounted on a metal lead frame, and the wire-bonded electronic component is sealed with a resin.
  • the use of flip chip mounting is increasing, in recent years, as a method of mounting an electronic component on a substrate for packaging.
  • the flip chip mounting has, in addition to excellent mounting efficiency, excellent electrical properties and capability to support increased number of pins.
  • a bare chip on the surface of which bumps are formed is mounted face down on a substrate, with the bumps being interposed therebetween.
  • CSP Chip Scale Packages
  • the flip chip mounting is also employed in recently developed surface mounting type packages in which terminals are arranged in the form of an area allay.
  • connection reliability is an important issue, because an electronic component and a substrate have a different thermal expansion coefficient, and thus, a thermal stress is generated at a joint portion thereof due to heating. Further, it is also an important issue to ensure moisture resistance reliability, because the surface of a bare chip on which a circuit is formed is not sufficiently protected, and thus susceptible to infiltration of water and ionic impurities.
  • a technique has been commonly used, in which an underfill material is interposed in a gap between the electronic component and the substrate, and the underfill material is cured by heating or the like to reinforce the joint portion and to protect the semiconductor device.
  • TCB Thermal Compression Bonding
  • the mounting method using the above described pre-applicable underfill material usually employs an approach in which each electronic component is separately mounted on a substrate.
  • the method is associated with problems of low productivity and an increase in production cost.
  • a technique has been examined, in recent years, in which a plurality of electronic components are collectively mounted on substrates, by multi-staging, and increasing the size of, the head.
  • variation may occur in a state of contact between the head and the electronic components due to deformation of the head, warpage of a base material of the substrate, or the like, to cause an uneven load distribution during the mounting, which becomes a problem.
  • Such an uneven load distribution is thought to have the following influences.
  • the uneven load distribution is thought to cause a difference between the loads applied to the respective electronic components.
  • some of the electronic components may potentially fail to be joined to the substrates due to insufficient load being applied thereto, and further, some of the electronic components may possibly break due to an excessive load being applied thereto.
  • the positions of the electronic components may be deviated in a surface direction, due to the uneven load distribution.
  • the bumps may not be disposed at desired connection sites, possibly resulting in a failure to achieve conduction.
  • thermoplastic film is used as an anti-fouling sheet in the TCB process.
  • thermoplastic anti-fouling sheet is used when collectively mounting a plurality of electronic components on substrates.
  • the present invention has been made in view of the above described situation, and an object of the present invention is to provide a buffer sheet which is capable of reducing a positional deviation between an electronic component and a substrate, and which is suitably used when collectively producing a plurality of electronic component devices, as well as to provide a buffer sheet composition used for producing the buffer sheet.
  • the buffer sheet composition is used for producing a buffer sheet to be interposed between a heating member and an electronic component t in a case in which the electronic component is heated by the heating member so as to mount the electronic component on a substrate.
  • ⁇ 2> The buffer sheet composition according to ⁇ 1>, further including a polymerization initiator.
  • ⁇ 3> The buffer sheet composition according to ⁇ 1> or ⁇ 2>, further including a curing agent.
  • ⁇ 4> The buffer sheet composition according to any one of ⁇ 1> to ⁇ 3>, further including a solvent.
  • a buffer sheet including a thermosetting composition layer obtained by forming the buffer sheet composition according to any one of ⁇ 1> to ⁇ 4> into a sheet.
  • ⁇ 6> The buffer sheet according to ⁇ 5>, including a support on one surface or both surfaces of the buffer sheet.
  • ⁇ 7> The buffer sheet according to ⁇ 5> or ⁇ 6>, in which the composition layer has an average thickness of 20 ⁇ m or more.
  • a buffer sheet which is capable of reducing the positional deviation between an electronic component and a substrate, and which is suitably used when collectively producing a plurality of electronic component devices, as well as a buffer sheet composition used for producing the buffer sheet.
  • FIG. 1A is a schematic diagram illustrating a production process of a method of producing an electronic component device in an present embodiment.
  • FIG. 1B is a schematic diagram illustrating the production process of the method of producing an electronic component device in the present embodiment.
  • FIG. 1C is a schematic diagram illustrating the production process of the method of producing an electronic component device in the present embodiment.
  • each numerical range specified using “(from) . . . to . . . ” represents a range including the numerical values noted before and after “to” as the minimum value and the maximum value, respectively.
  • the upper limit or the lower limit of a numerical range of a hierarchical level may be replaced with the upper limit or the lower limit of a numerical range of another hierarchical level. Further, in the present specification, with respect to a numerical range, the upper limit or the lower limit of the numerical range may be replaced with a relevant value shown in any of Examples.
  • the content means, unless otherwise specified, the total amount of the plural kinds of substances existing in the composition.
  • the particle diameter means, unless otherwise specified, a value with respect to the mixture of the plural kinds of particles existing in the composition.
  • the term “layer” comprehends herein not only a case in which the layer is formed over the whole observed region where the layer is present, but also a case in which the layer is formed only on part of the region.
  • average thickness and “average width” mean an arithmetic mean value of 3 point measurement value at an arbitrary portion.
  • process denotes not only independent processes but also processes that cannot be clearly distinguished from other processes as long as a purpose is accomplished by the process.
  • a buffer sheet composition in the present embodiment contains a thermosetting compound, and is used for producing a buffer sheet to be interposed between a heating member and an electronic component t in a case in which the electronic component is heated by the heating member so as to mount the electronic component on a substrate.
  • the buffer sheet composition may further include another component(s) such as a polymerization initiator, a curing agent, a thermoplastic resin, an inorganic filler, a curing accelerator, and/or a solvent.
  • the buffer sheet produced using the buffer sheet composition in the present embodiment By interposing the buffer sheet produced using the buffer sheet composition in the present embodiment between the heating member and the electronic component, when the electronic component is heated by the heating member so as to mount the electronic component on the substrate, it becomes possible to reduce the positional deviation between the electronic component and the substrate, and to collectively produce a plurality of electronic component devices.
  • the reason for this can be considered as follows, for example.
  • the buffer sheet When the buffer sheet is interposed between the heating member and the electronic component, the buffer sheet is cured to reduce a thermal expansion of the heating member and the electronic component, and as a result of which the positional deviation resulting from a difference in the thermal expansion is reduced. Further, in a case in which a plurality of electronic component devices are collectively produced, for example, the buffer sheet can fill the gaps formed between the heating member and the electronic components, even when there is a variation in the state of contact between the heating member and the respective electronic components. As a result of the buffer sheet being cured in that state, the uneven load distribution is reduced, thereby reducing the positional deviation.
  • the buffer sheet composition in the present embodiment contains at least one thermosetting compound.
  • the thermosetting compound include (meth)acrylate compounds, epoxy resins, bismaleimide compounds, cyanate compounds, and phenol compounds.
  • at least one kind selected from the group consisting of (meth)acrylate compounds, epoxy resins, bismaleimide compounds, and phenol compounds is preferred, and at least one kind selected from the group consisting of (meth)acrylate compounds, epoxy resins, and bismaleimide compounds is more preferred, from the viewpoint of viscosity of the buffer sheet composition and the thermal expansion coefficient of a cured product of the buffer sheet composition.
  • From the viewpoint of curing rate at least one kind selected from the group consisting of (meth)acrylate compounds and epoxy resins are still more preferred.
  • These thermosetting compounds can be used singly, or in combination of two or more kinds thereof.
  • (meth)acrylate refers to acrylate or methacrylate.
  • the buffer sheet composition contains a (meth)acrylate compound as the thermosetting compound
  • the (meth)acrylate compound is not particularly limited, and can be selected as appropriate from commonly used (meth)acrylate compounds.
  • the (meth)acrylate compound may be a monofunctional (meth)acrylate compound, or a bifunctional or higher (meth)acrylate compound.
  • Examples of the (meth)acrylate compound include erythritol-type poly (meth)acrylate compounds, glycidyl ether-type (meth)acrylate compounds, bisphenol A-type di(meth)acrylate compounds, cyclodecane-type di(meth)acrylate compounds, methylol-type (meth)acrylate compounds, dioxane-type di(meth)acrylate compounds, bisphenol F-type (meth)acrylate compounds, dimethylol-type (meth)acrylate compounds, isocyanuric acid-type di(meth)acrylate compounds, and trimethylol-type tri(meth)acrylate compounds.
  • At least one kind selected from the group consisting of trimethylol-type tri(meth)acrylate compounds, isocyanuric acid-type di(meth)acrylate compounds, bisphenol F-type (meth)acrylate compounds, cyclodecane-type di(meth)acrylate compounds, and glycidyl ether-type (meth)acrylate compounds is preferred.
  • These (meth)acrylate compounds can be used singly, or in combination of two or more kinds thereof.
  • the buffer sheet composition contains an epoxy resin as the thermosetting compound
  • the epoxy resin is not particularly limited as long as the epoxy resin contains two or more epoxy groups within one molecule, and it is possible to use any epoxy resin commonly used in an epoxy resin composition for use in electronic components.
  • the epoxy resin may be solid or liquid, and a solid epoxy resin and a liquid epoxy resin may also be used in combination.
  • the epoxy resin examples include: glycidyl ether-type epoxy resins obtained by allowing a compound such as bisphenol A, bisphenol F, bisphenol AD, bisphenol S, naphthalene diol, or hydrogenated bisphenol A to react with epichlorohydrin; novolac type epoxy resins such as orthocresol novolac type epoxy resins, which are obtained by condensing or copolymerizing a phenol compound with an aldehyde compound to obtain a novolac resin, and epoxidizing the resulting novolac resin; glycidyl ester-type epoxy resins obtained by allowing a polybasic acid such as phthalic acid or a dimer acid to react with epichlorohydrin; glycidyl amine-type epoxy resins obtained by allowing an amine compound such as p-aminophenol, diaminodiphenylmethane, or isocyanuric acid to react with epichlorohydrin; linear aliphatic epoxy resins obtained
  • epoxy resins can be used singly, or in combination of two or more kinds thereof.
  • a liquid epoxy resin is preferred from the viewpoint of reducing the viscosity of the buffer sheet composition, and a bisphenol-type epoxy resin and a glycidyl amine-type epoxy resin are preferred from the viewpoint of reactivity and heat resistance.
  • a content of the thermosetting compound in the buffer sheet composition is not particularly limited. From the viewpoint of obtaining sufficient curability, the content of the thermosetting compound is preferably, for example, 30% by mass or more, and more preferably 40% by mass or more, with respect to a total amount of the buffer sheet composition. From the viewpoint of fluidity of the buffer sheet composition, the content of the thermosetting compound is preferably, for example, 70% by mass or less, and more preferably 60% by mass or less, with respect to the total amount of the buffer sheet composition.
  • the buffer sheet composition preferably contains a polymerization initiator.
  • the polymerization initiator include thermal polymerization initiators and photopolymerization initiators.
  • the thermal polymerization initiator is not particularly limited, and may be, for example, a radical polymerization initiator.
  • the radical polymerization initiator include ketone peroxides, hydroperoxides, diacyl peroxides, dialkyl peroxides, peroxyketals, alkyl peresters (peroxyesters), and peroxycarbonates. These radical polymerization initiators can be used singly, or in combination of two or more kinds thereof.
  • ketone peroxides include methyl ethyl ketone peroxide, methyl isobutyl ketone peroxide, acetylacetone peroxide, cyclohexanone peroxide, and methylcyclohexanone peroxide.
  • hydroperoxides include 1,1,3,3-tetramethylbutyl hydroperoxide, cumene hydroperoxide, t-butyl hydroperoxide, p-menthane hydroperoxide, and diisopropylbenzene hydroperoxide.
  • diacyl peroxides include, diisobutyryl peroxide, bis-3,5,5-trimethylhexanol peroxide, dilauroyl peroxide, dibenzoyl peroxide, m-toluyl benzoyl peroxide, and succinic acid peroxide.
  • dialkyl peroxides include dicumyl peroxide, 2,5-dimethyl-2,5-bis(t-butylperoxy)hexane, 1,3-bis(t-butylperoxyisopropyl)hexane, t-butylcumyl peroxide, di-t-butyl peroxide, di-t-hexyl peroxide, and 2,5-dimethyl-2,5-bis(t-butylperoxy)hexyne-3.
  • peroxyketals include 1,1-bis(t-hexylperoxy)-3,3,5-trimethylcyclohexane, 1,1-bis(t-hexylperoxy)cyclohexane, 1,1-bis(t-butylperoxy)-2-methylcyclohexane, 1,1-bis(t-butylperoxy)cyclohexane, 2,2-bis(t-butylperoxy)butane, and 4,4-bis(t-butylperoxy)pentanoic acid butyl.
  • alkyl peresters include 1,1,3,3-tetramethylbutyl peroxyneodecanoate, ⁇ -cumyl peroxyneodecanoate, t-butyl peroxyneodecanoate, t-hexyl peroxyneodecanoate, t-butyl peroxyneoheptanoate, t-hexyl peroxypivalate, t-butyl peroxypivalate, 1,1,3,3-tetramethylbutyl peroxy-2-ethylhexanoate, t-amyl peroxy-2-ethylhexanoate, t-butyl peroxy-2-ethylhexanoate, t-butyl peroxyisobutyrate, di-t-butyl peroxyhexahydroterephthalate, 1,1,3,3-tetramethylbutyl peroxy-3,5,5-trimethylhexanoate
  • peroxycarbonates include di-n-propyl peroxydicarbonate, diisopropyl peroxycarbonate, di-4-t-butylcyclohexyl peroxycarbonate, di-2-ethylhexyl peroxycarbonate, di-sec-butyl peroxycarbonate, di-3-methoxybutyl peroxydicarbonate, di-2-ethylhexyl peroxydicarbonate, diisopropyloxy dicarbonate, t-amyl peroxyisopropyl carbonate, t-butyl peroxyisopropyl carbonate, t-butyl peroxy-2-ethylhexyl carbonate and 1,6-bis(t-butylperoxycarboxyoxy)hexane.
  • a cyclohexane-type peroxide such as 1,1-bis(t-butylperoxy)cyclohexane is preferred from the viewpoint of curability.
  • a content of the thermal polymerization initiator is preferably, for example, from 0.01 parts by mass to 10 parts by mass, and more preferably from 0.1 parts by mass to 5 parts by mass with respect to 100 parts by mass of a total amount of the (meth)acrylate compound.
  • the photopolymerization initiator is not particularly limited, and examples thereof include a compound having an alkylphenone structure within the molecule, a compound having an oxime ester structure within the molecule, and a compound having a phosphorus element within the molecule.
  • photopolymerization initiators can be used singly, or in combination of two or more kinds thereof.
  • a sensitizer may also be used in combination, if necessary.
  • the compound having an alkylphenone structure within the molecule include 2,2-dimethoxy-1,2-diphenylethan-1-one, 1-hydroxy-cyclohexyl-phenyl-ketone, 2-hydroxy-2-methyl-1-phenyl-propan-1-one, 1-[4-(2-hydroxyethoxy)-phenyl]-2-hydroxy-2-methyl-1-propan-1-one, 2-hydroxy-1- ⁇ 4-[4-(2-hydroxy-2-methyl-propionyl)-benzyl]phenyl ⁇ -2-methyl-propan-1-one, 2-methyl-1-(4-methylthiophenyl)-2-morpholinopropan-1-one, 2-benzyl-2-dimethylamino-1-(4-morpholinophenyl)-butanone-1, and 2-(dimethylamino)-2-[(4-methylphenyl)methyl]-1-[4-(4-morpholinyl)phenyl]-1-butanone.
  • Examples of commercially available products of the compound having an alkylphenone structure within the molecule include IRGACURE 651, IRGACURE 184, IRGACURE 1173, IRGACURE 2959, IRGACURE 127, IRGACURE 907, IRGACURE 369E, and IRGACURE 379EG (all of the above manufactured by BASF Japan Ltd.).
  • the compound having an oxime ester structure within the molecule include 1,2-octanedione 1-[4-(phenylthio)-2-(O-benzoyloxime)], ethanone 1-[9-ethyl-6-(2-methylbenzoyl)-9H-carbazol-3-yl]-1-(O-acetyloxime), and ethanone 1-[9-ethyl-6-(2-methyl-4-(2-(1,3-dioxso-2-dimethyl-cyclopent-5-yl)ethoxy)-benzoyl)-9H-carbazolyl-3-yl]-1-(O-acetyloxime).
  • Examples of commercially available products of the compound having an oxime ester structure within the molecule include: IRGACURE OXE01 and IRGACURE OXE02 (both manufactured by BASF Japan Ltd.); and N-1919 (manufactured by ADEKA Corporation).
  • the compound having a phosphorus element within the structure include bis(2,4,6-trimethylbenzoyl)-phenylphosphine oxide and 2,4,6-trimethylbenzoyl-diphenyl-phosphine oxide.
  • Examples of commercially available products of the compound having a phosphorus element within the structure include IRGACURE 819 and IRGACURE TPO (both manufactured by BASF Japan Ltd.).
  • a content of the photopolymerization initiator is preferably, for example, from 0.01 parts by mass to 3 parts by mass, and more preferably from 0.1 parts by mass to 0.5 parts by mass, with respect to 100 parts by mass of the total amount of the (meth)acrylate compound.
  • the content of the photopolymerization initiator is 0.01 parts by mass or more, there is a tendency that a reaction rate due to light irradiation is increased, thereby facilitating the formation of the sheet.
  • the content of the photopolymerization initiator is 3 parts by mass or less, on the other hand, there is a tendency that an excessive increase in the reaction rate due to light irradiation is prevented, and thus the reactivity during thermal curing becomes sufficient.
  • the buffer sheet composition preferably contains a curing agent.
  • the curing agent is not particularly limited, and can be selected from commonly used curing agents.
  • the curing agent may be solid or liquid, and a solid curing agent and a liquid curing agent may be used in combination. It is preferable to use at least one acid anhydride as the curing agent, from the viewpoint of allowing the composition to be cured within a short period of time.
  • a ratio of a number of equivalent of epoxy groups in the epoxy resin, to a number of equivalent of functional groups in the curing agent which react with the epoxy groups, is not particularly limited. From the viewpoint of reducing the amount of each component which is left unreacted, it is preferable to adjust the ratio such that an amount of functional groups in the curing agent is from 0.1 equivalents to 2.0 equivalents, more preferably from 0.5 equivalents to 1.25 equivalents, and still more preferably from 0.8 equivalents to 1.2 equivalents, with respect to 1 equivalent of epoxy groups in the epoxy resin.
  • the buffer sheet composition in the present embodiment may contain at least one thermoplastic resin.
  • the thermoplastic resin include acrylic resins, styrene resins, butadiene resins, imide resins, and amide resins. These thermoplastic resins can be used singly, or in combination of two or more kinds thereof.
  • the thermoplastic resin can be produced, for example, by radical polymerization of a polymerizable monomer.
  • the polymerizable monomer include: (meth)acrylic acid; (meth)acrylic acid esters such as methyl (meth)acrylate, ethyl (meth)acrylate, and benzyl (meth)acrylate; (meth)acrylamides such as diacetone (meth)acrylamide; styrene and styrene derivatives such as styrene, vinyl toluene, and ⁇ -methylstyrene; ethers of vinyl alcohol such as vinyl-n-butyl ether; maleic acid; maleic acid monoesters such as monomethyl maleate and monoethyl maleate; fumaric acid; cinnamic acid; itaconic acid; and crotonic acid.
  • These polymerizable monomers can be used singly, or in combination of two or more kinds thereof.
  • (meth)acrylic acid refers to acrylic acid or methacrylic acid
  • (meth)acrylamide refers to acrylamide or methacrylamide
  • the thermoplastic resin preferably has a weight average molecular weight of, for example, from 5,000 to 1,000,000, and more preferably from 20,000 to 500,000, from the viewpoint of film forming properties and fluidity.
  • the weight average molecular weight as used in the present specification is a value measured by a gel permeation chromatography (GPC) method and converted using a calibration curve prepared with standard polystyrene. Conditions for GPC are shown below.
  • Model L-6000 (trade name; manufactured by Hitachi Ltd.)
  • Model L-3300 RI (trade name; manufactured by Hitachi Ltd.)
  • a content of the thermoplastic resin is preferably, for example, from 1% by mass to 70% by mass, and more preferably from 5% by mass to 50% by mass, with respect to the total amount of the buffer sheet composition.
  • the content of the thermoplastic resin is 1% by mass or more, the film forming properties tends to improve.
  • the content of the thermoplastic resin is 70% by mass or less, the curability tends to improve, thereby improving joinability between the electronic component and the substrate.
  • the buffer sheet composition in the present embodiment may contain at least one inorganic filler.
  • the inorganic filler include silica particles such as fused silica and crystalline silica; particles of calcium carbonate, clay, alumina or the like; particles of silicon nitride, silicon carbide, boron nitride, calcium silicate, potassium titanate, aluminum nitride, beryllia, zirconia, zircon, fosterite, steatite, spinel, mullite, titania or the like; beads obtained by spheroidizing these particles; and glass fibers.
  • These inorganic fillers can be used singly, or in combination of two or more kinds thereof.
  • the inorganic filler preferably has a volume average particle size of, for example, within the range of from 0.01 ⁇ m to 20 ⁇ m, and more preferably within the range of from 0.3 ⁇ m to 10 ⁇ m.
  • a volume average particle size of the inorganic filler is 0.01 ⁇ m or more, there is a tendency that a viscosity of the buffer sheet composition can be easily adjusted by controlling the amount of the inorganic filler to be added.
  • the volume average particle size of the inorganic filler is 20 ⁇ m or less, there is a tendency that the curability of the composition can be adjusted to control an elastic modulus of the resulting cured product, without compromising an ability of the resulting buffer film to conform to irregular surfaces.
  • volume average particle size refers to a particle size at a cumulative volume of 50% (D50) in a volume cumulative distribution curve, which is drawn using a laser diffraction particle size distribution measuring apparatus, from the small diameter side.
  • a content of the inorganic filler is preferably, for example, from 5% by mass to 70% by mass, and more preferably from 20% by mass to 60% by mass, with respect to the total amount of the buffer sheet composition.
  • the content of the inorganic filler is 5% by mass or more, an effect of reducing the thermal expansion coefficient tends to increase, and the moisture resistance reliability tends to improve.
  • the content of the inorganic filler is 70% by mass or less, there is a tendency that influences due to addition of the inorganic filler, such as a decrease in moldability of the resulting buffer film, and powder falling, can be reduced.
  • the content of the inorganic filler is preferably from 1% by volume to 70% by volume, and more preferably from 5% by volume to 20% by volume, with respect to the total amount of the buffer sheet composition.
  • the content, on a volume basis, of the inorganic filler in the buffer sheet composition is measured as follows. First, a mass (Wc) of the buffer sheet composition at 25° C. is measured, and the buffer sheet composition is subjected to a heat treatment in air at 400° C. for 2 hours, and then at 700° C. for 3 hours to remove resin components by burning, followed by measuring a mass (Wf) of the remaining inorganic filler at 25° C. Next, a specific gravity (df) of the inorganic filler at 25° C. is obtained using an electronic specific gravity meter or a pycnometer. Subsequently, a specific gravity (dc) of the buffer sheet composition at 25° C. is measured in the same manner.
  • a volume (Vc) of the buffer sheet composition and a volume (Vf) of the remaining inorganic filler are obtained, and then the volume of the remaining inorganic filler is divided by the volume of the buffer sheet composition as shown in (Formula 1), to obtain a volume ratio (Vr) of the inorganic filler.
  • Vc volume of buffer sheet composition (cm 3 )
  • dc density of buffer sheet composition (g/cm 3 )
  • Vf volume of inorganic filler (cm 3 )
  • df density of inorganic filler (g/cm 3 )
  • Vr volume ratio of inorganic filler
  • the buffer sheet composition in the present embodiment may contain at least one curing accelerator.
  • the curing accelerator include phosphorus curing accelerators, amine curing accelerators, imidazole curing accelerators, and guanidine curing accelerators. Of these, phosphorus curing accelerators, amine curing accelerators, and imidazole curing accelerators are preferred. These curing accelerators can be used singly, or in combination of two or more kinds thereof.
  • a content of the curing accelerator is preferably, for example, from 0.05% by mass to 3% by mass, with respect to 100% by mass of a total amount of nonvolatile components in the epoxy resin and the curing agent.
  • the buffer sheet composition in the present embodiment may contain at least one solvent.
  • the solvent include methyl ethyl ketone, xylene, toluene, acetone, ethylene glycol monoethyl ether, cyclohexanone, ethyl ethoxypropionate, N,N-dimethylformamide, and N,N-dimethylacetamide. These solvents can be used singly, or in combination of two or more kinds thereof.
  • a content of the solvent is not particularly limited.
  • the content of the solvent is preferably adjusted depending on a facility for producing the buffer sheet.
  • the buffer sheet composition in the present embodiment may contain another component(s), if necessary.
  • the other component include polymerization inhibitors, coupling agents, colorants, surfactants, and ion trapping agents.
  • a buffer sheet in the present embodiment includes a thermosetting composition layer obtained by forming the buffer sheet composition in the present embodiment into a sheet.
  • the buffer sheet may include a support on or above one surface or both surfaces of the buffer sheet.
  • the buffer sheet composition When forming the buffer sheet composition into the form of a sheet, it is preferable to use the buffer sheet composition in the form of a varnish containing a solvent, from the viewpoint of workability.
  • the buffer sheet can be obtained by coating the varnish of the buffer sheet composition on or above a support, and drying the coating to form a composition layer. Since the buffer sheet is interposed between the electronic component(s) and the heating member, in the present embodiment, the buffer sheet preferably includes a support on or above both surfaces of the buffer sheet.
  • the support examples include: organic resin films, for example, polyolefin films such as polyethylene films and polyvinyl chloride films, polyethylene terephthalate films, polyethylene naphthalate films, polycarbonate films, and polyimide films; release papers; and metal foils such as copper foils and aluminum foils.
  • the support may include a release layer.
  • polyimide films, and metal foils such as copper foils and aluminum foils are preferred from the viewpoint of the heat resistance.
  • the coating of the varnish on or above the support can be carried out by a known method. Specific examples thereof include methods such as comma coating, die coating, lip coating and gravure coating.
  • the method of drying the varnish coated on or above the support is not particularly limited, as long as at least a part of the solvent contained in the varnish can be removed.
  • the drying method can be selected as appropriate from commonly used drying methods.
  • a coating method may also be used in which a photoreaction by UV irradiation is carried out to provide coating properties.
  • the composition layer preferably has an average thickness of, for example, 20 ⁇ m or more, more preferably 50 ⁇ m or more, and still more preferably 100 ⁇ m or more, from the viewpoint of reducing the positional deviation in the surface direction between the electronic component and the substrate. Further, the composition layer preferably has an average thickness of, for example, 300 ⁇ m or less, and more preferably 200 ⁇ m or less, from the viewpoint of the film forming properties.
  • the buffer sheet including the support(s) preferably has an average thickness of, for example, from 50 ⁇ m to 400 ⁇ m. The thickness of the composition layer or the buffer sheet can be measured using a micrometer or the like.
  • the above described buffer sheet in present embodiment is interposed between a heating member and an electronic component, when the electronic component is heated by the heating member so as to mount the electronic component on a substrate, thereby producing an electronic component device.
  • the method of producing an electronic component device using the buffer sheet in the present embodiment preferably includes a heating process in which, the electronic component is heated by the heating member through the buffer sheet, in a state where the electronic component and the substrate are in contact with each other with bumps being interposed therebetween, so that the electronic component and the substrate are joined together with the bumps being interposed therebetween.
  • the term “join” is used to mean that an electronic component and a substrate are electrically connected via bumps.
  • the method of producing an electronic component device using the buffer sheet in the present embodiment further includes: an application process in which the underfill material is applied on at least one surface selected from the group consisting of the surface of the electronic component facing the substrate, and the surface of the substrate facing the electronic component; and a pressurizing process in which a pressure is applied to the electronic component and the substrate in a state where the electronic component and the substrate face each other with the bumps being interposed therebetween, so that the gap between the electronic component and the substrate is filled with the underfill material, and that the electronic component and the substrate are brought into contact with each other with the bumps being interposed therebetween.
  • the production of the device is carried out, for example, as follows.
  • the underfill material is applied between an electronic component and a substrate, and a pressure is applied to the electronic component and the substrate in a state where the electronic component and the substrate face each other with bumps being interposed therebetween, so that the gap between the electronic component and the substrate is filled with the underfill material, and that the electronic component and the substrate are brought into contact with each other with the bumps being interposed therebetween.
  • the electronic component is heated by a heating member, so that the electronic component and the substrate are joined together with the bumps being interposed therebetween, and that the underfill material is cured.
  • the buffer sheet in the present embodiment it becomes possible to reduce the positional deviation between the electronic component and the substrate, as well as to collectively produce a plurality of electronic component devices.
  • the underfill material is applied on at least one surface selected from the group consisting of the surface of the electronic component facing the substrate, and the surface of the substrate facing the electronic component.
  • a specific method of carrying out the application process is not particularly limited, and the underfill material may be applied on the surface of the substrate alone or on the surface of the electronic component alone, or alternatively, on both the surfaces.
  • the method of applying the underfill material on the surface of the electronic component alone is preferred from the viewpoint of productivity.
  • the type of the substrate is not particularly limited.
  • An example of the substrate may be, for example, a wiring board obtained by forming a conductor wiring including a connection electrode, on: an organic substrate including a fiber base material such as FR4 or FR5; a built-up organic substrate which does not include a fiber base material; an organic film such as a polyimide film or a polyester film; or a base material including an inorganic material such as ceramic, glass or silicon.
  • a circuit, a substrate electrode and the like may be formed on the substrate, by a method such as a semi-active method or a subtractive method.
  • the substrate may be, for example, a silicon wafer.
  • the silicon wafer may be one in which a conductor wiring including a connection electrode is formed on the surface thereof. Further, the silicon wafer may be one including a through electrode (silicon through electrode; TSV (Through Silicon Via)).
  • the electronic component may be, for example, a die (chip) itself which is not packaged by a resin or the like, or a semiconductor package referred to as CSP, BGA (Ball Grid Array) etc., which is packaged by a resin or the like.
  • the electronic component may have a configuration in which a plurality of dies are arranged in a thickness direction, or a configuration in which a plurality of dies are connected via a through electrode (TSV) in the heating process.
  • TSV through electrode
  • the underfill material may be applied on one surface or on both surfaces of the set of dies.
  • a material of the bumps is not particularly limited, and can be selected from commonly used materials such as solder and the like.
  • the bumps may each be a combination of a metal post and a solder portion. From the viewpoint of environmental consideration and safety, a lead-free solder such as an Ag—Cu-based solder, a Sn—Cu-based solder, or a Sn—Bi-based solder may be used for the bumps, in addition to Cu or Au.
  • the bumps may be formed on the side of the electronic component, or on the side of the substrate.
  • the bumps are made of a lead-free solder
  • minute gaps are likely to be formed around the bumps, due to poor wettability of the lead-free solder.
  • the use of the buffer sheet in the present embodiment enables to effectively reduce the occurrence of the positional deviation, even in a case in which the lead-free solder is used for forming the bumps.
  • underfill material a commonly used underfill material can be used. Examples thereof include underfill materials disclosed in JP-A 2013-151642, JP-A 2013-219285, JP-A 2015-032637, JP-A 2015-032638, JP-A 2015-083633, and JP-A 2015-083634.
  • the underfill material is preferably a material which does not contain electrically conductive particles, from the viewpoint of ensuring the connection reliability.
  • a shape of the underfill material is not particularly limited, and the underfill material may be in the form of a film or liquid. From the viewpoint of reducing the positional deviation in the surface direction between the electronic component and the substrate in the pressurizing process, the underfill material is preferably in the form of a film.
  • the method of applying the underfill material on the electronic component or the substrate is not particularly limited.
  • examples of the application method include: a screen printing method; and a method which utilizes a dispenser such as an air dispenser, a jet dispenser or an Auger type dispenser.
  • examples of the application method include a method which utilizes a laminator employing a diaphragm system or a laminator employing a rolling system.
  • the shape of the underfill material when the underfill material is applied on the electronic component or the substrate is not particularly limited.
  • the underfill material in the form of a liquid is applied on the substrate, it can be carried out, for example, by: a method in which the underfill material is applied over the entire area corresponding to a mounting position of the electronic component; a method in which the underfill material is applied in the shape of a cross consisting of two lines along the diagonals of a square which corresponds to the mounting position of the electronic component; a method in which the underfill material is applied in the shape of two crosses consisting of a first cross as described above, and a second cross which is shifted 45° from the first cross and overlaid thereon; or a method in which the underfill material is applied at one point in the center of the mounting position of the electronic component.
  • the underfill material is preferably applied in the shape of the first cross as described above, or in the shape of two crosses consisting of the first cross, and the second cross shifted 45° from the first cross and overlaid thereon.
  • the underfill material is preferably applied over the area of the mounting position of the electronic component, including the location where the substrate electrode is provided.
  • the underfill material in the form of a film is applied on the electronic component or on the substrate
  • the underfill material is preferably applied over the entire area of the surface of the electronic component facing the substrate, or over the entire area of the mounting position of the electronic component, on the substrate.
  • a temperature at which the underfill material is applied on the substrate or the electronic component can be selected depending on the properties of the underfill material and the like.
  • the temperatures of the underfill material and the surface of the electronic component are each adjusted to, for example, from 50° C. to 100° C. From the viewpoint of preventing a void entrainment during the lamination process, it is more preferable that the temperatures are each adjusted to from 70° C. to 90° C., and still more preferably around 80° C.
  • a pressure is applied to the electronic component and the substrate in a state where the electronic component and the substrate face each other with the bumps being interposed therebetween, so that the gap between the electronic component and the substrate is filled with the underfill material, and that the electronic component and the substrate are brought into contact with each other with the bumps being interposed therebetween.
  • a temperature of the underfill material in the pressurizing process is preferably less than a curing temperature of the underfill material.
  • the filling temperature of the underfill material is preferably less than 200° C.
  • a lower limit of the filling temperature of the underfill material is not particularly limited.
  • the filling temperature of the underfill material is preferably, for example, 30° C. or higher, more preferably 50° C. or higher, and still more preferably 80° C. or higher, from the viewpoint of decreasing the viscosity of the resin.
  • Specific method of adjusting the filling temperature of the underfill material is not particularly limited. Examples thereof include a method in which the temperature of at least one of the electronic component or the substrate is adjusted to the filling temperature, and then the electronic component and the substrate are brought into contact with the underfill material.
  • the magnitude of the pressure to be applied in the pressurizing process can be set in the same manner as in a mounting process of a common flip-chip, taking into consideration the number of bumps or variation in their heights, the amount of deformation, due to the pressure, of the bumps or the wiring on the substrate that receives the bumps, and the like.
  • the pressure is preferably set, for example, such that one piece of bump receives a load of about from 1 g to 10 g.
  • the pressure is preferably set, for example, such that the load applied to one piece of chip is about from 10 N to 100 N.
  • the electronic component is heated by the heating member through the buffer sheet, in a state where the electronic component and the substrate are in contact with each other with the bumps being interposed therebetween, so that the electronic component and the substrate are joined together with the bumps being interposed therebetween.
  • the buffer sheet and the underfill material are cured.
  • the heating process may be a process in which the buffer sheet is first cured without curing the underfill material, followed by curing the underfill material.
  • the heating process is preferably carried out at a temperature equal to or higher than a melting point of the bumps, from the viewpoint of securing the connection between the electronic component and the substrate via the bumps.
  • the heating process is preferably carried out at a temperature at which a metal junction is formed between each bump and the wiring and the like on the substrate.
  • the heating process is preferably carried out at a temperature of 230° C. or higher.
  • the heating process is preferably carried out, for example, at a temperature of 320° C. or lower, and more preferably at a temperature of 300° C. or lower.
  • connection by solder joining has a high connection reliability, although it requires a higher temperature as compared to the connection method using electrically conductive particles, or the like. Accordingly, this method is also applicable in a case in which the number of the connecting portions is further increased, and in a case in which the pitch between adjacent connecting portions is further reduced.
  • the buffer sheet preferably has a heat resistance capable of withstanding the high-temperature mounting at a temperature of 200° C. or higher.
  • the temperature of the substrate and the temperature of the electronic component in the heating process are within the ranges of, for example, from 25° C. to 200° C. and from 230° C. to 300° C., respectively.
  • the numbers of the electronic components and the substrates in the heating process are not particularly limited. From the viewpoint of production efficiency, it is preferable that a plurality of the electronic components and the substrates are heated collectively. In a case in which a plurality of the electronic components and the substrates are heated collectively, it is preferable that one piece of buffer sheet is spread over the plurality of the electronic components. It is preferable that the numbers of the electronic components and the substrates to be heated collectively are each, for example, two or more, more preferably three or more, and still more preferably five or more. As the numbers of the electronic components and the substrates which are heated collectively increase, the effect provided by the production method using the buffer sheet in the present embodiment will be more pronounced.
  • the heating process is carried out within a short period of time, from the viewpoint of the production efficiency.
  • the heating process is preferably carried out at a temperature rise rate of, for example, 5° C./sec or more, more preferably at 10° C./sec or more, and still more preferably at 15° C./sec or more.
  • the heating process is preferably carried out for a shortest possible heating time, although the heating time varies depending on the type of material included in the bumps.
  • the heating time is preferably, for example, 30 seconds or less, more preferably 20 seconds or less, and still more preferably 10 seconds or less.
  • the heating time is preferably, for example, 30 seconds or less.
  • the curing rate of the buffer sheet is higher than the curing rate of the underfill material.
  • the curing rates are adjusted such that the buffer sheet is cured faster than the underfill material, there is a tendency that the thermal expansion during the heating is further reduced, and the positional deviation is more easily reduced.
  • an underfill material 3 is applied on the surface of a semiconductor chip (electronic component) 1 on the side provided with solder bumps 2 (on the side facing connection pads 4 on a substrate 5 ) (application process).
  • the semiconductor chip 1 and the substrate 5 are arranged so as to face each other with the solder bumps 2 being interposed therebetween.
  • a pressurizing member 6 is used to apply a pressure from above the semiconductor chip 1 , so that the gap between the semiconductor chip 1 and the substrate 5 is filled with the underfill material 3 , and that the semiconductor chip 1 and the connection pads 4 on the substrate 5 are brought into contact with the solder bumps 2 being interposed therebetween (pressurizing process).
  • a heating member 8 is pressed against the respective semiconductor chips 1 through the buffer sheet 7 , in a state where each semiconductor chip 1 and the connection pads 4 on each substrate 5 are in contact with each other with the solder bumps 2 being interposed therebetween, so that each semiconductor chip 1 and the connection pads 4 on each substrate 5 are joined together with the solder bumps 2 being interposed therebetween, and that the buffer sheet 7 and each underfill material 3 are cured (heating process).
  • the electronic component device produced by the above described production method is, for example, one in which a substrate, a cured product of an underfill material and an electronic component are arranged in this order, in which the substrate and the electronic component are joined together with the bumps being interposed therebetween, and in which the gap between the substrate and the electronic component is filled with the cured product of the underfill material.
  • Such an electronic component device has a small positional deviation in the surface direction between the electronic component and the substrate, and has an excellent reliability.
  • the effect of the production method using the buffer sheet in the present embodiment is markedly exhibited, particularly in the case of producing an electronic component device in which the distance between the electronic component and the substrate, and the distance between the bumps, are short.
  • the average distance between the electronic component and the substrate in the electronic component device is preferably, for example, 50 ⁇ m or less, more preferably 40 ⁇ m or less, and still more preferably 30 ⁇ m or less.
  • the average distance between the bumps in the electronic component device is preferably, for example, 200 ⁇ m or less, more preferably 150 ⁇ m or less, still more preferably 100 ⁇ m or less, and particularly preferably 80 ⁇ m or less.
  • the substrate in the electronic component device may include an uneven portion due to a wiring pattern and a resist pattern.
  • the average width of the wiring pattern is from 50 ⁇ m to 300 ⁇ m
  • the average width of openings of the resist is from 50 ⁇ m to 150 ⁇ m
  • the average thickness of the resist has from 10 ⁇ m to 20 ⁇ m.
  • thermoplastic resin is synthesized as follows.
  • a “solution a” was prepared by mixing 125 g of methacrylic acid, 25 g of methyl methacrylate, 125 g of benzyl methacrylate, and 225 g of styrene, as polymerizable monomers, and 1.5 g of azobisisobutyronitrile.
  • the thus prepared solution a was added dropwise over four hours, to the above described blend of methyl cellosolve and toluene which had been heated to 80° C., and then the resultant was maintained at 80° C. for two hours, while stirring.
  • thermoplastic resin contained 46.2% by mass of non-volatile components (solids content), and had a weight average molecular weight of 45,000.
  • thermoplastic resin obtained in Synthesis Example 1 Into a flask equipped with an agitator, 58 g of the thermoplastic resin obtained in Synthesis Example 1, and 42 g of trimethylolpropane triacrylate (trade name “TMPT21”; manufactured by Hitachi Chemical Co., Ltd.) as a thermosetting compound were introduced. Thereafter, 2 g of 1,1-bis(t-butylperoxy)cyclohexane (trade name “PERHEXA C”; manufactured by Nippon Oils & Fats Co., Ltd.,) as a thermal polymerization initiator was further added to the flask, followed by stirring, to obtain a varnish.
  • TMPT21 trimethylolpropane triacrylate
  • PERHEXA C 1,1-bis(t-butylperoxy)cyclohexane
  • the resulting varnish was coated on a belt surface side of a polyimide film (trade name “CAPTON 100H”, average thickness: 25 ⁇ m; manufactured by Du Pont-Toray Co., Ltd.), followed by drying in a dryer controlled at 60° C. for 10 minutes, to obtain a sheet including a composition layer having an average thickness of 70 ⁇ m or 100 ⁇ m.
  • a polyimide film trade name “CAPTON 100H”, average thickness: 25 ⁇ m; manufactured by Du Pont-Toray Co., Ltd.
  • a polyimide film (trade name “CAPTON 100H”, average thickness: 25 ⁇ m; manufactured by Du Pont-Toray Co., Ltd.) was layered such that the belt surface thereof faces the side of the composition layer, and the resultant was laminated under the conditions of 60° C., 0.5 MPa, and 1.0 m/min, using a hot roll laminator, to obtain a buffer sheet A (average thickness: 120 ⁇ m) and a buffer sheet B (average thickness: 150 ⁇ m) each including the thermosetting composition layer.
  • CAPTON 100H average thickness: 25 ⁇ m; manufactured by Du Pont-Toray Co., Ltd.
  • a silicon chip (trade name “WALTS-TEG CC80-0101JY-MODEL 1”, bumps: Sn—Ag—Cu-based bumps, bump interval: 80 ⁇ m; manufactured by WALTS Co., Ltd.) having a size of 7.3 mm ⁇ 7.3 mm ⁇ 0.1 mm and having an aluminum wiring was prepared as an electronic component
  • a substrate (trade name “WALTS-KIT CC80-0102JY-MODEL 1”, solder resist: PSR4000-AUS703, base material: E679FGS; manufactured by WALTS Co., Ltd.) having a size of 18 mm ⁇ 18 mm ⁇ 0.4 mm and provided with a circuit was prepared as a substrate.
  • An underfill material in the form of a film was laminated on the electronic component whose temperature had been adjusted to 80° C., using a vacuum laminator (trade name “V130”; manufactured by Nichigo-Morton Co., Ltd.) employing a diaphragm system (application process).
  • the silicon chip laminated with the underfill material whose filling temperature had been adjusted to 80° C. was arranged such that the surface thereof provided with the bumps faces the side of the substrate, and a pressure was applied from above the silicon chip at a load of 120 N, by a pressurizing member, so that the bumps are brought into contact with the substrate (pressurizing process).
  • the underfill material applied on the silicon chip was fluidized due to the applied pressure, and filled the gap between the substrate and the silicon chip. In this manner, an electronic component-mounted substrate was produced.
  • the observation of delamination was carried out by observing the interior of each of the electronic component devices after being subjected to the heating process, using an ultrasonic observation apparatus (trade name “INSIGHT-300”; manufactured by Insight K.K.), and the evaluation of delamination was carried out according to the following evaluation criteria.
  • INSIGHT-300 manufactured by Insight K.K.
  • the confirmation of connectivity was carried out by confirming the conduction of each of the electronic component devices after being subjected to the heating process, using a tester (trade name “SK-6500”; manufactured by Kaise Corporation), and the evaluation of connectivity was carried out according to the following evaluation criteria.
  • the examination of the positional deviation was carried out by measuring the positional deviation in the surface direction between the solder bumps on the silicon chip and the connection pad portions of the substrate, in each of the electronic component devices after being subjected to the heating process, using an X-ray observation apparatus (trade name “XD-7600 NT100-CT; manufactured by Nordson Advanced Technology K. K.), and the evaluation of the positional deviation was carried out according to the following evaluation criteria. Note that the positional deviation was determined by performing the measurement at five locations in each device, and calculating the arithmetic mean value of the measured values.
  • the average positional deviation in the surface direction between the silicon chips and the connection pad portions of the substrates is less than 7 ⁇ m.
  • the average positional deviation in the surface direction between the silicon chips and the connection pad portions of the substrates is 7 ⁇ m or more but less than 10 ⁇ m.
  • the average positional deviation in the surface direction between the silicon chips and the connection pad portions of the substrates is 10 ⁇ m or more.
  • thermosetting compound 98.32 g of trimethylolpropane triacrylate (trade name “TMPT21”; manufactured by Hitachi Chemical Co., Ltd.) as a thermosetting compound was introduced. Thereafter, 0.15 g of 2-hydroxy-2-methyl-1-phenyl-propan-1-one (trade name “IRGACURE 1173”; manufactured by BASF Japan Ltd.) as a photopolymerization initiator, and 1.5 g of 1,1-bis(t-butylperoxy)cyclohexane (trade name “PERHEXA C”; manufactured by Nippon Oils & Fats Co., Ltd.) as a thermal polymerization initiator were further added to the flask, followed by stirring, to obtain a varnish.
  • TMPT21 2-hydroxy-2-methyl-1-phenyl-propan-1-one
  • IRGACURE 1173 manufactured by BASF Japan Ltd.
  • PERHEXA C 1,1-bis(t-butylperoxy)cyclohexane
  • the resulting varnish was coated on the belt surface side of a polyimide film (trade name “CAPTON 100H”, average thickness: 25 ⁇ m; manufactured by Du Pont-Toray Co., Ltd.), followed by irradiation of UV light at a light exposure of 200 mJ, using an UV light exposure apparatus, to obtain a sheet including a composition layer having an average thickness of 100 ⁇ m.
  • a polyimide film trade name “CAPTON 100H”, average thickness: 25 ⁇ m; manufactured by Du Pont-Toray Co., Ltd.
  • a polyimide film (trade name “CAPTON 100H”, average thickness: 25 ⁇ m; manufactured by Du Pont-Toray Co., Ltd.) was layered such that the belt surface thereof faces the side of the composition layer, and the resultant was laminated under the conditions of 60° C., 0.5 MPa, and 1.0 m/min, using a hot roll laminator, to obtain a buffer sheet C (average thickness: 150 ⁇ m) including the thermosetting composition layer.
  • Example 3 The same procedure as in Example 1 was repeated except that the buffer sheet C was used instead of the buffer sheet A, and that the tilt of the heating member was set as shown in Table 1, in the heating process, to produce electronic component-mounted substrates, and then to produce electronic component devices, of Example 3. Subsequently, for each of the resulting electronic component devices, the observation of delamination, the confirmation of connectivity, and the examination of the positional deviation between the silicon chip and the substrate were carried out, and the evaluations thereof were performed, in the same manner as in Example 1. The evaluation results are shown in Table 1.
  • Example 3 To the varnish prepared in Example 3, 20 g of silica particles (trade name “FB-SSDCH”, volume average particle size: 5.0 ⁇ m; manufactured by Denki Kagaku Kogyo K.K.) as an inorganic filler were added, followed by stirring, to obtain a varnish. Thereafter, the same procedure as in Example 3 was repeated except for using the thus obtained varnish, to obtain a buffer sheet D (thickness: 150 ⁇ m) including a thermosetting composition layer.
  • silica particles trade name “FB-SSDCH”, volume average particle size: 5.0 ⁇ m; manufactured by Denki Kagaku Kogyo K.K.
  • Example 3 The same procedure as in Example 1 was repeated except that the thermosetting sheet D was used instead of the thermosetting sheet A, and that the tilt of the heating member was set as shown in Table 1, in the heating process, to produce electronic component-mounted substrates, and then to produce electronic component devices, of Example 3. Subsequently, for each of the resulting electronic component devices, the observation of delamination, the confirmation of connectivity, and the examination of the positional deviation between the silicon chip and the substrate were carried out, and the evaluations thereof were performed, in the same manner as in Example 1. The evaluation results are shown in Table 1.
  • Example 1 The same procedure as in Example 1 was repeated except that no buffer sheet was used, and that the tilt of the heating member was set as shown in Table 1, in the heating process, to produce electronic component-mounted substrates, and then to produce electronic component devices, of Comparative Examples 1 and 2. Subsequently, for each of the resulting electronic component devices, the observation of delamination, the confirmation of connectivity, and the examination of the positional deviation between the silicon chip and the substrate were carried out, and the evaluations thereof were performed, in the same manner as in Example 1. The evaluation results are shown in Table 1.
  • Example 1 The same procedure as in Example 1 was repeated except that an aluminum foil (average thickness: 45 ⁇ m) was used instead of the buffer sheet A, and that the tilt of the heating member was set as shown in Table 1, in the heating process, to produce electronic component-mounted substrates, and then to produce electronic component devices, of Comparative Example 3. Subsequently, for each of the resulting electronic component devices, the observation of delamination, the confirmation of connectivity, and the examination of the positional deviation between the silicon chip and the substrate were carried out, and the evaluations thereof were performed, in the same manner as in Example 1. The evaluation results are shown in Table 1
  • Example 3 Example 4 Example 1 Example 2 Example 3 Buffer sheet A B C D Not provided Not provided Aluminum foil Average thickness of buffer sheet ( ⁇ m) 120 150 150 150 — — 45 Tilt of heating member ( ⁇ m) 50 50 0 0 0 50 0 Load applied in pressurizing process (N) 120 Temperature in pressurizing process (° C.) 80 Load applied in heating process (N) 600 Temperature in heating process (° C.) 260 Results of observation of delamination A A A A A A B B Results of confirmation of connectivity A A A A A B B Results of examination of positional deviation A A A A C C C
  • the use of the buffer sheet including the thermosetting composition layer allows for reducing the positional deviation between the electronic component and the substrate, as well as producing a plurality of electronic component devices collectively. Further, the electronic component device produced using the buffer sheet including the thermosetting composition layer is less susceptible to delamination, and has an excellent connectivity and reliability.

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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3678166A4 (en) * 2017-08-28 2021-06-09 Hitachi Chemical Co., Ltd. METHOD OF MANUFACTURING A POWER SEMI-CONDUCTOR COMPONENT, SHEET METAL FOR HOT PRESSING AND THERMAL RESIN COMPOSITION FOR HOT PRESSING
JP2019041097A (ja) * 2017-08-28 2019-03-14 日立化成株式会社 電子部品装置を製造する方法、熱プレス用シート及び熱プレス用熱硬化性樹脂組成物
JP2019125769A (ja) * 2018-01-11 2019-07-25 日立化成株式会社 半導体装置の製造方法
JP2019153767A (ja) * 2018-02-28 2019-09-12 日立化成株式会社 半導体装置及びその製造方法
JP7180152B2 (ja) * 2018-07-11 2022-11-30 昭和電工マテリアルズ株式会社 電子部品装置を製造する方法、熱プレス用シート及び熱プレス用熱硬化性樹脂組成物
CN111276419B (zh) * 2018-12-04 2023-02-24 昆山微电子技术研究院 一种固相键合装置
JP7211822B2 (ja) * 2019-01-09 2023-01-24 株式会社東京精密 電子部品のポッティング方法及びそれを用いた電子装置
JP7103515B2 (ja) 2020-01-29 2022-07-20 株式会社村田製作所 電極付き受動部品及び電極付き受動部品の集合体
CN115210855A (zh) * 2020-03-04 2022-10-18 Tdk株式会社 元件阵列的加压装置、制造装置和制造方法
WO2023062671A1 (ja) * 2021-10-11 2023-04-20 株式会社レゾナック 電子部品装置の製造方法、電子部品の実装方法及び緩衝シート
WO2023238253A1 (ja) * 2022-06-07 2023-12-14 株式会社レゾナック 緩衝シート、電子部品の実装方法及び電子部品装置の製造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4652398A (en) * 1985-09-12 1987-03-24 Stauffer Chemical Company Rapid curing, thermally stable adhesive composition comprising epoxy resin, polyimide, reactive solvent, and crosslinker
JP2002060445A (ja) * 2000-08-23 2002-02-26 Showa Highpolymer Co Ltd 耐熱性透明フィルムおよびその製造方法
US20020119298A1 (en) * 1998-05-26 2002-08-29 Hiroshi Sugawa Epoxy optical sheet and process for producing the same
US20100178501A1 (en) * 2006-01-23 2010-07-15 Takashi Masuko Adhesive composition, film-like adhesive, adhesive sheet, and semiconductor device made with the same
US20140106106A1 (en) * 2011-03-11 2014-04-17 Nitto Denko Corporation Dicing film with protecting film

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1187777A (ja) * 1997-09-02 1999-03-30 Oki Electric Ind Co Ltd Ｌｅｄ半導体装置の実装方法
JP3896017B2 (ja) * 2001-08-03 2007-03-22 松下電器産業株式会社 半導体実装体の製造方法、および半導体実装体の製造装置
JP2004031510A (ja) 2002-06-24 2004-01-29 Towa Corp 樹脂部材
JP3902558B2 (ja) * 2003-03-07 2007-04-11 信越化学工業株式会社 熱圧着用シリコーンゴムシート
AU2003221149A1 (en) 2003-03-25 2004-10-18 Fujitsu Limited Method for manufacturing electronic component-mounted board
JP2006274248A (ja) * 2005-03-03 2006-10-12 Toray Ind Inc 半導体装置用接着剤付きテープおよびその製造方法、それを用いたパターン加工テープ
JP2007001302A (ja) * 2005-05-24 2007-01-11 Nitto Denko Corp 熱伝導性複合シート、それを用いた電子部品アッセンブリーの製造方法
WO2006129520A1 (ja) * 2005-05-30 2006-12-07 Nitto Denko Corporation 圧着離型シートおよび巻回体
JP2008547205A (ja) 2005-06-14 2008-12-25 キュービック・ウエハ・インコーポレーテッド チップコネクタ
US7781886B2 (en) * 2005-06-14 2010-08-24 John Trezza Electronic chip contact structure
JP2008193023A (ja) * 2007-02-08 2008-08-21 Sekisui Chem Co Ltd 半導体装置の製造方法及び半導体装置製造用耐熱シート
JP5456642B2 (ja) 2009-12-24 2014-04-02 日東電工株式会社 フリップチップ型半導体裏面用フィルム
JP5367656B2 (ja) * 2010-07-29 2013-12-11 日東電工株式会社 フリップチップ型半導体裏面用フィルム及びその用途
JP5349432B2 (ja) * 2010-09-06 2013-11-20 日東電工株式会社 電子部品装置の製法およびそれに用いる電子部品封止用樹脂組成物シート
JP5614217B2 (ja) * 2010-10-07 2014-10-29 デクセリアルズ株式会社 マルチチップ実装用緩衝フィルム
JP5849405B2 (ja) 2011-02-17 2016-01-27 日立化成株式会社 半導体装置の製造方法
WO2012133760A1 (ja) * 2011-03-30 2012-10-04 ボンドテック株式会社 電子部品実装方法、電子部品実装システムおよび基板
JPWO2013133015A1 (ja) * 2012-03-07 2015-07-30 東レ株式会社 半導体装置の製造方法および半導体装置の製造装置
JP6037300B2 (ja) 2012-03-15 2016-12-07 パナソニックＩｐマネジメント株式会社 回路部材接合構造体
JP5978725B2 (ja) 2012-04-11 2016-08-24 日立化成株式会社 半導体装置の製造方法
CN104246998A (zh) * 2012-06-06 2014-12-24 夏普株式会社 部件压接装置
WO2014010258A1 (ja) * 2012-07-13 2014-01-16 パナソニック株式会社 半導体封止用アクリル樹脂組成物とそれを用いた半導体装置およびその製造方法
JP2014060241A (ja) * 2012-09-18 2014-04-03 Toray Ind Inc 半導体装置の製造方法
JP2014103257A (ja) 2012-11-20 2014-06-05 Nitto Denko Corp 電子部品装置の製造方法、及び、電子部品装置
JP5943898B2 (ja) * 2012-11-29 2016-07-05 日東電工株式会社 熱硬化性樹脂シート及び電子部品パッケージの製造方法
WO2014125536A1 (ja) 2013-02-14 2014-08-21 シャープ株式会社 半導体モジュールおよび半導体チップ実装方法
JP2014179419A (ja) * 2013-03-14 2014-09-25 Alpha- Design Kk 電子部品の接合方法
JP2015170690A (ja) * 2014-03-06 2015-09-28 信越化学工業株式会社 Ｌｅｄチップ圧着用熱伝導性複合シート及びその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4652398A (en) * 1985-09-12 1987-03-24 Stauffer Chemical Company Rapid curing, thermally stable adhesive composition comprising epoxy resin, polyimide, reactive solvent, and crosslinker
US20020119298A1 (en) * 1998-05-26 2002-08-29 Hiroshi Sugawa Epoxy optical sheet and process for producing the same
JP2002060445A (ja) * 2000-08-23 2002-02-26 Showa Highpolymer Co Ltd 耐熱性透明フィルムおよびその製造方法
US20100178501A1 (en) * 2006-01-23 2010-07-15 Takashi Masuko Adhesive composition, film-like adhesive, adhesive sheet, and semiconductor device made with the same
US20140106106A1 (en) * 2011-03-11 2014-04-17 Nitto Denko Corporation Dicing film with protecting film

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