JP5614217B2 - マルチチップ実装用緩衝フィルム - Google Patents
マルチチップ実装用緩衝フィルム Download PDFInfo
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- JP5614217B2 JP5614217B2 JP2010227420A JP2010227420A JP5614217B2 JP 5614217 B2 JP5614217 B2 JP 5614217B2 JP 2010227420 A JP2010227420 A JP 2010227420A JP 2010227420 A JP2010227420 A JP 2010227420A JP 5614217 B2 JP5614217 B2 JP 5614217B2
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- chip
- light
- buffer film
- resin layer
- film
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- H—ELECTRICITY
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- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/56—Materials, e.g. epoxy or silicone resin
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- B32B27/06—Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material
- B32B27/08—Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
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Description
工程(A)
複数のチップ素子を、接着剤を介して基板にアライメントし、仮貼りする工程;
工程(B)
チップ素子とボンディングヘッドとの間に、上述のマルチチップ実装用緩衝フィルムを、その耐熱性樹脂層がチップ素子側になるように配置する工程;
工程(C)
マルチチップ実装用緩衝フィルムを介して、複数のチップ素子をボンディングヘッドで基板に対し加熱加圧することにより基板に接続する工程
を有する製造方法を提供する。
まず、チップ素子を、接着剤を介して基板にアライメントし、仮貼りする。具体的には、図2に示すように、ステンレススチール等からなる公知の熱圧着用のステージ21上に配線22とバンプ23とが形成された基板24を配置し、接着剤25を介してチップ素子26をフリップチップ方式でアライメントし、仮貼りする。チップ素子26のアライメント操作並びに仮貼り操作自体については、特に制限はなく、従来のマルチチップモジュールの製造方法におけるアライメント操作並びに仮貼り操作を適用することができる。
次に、図3に示すように、チップ素子26と、好ましくは金属圧着面を有し、ヒーターを備えたボンディングヘッド27との間に、本発明のマルチチップ実装用緩衝フィルム10を配置する。この場合、マルチチップ実装用緩衝フィルム10の耐熱性樹脂層1がチップ素子26側になるようにする。
次に、図5に示すように、マルチチップ実装用緩衝フィルム10を介して、複数のチップ素子26をボンディングヘッド27で基板24に対し加熱加圧する。加熱加圧終了後に、図6に示すマルチチップモジュール50を得ることができる。
(マルチチップ実装用緩衝フィルムの作製)
表1に示す耐熱性樹脂フィルム(耐熱性樹脂層)に、表1のシリコーン系樹脂組成物をスクリーン印刷法により塗布し、120℃で1時間乾燥させて柔軟性樹脂層を形成することにより、マルチチップ実装用緩衝フィルムを作製した。
ポリエステル樹脂フィルム: テイジンテトロンフィルム、帝人(株)
ポリ塩化ビニル樹脂フィルム: エピロンCB3005、太平化学製品(株)
ポリオレフィン樹脂フィルム: SAN8041、(株)テックジャム
フッ素樹脂フィルム(ポリテトラフルオロエチレン):ニフトロン、日東電工(株)
シリコーン: KE−1281、X−32−2020、信越シリコーン(株)
シリコーン: XE13−1822、MOMENTIVE社
ジメチルシリコーン: KER−2600、信越シリコーン(株)
ジメチルシリコーン: KER−2500、信越シリコーン(株)
白色針状無機粒子と、球状樹脂の表面を金メッキ処理した導電粒子(粒径5μm)とをエポキシ硬化系接着剤(CEL2021P−MeHHPAを主成分とした接着性バインダ)からなる熱硬化性樹脂組成物に混合し、光反射性異方性導電接着剤を作製した。白色針状無機粒子の添加量は、熱硬化性樹脂組成物に対して12.0体積%とした。白色針状無機粒子としては、長方向粒径1.7μm、短方向粒径0.13μm(アスペクト比13.1)の二酸化チタン(TiO2)ウィスカを使用した。また、導電粒子の添加量は、熱硬化性樹脂組成物に対して10質量%とした。
100μmピッチの銅配線にNi/Au(5.0μm厚/0.3μm厚)メッキ処理した配線を有し、20個のLED素子を実装可能なガラスエポキシ基板に、バンプホルダ(FB700、カイジョー(株))を用いて10μm高の金(Au)バンプを形成した。この金バンプ付きガラスエポキシ基板に、前述の異方性導電接着剤を15μm厚となるように塗布し、その上に0.3mm角のLEDチップ素子20個を搭載し、仮貼りした。金属製の加熱加圧ヘッドを備えたフリップチップボンダーを用いて、この仮貼りしたLEDチップ素子と加熱加圧ヘッドとの間に実施例又は比較例のマルチチップ実装用緩衝フィルムを配し、200℃で30秒間、本加熱加圧することによりマルチチップモジュールを得た。
まず、得られた直後のマルチチップモジュールの導通抵抗をカーブトレーサー(TCT−2004、國洋電機工業(株))を用いて測定した。得られた結果を表1に示す。次に、マルチチップモジュールを冷熱サイクル試験(TCT:−40℃及び100℃の雰囲気に各30分間曝し、これを1サイクルとする冷熱サイクルを500サイクル又は1000サイクル実施)後、再度、導通抵抗を測定した。得られた結果を表1に示す。
AA: 初期Vf値からのVf値の上昇分が±0.05V未満
A: 初期Vf値からのVf値の上昇分が±0.05V以上未満±0.07V未満
B: 初期Vf値からのVf値の上昇分が±0.07V以上±0.1V未満
C: 初期Vf値からのVf値の上昇分が±0.1V以上
得られたマルチチップモジュールの外観を顕微鏡を用いて観察し、LEDチップ素子と基板のバンプとの間のずれを観察し、以下の基準で評価した。
AA: LED素子の電極と基板のバンプとの間でずれが全くない場合
A: LED素子の電極と基板のバンプとの間で一部ずれが観察されたが、実用上問題がない場合
B: LED素子の電極と基板のバンプとの間でずれが観察されたが、電気的接続は得られている場合
C: LED素子の電極と基板のバンプとの間で著しくずれが観察され、電気的接続が全くない場合
2 柔軟性樹脂層
10 マルチチップ実装用緩衝フィルム
21 ステージ
22 配線
23 バンプ
24 基板
25 接着剤
26 チップ素子
27 ボンディングヘッド
50 マルチチップモジュール
Claims (7)
- 耐熱性樹脂層と、その上に形成された柔軟性樹脂層とを有するマルチチップ実装用緩衝フィルムであって、
耐熱性樹脂層が、80ppm/℃以下の線膨張係数を有するポリイミド樹脂フィルム、ポリエステル樹脂フィルム、ポリ塩化ビニル樹脂フィルム、ポリオレフィン樹脂フィルム又はフッ素樹脂フィルムであり、
柔軟性樹脂層が、JIS−K6253によるショアA硬度が10〜80であるアニオンリビング重合性のシリコーン樹脂組成物から形成されたものであるマルチチップ実装用緩衝フィルム。 - 耐熱性樹脂層の層厚が200μm以下であり、柔軟性樹脂層の層厚が10μm以上である請求項1記載のマルチチップ実装用緩衝フィルム。
- 基板上に複数のチップ素子を接着剤を介してボンディングヘッドにより加熱加圧することによりマルチチップ実装してなるマルチチップモジュールの製造方法において、以下の工程(A)〜(C):
工程(A)
複数のチップ素子を、接着剤を介して基板にアライメントし、仮貼りする工程;
工程(B)
チップ素子とボンディングヘッドとの間に、請求項1または2記載のマルチチップ実装用緩衝フィルムを、その耐熱性樹脂層がチップ素子側になるように配置する工程
;
工程(C)
マルチチップ実装用緩衝フィルムを介して、複数のチップ素子をボンディングヘッドで基板に対し加熱加圧することにより接続する工程
を有する製造方法。 - チップ素子が、LED素子である請求項3記載の製造方法。
- マルチチップ実装用緩衝フィルムが、枚葉で適用される請求項3又は4記載の製造方法。
- マルチチップ実装用緩衝フィルムが、ロールツーロールで適用される請求項3又は4記載の製造方法。
- 接着剤が、光反射性針状絶縁粒子を含有する異方性導電接着剤である請求項3〜6のいずれかに記載の製造方法。
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US13/805,553 US8758546B2 (en) | 2010-10-07 | 2011-09-12 | Buffer film for multi-chip packaging |
CN201180048307.3A CN103155128B (zh) | 2010-10-07 | 2011-09-12 | 多芯片安装用缓冲膜 |
KR1020137008719A KR101853151B1 (ko) | 2010-10-07 | 2011-09-12 | 멀티칩 실장용 완충 필름 |
EP11830472.4A EP2626894B1 (en) | 2010-10-07 | 2011-09-12 | Buffering film for multichip mounting |
PCT/JP2011/070691 WO2012046539A1 (ja) | 2010-10-07 | 2011-09-12 | マルチチップ実装用緩衝フィルム |
TW100133168A TWI511333B (zh) | 2010-10-07 | 2011-09-15 | Multi - wafer structure with buffer film |
HK13112538.9A HK1185182A1 (zh) | 2010-10-07 | 2013-11-07 | 多芯片安裝用緩衝膜 |
US14/275,460 US20140248477A1 (en) | 2010-10-07 | 2014-05-12 | Buffer film for multi-chip packaging |
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TW201216522A (en) | 2012-04-16 |
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CN103155128B (zh) | 2016-02-17 |
KR101853151B1 (ko) | 2018-04-27 |
JP2012084582A (ja) | 2012-04-26 |
KR20130120457A (ko) | 2013-11-04 |
EP2626894A4 (en) | 2016-03-02 |
WO2012046539A1 (ja) | 2012-04-12 |
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US20130092310A1 (en) | 2013-04-18 |
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