TWI859828B - 配線基板及安裝構造體 - Google Patents

配線基板及安裝構造體 Download PDF

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Publication number
TWI859828B
TWI859828B TW112115820A TW112115820A TWI859828B TW I859828 B TWI859828 B TW I859828B TW 112115820 A TW112115820 A TW 112115820A TW 112115820 A TW112115820 A TW 112115820A TW I859828 B TWI859828 B TW I859828B
Authority
TW
Taiwan
Prior art keywords
electrode
insulating layer
conductor
aforementioned
wiring
Prior art date
Application number
TW112115820A
Other languages
English (en)
Chinese (zh)
Other versions
TW202410318A (zh
Inventor
川瀬亜紀
城下誠
Original Assignee
日商京瓷股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商京瓷股份有限公司 filed Critical 日商京瓷股份有限公司
Publication of TW202410318A publication Critical patent/TW202410318A/zh
Application granted granted Critical
Publication of TWI859828B publication Critical patent/TWI859828B/zh

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • H05K1/116Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • G01R31/2815Functional tests, e.g. boundary scans, using the normal I/O contacts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/0245Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/685Shapes or dispositions thereof comprising multiple insulating layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/0939Curved pads, e.g. semi-circular or elliptical pads or lands
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09454Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • H05K2201/09527Inverse blind vias, i.e. bottoms outwards in multilayer PCB; Blind vias in centre of PCB having opposed bottoms
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09618Via fence, i.e. one-dimensional array of vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • H10W70/654Top-view layouts
    • H10W70/655Fan-out layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69Insulating materials thereof
    • H10W70/695Organic materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
TW112115820A 2022-04-28 2023-04-27 配線基板及安裝構造體 TWI859828B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022074443 2022-04-28
JP2022-074443 2022-04-28

Publications (2)

Publication Number Publication Date
TW202410318A TW202410318A (zh) 2024-03-01
TWI859828B true TWI859828B (zh) 2024-10-21

Family

ID=88518842

Family Applications (1)

Application Number Title Priority Date Filing Date
TW112115820A TWI859828B (zh) 2022-04-28 2023-04-27 配線基板及安裝構造體

Country Status (7)

Country Link
US (1) US20250267792A1 (https=)
EP (1) EP4518585A1 (https=)
JP (1) JPWO2023210526A1 (https=)
KR (1) KR20240164943A (https=)
CN (1) CN119096701A (https=)
TW (1) TWI859828B (https=)
WO (1) WO2023210526A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI889335B (zh) * 2024-05-13 2025-07-01 矽品精密工業股份有限公司 承載結構及具有該承載結構之電子封裝件

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6133134A (en) * 1997-12-02 2000-10-17 Intel Corporation Ball grid array integrated circuit package
JP2012160560A (ja) * 2011-01-31 2012-08-23 Kyocer Slc Technologies Corp 配線基板
TW201536130A (zh) * 2013-12-04 2015-09-16 日本特殊陶業股份有限公司 內建零件的配線基板及其製造方法
TW201712845A (en) * 2015-06-26 2017-04-01 Renesas Electronics Corp Electronic device
TW201725681A (zh) * 2015-10-15 2017-07-16 瑞薩電子股份有限公司 半導體裝置
KR20180000654A (ko) * 2016-06-23 2018-01-03 삼성전기주식회사 팬-아웃 반도체 패키지
TW201826451A (zh) * 2016-09-28 2018-07-16 日商瑞薩電子股份有限公司 半導體裝置及其製造方法
TW201903991A (zh) * 2017-04-10 2019-01-16 日商瑞薩電子股份有限公司 半導體裝置
WO2019082987A1 (ja) * 2017-10-26 2019-05-02 Tdk株式会社 電子部品内蔵構造体
JP2019114675A (ja) * 2017-12-25 2019-07-11 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5361023U (https=) 1976-10-27 1978-05-24
JP2001264384A (ja) * 2000-03-21 2001-09-26 Sumitomo Metal Electronics Devices Inc 電気特性の測定用基板及びその測定方法
JP2010093155A (ja) * 2008-10-10 2010-04-22 Nec Corp 半導体装置及びその製造方法、積層配線基板
JP5361023B2 (ja) * 2009-10-30 2013-12-04 京セラSlcテクノロジー株式会社 配線基板の高周波信号伝送特性の測定方法およびそれに用いる配線基板

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6133134A (en) * 1997-12-02 2000-10-17 Intel Corporation Ball grid array integrated circuit package
JP2012160560A (ja) * 2011-01-31 2012-08-23 Kyocer Slc Technologies Corp 配線基板
TW201536130A (zh) * 2013-12-04 2015-09-16 日本特殊陶業股份有限公司 內建零件的配線基板及其製造方法
TW201712845A (en) * 2015-06-26 2017-04-01 Renesas Electronics Corp Electronic device
TW201725681A (zh) * 2015-10-15 2017-07-16 瑞薩電子股份有限公司 半導體裝置
KR20180000654A (ko) * 2016-06-23 2018-01-03 삼성전기주식회사 팬-아웃 반도체 패키지
TW201826451A (zh) * 2016-09-28 2018-07-16 日商瑞薩電子股份有限公司 半導體裝置及其製造方法
TW201903991A (zh) * 2017-04-10 2019-01-16 日商瑞薩電子股份有限公司 半導體裝置
WO2019082987A1 (ja) * 2017-10-26 2019-05-02 Tdk株式会社 電子部品内蔵構造体
JP2019114675A (ja) * 2017-12-25 2019-07-11 ルネサスエレクトロニクス株式会社 半導体装置

Also Published As

Publication number Publication date
US20250267792A1 (en) 2025-08-21
JPWO2023210526A1 (https=) 2023-11-02
TW202410318A (zh) 2024-03-01
WO2023210526A1 (ja) 2023-11-02
EP4518585A1 (en) 2025-03-05
CN119096701A (zh) 2024-12-06
KR20240164943A (ko) 2024-11-21

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