TWI855520B - 具有背金屬之半導體裝置及相關方法 - Google Patents
具有背金屬之半導體裝置及相關方法 Download PDFInfo
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- TWI855520B TWI855520B TW112103574A TW112103574A TWI855520B TW I855520 B TWI855520 B TW I855520B TW 112103574 A TW112103574 A TW 112103574A TW 112103574 A TW112103574 A TW 112103574A TW I855520 B TWI855520 B TW I855520B
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- metal layer
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- semiconductor device
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- die
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/232—Emitter electrodes for IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P54/00—Cutting or separating of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
- H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Die Bonding (AREA)
- Peptides Or Proteins (AREA)
- Preparation Of Compounds By Using Micro-Organisms (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/903,677 | 2018-02-23 | ||
| US15/903,677 US11114402B2 (en) | 2018-02-23 | 2018-02-23 | Semiconductor device with backmetal and related methods |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW202331974A TW202331974A (zh) | 2023-08-01 |
| TWI855520B true TWI855520B (zh) | 2024-09-11 |
Family
ID=67686161
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW112103574A TWI855520B (zh) | 2018-02-23 | 2019-02-22 | 具有背金屬之半導體裝置及相關方法 |
| TW108105997A TWI791775B (zh) | 2018-02-23 | 2019-02-22 | 具有背金屬之半導體裝置及相關方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW108105997A TWI791775B (zh) | 2018-02-23 | 2019-02-22 | 具有背金屬之半導體裝置及相關方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US11114402B2 (https=) |
| JP (2) | JP7353770B2 (https=) |
| CN (2) | CN120089649A (https=) |
| TW (2) | TWI855520B (https=) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10825725B2 (en) | 2019-01-25 | 2020-11-03 | Semiconductor Components Industries, Llc | Backside metal patterning die singulation systems and related methods |
| US20210013176A1 (en) * | 2019-07-09 | 2021-01-14 | Semiconductor Components Industries, Llc | Pre-stacking mechanical strength enhancement of power device structures |
| US11791212B2 (en) * | 2019-12-13 | 2023-10-17 | Micron Technology, Inc. | Thin die release for semiconductor device assembly |
| KR102786983B1 (ko) | 2020-09-29 | 2025-03-26 | 삼성전자주식회사 | 열 발산층을 구비한 반도체 패키지 |
| US11728424B2 (en) | 2020-10-26 | 2023-08-15 | Semiconductor Components Industries, Llc | Isolation in a semiconductor device |
| US11257759B1 (en) * | 2020-10-26 | 2022-02-22 | Semiconductor Components Industries, Llc | Isolation in a semiconductor device |
| JP2023035608A (ja) | 2021-09-01 | 2023-03-13 | キオクシア株式会社 | 半導体装置の製造方法 |
| JP2023169771A (ja) | 2022-05-17 | 2023-11-30 | 日東電工株式会社 | 半導体加工用粘着テープ |
| CN115332329B (zh) * | 2022-08-15 | 2025-08-05 | 重庆万国半导体科技有限公司 | 一种深缓冲层高密度沟槽的igbt器件及其制备方法 |
| CN116206977A (zh) * | 2023-02-10 | 2023-06-02 | 艾科微电子(深圳)有限公司 | 半导体器件及其制造方法 |
| TWI881455B (zh) * | 2023-09-07 | 2025-04-21 | 台星科企業股份有限公司 | 於晶圓基板背面貼合異質材料的方法 |
| TW202547633A (zh) * | 2024-06-13 | 2025-12-16 | 鼎極科技股份有限公司 | 局部晶圓減薄之系統及其方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140242756A1 (en) * | 2013-02-24 | 2014-08-28 | Alpha And Omega Semiconductor Incorporated | Method for preparing semiconductor devices applied in flip chip technology |
| US9640497B1 (en) * | 2016-06-30 | 2017-05-02 | Semiconductor Components Industries, Llc | Semiconductor backmetal (BM) and over pad metallization (OPM) structures and related methods |
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| JPH0870081A (ja) * | 1994-08-29 | 1996-03-12 | Nippondenso Co Ltd | Icパッケージおよびその製造方法 |
| JP3497722B2 (ja) * | 1998-02-27 | 2004-02-16 | 富士通株式会社 | 半導体装置及びその製造方法及びその搬送トレイ |
| JP4183375B2 (ja) * | 2000-10-04 | 2008-11-19 | 沖電気工業株式会社 | 半導体装置及びその製造方法 |
| JP4508396B2 (ja) * | 2000-10-30 | 2010-07-21 | パナソニック株式会社 | チップ型半導体装置及びその製造方法 |
| JP2003031526A (ja) * | 2001-07-16 | 2003-01-31 | Mitsumi Electric Co Ltd | モジュールの製造方法及びモジュール |
| US7084488B2 (en) * | 2001-08-01 | 2006-08-01 | Fairchild Semiconductor Corporation | Packaged semiconductor device and method of manufacture using shaped die |
| TWI229435B (en) * | 2002-06-18 | 2005-03-11 | Sanyo Electric Co | Manufacture of semiconductor device |
| JP4544876B2 (ja) * | 2003-02-25 | 2010-09-15 | 三洋電機株式会社 | 半導体装置の製造方法 |
| JP2005302816A (ja) * | 2004-04-07 | 2005-10-27 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2006339354A (ja) * | 2005-06-01 | 2006-12-14 | Tdk Corp | 半導体ic及びその製造方法、並びに、半導体ic内蔵モジュール及びその製造方法 |
| US7956459B2 (en) * | 2005-02-28 | 2011-06-07 | Infineon Technologies Ag | Semiconductor device and method of assembly |
| JP2008098529A (ja) | 2006-10-13 | 2008-04-24 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP2008153279A (ja) | 2006-12-14 | 2008-07-03 | Mitsui Chemicals Inc | ダイシング兼ダイボンディング用フィルム及び半導体チップの製造方法 |
| US20080242052A1 (en) * | 2007-03-30 | 2008-10-02 | Tao Feng | Method of forming ultra thin chips of power devices |
| JP5138325B2 (ja) * | 2007-09-27 | 2013-02-06 | 株式会社ディスコ | ウェーハの加工方法 |
| JP2010016188A (ja) | 2008-07-03 | 2010-01-21 | Sanyo Electric Co Ltd | 半導体装置の製造方法および半導体装置 |
| JP2010103300A (ja) * | 2008-10-23 | 2010-05-06 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| JP2010118573A (ja) | 2008-11-14 | 2010-05-27 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JP2010238901A (ja) * | 2009-03-31 | 2010-10-21 | Casio Computer Co Ltd | 半導体装置の製造方法 |
| JP5486865B2 (ja) | 2009-07-27 | 2014-05-07 | 株式会社ディスコ | 金属層付きチップの製造方法 |
| JP2012089813A (ja) * | 2010-09-24 | 2012-05-10 | Teramikros Inc | 半導体装置及び半導体装置の製造方法 |
| JP2012182239A (ja) | 2011-02-28 | 2012-09-20 | Panasonic Corp | 半導体装置の製造方法 |
| US9324659B2 (en) * | 2011-08-01 | 2016-04-26 | Stats Chippac, Ltd. | Semiconductor device and method of forming POP with stacked semiconductor die and bumps formed directly on the lower die |
| US8642385B2 (en) * | 2011-08-09 | 2014-02-04 | Alpha & Omega Semiconductor, Inc. | Wafer level package structure and the fabrication method thereof |
| JP2013069814A (ja) * | 2011-09-21 | 2013-04-18 | Renesas Electronics Corp | 半導体装置の製造方法 |
| JP2014011289A (ja) * | 2012-06-29 | 2014-01-20 | Ibiden Co Ltd | 電子部品及び電子部品の製造方法 |
| US9245861B2 (en) * | 2012-09-01 | 2016-01-26 | Alpha And Omega Semiconductor Incorporated | Wafer process for molded chip scale package (MCSP) with thick backside metallization |
| US9520380B2 (en) * | 2012-09-01 | 2016-12-13 | Alpha And Omega Semiconductor Incorporated | Wafer process for molded chip scale package (MCSP) with thick backside metallization |
| US9219019B2 (en) * | 2014-03-17 | 2015-12-22 | Texas Instruments Incorporated | Packaged semiconductor devices having solderable lead surfaces exposed by grooves in package compound |
| US20160071788A1 (en) * | 2014-03-17 | 2016-03-10 | Texas Instruments Incorporated | Packaged semiconductor devices having solderable lead surfaces exposed by grooves in package compound |
| JP6511695B2 (ja) * | 2015-01-20 | 2019-05-15 | ローム株式会社 | 半導体装置およびその製造方法 |
| US20170069518A1 (en) * | 2015-09-04 | 2017-03-09 | Globalfoundries Inc. | Electrostatic substrate holder with non-planar surface and method of etching |
| JP6591240B2 (ja) | 2015-09-11 | 2019-10-16 | 株式会社東芝 | デバイスの製造方法 |
| JP6461892B2 (ja) | 2016-12-06 | 2019-01-30 | リンテック株式会社 | 表面保護シート |
-
2018
- 2018-02-23 US US15/903,677 patent/US11114402B2/en active Active
-
2019
- 2019-02-21 JP JP2019029368A patent/JP7353770B2/ja active Active
- 2019-02-22 TW TW112103574A patent/TWI855520B/zh active
- 2019-02-22 TW TW108105997A patent/TWI791775B/zh active
- 2019-02-25 CN CN202510243037.5A patent/CN120089649A/zh active Pending
- 2019-02-25 CN CN201910137647.1A patent/CN110190041B/zh active Active
-
2021
- 2021-05-14 US US17/320,495 patent/US12040295B2/en active Active
-
2023
- 2023-09-20 JP JP2023152093A patent/JP2023179516A/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140242756A1 (en) * | 2013-02-24 | 2014-08-28 | Alpha And Omega Semiconductor Incorporated | Method for preparing semiconductor devices applied in flip chip technology |
| US9640497B1 (en) * | 2016-06-30 | 2017-05-02 | Semiconductor Components Industries, Llc | Semiconductor backmetal (BM) and over pad metallization (OPM) structures and related methods |
Also Published As
| Publication number | Publication date |
|---|---|
| CN120089649A (zh) | 2025-06-03 |
| US20190267344A1 (en) | 2019-08-29 |
| TW202331974A (zh) | 2023-08-01 |
| CN110190041A (zh) | 2019-08-30 |
| JP2023179516A (ja) | 2023-12-19 |
| JP2019169704A (ja) | 2019-10-03 |
| CN110190041B (zh) | 2025-03-18 |
| US11114402B2 (en) | 2021-09-07 |
| JP7353770B2 (ja) | 2023-10-02 |
| TWI791775B (zh) | 2023-02-11 |
| US20210272920A1 (en) | 2021-09-02 |
| US12040295B2 (en) | 2024-07-16 |
| TW201937674A (zh) | 2019-09-16 |
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