TWI549192B - Method of manufacturing wafers - Google Patents
Method of manufacturing wafers Download PDFInfo
- Publication number
- TWI549192B TWI549192B TW103118642A TW103118642A TWI549192B TW I549192 B TWI549192 B TW I549192B TW 103118642 A TW103118642 A TW 103118642A TW 103118642 A TW103118642 A TW 103118642A TW I549192 B TWI549192 B TW I549192B
- Authority
- TW
- Taiwan
- Prior art keywords
- temperature
- wafer
- holding
- bonded wafer
- rta
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 28
- 235000012431 wafers Nutrition 0.000 title description 139
- 239000010408 film Substances 0.000 claims description 79
- 238000000034 method Methods 0.000 claims description 42
- 230000003647 oxidation Effects 0.000 claims description 32
- 238000007254 oxidation reaction Methods 0.000 claims description 32
- 238000005468 ion implantation Methods 0.000 claims description 26
- 239000007789 gas Substances 0.000 claims description 21
- 239000001257 hydrogen Substances 0.000 claims description 19
- 229910052739 hydrogen Inorganic materials 0.000 claims description 19
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 14
- 150000002500 ions Chemical class 0.000 claims description 13
- -1 hydrogen ions Chemical class 0.000 claims description 7
- 239000010409 thin film Substances 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 description 55
- 230000003746 surface roughness Effects 0.000 description 15
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 14
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 11
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 10
- 239000001301 oxygen Substances 0.000 description 10
- 229910052760 oxygen Inorganic materials 0.000 description 10
- 238000001816 cooling Methods 0.000 description 8
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 8
- 229910052786 argon Inorganic materials 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 7
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- 239000013078 crystal Substances 0.000 description 6
- 238000003325 tomography Methods 0.000 description 6
- 238000005498 polishing Methods 0.000 description 5
- 238000005406 washing Methods 0.000 description 5
- 230000003247 decreasing effect Effects 0.000 description 4
- 229910052732 germanium Inorganic materials 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000003776 cleavage reaction Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 230000007017 scission Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005247 gettering Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 230000001698 pyrogenic effect Effects 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
- H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
- H01L21/3247—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013113307A JP6086031B2 (ja) | 2013-05-29 | 2013-05-29 | 貼り合わせウェーハの製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201445636A TW201445636A (zh) | 2014-12-01 |
| TWI549192B true TWI549192B (zh) | 2016-09-11 |
Family
ID=51988262
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW103118642A TWI549192B (zh) | 2013-05-29 | 2014-05-28 | Method of manufacturing wafers |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US9735045B2 (ja) |
| EP (1) | EP3007204B1 (ja) |
| JP (1) | JP6086031B2 (ja) |
| KR (1) | KR102022504B1 (ja) |
| CN (1) | CN105264641B (ja) |
| SG (1) | SG11201509256XA (ja) |
| TW (1) | TWI549192B (ja) |
| WO (1) | WO2014192207A1 (ja) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3046877B1 (fr) * | 2016-01-14 | 2018-01-19 | Soitec | Procede de lissage de la surface d'une structure |
| CN108701589A (zh) * | 2016-02-16 | 2018-10-23 | G射线瑞士公司 | 用于跨越键合界面传输电荷的结构、系统和方法 |
| US20220048762A1 (en) * | 2020-08-14 | 2022-02-17 | Beijing Voyager Technology Co., Ltd. | Void reduction on wafer bonding interface |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW521314B (en) * | 1998-10-16 | 2003-02-21 | Shinetsu Handotai Kk | Method of fabricating SOI wafer by hydrogen ion delamination method and SOI wafer fabricated by the method |
| TW201005883A (en) * | 2008-03-21 | 2010-02-01 | Shinetsu Chemical Co | Method for manufacturing soi wafer |
| JP2010062532A (ja) * | 2008-09-03 | 2010-03-18 | Soitec Silicon On Insulator Technologies | 低減されたｓｅｃｃｏ欠陥密度を有するセミコンダクタ・オン・インシュレータ基板を製造する方法。 |
| TW201025444A (en) * | 2008-08-28 | 2010-07-01 | Shinetsu Handotai Kk | Method for manufacturing soi wafer, and soi wafer |
| TW201115635A (en) * | 2009-05-14 | 2011-05-01 | Semiconductor Energy Lab | Method for manufacturing SOI substrate and SOI substrate |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01307472A (ja) | 1988-06-03 | 1989-12-12 | Matsushita Electric Ind Co Ltd | 押出コーティング装置 |
| FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| JP3173926B2 (ja) * | 1993-08-12 | 2001-06-04 | 株式会社半導体エネルギー研究所 | 薄膜状絶縁ゲイト型半導体装置の作製方法及びその半導体装置 |
| JPH11307472A (ja) | 1998-04-23 | 1999-11-05 | Shin Etsu Handotai Co Ltd | 水素イオン剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ |
| JP4379943B2 (ja) * | 1999-04-07 | 2009-12-09 | 株式会社デンソー | 半導体基板の製造方法および半導体基板製造装置 |
| FR2827423B1 (fr) * | 2001-07-16 | 2005-05-20 | Soitec Silicon On Insulator | Procede d'amelioration d'etat de surface |
| WO2003009386A1 (fr) | 2001-07-17 | 2003-01-30 | Shin-Etsu Handotai Co.,Ltd. | Procede de production de plaquettes de liaison |
| EP1652230A2 (fr) | 2003-07-29 | 2006-05-03 | S.O.I.Tec Silicon on Insulator Technologies | Procede d' obtention d' une couche mince de qualite accrue par co-implantation et recuit thermique |
| FR2858462B1 (fr) | 2003-07-29 | 2005-12-09 | Soitec Silicon On Insulator | Procede d'obtention d'une couche mince de qualite accrue par co-implantation et recuit thermique |
| FR2912258B1 (fr) * | 2007-02-01 | 2009-05-08 | Soitec Silicon On Insulator | "procede de fabrication d'un substrat du type silicium sur isolant" |
| JP5135935B2 (ja) * | 2007-07-27 | 2013-02-06 | 信越半導体株式会社 | 貼り合わせウエーハの製造方法 |
| JP5276863B2 (ja) * | 2008-03-21 | 2013-08-28 | グローバルウェーハズ・ジャパン株式会社 | シリコンウェーハ |
| EP2261954B1 (en) | 2008-04-01 | 2020-01-22 | Shin-Etsu Chemical Co., Ltd. | Method for producing soi substrate |
| JP2010098167A (ja) | 2008-10-17 | 2010-04-30 | Shin Etsu Handotai Co Ltd | 貼り合わせウェーハの製造方法 |
| FR2943458B1 (fr) * | 2009-03-18 | 2011-06-10 | Soitec Silicon On Insulator | Procede de finition d'un substrat de type "silicium sur isolant" soi |
| JP2010278337A (ja) * | 2009-05-29 | 2010-12-09 | Shin-Etsu Chemical Co Ltd | 表面欠陥密度が少ないｓｏｓ基板 |
| JP5703920B2 (ja) * | 2011-04-13 | 2015-04-22 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
| JP2013143407A (ja) * | 2012-01-06 | 2013-07-22 | Shin Etsu Handotai Co Ltd | 貼り合わせｓｏｉウェーハの製造方法 |
-
2013
- 2013-05-29 JP JP2013113307A patent/JP6086031B2/ja active Active
-
2014
- 2014-03-25 US US14/787,647 patent/US9735045B2/en active Active
- 2014-03-25 CN CN201480028918.5A patent/CN105264641B/zh active Active
- 2014-03-25 EP EP14804151.0A patent/EP3007204B1/en active Active
- 2014-03-25 KR KR1020157033535A patent/KR102022504B1/ko active IP Right Grant
- 2014-03-25 WO PCT/JP2014/001680 patent/WO2014192207A1/ja active Application Filing
- 2014-03-25 SG SG11201509256XA patent/SG11201509256XA/en unknown
- 2014-05-28 TW TW103118642A patent/TWI549192B/zh active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW521314B (en) * | 1998-10-16 | 2003-02-21 | Shinetsu Handotai Kk | Method of fabricating SOI wafer by hydrogen ion delamination method and SOI wafer fabricated by the method |
| TW201005883A (en) * | 2008-03-21 | 2010-02-01 | Shinetsu Chemical Co | Method for manufacturing soi wafer |
| TW201025444A (en) * | 2008-08-28 | 2010-07-01 | Shinetsu Handotai Kk | Method for manufacturing soi wafer, and soi wafer |
| JP2010062532A (ja) * | 2008-09-03 | 2010-03-18 | Soitec Silicon On Insulator Technologies | 低減されたｓｅｃｃｏ欠陥密度を有するセミコンダクタ・オン・インシュレータ基板を製造する方法。 |
| TW201115635A (en) * | 2009-05-14 | 2011-05-01 | Semiconductor Energy Lab | Method for manufacturing SOI substrate and SOI substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105264641A (zh) | 2016-01-20 |
| SG11201509256XA (en) | 2015-12-30 |
| JP2014232806A (ja) | 2014-12-11 |
| WO2014192207A1 (ja) | 2014-12-04 |
| CN105264641B (zh) | 2018-01-12 |
| TW201445636A (zh) | 2014-12-01 |
| US20160079114A1 (en) | 2016-03-17 |
| US9735045B2 (en) | 2017-08-15 |
| EP3007204A1 (en) | 2016-04-13 |
| KR20160013037A (ko) | 2016-02-03 |
| JP6086031B2 (ja) | 2017-03-01 |
| EP3007204A4 (en) | 2017-03-01 |
| EP3007204B1 (en) | 2021-09-29 |
| KR102022504B1 (ko) | 2019-09-18 |
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