TWI518773B - 在高劑量植入剝除前保護矽之增強式鈍化製程 - Google Patents

在高劑量植入剝除前保護矽之增強式鈍化製程 Download PDF

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TWI518773B
TWI518773B TW099143366A TW99143366A TWI518773B TW I518773 B TWI518773 B TW I518773B TW 099143366 A TW099143366 A TW 099143366A TW 99143366 A TW99143366 A TW 99143366A TW I518773 B TWI518773 B TW I518773B
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plasma
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大衛 章
方豪全
傑克 郭
伊莉亞 卡莉諾斯琦
李釗
姚谷華
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諾菲勒斯系統公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers

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Description

在高劑量植入剝除前保護矽之增強式鈍化製程
本發明係關於自一工件表面移除或剝除光阻劑物質並移除該等相關殘留物之方法及裝置。在某些實施例中,本申請案係關於在離子植入或電漿輔助摻雜植入之後用於剝除抗蝕劑(低劑量或高劑量植入抗蝕劑)之方法及裝置。
本申請案根據34 USC §119(e)規定主張2009年12月11日申請之美國臨時專利申請案第61/285,918號之權利,並以引用方式併入本文。
光阻劑係於處理期間在一工件表面(例如一半導體晶圓)上形成一圖案化塗布之某些製造製程中所使用之一感光物質。在使該光阻劑塗布表面曝露於高能量輻射之一圖案化之後,移除該光阻劑之一部分以顯露下表面,並使剩餘表面受到保護。在未經遮蓋表面及該剩餘光阻劑上執行半導體製程(諸如蝕刻、沈積及離子植入)。在執行一或多個半導體製程之後,以一剝除操作移除該剩餘光阻劑。
本發明提供用於自一工件表面剝除光阻劑並移除離子植入相關殘留物之改良方法及裝置。根據各種實施例,使該工件曝露於一鈍化電漿;提供冷卻一段時間;並接著使其曝露於一基於氧氣或基於氫氣之電漿以移除該光阻劑及該等離子植入相關殘留物。本發明之諸態樣包含減小矽損失;使殘留物較少或無殘留物並維持一可接受的剝除速率。在某些實施例中,方法及裝置在高劑量離子植入製程之後移除光阻劑物質。
本發明之一態樣係關於在一反應腔室中自一工件表面移除物質之一方法,且涉及使該工件曝露於產自成形氣體之一電漿;在使該工件曝露於該成形氣體電漿之後,提供該晶圓安置於一非電漿環境中持續至少30秒之一時間;且在提供該晶圓安置之後,使該晶圓曝露於一基於氧氣或基於氫氣之電漿以移除該物質。
根據各種實施例,提供該工件安置持續至少大約100秒、至少大約150秒、至少大約200秒或至少大約220秒。
在某些實施例中,該基於氧氣或基於氫氣之電漿之至少一者包含氟物種;在其他實施例中,該基於氧氣或基於氫氣之電漿之至少一者皆不包含氟物質。自該工件表面移除之該物質可為一高劑量植入抗蝕劑。在某些實施例中,該成形氣體電漿係經遠端產生。在某些實施例中,在該工件曝露於該成形氣體電漿之後於該工件之所曝露矽部分上形成一保護膜。該保護膜可為一SixNy薄膜。
本發明之另一態樣係關於用於自包含一反應腔室之一工件表面移除物質之一裝置,該反應腔室包含一電漿源、置於該電漿源下游之一噴灑頭及該噴灑頭下游之一工件支撐件,該工件支撐件包括一底座及控制支撐在該工件支撐件上之一工件之一溫度之溫度控制機構;及用於執行一組指令之一控制器,該組指令包含用於使該工件曝露於產自成形氣體之一電漿之指令;在使該工件曝露於該成形氣體電漿之後,提供該晶圓安置於一非電漿環境中持續至少30秒之一段時間;且在提供該晶圓安置之後,使該晶圓曝露於一基於氧氣或基於氫氣之電漿以移除該物質。
以下將參考相關圖式更詳細地描述本發明之此等及其他特徵及優點。
在本發明之下列詳細描述中,描述數種具體實施例以提供本發明之全文理解。然而,熟習此項技術者將瞭解的是,本發明可在並無此等具體細節之情況下或藉由使用替代性元件或製程執行。在其他情況中,並未詳細描述習知製程、步驟及組件,以免不當地模糊本發明之諸態樣。
在本申請案中,將交替使用術語「工件(work piece)」、「半導體晶圓(semiconductor wafer)」、「晶圓(wafer)」及「經部分製造積體電路(partially fabricated integrated circuit)」。熟習此項技術者將瞭解到該術語「經部分製造積體電路(partially fabricated integrated circuit)」在其上多個積體電路製造階之任一階期間可表示一矽晶圓。下列詳細描述假設在一晶圓上執行本發明。然而,本發明並非侷限於此。該工件可為各種形狀、大小及物質。除半導體晶圓之外,可利用本發明之其他工件包含各種物件(諸如顯示器、印刷電路板及類似物)。
光阻劑係於處理期間在一工件表面(例如一半導體晶圓)上形成一圖案化塗布之某些製造製程中所使用之一感光物質。在使該光阻劑塗布表面曝露於高能量輻射之一圖案之後,移除該光阻劑之一部分以顯露下表面,並使剩餘表面受到保護。在未經遮蓋表面及該剩餘光阻劑上執行半導體製程(諸如蝕刻、沈積及離子植入)。在執行一或多個半導體製程之後,以一剝除操作移除該剩餘光阻劑。
在離子植入期間,摻雜離子(例如硼離子、二氟化硼離子、銦離子、鎵離子、鉈離子、磷離子、砷離子、銻離子、鉍離子或鍺離子)係加速朝向一工件目標。該等離子植入該工件之所曝露區域以及該剩餘光阻劑表面中。該製程可形成井區域(源極/汲極)及輕微摻雜汲極(LDD)區域及雙擴散汲極(DDD)區域。該離子植入物用該植入物種浸漬該抗蝕劑並使該表面耗盡氫。該抗蝕劑之外層或結殼形成一碳化層,該碳化層之密度可能比底部塊體抗蝕層更大。此等兩個層具有不同熱膨脹速率並在不同速率下對剝除製程作出反應。
在後高劑量離子植入抗蝕劑中介於該外層與該塊體層之間的差別係極顯著的。在高劑量植入中,該離子劑量可大於1×1015個離子/平方厘米,且能量可自10 Kev至大於100 Kev。習知高劑量植入剝除(HDIS)製程採用氧氣化學方法,其中遠離製程腔室形成單價氧氣電漿且使該單價氧氣電漿指向該工件表面處。活性氧與該光阻劑結合以形成用一真空幫浦移除之氣態副產物。對於HDIS,需要額外氣體來移除具有氧氣之該等植入摻雜物。
主要的HDIS考慮包含剝除速率、殘餘物含量及所曝露及底部薄膜層之薄膜損失。殘留物通常係在HDIS及剝除之後出現於基板表面上。在該抗蝕劑中之高能量植入、結殼之不完全移除及/或植入原子之氧化期間濺鍍可產生該等殘留物。在剝除之後,該表面應無殘留物或實質上無殘留物,以確保高良率並消除對額外殘留物移除處理之需要。可藉由過剝除(即,超過移除所有光阻劑標稱所需的剝除製程之一繼續)移除殘留物。不幸的是,在習知HDIS操作中,過剝除通常移除一些底部功能器件結構。在該器件層處,即使來自電晶體源極/汲極區域之矽損失極小,其亦可不利地影響器件效能及良率,尤其對於在<32奈米設計規則或更小之條件下製造之極淺接面器件而言。
如前所提及,本發明之方法及裝置可用以在高劑量離子植入之後有效率並有效移除光阻劑物質。本發明並不限於高劑量植入剝除(HDIS)。本發明亦並不限於任何種類的植入離子。舉例而言,所描述的方法及裝置可在中等或低劑量植入之後與剝除一起有效地使用。雖然已討論特定摻雜離子(諸如硼離子、砷離子及亞磷離子),但是所描述方法及所描述裝置可有效地用以剝除經其他摻雜物(諸如氮、氧、碳、鍺及鋁)浸漬之抗蝕劑。
本發明之方法及裝置使用由成形氣體生產之鈍化電漿。該等方法及該裝置亦使用光阻劑剝除及產自含有氧氣及/或氫氣之電漿氣體之離子移除電漿。在某些實施例中,該等氣體亦含有一含氟氣體、一弱氧化劑及一或多個額外組合物。熟習此項技術者將認識到該電漿中存在的實際物種可為源於用以產生本文所描述之該等電漿之不同離子、基團及分子之一混合物.。舉例而言,應注意到:由於該電漿與有機光阻劑及其他殘留物發生化學反應並將其等分解,該反應腔室中可存在其他物種(諸如小碳氫化合物、二氧化碳、水蒸氣及其他揮發性組合物)。熟習此項技術者亦將認識到引入該電漿中之該(該等)初始氣體通常係(皆係)不同於該電漿中存在的該(該等)氣體以及在剝除期間接觸該工件表面之該(該等)氣體。
圖1A至1D描繪離子植入及剝除操作前後的各種半導體製造階。圖1A展示經光阻劑物質103塗布之一半導體基板101。該基板101可包含一或多層沈積薄膜(例如,氧化膜、矽化物接觸件及/或多晶矽薄膜),或可為包含例如一絕緣體上覆矽型基板之一裸露矽基板。該光阻劑物質最初塗布整個基板表面。接著使該光阻劑通過一遮罩曝露於所產生之圖案化輻射並進一步移除該物質之一部分(例如,圖1A中所展示介於剩餘光阻劑物質130之間的開口104)。
接著,使該基板曝露於一離子植入製程。在離子植入期間,該工件之表面或該晶圓被植入摻雜離子。該製程可為,(例如)一電漿浸漬離子植入(PIII)或離子束植入。該等離子衝擊包含該所曝露矽層101及該光阻劑103之該基板表面。隨著高能量離子植入,可使少量底部物質107濺鍍至光阻劑側壁。參見圖1B。此物質可包含一些植入物種、該電漿或該離子束中之其他物質及該植入之副產物。其等包含矽、鋁、碳、氟、鈦、其他接觸物質(諸如鈷)及元素與化合物形式兩者中之氧。該實際物種取決於在離子植入之前的該基板之組合物、該光阻劑及該植入物種。
在該所曝露矽層101處,產生一摻雜區域109。該離子能量或衝擊強度決定該摻雜區域之深度或厚度。離子通量密度決定摻雜程度。
該等離子亦浸漬產生一結殼層105之該光阻劑表面。該結殼層105可碳化並顯著交聯聚合物鏈。該結殼通常係耗盡氫並經該植入物種浸漬。該結殼層105之密度大於該塊體抗蝕層103之密度。相對密度取決於該離子通量,同時該結殼層之厚度取決於該離子能量。
該結殼層105比以下該塊體光阻劑103更難以剝除。該結殼層之移除速率可比該底部塊體光阻劑慢50%或75%。保護矽之增強式鈍化製程在保護矽之高劑量植入增強式鈍化製程之前,保護矽之高劑量植入增強式鈍化製程在高劑量植入光阻劑之前。該塊體光阻劑含有相對較高位準的經化學結合的氮及一些其初始澆鑄溶劑。在所提高晶圓溫度下(例如,高於150℃至高於200℃),該塊體抗蝕劑可脫氣並相對該結殼層膨脹。接著,該整個光阻劑可隨著該底部塊體光阻劑在該結殼下增強壓力而爆裂「(pop)」。光阻劑爆裂係微粒及製程缺陷之一原因,這係因為該等殘留物尤其難以自該晶圓表面及腔室內部部件清除。隨著高劑量離子植入,介於該結殼層與該底部塊體光阻層之間的密度差甚至更高。該結殼亦會較厚。
圖1C展示未能完全移除該光阻劑103及該側壁濺鍍殘留物107之一剝除之後的基板。該側壁濺鍍殘留物107可包含在習知剝除化學方法下並未形成一揮發性化合物之微粒。此等微粒在一習知剝除操作之後可保留下來。該殘留物亦可包含由基於氧氣之剝除化學方法中所使用之活性氧形成之植入物種之氧化物(諸如氧化硼及氧化砷)。該結殼105之部分亦可保留於該基板上。由於幾何形狀,光阻劑通孔之底部處之結殼側壁及拐角可難以剝除。在一些情況中,此等殘留物微粒可藉由過剝除、使用含氟化學物或濕式清洗該晶圓移除。
矽損失係依據抗蝕劑厚度、結殼厚度及百分比過剝除。移除較厚的抗蝕劑之較長並更多具有侵蝕性的過剝除亦可移除更多的矽。對於具有較厚的結殼之抗蝕劑,該結殼層與塊體抗蝕層之間的差別甚至係更明顯的。較厚的結殼側壁及拐角甚至更難以剝除。因此,經設計以移除厚的結殼之剝除製程亦易於移除更多的矽。除殘留物移除之外,過剝除亦可用以解決抗蝕劑均勻性及幾何形狀問題。過剝除係超過移除所有光阻劑標稱所需的剝除製程之一繼續。若在該晶圓(但非其他)之一些區域中完全移除該光阻劑,則該剝除製程之繼續將產生自已剝除之區域移除之額外物質(通常係矽及氧化矽)。
圖1D展示移除所有殘留物之後的基板。根據各種實施例,該殘留物係在無額外矽損失或氧化及最小延遲之情況下移除。在某些實施例中,該剝除製程使其無殘留物並因此減小製程步驟之數目。
本文所提供的係減小高劑量植入剝除(HDIS)製程之矽損失之方法,但是如上所述,該等方法可在中等或低劑量離子植入或其他光阻劑剝除製程之後與剝除一起有效地使用。本文所描述之該等方法提供一鈍化層以在剝除之前防止矽損失,且並不限於一特定剝除化學方法。
圖2係闡釋根據某些實施例之一方法中之操作之一程序流程圖200。首先,於一操作201中提供具有光阻劑及植入殘留物質之一晶圓。可對能夠含有一電漿之一腔室提供該晶圓。雖然並未描繪,但是視需要將該晶圓預熱至足夠低以防止爆裂之一固定溫度,並在另外操作中將該晶圓預熱(操作201之前、操作201期間或操作201之後)至足夠高以對形成一鈍化層提供能量及提供一可接受的時刻速率之一固定溫度。接著在一操作203中使該晶圓曝露於產自成形氣體之一電漿。該成形氣體包括氫氣及一惰性稀釋劑(諸如),(例如,氮氣、氦氣或類似物)或其等之一組合。在本發明之一例示性實施例中,該成形氣體係大約0.5莫耳百分比(%)至大約10莫耳百分比(%)氫氣。在本發明之一特定實施例中,該成形氣體係大約3%至大約6%氫氣(例如,4%氫氣)。在某些實施例中,使用純氮氣,其中基本上沒有氫氣。已發現純氮氣可提供類似於成形氣體之鈍化效應。
使該晶圓曝露於該成形氣體一段時間(例如,在大約10秒至90秒之數量級上(例如,大約20秒至40秒))。在許多實施例中,該電漿係一經遠端產生的電漿,但是其可為一原位電漿。在某些實施例中,該電漿係產自基本上由成形氣體組成之一氣體。在其他實施例中,可添加其他物種。在某些實施例中,在該等氣體入口至電漿產生器中大致上不存在氧氣或氟氣。
接著在一操作205中,該電漿消失且該晶圓安置一段時間。在某些實施例中,提供該晶圓在此操作期間冷卻(例如)至大約35℃。在並未藉由一特定理論限制之情況下,據信於該所曝露矽上形成一保護表面以緩慢防止氧化或蝕刻可包含氟物種之後繼基於氧氣或基於氫氣之剝除化學物質。該保護表面可為一SixNy膜。
出人意料地發現介於操作203與該後繼剝除操作之間的等待時間對減小矽損失至關重要。圖3係展示依據曝露於該成形氣體電漿與使用含有氟氣之一基於氫氣之化學物質之一後繼剝除製程之間的等待時間(秒)之矽損失(埃)之一圖表。該矽損失隨著該等待時間增加而急劇降低,最終穩定在大約220秒。根據各種實施例,該等待時間係至少大約30秒、至少大約60秒、至少大約100秒、至少大約120秒、至少大約140秒、至少大約160秒、至少大約180秒、至少大約200秒、至少大約220秒、至少大約240秒、至少大約260秒或至少大約280秒。由於將期望形成一SixNy膜之該反應之化學動力學更快速,因此圖3中所展示之影響係出人意料的。
一旦完成等待週期,在一操作207中立即執行一剝除製程。該剝除製程可使用一或多個基於氧氣或基於氫氣之電漿。在某些實施例中,該剝除化學物質在一或多個操作中額外含有氟物種。可饋送至該電漿產生器以產生此物種之氟化合物包含三氟化氮(NF3)、六氟化硫(SF6)、六氟乙烷(C2F6)、四氟甲烷(CF4)、三氟甲烷(CHF3)、二氟甲烷(CH2F2)、八氟丙烷(C3F8)、八氟環丁烷(C4F8)、八氟[1-]丁烷(C4F8)、八氟[2-]丁烷(C4F8)、八氟異丁烯(C4F8)、氟(F2)及類似物。
雖然本文所描述之該等方法並不限於任意特定剝除化學方法,但是移除光阻劑及HDI殘留物之例示性電漿包含產自下列物質之電漿:
O2/NF3
O2/CF4
O2/N2
H2/CO2/NF3
H2/CO2/CF4
H2/CO2/NF3/CF4
H2/CO2
H2/N2
在許多實施例中,執行具有不同化學過程之多個操作以完全移除該光阻劑及該殘留物。在某些實施例中,將成形氣體添加至一或多個此等HDI剝除操作。舉例而言,在某些實施例中,將成形氣體添加至所有不含氟電漿操作中。已發現在含氟氣站中使用成形氣體或純氮氣可不利地影響矽損失。在並未藉由一特定理論限制之情況下,據信這可能係由於該成形氣體中之氮氣促使該NF3之離解並釋放更多氟離子。通常,在此等操作之後並未賦予顯著的等待時間,但是在某些實施例中,賦予顯著的等待時間。實例如下:O2/FG且成形氣體供應大約14容積%至25容積%;H2/CO2/FG且成形氣體供應大約40容積%至60容積%;應注意到:操作203及205中所描述之該鈍化製程可在該製程中之其他階段處(例如,一或多個剝除操作之間)執行或重複。在某些實施例中,僅在此等操作之間插入操作203。
電漿產生
根據本發明可使用各種類型的電漿源,其包含射頻(RF)、直流(DC)及基於電漿源之微波。在一較佳實施例中,使用一下游RF電漿源。通常,用於一300毫米晶圓之RF電漿功率在大約300瓦特至大約10千瓦特之間變化。在一些實施例中,該RF電漿功率係在大約2000瓦特與5000瓦特之間(例如,3500 W)。
噴灑頭總成
根據本發明之各種實施例,該電漿氣體係經由一噴灑頭總成分佈於加工表面。該噴灑頭總成可經接地或具有一外加電壓(例如,0瓦特至1000瓦特偏壓)以吸引某些帶電物種,同時不影響中性物種至該晶圓之流動。該電漿中之許多帶電物種在該噴灑頭處再組合。該總成包含該噴灑頭自身,其中該噴灑頭可為具有引導該電漿及惰性氣體混合物進入該反應腔室之孔之一金屬板。該噴灑頭經由一較大區域重新分佈來自該電漿源之活性氫,並提供使用一較小的電漿源。噴灑頭孔之數目及配置可經設定以最優化剝除速率及剝除速率均勻性。若該電漿源係位於該晶圓中心,則在該噴灑頭之中心的該等噴灑頭孔較佳為較小且較少,以將該等反應性氣體推向外部區域。該噴灑頭可具有至少100個孔。合適的噴灑頭包含可購自加州聖荷西市Novellus Systems公司之Gamma xPR噴灑頭或GxT插入噴灑頭。在不存在噴灑頭總成之實施例中,該電漿直接進入該製程腔室。
製程腔室
該製程腔室可為用於經執行之剝除操作之任意適合的反應腔室。該製程腔室可為一多腔室裝置之一腔室或該製程腔室可僅為一單一腔室裝置。該腔室亦可包含多個站,其中在該等站中同時處理不同晶圓。該製程腔室可為發生植入、蝕刻或其他介入抗蝕劑製程之相同腔室。在其他實施例中,一個別腔室係專供剝除之用。製程腔室壓力可自大約600 mTorr至2 Torr變化。在某些實施例中,該壓力自大約0.9 Torr至1.5 Torr變化。
該製程腔室包含上面執行剝除操作之一或多個處理站。在某些實施例中,該一或多個處理站包含一預熱站、至少一剝除站及一除灰站。該晶圓支撐件係經組態以在處理期間支撐該晶圓。該晶圓支撐件亦可在處理期間將熱量傳送至該晶圓並自該晶圓將熱量傳送出去以調整必要的晶圓溫度。在某些實施例中,該晶圓係支撐於複數個最小接觸件上,且並未實體地接觸該晶圓支撐件表面平面。一轉子揀取該晶圓並將該晶圓自一站傳送至另一站。
圖4係展示適合用於在晶圓上執行本發明之一下游電漿裝置400之諸態樣之一示意圖。此裝置可用於鈍化及剝除操作兩者。裝置400具有藉由一噴灑頭總成417分隔之一電漿產生部分411及一曝露腔室401。在曝露腔室401內部,一晶圓403支撐在一壓板(或平臺)405上。壓板405係裝配有一加熱/冷卻元件。在一些實施例中,壓板405亦係經組態用於對晶圓403施加一偏壓。在曝露腔室401中經由一真空幫浦通孔導管407達到低壓。氣態氫氣源(具有或不具有稀釋/載流氣體)及二氧化碳(或其他弱氧化劑)經由入口409提供一氣體流進該裝置之電漿產生部分411。電漿產生部分411係部分藉由感應線圈413圍繞,該等感應線圈413隨後係連接至一電源415。在操作期間,將氣體混合物引入電漿產生部分411;供能量給感應線圈413;並在電漿產生部分411中產生一電漿。噴灑頭總成417可具有一外加電壓或經接地指引物種流進入曝露腔室401中。如所提及,晶圓403可經受溫度控制及/或可被施加一RF偏壓。可使用各種組態及幾何形狀的該電漿源411及該等感應線圈413。舉例而言,感應線圈413可依一交錯方式環繞該電漿源411。在另一實例中,該電漿源411可塑型為一圓頂而非一圓柱。一控制器450可連接至該製程腔室之組件,且控制製程氣體組合物、該剝除操作之壓力、溫度及晶圓分度。機器可讀型媒體可耦合至該控制器並含有控制此等操作之製程條件之指令。
合適的電漿腔室及系統包含美國加州聖荷西市(San Jose)Novellus Systems公司提供之Gamma2100、2130 I2CP(交叉電感耦合電漿)、G400及GxT。其他系統包含來自美國馬里蘭州Rockville市Axcelis Technologies之Fusion line;來自韓國PSK Tech公司之TERA21;及來自美國加州Fremont市Mattson Technology公司之Aspen。此外,各種剝除腔室可經組態於叢集工具上。舉例而言,一剝除腔室可添加至可購自美國加州聖克拉拉市(Santa Clara)Applied Materials公司之一Centura叢集工具。
工件
在較佳實施例中,根據本發明之該等方法及該裝置之該工件係一半導體晶圓。可使用任意大小的晶圓。大部分現代晶圓製造設施使用200毫米或300毫米晶圓。如上所揭示,本文所揭示之製程及該裝置在一處理操作(諸如蝕刻、離子植入或沈積)之後剝除光阻劑。本發明係適合用於具有極小特徵或臨界尺寸(例如,100奈米以下,65奈米處或45奈米處或小於45奈米)之晶圓。所揭示之該HDIS之低矽損失特徵尤其適合用於極淺結的超前邏輯器件。本發明亦尤其適合用於經歷製程前端(FEOL)離子植入(尤其係高劑量離子植入)之晶圓。
電漿活化物種與該晶圓上之該光阻劑及該濺鍍殘留物發生化學反應。在該晶圓處,反應性氣體可包含數種電漿活化物種、基團、帶電物種及氣體副產物。對於基於氫氣之電漿,各種氫氣物種之容積濃度可為大約20%至80%於該晶圓處之氣體,通常大於50%。對於基於氧氣之電漿,各種氧氣物種之容積濃度可為大約20%至80%於該晶圓處之氣體,通常大於50%。各種氟物種之容積濃度可為0.01%至大約2%或小於1%。來自該弱氧化劑之各種物種之容積濃度可為0.05%至大約5%或大約1.2%。此等物種可包含H2 *、H2 +、H+、H*、e-、OH、O*、CO、CO2、H2O、HF、F*、F-、CF、CF2及CF3
製程條件可根據該晶圓大小變化。在本發明之一些實施例中,期望使該工件在對其表面施加電漿期間保持在一特定溫度。晶圓溫度可在大約110℃與大約500℃之間變化。為減小上述光阻劑爆裂之可能性,晶圓溫度係較佳地緩慢增加直到移除足夠多結殼且光阻劑爆裂不再係一重點。初始站溫度可為大約110℃至大約260℃,(例如)大約240℃。後站可成功使用較高溫度(諸如285℃及大約350℃)及良好的剝除速率。在某些實施例中,在NF3補強期間降低該溫度以減小與此等補強關聯之矽損失。
例示性製程
如上所指示,在某些實施例中,一多站剝除裝置係用以執行本文所描述之該光阻劑及該等殘留物剝除製程。圖5係展示包含站1、2、3、4、5及6之此一裝置之一俯視圖之一簡單示意圖。晶圓經由腔室501進入該裝置站1處;依序將該等晶圓傳送至每一站用於此站處之一處理操作;且該等晶圓在完成該製程之後經由腔室502自站6退出。該架構在該鈍化製程之後允許暫停或冷卻該晶圓以藉由HDIS剝除化學保護矽不受侵蝕。
例示性製程1
例示性製程2
在另一例示性製程中,6個站上之一第一階係經執行以提供該成形氣體鈍化,接著係一第二階中之站1中之預熱及站2至6之剝除操作。該等待操作可發生於該腔室之外一非氧化環境之中。
在包含用於半導體製造之微影蝕刻及/或圖案化處理硬體之系統中可執行該等所揭示之方法及該所揭示之裝置。進一步言之,在一製程中可執行該等所揭示之方法,其中微影蝕刻及/或圖案化處理係在該等所揭示之方法之前或之後。
實驗
進行各種實驗比較站1中之該成形氣體鈍化先於站2至6中之含氟剝除操作之情況下的矽損失與並未執行鈍化製程之情況下的矽損失。矽損失係減小54%至82%。
雖然已就少數較佳實施例描述本發明,但是其應並不限於上述具體細節。可使用該等上述較佳實施例上之許多變化。因此,應參考下列專利申請範圍大致解譯本發明。
1...站
2...站
3...站
4...站
5...站
6...站
101...半導體基板
103...光阻劑
104...開口
105...結殼層
107...底部物質
109...摻雜區域
400...下游電漿裝置
401...曝露腔室
403...晶圓
405...壓板
407...真空幫浦通孔導管
409...氣體通孔入口
411...電漿產生部分
413...感應線圈
415...電源
417...噴灑頭總成
450...控制器
501...腔室
502...腔室
圖1A至1D描繪離子植入及剝除操作前後之各種半導體器件製造階;
圖2係闡釋根據本發明之某些實施例之操作之一程序流程圖;
圖3係展示依據後鈍化等待時間之矽損失之一圖表;
圖4係展示適合用於執行本發明之諸態樣之一裝置之一示意圖;及
圖5展示適合用於執行本發明之諸態樣之一多站循序架構。
(無元件符號說明)

Claims (17)

  1. 一種在一反應腔室中自一工件表面移除物質之方法,該方法包括:使該工件(work piece)曝露於產自成形氣體(forming gas)之一電漿;在使該工件曝露於該成形氣體電漿之後,提供(allowing)該晶圓安置於一非電漿環境中持續至少30秒之一段時間;及在提供該晶圓安置之後,使該晶圓曝露於一基於氧氣(oxygen-based)或基於氫氣(hydrogen-based)之電漿以移除該物質。
  2. 如請求項1之方法,其中提供該工件安置至少100秒。
  3. 如請求項1之方法,其中提供該工件安置至少150秒。
  4. 如請求項1之方法,其中提供該工件安置至少200秒。
  5. 如請求項1之方法,其中提供該工件安置至少220秒。
  6. 如請求項1之方法,其中該基於氧氣或基於氫氣之電漿包括氟物種。
  7. 如請求項1之方法,其中自該工件表面移除之該物質包括一高劑量植入抗蝕劑。
  8. 如請求項1之方法,其中該成形氣體電漿係經遠端產生。
  9. 如請求項1之方法,其中在該工件曝露於該成形氣體電漿之後於該工件之所曝露矽部分上形成一保護膜。
  10. 如請求項9之方法,其中該保護膜係一SixNy膜。
  11. 如請求項1之方法,其中曝露該工件係在一微影蝕刻操作之後執行。
  12. 一種用於自一工件表面移除物質之裝置,其包括:一反應腔室,其包括:一電漿源,一噴灑頭(showerhead),置於該電漿源之下游,及該噴灑頭之下游之一工件支撐件,該工件支撐件包括一基座(pedestal)及控制支撐於該工件支撐件上之一工件之一溫度之溫度控制機構(mechanism);及一控制器,用於執行一組指令,該組指令包括若干指令用於使該工件曝露於產自成形氣體之一電漿、在使該工件曝露於該成形氣體電漿之後提供該工件安置於一非電漿環境中持續至少30秒之一段時間;及在提供該工件安置之後使該晶圓曝露於一基於氧氣或基於氫氣之電漿以移除該物質。
  13. 如請求項12之裝置,其中該等控制器指令包括提供該工件安置持續至少100秒之指令。
  14. 如請求項12之裝置,其中該等控制器指令包括提供該工件安置持續至少100秒之指令。
  15. 如請求項12之裝置,其中該等控制器指令包括提供該工件安置持續至少150秒之指令。
  16. 如請求項12之裝置,其中該等控制器指令包括提供該工件安置持續至少200秒之指令。
  17. 如請求項12之裝置,其中該等控制器指令包括提供該工件安置持續至少220秒之指令。
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Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8193096B2 (en) 2004-12-13 2012-06-05 Novellus Systems, Inc. High dose implantation strip (HDIS) in H2 base chemistry
US8129281B1 (en) 2005-05-12 2012-03-06 Novellus Systems, Inc. Plasma based photoresist removal system for cleaning post ash residue
US7740768B1 (en) 2006-10-12 2010-06-22 Novellus Systems, Inc. Simultaneous front side ash and backside clean
US8435895B2 (en) * 2007-04-04 2013-05-07 Novellus Systems, Inc. Methods for stripping photoresist and/or cleaning metal regions
US8591661B2 (en) 2009-12-11 2013-11-26 Novellus Systems, Inc. Low damage photoresist strip method for low-K dielectrics
US20110143548A1 (en) 2009-12-11 2011-06-16 David Cheung Ultra low silicon loss high dose implant strip
CN102652351B (zh) 2009-12-11 2016-10-05 诺发系统有限公司 在高剂量植入剥除前保护硅的增强式钝化工艺
US9613825B2 (en) 2011-08-26 2017-04-04 Novellus Systems, Inc. Photoresist strip processes for improved device integrity
KR102192281B1 (ko) 2012-07-16 2020-12-18 베이징 이타운 세미컨덕터 테크놀로지 컴퍼니 리미티드 순수 환원성 플라즈마에서 높은 종횡비 포토레지스트 제거를 위한 방법
US9514954B2 (en) 2014-06-10 2016-12-06 Lam Research Corporation Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films
US11360384B2 (en) * 2018-09-28 2022-06-14 Taiwan Semiconductor Manufacturing Co., Ltd. Method of fabricating and servicing a photomask
US11164876B2 (en) 2019-02-07 2021-11-02 Micron Technology, Inc. Atom implantation for passivation of pillar material
US11501972B2 (en) 2020-07-22 2022-11-15 Applied Materials, Inc. Sacrificial capping layer for passivation using plasma-based implant process
CN114823297B (zh) * 2022-04-19 2023-01-31 度亘激光技术(苏州)有限公司 光刻胶去除工艺及半导体制造工艺

Family Cites Families (185)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US790755A (en) * 1904-06-28 1905-05-23 Max Rockstroh Platen printing-press.
US4201579A (en) * 1978-06-05 1980-05-06 Motorola, Inc. Method for removing photoresist by hydrogen plasma
US4357203A (en) 1981-12-30 1982-11-02 Rca Corporation Plasma etching of polyimide
US4699689A (en) 1985-05-17 1987-10-13 Emergent Technologies Corporation Method and apparatus for dry processing of substrates
US5292393A (en) * 1986-12-19 1994-03-08 Applied Materials, Inc. Multichamber integrated process system
US5158644A (en) 1986-12-19 1992-10-27 Applied Materials, Inc. Reactor chamber self-cleaning process
JPH0770524B2 (ja) 1987-08-19 1995-07-31 富士通株式会社 半導体装置の製造方法
US5354386A (en) 1989-03-24 1994-10-11 National Semiconductor Corporation Method for plasma etching tapered and stepped vias
US5122225A (en) * 1990-11-21 1992-06-16 Texas Instruments Incorporated Selective etch method
JPH05275326A (ja) * 1992-03-30 1993-10-22 Sumitomo Metal Ind Ltd レジストのアッシング方法
US5716494A (en) * 1992-06-22 1998-02-10 Matsushita Electric Industrial Co., Ltd. Dry etching method, chemical vapor deposition method, and apparatus for processing semiconductor substrate
US5522932A (en) * 1993-05-14 1996-06-04 Applied Materials, Inc. Corrosion-resistant apparatus
EP0664347A3 (en) * 1994-01-25 1997-05-14 Applied Materials Inc Plant for the deposition of a uniform layer of a material on a substrate.
US5744049A (en) 1994-07-18 1998-04-28 Applied Materials, Inc. Plasma reactor with enhanced plasma uniformity by gas addition, and method of using same
US5900351A (en) * 1995-01-17 1999-05-04 International Business Machines Corporation Method for stripping photoresist
US5817406A (en) 1995-07-14 1998-10-06 Applied Materials, Inc. Ceramic susceptor with embedded metal electrode and brazing material connection
US5633073A (en) * 1995-07-14 1997-05-27 Applied Materials, Inc. Ceramic susceptor with embedded metal electrode and eutectic connection
JP3585591B2 (ja) * 1995-07-29 2004-11-04 株式会社半導体エネルギー研究所 エッチング装置及びエッチング方法
US6193802B1 (en) * 1995-09-25 2001-02-27 Applied Materials, Inc. Parallel plate apparatus for in-situ vacuum line cleaning for substrate processing equipment
US6187072B1 (en) * 1995-09-25 2001-02-13 Applied Materials, Inc. Method and apparatus for reducing perfluorocompound gases from substrate processing equipment emissions
US6194628B1 (en) * 1995-09-25 2001-02-27 Applied Materials, Inc. Method and apparatus for cleaning a vacuum line in a CVD system
US6045618A (en) * 1995-09-25 2000-04-04 Applied Materials, Inc. Microwave apparatus for in-situ vacuum line cleaning for substrate processing equipment
US5792269A (en) 1995-10-31 1998-08-11 Applied Materials, Inc. Gas distribution for CVD systems
US5968324A (en) 1995-12-05 1999-10-19 Applied Materials, Inc. Method and apparatus for depositing antireflective coating
US5707485A (en) * 1995-12-20 1998-01-13 Micron Technology, Inc. Method and apparatus for facilitating removal of material from the backside of wafers via a plasma etch
JPH09205130A (ja) 1996-01-17 1997-08-05 Applied Materials Inc ウェハ支持装置
US6013574A (en) 1996-01-30 2000-01-11 Advanced Micro Devices, Inc. Method of forming low resistance contact structures in vias arranged between two levels of interconnect lines
US5660682A (en) 1996-03-14 1997-08-26 Lsi Logic Corporation Plasma clean with hydrogen gas
US5814155A (en) 1996-06-26 1998-09-29 Vlsi Technology, Inc. Plasma ashing enhancement
US6083852A (en) 1997-05-07 2000-07-04 Applied Materials, Inc. Method for applying films using reduced deposition rates
US6127262A (en) 1996-06-28 2000-10-03 Applied Materials, Inc. Method and apparatus for depositing an etch stop layer
US6156149A (en) 1997-05-07 2000-12-05 Applied Materials, Inc. In situ deposition of a dielectric oxide layer and anti-reflective coating
US6129091A (en) 1996-10-04 2000-10-10 Taiwan Semiconductor Manfacturing Company Method for cleaning silicon wafers with deep trenches
US6562544B1 (en) * 1996-11-04 2003-05-13 Applied Materials, Inc. Method and apparatus for improving accuracy in photolithographic processing of substrates
US5911834A (en) * 1996-11-18 1999-06-15 Applied Materials, Inc. Gas delivery system
US5844195A (en) 1996-11-18 1998-12-01 Applied Materials, Inc. Remote plasma source
US5830775A (en) 1996-11-26 1998-11-03 Sharp Microelectronics Technology, Inc. Raised silicided source/drain electrode formation with reduced substrate silicon consumption
US5811358A (en) 1997-01-03 1998-09-22 Mosel Vitelic Inc. Low temperature dry process for stripping photoresist after high dose ion implantation
US6039834A (en) * 1997-03-05 2000-03-21 Applied Materials, Inc. Apparatus and methods for upgraded substrate processing system with microwave plasma source
US6077764A (en) * 1997-04-21 2000-06-20 Applied Materials, Inc. Process for depositing high deposition rate halogen-doped silicon oxide layer
US6306564B1 (en) 1997-05-27 2001-10-23 Tokyo Electron Limited Removal of resist or residue from semiconductors using supercritical carbon dioxide
US6177023B1 (en) * 1997-07-11 2001-01-23 Applied Komatsu Technology, Inc. Method and apparatus for electrostatically maintaining substrate flatness
JP3317209B2 (ja) 1997-08-12 2002-08-26 東京エレクトロンエイ・ティー株式会社 プラズマ処理装置及びプラズマ処理方法
US5908672A (en) * 1997-10-15 1999-06-01 Applied Materials, Inc. Method and apparatus for depositing a planarized passivation layer
US6797188B1 (en) 1997-11-12 2004-09-28 Meihua Shen Self-cleaning process for etching silicon-containing material
US6379576B2 (en) * 1997-11-17 2002-04-30 Mattson Technology, Inc. Systems and methods for variable mode plasma enhanced processing of semiconductor wafers
US6098568A (en) 1997-12-01 2000-08-08 Applied Materials, Inc. Mixed frequency CVD apparatus
US6287990B1 (en) * 1998-02-11 2001-09-11 Applied Materials, Inc. CVD plasma assisted low dielectric constant films
US6660656B2 (en) 1998-02-11 2003-12-09 Applied Materials Inc. Plasma processes for depositing low dielectric constant films
US6303523B2 (en) * 1998-02-11 2001-10-16 Applied Materials, Inc. Plasma processes for depositing low dielectric constant films
US6340435B1 (en) * 1998-02-11 2002-01-22 Applied Materials, Inc. Integrated low K dielectrics and etch stops
US6413583B1 (en) 1998-02-11 2002-07-02 Applied Materials, Inc. Formation of a liquid-like silica layer by reaction of an organosilicon compound and a hydroxyl forming compound
US6593247B1 (en) 1998-02-11 2003-07-15 Applied Materials, Inc. Method of depositing low k films using an oxidizing plasma
US6054379A (en) 1998-02-11 2000-04-25 Applied Materials, Inc. Method of depositing a low k dielectric with organo silane
US6203657B1 (en) * 1998-03-31 2001-03-20 Lam Research Corporation Inductively coupled plasma downstream strip module
US5980770A (en) 1998-04-16 1999-11-09 Siemens Aktiengesellschaft Removal of post-RIE polymer on Al/Cu metal line
US6432830B1 (en) * 1998-05-15 2002-08-13 Applied Materials, Inc. Semiconductor fabrication process
US6086952A (en) 1998-06-15 2000-07-11 Applied Materials, Inc. Chemical vapor deposition of a copolymer of p-xylylene and a multivinyl silicon/oxygen comonomer
US6800571B2 (en) * 1998-09-29 2004-10-05 Applied Materials Inc. CVD plasma assisted low dielectric constant films
US6277733B1 (en) 1998-10-05 2001-08-21 Texas Instruments Incorporated Oxygen-free, dry plasma process for polymer removal
US6342446B1 (en) * 1998-10-06 2002-01-29 Texas Instruments Incorporated Plasma process for organic residue removal from copper
US6171945B1 (en) * 1998-10-22 2001-01-09 Applied Materials, Inc. CVD nanoporous silica low dielectric constant films
US6245690B1 (en) 1998-11-04 2001-06-12 Applied Materials, Inc. Method of improving moisture resistance of low dielectric constant films
US6107184A (en) 1998-12-09 2000-08-22 Applied Materials, Inc. Nano-porous copolymer films having low dielectric constants
US6417080B1 (en) 1999-01-28 2002-07-09 Canon Kabushiki Kaisha Method of processing residue of ion implanted photoresist, and method of producing semiconductor device
US6130166A (en) 1999-02-01 2000-10-10 Vlsi Technology, Inc. Alternative plasma chemistry for enhanced photoresist removal
US6242350B1 (en) 1999-03-18 2001-06-05 Taiwan Semiconductor Manufacturing Company Post gate etch cleaning process for self-aligned gate mosfets
US6204192B1 (en) * 1999-03-29 2001-03-20 Lsi Logic Corporation Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structures
US6709715B1 (en) * 1999-06-17 2004-03-23 Applied Materials Inc. Plasma enhanced chemical vapor deposition of copolymer of parylene N and comonomers with various double bonds
US6030901A (en) 1999-06-24 2000-02-29 Advanced Micro Devices, Inc. Photoresist stripping without degrading low dielectric constant materials
US6177347B1 (en) 1999-07-02 2001-01-23 Taiwan Semiconductor Manufacturing Company In-situ cleaning process for Cu metallization
US6281135B1 (en) 1999-08-05 2001-08-28 Axcelis Technologies, Inc. Oxygen free plasma stripping process
US6313042B1 (en) 1999-09-03 2001-11-06 Applied Materials, Inc. Cleaning contact with successive fluorine and hydrogen plasmas
US6767698B2 (en) 1999-09-29 2004-07-27 Tokyo Electron Limited High speed stripping for damaged photoresist
US6287643B1 (en) * 1999-09-30 2001-09-11 Novellus Systems, Inc. Apparatus and method for injecting and modifying gas concentration of a meta-stable or atomic species in a downstream plasma reactor
JP4221847B2 (ja) 1999-10-25 2009-02-12 パナソニック電工株式会社 プラズマ処理装置及びプラズマ点灯方法
JP3366301B2 (ja) 1999-11-10 2003-01-14 日本電気株式会社 プラズマcvd装置
US6352938B2 (en) 1999-12-09 2002-03-05 United Microelectronics Corp. Method of removing photoresist and reducing native oxide in dual damascene copper process
US6365516B1 (en) * 2000-01-14 2002-04-02 Advanced Micro Devices, Inc. Advanced cobalt silicidation with in-situ hydrogen plasma clean
US20010027023A1 (en) 2000-02-15 2001-10-04 Shigenori Ishihara Organic substance removing methods, methods of producing semiconductor device, and organic substance removing apparatuses
JP2001308078A (ja) 2000-02-15 2001-11-02 Canon Inc 有機物除去方法、半導体装置の製造方法及び有機物除去装置並びにシステム
US6184134B1 (en) * 2000-02-18 2001-02-06 Infineon Technologies North America Corp. Dry process for cleaning residues/polymers after metal etch
US6667244B1 (en) * 2000-03-24 2003-12-23 Gerald M. Cox Method for etching sidewall polymer and other residues from the surface of semiconductor devices
JP4470274B2 (ja) * 2000-04-26 2010-06-02 東京エレクトロン株式会社 熱処理装置
JP4371543B2 (ja) * 2000-06-29 2009-11-25 日本電気株式会社 リモートプラズマcvd装置及び膜形成方法
US6426304B1 (en) 2000-06-30 2002-07-30 Lam Research Corporation Post etch photoresist strip with hydrogen for organosilicate glass low-κ etch applications
US20020185226A1 (en) 2000-08-10 2002-12-12 Lea Leslie Michael Plasma processing apparatus
US6562090B1 (en) * 2000-08-28 2003-05-13 Hercules Incorporated Fluid abrasive suspension for use in dentifrices
DE10051380C2 (de) * 2000-10-17 2002-11-28 Advanced Micro Devices Inc Verfahren zur Herstellung eines Halbleiterbauteils unter Anwendung eines Schrumpfprozesses eines Strukturmerkmals
US6569257B1 (en) * 2000-11-09 2003-05-27 Applied Materials Inc. Method for cleaning a process chamber
US6692903B2 (en) 2000-12-13 2004-02-17 Applied Materials, Inc Substrate cleaning apparatus and method
US6733594B2 (en) * 2000-12-21 2004-05-11 Lam Research Corporation Method and apparatus for reducing He backside faults during wafer processing
US6479391B2 (en) 2000-12-22 2002-11-12 Intel Corporation Method for making a dual damascene interconnect using a multilayer hard mask
US20020127853A1 (en) * 2000-12-29 2002-09-12 Hubacek Jerome S. Electrode for plasma processes and method for manufacture and use thereof
US6319842B1 (en) 2001-01-02 2001-11-20 Novellus Systems Incorporated Method of cleansing vias in semiconductor wafer having metal conductive layer
US6589879B2 (en) 2001-01-18 2003-07-08 Applied Materials, Inc. Nitride open etch process based on trifluoromethane and sulfur hexafluoride
US7753546B2 (en) * 2001-02-07 2010-07-13 World Factory, Inc. Umbrella apparatus
US6777344B2 (en) * 2001-02-12 2004-08-17 Lam Research Corporation Post-etch photoresist strip with O2 and NH3 for organosilicate glass low-K dielectric etch applications
CN101038863B (zh) * 2001-02-15 2011-07-06 东京毅力科创株式会社 被处理件的处理方法及处理装置
US6764940B1 (en) 2001-03-13 2004-07-20 Novellus Systems, Inc. Method for depositing a diffusion barrier for copper interconnect applications
US7186648B1 (en) * 2001-03-13 2007-03-06 Novellus Systems, Inc. Barrier first method for single damascene trench applications
US6723654B2 (en) 2001-03-30 2004-04-20 Taiwan Semiconductor Manufacturing Co., Ltd Method and apparatus for in-situ descum/hot bake/dry etch photoresist/polyimide layer
US6951823B2 (en) 2001-05-14 2005-10-04 Axcelis Technologies, Inc. Plasma ashing process
US6834656B2 (en) 2001-05-23 2004-12-28 Axcelis Technology, Inc. Plasma process for removing polymer and residues from substrates
US6875702B2 (en) 2001-06-11 2005-04-05 Lsi Logic Corporation Plasma treatment system
US6632735B2 (en) 2001-08-07 2003-10-14 Applied Materials, Inc. Method of depositing low dielectric constant carbon doped silicon oxide
US20030036284A1 (en) 2001-08-16 2003-02-20 Yu-Ren Chou Method for removing the photoresist layer of ion-implanting process
US6872652B2 (en) * 2001-08-28 2005-03-29 Infineon Technologies Ag Method of cleaning an inter-level dielectric interconnect
US20030045098A1 (en) * 2001-08-31 2003-03-06 Applied Materials, Inc. Method and apparatus for processing a wafer
JP4838464B2 (ja) 2001-09-26 2011-12-14 東京エレクトロン株式会社 処理方法
US6680164B2 (en) * 2001-11-30 2004-01-20 Applied Materials Inc. Solvent free photoresist strip and residue removal processing for post etching of low-k films
JP4326746B2 (ja) 2002-01-07 2009-09-09 東京エレクトロン株式会社 プラズマ処理方法
US6720132B2 (en) * 2002-01-08 2004-04-13 Taiwan Semiconductor Manufacturing Co., Ltd. Bi-layer photoresist dry development and reactive ion etch method
US7390755B1 (en) 2002-03-26 2008-06-24 Novellus Systems, Inc. Methods for post etch cleans
US6848455B1 (en) * 2002-04-22 2005-02-01 Novellus Systems, Inc. Method and apparatus for removing photoresist and post-etch residue from semiconductor substrates by in-situ generation of oxidizing species
US7074298B2 (en) 2002-05-17 2006-07-11 Applied Materials High density plasma CVD chamber
US6656832B1 (en) 2002-07-25 2003-12-02 Taiwan Semiconductor Manufacturing Co., Ltd Plasma treatment method for fabricating microelectronic fabrication having formed therein conductor layer with enhanced electrical properties
JP4434950B2 (ja) * 2002-08-22 2010-03-17 ダイキン工業株式会社 剥離液
US6900135B2 (en) * 2002-08-27 2005-05-31 Applied Materials, Inc. Buffer station for wafer backside cleaning and inspection
US6693043B1 (en) * 2002-09-20 2004-02-17 Novellus Systems, Inc. Method for removing photoresist from low-k films in a downstream plasma system
JP2004152136A (ja) * 2002-10-31 2004-05-27 Matsushita Electric Ind Co Ltd データ更新システム、データ更新システムの差分データ生成装置及びプログラム、並びに更新後ファイル復元装置及びプログラム
US6837967B1 (en) * 2002-11-06 2005-01-04 Lsi Logic Corporation Method and apparatus for cleaning deposited films from the edge of a wafer
US6787452B2 (en) 2002-11-08 2004-09-07 Chartered Semiconductor Manufacturing Ltd. Use of amorphous carbon as a removable ARC material for dual damascene fabrication
KR100476136B1 (ko) 2002-12-02 2005-03-10 주식회사 셈테크놀러지 대기압 플라즈마를 이용한 표면처리장치
US6780782B1 (en) 2003-02-04 2004-08-24 Taiwan Semiconductor Manufacturing Company, Ltd. Bi-level resist structure and fabrication method for contact holes on semiconductor substrates
US20040195208A1 (en) 2003-02-15 2004-10-07 Pavel Elizabeth G. Method and apparatus for performing hydrogen optical emission endpoint detection for photoresist strip and residue removal
US20040237997A1 (en) 2003-05-27 2004-12-02 Applied Materials, Inc. ; Method for removal of residue from a substrate
US7205240B2 (en) 2003-06-04 2007-04-17 Applied Materials, Inc. HDP-CVD multistep gapfill process
JP4278444B2 (ja) * 2003-06-17 2009-06-17 株式会社日立製作所 仮想ポート名の管理装置
US7270237B2 (en) * 2003-07-24 2007-09-18 Stanely T. Mandeltort Waterproof document storage device
US7256134B2 (en) 2003-08-01 2007-08-14 Applied Materials, Inc. Selective etching of carbon-doped low-k dielectrics
US6924239B2 (en) * 2003-10-14 2005-08-02 Texas Instruments Incorporated Method for removal of hydrocarbon contamination on gate oxide prior to non-thermal nitridation using “spike” radical oxidation
US20050106888A1 (en) 2003-11-14 2005-05-19 Taiwan Semiconductor Manufacturing Co. Method of in-situ damage removal - post O2 dry process
US20050158667A1 (en) 2004-01-20 2005-07-21 Applied Materials, Inc. Solvent free photoresist strip and residue removal processing for post etching of low-k films
WO2005072211A2 (en) 2004-01-20 2005-08-11 Mattson Technology, Inc. System and method for removal of photoresist and residues following contact etch with a stop layer present
WO2005104203A1 (ja) 2004-03-31 2005-11-03 Fujitsu Limited 基板処理装置および半導体装置の製造方法
US7628864B2 (en) 2004-04-28 2009-12-08 Tokyo Electron Limited Substrate cleaning apparatus and method
US7288484B1 (en) 2004-07-13 2007-10-30 Novellus Systems, Inc. Photoresist strip method for low-k dielectrics
US7029967B2 (en) * 2004-07-21 2006-04-18 Texas Instruments Incorporated Silicide method for CMOS integrated circuits
US20060016202A1 (en) * 2004-07-23 2006-01-26 Daniel Lyvers Refrigerator with system for controlling drawer temperatures
US7632756B2 (en) * 2004-08-26 2009-12-15 Applied Materials, Inc. Semiconductor processing using energized hydrogen gas and in combination with wet cleaning
US7597816B2 (en) 2004-09-03 2009-10-06 Lam Research Corporation Wafer bevel polymer removal
US20060051965A1 (en) 2004-09-07 2006-03-09 Lam Research Corporation Methods of etching photoresist on substrates
US20060102197A1 (en) * 2004-11-16 2006-05-18 Kang-Lie Chiang Post-etch treatment to remove residues
US8193096B2 (en) 2004-12-13 2012-06-05 Novellus Systems, Inc. High dose implantation strip (HDIS) in H2 base chemistry
US7202176B1 (en) * 2004-12-13 2007-04-10 Novellus Systems, Inc. Enhanced stripping of low-k films using downstream gas mixing
KR100607777B1 (ko) * 2004-12-27 2006-08-01 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법
US7601272B2 (en) 2005-01-08 2009-10-13 Applied Materials, Inc. Method and apparatus for integrating metrology with etch processing
US7344993B2 (en) * 2005-01-11 2008-03-18 Tokyo Electron Limited, Inc. Low-pressure removal of photoresist and etch residue
US7268071B2 (en) 2005-01-12 2007-09-11 Sony Corporation Dual damascene interconnections having low K layer with reduced damage arising from photoresist stripping
US7432172B2 (en) 2005-01-21 2008-10-07 Tokyo Electron Limited Plasma etching method
JP2006221772A (ja) * 2005-02-14 2006-08-24 Fuji Photo Film Co Ltd ディスク状情報媒体の製造方法
US7198677B2 (en) 2005-03-09 2007-04-03 Wafermasters, Inc. Low temperature wafer backside cleaning
US8129281B1 (en) * 2005-05-12 2012-03-06 Novellus Systems, Inc. Plasma based photoresist removal system for cleaning post ash residue
JP2006351594A (ja) 2005-06-13 2006-12-28 Toshiba Ceramics Co Ltd 半導体ウェーハの電気特性の測定方法
JP2007019367A (ja) * 2005-07-11 2007-01-25 Ricoh Co Ltd 半導体装置の製造方法
JP5011852B2 (ja) 2005-07-20 2012-08-29 富士通セミコンダクター株式会社 電子デバイスの製造方法
US7411298B2 (en) * 2005-08-17 2008-08-12 Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.) Source/drain electrodes, thin-film transistor substrates, manufacture methods thereof, and display devices
US7468326B2 (en) 2005-08-24 2008-12-23 United Microelectronics Corp. Method of cleaning a wafer
US7465680B2 (en) 2005-09-07 2008-12-16 Applied Materials, Inc. Post deposition plasma treatment to increase tensile stress of HDP-CVD SIO2
US7909960B2 (en) * 2005-09-27 2011-03-22 Lam Research Corporation Apparatus and methods to remove films on bevel edge and backside of wafer
KR100742279B1 (ko) 2005-12-22 2007-07-24 삼성전자주식회사 반도체 소자의 제조 장치 및 방법
KR20070069802A (ko) * 2005-12-28 2007-07-03 엘지.필립스 엘시디 주식회사 평판표시소자의 제조장치 및 그를 이용한 기판파손방지방법
US7432209B2 (en) 2006-03-22 2008-10-07 Applied Materials, Inc. Plasma dielectric etch process including in-situ backside polymer removal for low-dielectric constant material
US8034176B2 (en) 2006-03-28 2011-10-11 Tokyo Electron Limited Gas distribution system for a post-etch treatment system
US7851369B2 (en) 2006-06-05 2010-12-14 Lam Research Corporation Hardmask trim method
US8124516B2 (en) 2006-08-21 2012-02-28 Lam Research Corporation Trilayer resist organic layer etch
US7740768B1 (en) 2006-10-12 2010-06-22 Novellus Systems, Inc. Simultaneous front side ash and backside clean
US7655571B2 (en) * 2006-10-26 2010-02-02 Applied Materials, Inc. Integrated method and apparatus for efficient removal of halogen residues from etched substrates
US7595005B2 (en) 2006-12-11 2009-09-29 Tokyo Electron Limited Method and apparatus for ashing a substrate using carbon dioxide
DE102006062035B4 (de) * 2006-12-29 2013-02-07 Advanced Micro Devices, Inc. Verfahren zum Entfernen von Lackmaterial nach einer Implantation mit hoher Dosis in einem Halbleiterbauelement
US8435895B2 (en) 2007-04-04 2013-05-07 Novellus Systems, Inc. Methods for stripping photoresist and/or cleaning metal regions
JP5332052B2 (ja) 2007-06-01 2013-11-06 シャープ株式会社 レジスト除去方法、半導体製造方法、及びレジスト除去装置
KR101440282B1 (ko) * 2007-07-11 2014-09-17 주성엔지니어링(주) 플라즈마 세정 방법
US20090061623A1 (en) * 2007-09-05 2009-03-05 United Microelectronics Corp. Method of forming electrical connection structure
KR101659095B1 (ko) 2008-02-08 2016-09-22 램 리써치 코포레이션 측방향 벨로우 및 비접촉 입자 밀봉을 포함하는 조정가능한 갭이 용량적으로 커플링되는 rf 플라즈마 반응기
JP5102653B2 (ja) * 2008-02-29 2012-12-19 東京エレクトロン株式会社 プラズマエッチング方法、プラズマエッチング装置及びコンピュータ記憶媒体
US20090277871A1 (en) * 2008-03-05 2009-11-12 Axcelis Technologies, Inc. Plasma mediated ashing processes that include formation of a protective layer before and/or during the plasma mediated ashing process
US8791001B2 (en) 2008-09-08 2014-07-29 Taiwan Semiconductor Manufacturing Company, Ltd. N2 based plasma treatment and ash for HK metal gate protection
US8591661B2 (en) 2009-12-11 2013-11-26 Novellus Systems, Inc. Low damage photoresist strip method for low-K dielectrics
US8268722B2 (en) * 2009-06-03 2012-09-18 Novellus Systems, Inc. Interfacial capping layers for interconnects
WO2011008436A2 (en) * 2009-07-13 2011-01-20 Applied Materials, Inc. Method for removing implanted photo resist from hard disk drive substrates
US20110143548A1 (en) 2009-12-11 2011-06-16 David Cheung Ultra low silicon loss high dose implant strip
CN102652351B (zh) 2009-12-11 2016-10-05 诺发系统有限公司 在高剂量植入剥除前保护硅的增强式钝化工艺
US9613825B2 (en) 2011-08-26 2017-04-04 Novellus Systems, Inc. Photoresist strip processes for improved device integrity

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CN102652351A (zh) 2012-08-29
CN102652351B (zh) 2016-10-05
TW201140686A (en) 2011-11-16
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