TWI518758B - 製造設置晶片之晶圓的方法 - Google Patents
製造設置晶片之晶圓的方法 Download PDFInfo
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- TWI518758B TWI518758B TW100106549A TW100106549A TWI518758B TW I518758 B TWI518758 B TW I518758B TW 100106549 A TW100106549 A TW 100106549A TW 100106549 A TW100106549 A TW 100106549A TW I518758 B TWI518758 B TW I518758B
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- H01L25/105—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01052—Tellurium [Te]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/EP2010/002055 WO2011120537A1 (de) | 2010-03-31 | 2010-03-31 | Verfahren zur herstellung eines doppelseitig mit chips bestückten wafers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201145370A TW201145370A (en) | 2011-12-16 |
| TWI518758B true TWI518758B (zh) | 2016-01-21 |
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| TW100106549A TWI518758B (zh) | 2010-03-31 | 2011-02-25 | 製造設置晶片之晶圓的方法 |
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| TW (1) | TWI518758B (enExample) |
| WO (1) | WO2011120537A1 (enExample) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9827757B2 (en) | 2011-07-07 | 2017-11-28 | Brewer Science Inc. | Methods of transferring device wafers or layers between carrier substrates and other surfaces |
| EP3130069B1 (en) * | 2014-04-09 | 2022-11-16 | Lionel O. Barthold | Multi-module dc-to-dc power transformation system |
| WO2020178080A1 (en) * | 2019-03-05 | 2020-09-10 | Evatec Ag | Method for processing fragile substrates employing temporary bonding of the substrates to carriers |
| KR102824895B1 (ko) | 2020-02-18 | 2025-07-01 | 에베 그룹 에. 탈너 게엠베하 | 구성요소 전달을 위한 방법 및 장치 |
| CN118891713A (zh) | 2022-03-25 | 2024-11-01 | Ev 集团 E·索尔纳有限责任公司 | 用于分离载体基板的方法和基板系统 |
| KR102788502B1 (ko) * | 2023-07-27 | 2025-04-01 | 한국기계연구원 | 효과적인 디본딩이 가능한 웨이퍼 모듈, 및 이의 본딩 및 디본딩 방법 |
| WO2025228530A1 (de) | 2024-05-02 | 2025-11-06 | Ev Group E. Thallner Gmbh | Verfahren zum temporären verbinden eines produktsubstrats und eines trägersubstrats, trägersubstrat, produktsubstrat und schichtsystem sowie deren anordnung und eine vorrichtung zum durchführen eines solchen verfahrens |
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| JPS6198784A (ja) * | 1984-10-20 | 1986-05-17 | Kimurashin Kk | ロール状又は積層状の両面接着テープ |
| JPH04283283A (ja) | 1991-03-08 | 1992-10-08 | Nippon Synthetic Chem Ind Co Ltd:The | 開封自在テープ |
| JP3686454B2 (ja) | 1995-05-10 | 2005-08-24 | 日東電工株式会社 | 接着型使捨てカイロ用粘着シート及びそのカイロ |
| WO1997039481A1 (en) | 1996-04-12 | 1997-10-23 | Northeastern University | An integrated complex-transition metal oxide device and a method of fabricating such a device |
| JPH11105924A (ja) | 1997-10-06 | 1999-04-20 | Nitto Denko Corp | 電子部品搬送用テ−プ |
| JPH11238375A (ja) * | 1998-02-20 | 1999-08-31 | Sony Corp | 電子機器の放熱装置とディスクドライブ装置 |
| JP2000326995A (ja) | 1999-05-17 | 2000-11-28 | Ogawa Sangyo Kk | 滅菌袋 |
| JP2002097041A (ja) | 2000-07-17 | 2002-04-02 | Sekisui Chem Co Ltd | 合わせガラス用中間膜及び合わせガラス |
| FR2823596B1 (fr) * | 2001-04-13 | 2004-08-20 | Commissariat Energie Atomique | Substrat ou structure demontable et procede de realisation |
| JP3861669B2 (ja) * | 2001-11-22 | 2006-12-20 | ソニー株式会社 | マルチチップ回路モジュールの製造方法 |
| JP2003218063A (ja) * | 2002-01-24 | 2003-07-31 | Canon Inc | ウエハ貼着用粘着シート及び該シートを利用する加工方法 |
| US6794273B2 (en) | 2002-05-24 | 2004-09-21 | Fujitsu Limited | Semiconductor device and manufacturing method thereof |
| JP4565804B2 (ja) * | 2002-06-03 | 2010-10-20 | スリーエム イノベイティブ プロパティズ カンパニー | 被研削基材を含む積層体、その製造方法並びに積層体を用いた極薄基材の製造方法及びそのための装置 |
| JP4364535B2 (ja) * | 2003-03-27 | 2009-11-18 | シャープ株式会社 | 半導体装置の製造方法 |
| JP4405246B2 (ja) | 2003-11-27 | 2010-01-27 | スリーエム イノベイティブ プロパティズ カンパニー | 半導体チップの製造方法 |
| US7232740B1 (en) * | 2005-05-16 | 2007-06-19 | The United States Of America As Represented By The National Security Agency | Method for bumping a thin wafer |
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| DE102006000687B4 (de) | 2006-01-03 | 2010-09-09 | Thallner, Erich, Dipl.-Ing. | Kombination aus einem Träger und einem Wafer, Vorrichtung zum Trennen der Kombination und Verfahren zur Handhabung eines Trägers und eines Wafers |
| US20080003780A1 (en) * | 2006-06-30 | 2008-01-03 | Haixiao Sun | Detachable stiffener for ultra-thin die |
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| JP2009043962A (ja) * | 2007-08-09 | 2009-02-26 | Sony Corp | 半導体装置の製造方法 |
| DE112009000140B4 (de) | 2008-01-24 | 2022-06-15 | Brewer Science, Inc. | Verfahren zum reversiblen Anbringen eines Vorrichtungswafers an einem Trägersubstrat und ein daraus erhaltener Gegenstand |
| EP2104138A1 (de) * | 2008-03-18 | 2009-09-23 | EV Group E. Thallner GmbH | Verfahren zum Bonden von Chips auf Wafer |
| JP4572243B2 (ja) * | 2008-03-27 | 2010-11-04 | 信越化学工業株式会社 | 熱伝導性積層体およびその製造方法 |
| JP2010010644A (ja) * | 2008-05-27 | 2010-01-14 | Toshiba Corp | 半導体装置の製造方法 |
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| WO2010121068A2 (en) | 2009-04-16 | 2010-10-21 | Suss Microtec, Inc. | Improved apparatus for temporary wafer bonding and debonding |
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| EP2299486B1 (de) * | 2009-09-18 | 2015-02-18 | EV Group E. Thallner GmbH | Verfahren zum Bonden von Chips auf Wafer |
| US8008121B2 (en) * | 2009-11-04 | 2011-08-30 | Stats Chippac, Ltd. | Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate |
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| TWI419302B (zh) * | 2010-02-11 | 2013-12-11 | 日月光半導體製造股份有限公司 | 封裝製程 |
| US8252682B2 (en) * | 2010-02-12 | 2012-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for thinning a wafer |
| JP4976522B2 (ja) * | 2010-04-16 | 2012-07-18 | 日東電工株式会社 | 熱硬化型ダイボンドフィルム、ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法 |
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| US8492197B2 (en) * | 2010-08-17 | 2013-07-23 | Stats Chippac, Ltd. | Semiconductor device and method of forming vertically offset conductive pillars over first substrate aligned to vertically offset BOT interconnect sites formed over second substrate |
| JP2012069919A (ja) * | 2010-08-25 | 2012-04-05 | Toshiba Corp | 半導体装置の製造方法 |
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Also Published As
| Publication number | Publication date |
|---|---|
| EP2553719A1 (de) | 2013-02-06 |
| KR101856429B1 (ko) | 2018-05-09 |
| KR20130040779A (ko) | 2013-04-24 |
| WO2011120537A1 (de) | 2011-10-06 |
| US20130011997A1 (en) | 2013-01-10 |
| EP2553719B1 (de) | 2019-12-04 |
| SG183820A1 (en) | 2012-10-30 |
| CN102812546B (zh) | 2015-08-26 |
| KR20160075845A (ko) | 2016-06-29 |
| JP2013524493A (ja) | 2013-06-17 |
| CN102812546A (zh) | 2012-12-05 |
| JP5763169B2 (ja) | 2015-08-12 |
| US9224630B2 (en) | 2015-12-29 |
| TW201145370A (en) | 2011-12-16 |
| KR20170042817A (ko) | 2017-04-19 |
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