TWI481318B - Laminated multilayer printed wiring board and method of manufacturing the same - Google Patents

Description

Multilayer type multilayer printed wiring board and manufacturing method thereof

The present invention relates to a build-up type multilayer printed wiring board having a stacked via structure and a method of manufacturing the same.

In recent years, the miniaturization and high functionality of electronic devices have been progressing, and the demand for high-density mounting of printed wiring boards has increased. In order to realize a printed wiring board capable of high-density mounting, a build-up type multilayer printed wiring board capable of providing a fine circuit wiring pattern is known (for example, refer to Patent Document 1).

The multi-layer type multilayer printed wiring board generally has a double-sided printed wiring board having a through hole or a multilayer printed wiring board as a core substrate, and is provided on both sides or one side of the core substrate. ~ 2 layers of layers. The build-up type multilayer printed wiring board is provided with a bottomed type in which a circuit (inner layer circuit pattern) provided on a core substrate and a circuit (outer layer circuit pattern) provided on the build-up layer are electrically connected Inter-layer conduction (blind hole). The blind hole is formed by an inner wall of a bottomed through hole (blind through hole) formed in the through-growth layer and having an island portion provided as a part of the inner layer circuit pattern at the bottom surface. The interlayer conductive path formed by the plating layer.

However, as the depth of the blind holes increases, the following general problems occur. First, it is easy to cause blind holes to be broken due to thermal expansion of each of the members constituting the printed wiring board. Further, when a plating layer is formed on the inner wall of the bottomed through hole in order to obtain interlayer conduction, since the plating liquid is likely to stay at the bottom of the through hole, the desired plating thickness cannot be obtained. For this reason, if the depth of the blind hole increases, it becomes more difficult to secure the reliability of the interlayer conductive path.

As a countermeasure against the above problem, it is conceivable to form a sufficiently thick plating layer at the inner wall of the bottomed through hole. However, if the thickness of the plating layer formed at the inner wall of the bottomed through hole is increased, it is inevitable that the thickness of the conductor layer formed on the buildup layer is also increased. . The outer circuit pattern is formed by wet etching the conductor layer on the build-up layer in accordance with a desired pattern. Therefore, as the thickness of the conductor layer on the buildup layer increases, it becomes difficult to fine-tune the outer circuit pattern. As a result, there is a problem that it is difficult to meet the requirements of high-density mounting.

Further, in the build-up type multilayer printed wiring board, from the viewpoint of increasing the density and the degree of freedom in design, there is a demand for a build-up type multilayer printed wiring board having a stacked via structure. Here, the term "stack via structure" means that the outer layer circuit pattern and the inner layer circuit are overlapped and disposed on the interlayer connection portion electrically connected to each other at the surface and the back surface of the core substrate. The pattern is constructed as another interlayer connection of the electrical connection. In the prior art, a method described in Patent Document 2 is known as an example of a method for producing a build-up type multilayer printed wiring board having a stacked via structure.

Next, in order to clarify the problems of the prior art, a method of manufacturing a build-up type multilayer printed wiring board having the prior art having a stacked via structure will be described with reference to FIG. Fig. 4 is a cross-sectional view showing the construction of the prior art build-up type multilayer printed wiring board.

(1) It is prepared to have a flexible double-sided surface of a copper foil 102 and a copper foil 103 (each 12 μm thick) on both sides of a flexible insulating base material 101 (25 μm thick) made of a polyimide film. A copper laminated board 104 is attached. Then, as is apparent from Fig. 4 (1), a through hole 105 ( Φ 100 μm) penetrating the double-sided copper-clad laminate 104 in the thickness direction is formed by laser processing or an NC drill or the like.

(2) Next, as is apparent from Fig. 4 (1), the conductive paste is filled in the inside of the via hole 105 by a screen printing method or the like, and then the filled conductive paste is cured. A landfill via 106 is formed.

(3) Next, as can be seen from Fig. 4 (1), by electrolytic copper plating treatment, copper plating is formed on the exposed via 105 and the copper foils 102, 103 on the periphery thereof. The coating layer 107 ( Φ 200 μm, 10 μm thick) was formed by the film. The cap plating layer 107 is for reducing the contact resistance between the landfill via 106 and the copper foils 102, 103, and ensuring the reliability of the interlayer connection obtained by the landfill via 106, while at the same time for the blind via The landfill hole 106 is protected while performing laser processing, and is formed. Further, the thickness of the cap plating layer 107 is determined in consideration of the resistance to laser light irradiated at the time of forming a blind via hole. In other words, the cap plating layer 107 is required to have a thickness that is not penetrated during laser processing.

(4) Next, as can be seen from Fig. 4 (1), the copper foils 102 and 103 are processed by a photosensitive etching process, and formed on both sides of the flexible insulating base material 101. An inner layer circuit pattern having a larger diameter than the cap plating layer 107 and receiving the island portion 108 ( Φ 300 μm). Here, the photosensitive etching processing method is a processing method for patterning a layer to be processed (such as copper foil) into a specific pattern, and forming, exposing, and developing a resist layer on the layer to be processed. A series of projects such as etching of the processed layer and peeling of the resist layer. Further, in the present process, it is necessary to cover the entire cap plating layer 107 by a resist layer so as not to damage the cap plating layer 107. Therefore, it is necessary to set the diameter of the receiving island portion 108 to be larger than the diameter of the cap plating layer 107. This is an important reason for hindering the increase in density of the inner layer circuit pattern.

(5) Next, in order to improve the adhesion to the bonding material used in the layering of the buildup layer, a roughening treatment is applied to the surface of the inner layer circuit pattern. By this roughening treatment, the absorption rate of carbon dioxide gas (CO ₂ ) laser light (wavelength: about 9.8 μm) on the copper surface is increased, and therefore, the resistance of the cap plating layer 107 to laser processing is lowered.

(6) Next, as can be seen from Fig. 4 (1), the polyimide film 109 (12 μm thick) is formed on the inner layer circuit pattern via the adhesive layer 110 (25 μm thick). Cover layer 111. Further, a vacuum laminator or the like may be used to laminate a cover layer 111 having a polyimide film 109 and an adhesive layer 110 formed on one surface of the polyimide film 109 to be formed. On the substrate with the inner layer circuit pattern. Here, the thickness of the subsequent material layer 110 is determined such that the adhesive layer 110 can completely fill the cap plating layer 107 and the inner layer circuit pattern. Therefore, if the thickness of the cap plating layer 107 is larger, the thickness of the adhesive layer 110 also has to be increased.

The double-sided core substrate 112 shown in Fig. 4 (1) is obtained by the engineering up to this point.

(7) Next, a flexible single-sided copper-clad laminate 113 is prepared. Then, as can be seen from Fig. 4 (2), the copper foil 113b of the single-sided copper laminated board 113 is formed by a photosensitive etching process to form an opening portion which is a conformal mask. . Here, the one-side copper-clad laminate 113 is provided with a copper foil 113b (12 μm thick) on one surface of the polyimide film 113a (thickness: 25 μm).

(8) Next, as can be seen from Fig. 4 (2), the single-sided copper-clad laminate 113 in which the copper foil 113b is processed in the pre-engineering process is laminated via the subsequent material layer 114. This is followed by the both sides of the double-sided core substrate 112.

(9) Next, as shown in Fig. 4 (2), laser processing is performed using a positive mask formed on the copper foil 113b to form blind holes (conductive holes) 115A, 115B.

The laser processing of the present invention uses a carbon dioxide gas laser in consideration of productivity. However, since the copper surface which has been roughened is susceptible to thermal damage caused by carbon dioxide gas laser, it is necessary to pay attention to the conditions of laser processing (pulse energy of laser light, etc.). . As a method of not passing through the cap plating layer 107, there are two methods, that is, a method of reducing the power of the laser light and a method of increasing the thickness of the cap plating layer 107. In the former method, since the processing speed is lowered and the productivity is lowered, it cannot be used. On the other hand, when the latter method is used, since it is difficult to form a fine outer layer circuit pattern as will be described in detail later, it is impossible to satisfy the requirement of high-density mounting of a printed wiring board.

(10) Next, as can be seen from Fig. 4 (3), electrolysis is formed on the copper foil 113b and the inner walls of the blind vias 115A, 115B by applying a conductive treatment and a subsequent electrolytic copper plating treatment. Copper plating film. The thickness of the electrolytic copper plating film needs to be 25 to 30 μm in order to ensure interlayer conduction. By this process, blind holes 116A, 116B functioning as interlayer conductive paths are formed. The blind vias 116A are stacked on the landfill vias 106 of the core substrate via the cap plating layer 107, and form a stacked via structure. On the other hand, the blind via 116B does not constitute a stacked via structure.

(11) Next, as shown in Fig. 4 (3), a photosensitive etching process is used, and an electrolytic copper plating film formed by the above-described process is processed to form an outer layer circuit pattern 117. As can be seen from FIG. 4 (3), the build-up type multilayer printed wiring board 118 is provided with a component mounting portion 118a in which a build-up layer is laminated on the double-sided core substrate 112, and from this component. The flexible cable portion 118b extends from the mounting portion 118a. The flexible cable portion 118b is a portion of the double-sided core substrate 112 that is not provided with a build-up layer.

Through the above work, a build-up type multilayer printed wiring board 118 having the prior art having a stacked via structure was fabricated.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2004-200260

[Patent Document 2] Japanese Patent Laid-Open Publication No. 2000-151118

As one of the problems of the prior art, as described above, in order to maintain productivity, it is possible to prevent the cap plating layer 107 from passing through when the blind holes 115A and 115B are formed by laser processing. The cover plating layer 107 has to be thickened. As the cap plating layer 107 becomes thicker, since the thickness of the adhesive layer 110 which fills the inner layer circuit pattern becomes large, the blind via holes 115A and 115B become deep. The thickness of the electrolytic copper plating film formed on the blind holes 115A and 115B and the copper foil 113b is required to be 25 to 30 μm as described above in order to secure the connection reliability of the blind holes 116A and 116B. In this case, since the thickness of the conductor layer (copper foil 113b and electrolytic copper plating film) on the buildup layer is 37 to 42 μm, a fine outer layer having a pitch of, for example, 100 μm is formed in a good yield. The circuit pattern actually becomes extremely difficult.

As such, in the prior art multilayer-type multilayer printed wiring board having the stacked via structure, there is a problem that the requirements for high-density mounting cannot be satisfied.

The present invention has been made based on the above-described technical knowledge, and an object thereof is to provide a build-up type multilayer printed wiring board having a stacked via structure capable of high-density mounting, and to provide a low-cost and low-cost A method of stably manufacturing such a printed wiring board.

According to a first aspect of the present invention, there is provided a build-up type multilayer printed wiring board comprising: a double-sided circuit substrate, a flexible insulating base material, and an insulating layer provided thereon a double-sided portion of the base material is provided with an inner layer circuit pattern that receives the island portion, and a buried portion that penetrates the insulating base material in the thickness direction and electrically connects the inner layer circuit pattern on the front surface and the back surface of the insulating base material a through-hole; and a build-up layer on the double-sided circuit substrate, laminated on the insulating layer, and having an outer layer circuit pattern on the surface, and further, the build-up type multilayer The printed wiring board includes a blind hole formed of a material having a surface layer made of an etchant with respect to a metal constituting the inner layer circuit pattern, and a cap plating layer covering the island portion. And an electroplated film formed at an inner wall formed in a thickness direction and penetrating the build-up layer and having a blind hole of the cap plating layer exposed on the bottom surface, and the inner layer circuit pattern and the outer layer Circuit patterns for electrical connection.

According to a second aspect of the present invention, there is provided a method of manufacturing a build-up type multilayer printed wiring board, characterized in that a flexible insulating base material and a first surface provided on both sides thereof are prepared a double-sided metal-attached laminated plate of a metal foil; forming a through hole penetrating the double-sided metal-attached laminated board in a thickness direction; filling a conductive paste inside the through hole, and then hardening the conductive paste Forming a buried via hole; forming a cap plating layer formed of a material having at least a surface layer with respect to the etchant of the first metal foil at a specific region; forming on the first metal foil a resist layer having a specific pattern; and the resist layer and the cap plating layer are used as an etching resist layer, and the first metal foil is etched, thereby forming a cap plating layer Covering the inner layer circuit pattern of the island portion, thereby obtaining a double-sided circuit substrate; applying a roughening treatment to the surface of the inner layer circuit pattern, and then performing an insulating film and being formed a cover layer of the first adhesive layer on one surface of the insulating film is attached to the double-sided circuit substrate, thereby obtaining a double-sided core substrate; and a second metal foil is provided on the surface The build-up layer is laminated on the double-sided core substrate via a second adhesive layer; and the infrared layer is irradiated at a specific position of the build-up layer to form a build-up layer in the thickness direction. a blind hole in the cover plating layer is exposed on the bottom surface, and a plating film is formed on the inner wall of the blind hole and the second metal foil to electrically connect the second metal foil and the inner layer circuit pattern. Blind hole.

According to a third aspect of the present invention, there is provided a method of manufacturing a build-up type multilayer printed wiring board, characterized in that a flexible insulating base material and a first surface provided on both sides thereof are prepared a double-sided metal-attached laminated plate of a metal foil; forming a through hole penetrating the double-sided metal-attached laminated board in a thickness direction; filling a conductive paste inside the through hole, and then hardening the conductive paste Forming a buried via; forming a first plating film on the first metal foil and the exposed buried via; and forming a resist layer having a specific pattern on the first plating film The resist layer is used as an anti-etching layer, and the first plating film and the first metal foil are etched, whereby an inner layer circuit pattern having an island portion is formed, and at least the surface layer is a cap plating layer made of a material having resistance to the etchant of the first metal foil is formed so as to cover the island portion, thereby obtaining a double-sided circuit substrate; Circuit diagram A roughening treatment is applied to the surface, and then a lamination process is performed in which a coating layer having an insulating film and a first adhesive layer formed on one surface of the insulating film is attached to the double-sided circuit substrate. Thereby, a double-sided core substrate is obtained; and a build-up layer having a second metal foil on the surface thereof is laminated on the double-sided core substrate via a second adhesive layer; by being specific to the build-up layer Irradiating the infrared laser light at a position, forming a blind hole penetrating the build-up layer in the thickness direction and exposing the cap plating layer on the bottom surface; forming a second surface on the inner wall of the blind hole and the second metal foil The film is plated to form a blind via that electrically connects the second metal foil and the inner layer circuit pattern.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a build-up type multilayer printed wiring board, characterized in that a flexible insulating base material and a first surface provided on both sides thereof are prepared a double-sided metal-attached laminated plate of a metal foil; forming a through hole penetrating the double-sided metal-attached laminated board in a thickness direction; filling a conductive paste inside the through hole, and then hardening the conductive paste Forming a buried via; forming a first plating film on the first metal foil and the exposed buried via; and forming a resist layer having a specific pattern on the first plating film The resist layer is used as an anti-etching layer, and the first plating film and the first metal foil are etched, whereby an inner layer circuit pattern having an island portion is formed, thereby A double-sided circuit substrate is obtained; and a component mounting portion and a flexible portion which are provided with an insulating film and a first adhesive layer formed on one surface of the insulating film are attached to the double-sided circuit substrate Between the cable sections a lamination process at a boundary region; a cap plating layer formed of at least a surface layer made of a material having resistance to an etchant of the first metal foil, formed to cover the island portion, and thereby a double-sided core substrate is obtained; after the roughening treatment is applied to the surface of the inner layer circuit pattern, the buildup layer having the second metal foil on the surface thereof is passed through the second layer having a thickness equal to or greater than the thickness of the cover layer. And then depositing the layer on the part mounting portion on the double-sided core substrate; and irradiating the infrared laser light at a specific position of the build-up layer to form a thickness extending through the build-up layer on the bottom surface a blind hole in which the cap plating layer is exposed; and a second plating film is formed on the inner wall of the blind hole and the second metal foil to electrically connect the second metal foil and the inner layer circuit pattern Blind hole.

With such features, the present invention provides the following general effects.

The build-up type multilayer printed wiring board of the present invention is provided with a cap plating layer having a surface layer which is made of a material resistant to an etchant forming a metal of the inner layer circuit pattern at the island portion of the blind hole. Since the cap plating layer is high in resistance to infrared lasers, the thickness of the cap plating layer can be greatly reduced. Thereby, the thickness of the adhesive layer filling the inner layer circuit pattern and the cap plating layer can be reduced, and the blind hole penetrating the buildup layer can be made shallow. As a result, the thickness of the plating layer required to ensure interlayer conduction can be reduced, and the outer layer circuit pattern can be made fine. Therefore, the build-up type multilayer printed wiring board having the stacked through-hole structure of the present invention can satisfy the requirements of high-density mounting.

Further, in the method of manufacturing a build-up type multilayer printed wiring board according to the present invention, a material having a surface layer formed by an etchant with respect to a metal constituting the inner layer circuit pattern is formed at the island portion of the blind hole. The cover is plated. Since the cap plating layer is high in resistance to infrared lasers, it can be formed to be thinner. Thereby, the thickness of the adhesive layer filling the inner layer circuit pattern and the cap plating layer can be reduced, and the blind holes penetrating the buildup layer can be formed shallow. As a result, it is possible to reduce the thickness of the plating layer required to ensure interlayer conduction, and to form a fine outer layer circuit pattern. Further, since it is possible to use the conditions of the laser processing and the conditions of the desmear engineering in the case of forming a blind via hole regardless of whether or not it is used for the stacked via structure, the productivity can be improved.

Hereinafter, three embodiments of the present invention will be described with reference to the drawings.

In addition, the same reference numerals are attached to the components having the same functions in the respective drawings, and the detailed description of the components of the same symbols is not repeated. The numerical values in the description of the embodiments are exemplary values, and the present invention is not limited by the values. Further, the drawing is a model exhibitor, and is displayed as a center of the characteristic portion of each embodiment, and the relationship between the thickness and the plane size, the thickness ratio of each layer, and the like are different from those of the real thing.

(First embodiment)

A method of manufacturing a build-up type multilayer printed wiring board having a stacked via structure according to the first embodiment will be described with reference to FIGS. 1A to 1D. 1A to 1D are engineering cross-sectional views showing a method of manufacturing a build-up type multilayer printed wiring board of the present embodiment.

(1) It is prepared to have a flexible double-sided surface of the copper foil 2 and the copper foil 3 (each 12 μm thick) on the front surface and the back surface of the flexible insulating base material 1 (25 μm thick) such as a polyimide film. A copper laminated board 4 is attached. Thereafter, as shown in Fig. 1A (1), a through hole 5 ( Φ 100 μm) penetrating the double-sided copper-clad laminate 4 in the thickness direction is formed by laser processing or an NC drill or the like. Further, in the case where the through hole 5 is formed by laser processing, the copper foil 2, 3 processed into a specific pattern may be selected as a positive laser processing method of a metal mask, or by a laser Direct laser processing for directly processing the copper foils 2, 3 and the insulating resin (flexible insulating substrate 1) underneath them. Here, in consideration of productivity, a direct laser processing method in which an etching process of a copper foil by a photosensitive etching process is not required is selected.

(2) Next, as shown in FIG. 1A (2), the conductive paste 6A is filled in the inside of the through hole 5 by a screen printing method or the like, and then the filled conductive paste 6A is cured. From the viewpoint of the reduction in the number of the engineering and the electrical properties, the conductive paste 6A is preferably one in which the volume resistivity is low and it is not necessary to perform the conduction treatment when forming the cap plating layer 9 to be described later. Here, AE1244 (volume resistivity: 5 × 10 ^-5 Ω‧ cm) manufactured by TATSUTA ELECTRONICS Co., Ltd. was used. In the present invention, it is preferable that the conductive paste 6A is always filled as shown in FIG. 1A (2) in such a manner that voids or the like are not generated in the through holes 5 due to insufficient conductive paste. It will overflow at the upper portion and the lower portion of the through hole 5. In addition, since the conductive paste is not filled in the blind holes but is filled in the through holes, the printing machine used in the present project does not need to be a vacuum system, as long as it is capable of It suffices that a mechanism for differentiating the degree of adsorption of the double-sided copper-clad laminate 4 can be produced.

(3) Next, the both sides of the double-sided copper-clad laminate 4 filled with the conductive paste 6A in the through-hole 5 shown in Fig. 1A (2) are subjected to a belt sander or a barrel polishing machine. The mechanical polishing is performed or the polishing is performed by chemical mechanical polishing (CMP) or the like. Thereby, as shown in FIG. 1A (3), the excess conductive paste 6A overflowing from the through hole 5 is cut off to form the landfill via 6. The copper foil 2 and the copper foil 3 are also ground by the polishing of the present process, and the copper foil 2 and the copper foil 3 are respectively a copper foil 2a and a copper foil 3a having a thickness of about 5 μm.

Further, in the case where the flexible double-sided copper-clad laminate is polished as in the present case, the double-sided copper laminate 4 is adhered to the adhesive sheet before the polishing. It is bonded to a hard substrate (a few mm thick) or the like, and then polished. With such a configuration, a polishing apparatus for a hard substrate can be used. As another method of polishing the film, the double-sided copper-clad laminate 4 may be adsorbed on the flat plate and held, and then the surface opposite to the adsorption surface is ground, and then the double-sided copper layer is applied. The backing plate 4 is reversed, and the finished surface is adsorbed on the flat plate, and the finished surface is ground.

(4) Next, as can be seen from Fig. 1A (4), a plating resist 7 is formed on each of the copper foil 2a and the copper foil 3a. The plating resist layer 7 is provided with an opening 8a in a region where the landfill hole 6 is exposed, and is provided in a region where the landfill hole 6 is not formed and becomes an island portion of the blind hole. Opening portion 8b. Further, the diameters of the openings 8a, 8b are preferably determined in consideration of the diameter of the blind hole and the alignment accuracy in forming the blind hole. Here, it is set to Φ 200 μm.

(5) Next, as shown in Fig. 1A (4), a cap plating layer is formed at the opening portions 8a and 8b of the plating resist layer 7 by electrolytic or electroless plating using the plating resist layer 7. 9. In more detail, the cap plating layer 9 is formed as follows. First, electrolytic copper plating is performed, and a copper plating layer 9a having a thickness of 2 μm is formed on the bottom surfaces of the openings 8a and 8b. Thereafter, electroless silver plating was performed, and a silver plating layer 9b having a thickness of 0.5 μm was formed on the copper plating layer 9a. This series of plating treatment is performed while maintaining the plating resist layer 7 remaining.

Further, the cap plating layer 9 is not limited to the above configuration. For example, instead of the copper plating layer 9a, a nickel plating layer obtained by electroless nickel plating may be formed. Further, the cap plating layer 9 may be formed as a one-layer silver plating layer or a nickel plating layer by electrolysis or electroless plating.

The plating layer constituting the surface layer of the cap plating layer 9 needs to have resistance to an etchant for copper (it is also selective etching property with respect to copper). As the plating layer satisfying this condition, instead of the silver plating layer 9a, a gold plating layer obtained by electroless gold plating or a nickel plating layer obtained by electroless nickel plating may be formed. Alternatively, instead of the silver plating layer 9b, a nickel plating layer and a gold plating layer may be sequentially formed on the copper plating layer 9a. In this manner, the cap plating layer 9 can be formed under the condition that at least the surface layer is made of a material resistant to copper etchant such as silver (Ag), gold (Au), or nickel (Ni). The plating layers made of silver, gold, nickel, copper, or the like are formed singly or in combination. In any of these cases, it is not necessary to change the subsequent construction, and the same effect as in the case where the cap plating layer 9 made of the copper plating layer 9a and the silver plating layer 9b is formed can be obtained. The composition of the cap plating layer 9 is selected in consideration of productivity, cost, and the like.

(6) Next, after the plating resist layer 7 is peeled off, as shown in FIGS. 1B (5) and (6), the inner layer circuit patterns 11A to be described later are formed on the copper foils 2a and 2b, 11B is provided with a resist layer 10 having a specific pattern. Here, Fig. 1B (5) is a cross-sectional view taken along line A-A' of Fig. 1B (6). That is, Fig. 1B (6) is a view from the top of the substrate shown in Fig. 1B (5). Further, in order to form the resist layer 10, a dry film resist layer (about 10 μm thick) for forming a fine wiring may be used. Also in this case, since the thickness of the cap plating layer 9 is 2.5 μm as usual as described above, the cap plating layer 9 can be filled.

The cap plating layer 9 functions as a resist layer when performing circuit pattern etching, and therefore, as shown in FIGS. 1B (5) and (6), it is not necessary to provide a cap plating layer. 9 resist layer. Therefore, even if the exposure machine capable of performing high-precision alignment is not used, the shape of the cap plating layer 9 can be directly set to the shape of the island portion of the blind hole. This is helpful for improving productivity and manufacturing low-cost printed wiring boards.

(7) Next, as can be seen from FIG. 1B (7), the copper foil 2a and the copper foil 3a are etched by using the resist layer 10 and the cap plating layer 9 as a resist layer. An inner layer circuit pattern 11A and an inner layer circuit pattern 11B are formed on the front surface and the back surface of the flexible insulating base material 1, respectively. Thereafter, the resist layer 10 is peeled off. The inner layer circuit patterns 11A and 11B are provided with receiving island portions having blind holes covered by the lid plating layer 9.

The etchant used in the present process is a one which can etch the copper foils 2a and 3a and does not cause damage to the cap plating layer 9 (silver plating layer 9b). For example, as such an etchant, an etchant using copper (II) chloride or iron (III) chloride can be used.

In the case where the surface layer of the cap plating layer 9 is formed by a nickel plating layer, the etchant of the present process is carried out, for example, by selective etching using an ammonia-based alkaline etchant.

Through the work up to this point, the double-sided circuit substrate 12 shown in Fig. 1B (7) is obtained. In the double-sided circuit board 12, the inner layer circuit patterns 11A and 11B having the receiving island portions are formed, and the buried via holes 6 electrically connect the inner layer circuit patterns 11A and the inner layer circuit patterns 11B. The cap plating layer 9 also has a function of reducing the contact resistance between the landfill via 6 and the copper foils 2, 3 and ensuring the reliability of the landfill via 6 as an interlayer connection path.

(8) Next, in order to improve the adhesion to the adhesive layer 14 of the cover layer 15 to be described later, a roughening treatment is applied to the surfaces of the inner layer circuit patterns 11A and 11B. Here, the roughening process was performed using MULTI BOND 150 of Japan MacDermid Co., Ltd. In addition, it is also possible to use a NBD series manufactured by Ebara Electric Co., Ltd. (Company Co., Ltd.) for roughening.

As described above, the adhesion between the copper foils 2a, 3a and the adhesive is improved by the roughening treatment, but conversely, the absorption rate of the carbon dioxide gas laser light at the copper foils 2a, 3a is increased. However, in the present embodiment, a silver plating layer 9b having copper etchant resistance is formed on the surface layer of the cap plating layer 9 which covers the island portion of the blind hole. Therefore, the cap plating layer 9 is not roughened by the roughening treatment of the present process, and the absorption rate of the carbon dioxide gas laser light at the island portion does not increase. Actually, after measuring the absorption rate of the carbon dioxide gas laser light before and after the roughening treatment, as a result, the absorption rate increased from 20% to about 30% at the surface of the copper foil 2a, 3a, but The increase in the absorptivity at the surface of the silver plating layer 9b was not observed. Further, it can be seen from the fact that the thickness of the copper plating layer 9a and the copper foil 2a (3a) which are located under the silver plating layer 9b after the irradiation of the carbon dioxide gas laser light is not reduced, it is also known that it is sufficiently ensured that Resistance to thermal damage caused by laser processing. Since the silver plating layer 9b hardly absorbs infrared laser light before the process (roughening treatment), the resistance of the plating layer 9 with respect to the infrared laser light is maintained after the roughening treatment of the present project. To be sufficiently high.

(9) Next, a cover layer 15 having an insulating film 13 made of polyimide or the like (for example, 12 μm thick) and an adhesive layer 14 formed on one surface of the insulating film 13 is prepared. The subsequent agent layer 14 is formed, for example, of an adhesive such as acrylic or epoxy. Then, lamination work of attaching the cover layer 15 to the double-sided circuit substrate 12 is performed using vacuum lamination or the like. Thereby, as shown in FIG. 1B (8), the inner layer circuit patterns 11A, 11B and the cap plating layer 9 are filled by the adhesive layer 14. As another method, the insulating film 13 may be formed on the adhesive layer 14 after forming the adhesive layer 14 in which the inner layer circuit patterns 11A and 11B and the cap plating layer 9 are filled.

The thickness of the material layer 14 is determined in such a manner that the inner layer circuit pattern 11A (11B) and the cap plating layer 9 can be completely filled. The thickest portion of the inner layer circuit pattern 11A (11B) is the island portion of the blind hole. The thickness of the island portion is reduced by 7.5 μm (copper foil 2a (3a): 5 μm, lid plating layer 9: 2.5 μm) which is smaller than the prior art by thinning the cap plating layer 9. Therefore, the thickness of the adhesive layer 14 can be set to a value (8 μm) which is greatly reduced as compared with the prior art.

Through the work up to this point, the double-sided circuit substrate 16 shown in Fig. 1B (8) is obtained.

(10) Next, as is apparent from Fig. 1C (9), a copper foil 17b (12 μm thick) is provided on one surface of a flexible insulating base material 17a (for example, a polyimide film having a thickness of 25 μm). A single-sided copper laminated board 17 is used. Then, using the photosensitive etching processing method, a positive mask 18 (opening) for forming a blind hole is formed at the copper foil 17b of the single-sided copper laminated board 17.

(11) Next, as can be seen from Fig. 1C (9), the single-sided copper-clad laminate 17 on which the positive mask 18 is formed is formed of an adhesive for interlayer formation. The layer of the adhesive layer 19 is laminated on the double-sided core substrate 16. As the backing material used here, in order to prevent the adhesive from flowing out to the flexible cable portion (the double-sided core substrate 16 not covered by the single-sided copper laminated board 17), low flow is used. It is desirable that the prepreg of the sexual form or the outflow of the sheet or the like is small. Further, the single-sided copper-clad laminate 17 including the finally-processed copper foil 17b may be bonded to the double-sided core substrate 16 via the adhesive layer 19, and then the copper foil 17b may be processed to form a copper foil 17b. Orthodox mask 18.

Here, the diameter of the positive-shaped mask 18 is set to 120 μm which is smaller than 80 μm in diameter of the island portion (cover plating layer 9) of the blind hole and smaller than 80 μm. Therefore, the orthographic mask 18 can be formed by a method capable of obtaining alignment accuracy of ±40 μm. As the alignment method, for example, the following two methods are available.

The first method is a method in which a single-sided copper-clad laminate 17 is laminated on the double-sided core substrate 16 after the positive mask 18 is formed. In this method, target marks are formed on the double-sided core substrate 16 in advance. Then, after the alignment of the single-sided copper-clad laminate 17 is performed using the target mark, the single-sided copper-clad laminate 17 is laminated on the double-sided core substrate 16.

The second method is a method in which the positive-shaped mask 18 is formed after the single-sided copper-clad laminate 17 is laminated on the double-sided core substrate 16. In this method, first, a target mark is formed on the double-sided core substrate 16 in advance. Then, a single-sided copper-clad laminate 17 is laminated on the double-sided core substrate 16 to form a photoresist layer on the copper foil 17b. Thereafter, the alignment of the double-sided core substrate 16 and the reticle is performed using the mark representing the reference position provided on the reticle for exposure and the target mask of the double-sided core substrate 16. Thereafter, exposure and development to the photoresist layer are performed, and a positive mask 18 is formed at a specific position of the copper foil 17b.

(12) Next, as shown in Fig. 1C (10), the laser beam processing is performed using the positive mask 18 formed in the foregoing process to form a blind hole 20A in which the cap plating layer 9 is exposed at the bottom surface, 20B (guided general hole). More specifically, the flexible insulating base material 17a, the adhesive layer 19, the insulating film 13, and the adhesive layer 14 at the positive mask 18 are removed. In the laser processing method of the present project, it is preferable to use a carbon dioxide gas laser which is fast in processing speed and excellent in productivity, but more generally, an infrared laser can be used.

Here, the details of the laser processing in this project will be described. As a carbon dioxide gas laser processing machine, ML605GTXIII-5100U2 manufactured by Mitsubishi Electric Corporation Co., Ltd. is used. The beam diameter of the laser is adjusted to 200 μm by a specific aperture or the like, and the position of the laser irradiation is adjusted, and then 5 shots are performed with a laser pulse having a pulse width of 10 μsec and a pulse energy of 5 mJ. Irradiation forms blind holes 20A, 20B. Although the thickness of the cap plating layer 9 is 2.5 μm and is thin, since the absorption of the carbon dioxide gas laser light of the silver plating layer 9b is small, it is possible to cause the laser light to pass through the cap plating layer 9 or the cap plating. The layer 9 is subjected to laser processing from the case where the layer 9 is peeled off from the landfill.

(13) Next, in order to remove the resin residue generated when the blind holes 20A and 20B are formed, a decontamination process is performed.

(14) Next, as shown in Fig. 1D (11), on the inner walls (side and bottom surfaces) of the blind vias 20A, 20B and the copper foil 17b by applying a conductive treatment and a subsequent electrolytic copper plating treatment An electrolytic copper plating film 21 is formed. The thickness of the electrolytic copper plating film 21 is set to be about 15 to 20 μm in order to ensure interlayer conduction. Thereby, the blind holes 22A and 22B which electrically connect the outer layer conductive film (the copper foil 17b and the electrolytic copper plating film 21) and the inner layer circuit patterns 11A and 11B, and function as an interlayer conduction circuit are formed.

(15) Next, as shown in Fig. 1D (12), a conductive layer (copper foil 17b and electrolytic copper plating film 21 thereon) on the flexible insulating base material 17a is formed by a photosensitive etching processing method. It is processed into a specific pattern to form an outer layer circuit pattern 23.

After that, although not shown, a photoresist layer for protection is formed in a portion where soldering is not required, and solder plating, nickel plating, gold is applied to the surface of the island or the like. Surface treatment such as plating. Thereafter, the outer shape processing is performed by punching or the like by a mold.

Through the above work, the build-up type multilayer printed wiring board 24 of the first embodiment is obtained. The double-sided core substrate 16 of the build-up multilayer printed wiring board 24 is provided with a flexible insulating base material 1 and two sides of the flexible insulating base material 1 and having a receiving island portion The layer circuit patterns 11A and 11B and the buried via hole 6 penetrating the flexible insulating base material 1 and the receiving island portion and electrically connecting the inner layer circuit pattern 11A and the inner layer circuit pattern 11B. Further, the landfill via 6 is provided with a cap plating which is formed of a material which is exposed to the exposed island portion and which has a surface layer which is resistant to an etchant which forms a metal of the inner layer circuit patterns 11A and 11B. Layer 9.

On the double-sided core substrate 16, an adhesion layer provided with an outer layer circuit pattern 23 on the surface is laminated via the adhesive layer 19.

The blind holes 22A and 22B are formed of a plating film formed at the inner wall of the blind holes 20A, 20B which are formed in the thickness direction and penetrate the build-up layer and expose the cap plating layer 9 at the bottom surface, and pass through the cap plating layer 9 The inner layer circuit patterns 11A, 11B and the outer layer circuit pattern 23 are electrically connected. Further, as shown in FIG. 1D (12), the blind hole 22A is disposed so as to be superposed on the landfill hole 6 with the lid plating layer 9 interposed therebetween. In this manner, the build-up type multilayer printed wiring board 24 of the present embodiment. A stacked through hole structure composed of a landfill through hole 6 and a blind hole 22A is provided.

As shown in FIG. 1D (12), the build-up type multilayer printed wiring board 24 is provided with a component mounting portion 24a in which a build-up layer is laminated on the double-sided core substrate 16, and a component mounting portion 24a from the component mounting portion 24a. The flexible cable portion 24b extends. The flexible cable portion 24b is a portion of the double-sided core substrate 16 that is not provided with a build-up layer. The flexible cable portion 24b is not an essential component, and may not be provided.

Further, in the present embodiment, the buildup layer is provided on the front surface and the back surface of the double-sided core substrate 16, but it is also possible to provide the buildup layer only on one surface.

As described above, in the present embodiment, the cap plating layer 9 is formed in advance in the region of the blind holes 20A and 20B penetrating the buildup layer to be the receiving island portion. The surface layer of the cap plating layer 9 is formed of a plating layer (silver plating layer 9b or the like) having resistance to an etchant of copper. As a result, when the copper films 2a and 3a are roughened, since the cap plating layer 9 is not roughened, when the blind holes 20A and 20B are formed by laser processing, the island portion is received ( The surface of the cap plating layer 9) has almost no absorption of laser light, and even when the cap plating layer 9 is thin, it is not subjected to thermal damage due to laser light. Therefore, the cap plating layer 9 can be greatly thinned compared to the prior art.

By thinning the cap plating layer 9, the binder layer 14 of the cover layer 15 can be thinned. Thereby, the blind holes 20A, 20B can be formed to be shallow. For example, compared to the prior art, it can be reduced by about 10 μm. As a result, the electrical conductivity of the electrolytic copper plating film 21 with respect to the inner walls of the blind holes 20A and 20B is improved. Further, the influence on the blind holes 22A, 22B due to thermal expansion of the constituent members of the multilayer printed wiring board is lowered. In the member constituting the build-up type multilayer printed wiring board 24, since the thermal expansion coefficient of the adhesive constituting the adhesive layer 14 is large, the effect obtained by thinning the adhesive layer 14 is large. . Therefore, the thickness of the electrolytic copper plating film 21 required for improving the yield and ensuring the connection reliability can be reduced. As a result, according to the present embodiment, it is possible to form the fine outer layer circuit pattern 23, and it is possible to obtain the build-up type multilayer printed wiring board 24 having the stacked via structure which satisfies the requirements for high-density mounting.

Further, when the copper foils 2a and 3a are etched to form the inner layer circuit pattern 11, since the cap plating layer 9 is provided with the resistance of the copper etchant, it is not necessary to provide the cap plating layer 9 for protection. Resist layer. According to the present invention, the diameter of the receiving island portion (copper foils 2a and 3a) covered by the cap plating layer 9 can be made the same as that of the cap plating layer 9, and the inner layer circuit pattern can be made high. Densification. In addition, since it is possible to use an exposure machine that can perform high-precision alignment, it is possible to improve productivity and to manufacture a low-cost printed wiring board.

Further, the blind via hole 20B constituting the stacked via structure is also provided with a cap plating layer 9 at the receiving island portion. Therefore, the structure of the blind hole 20B (the depth of the through hole, etc.) is slightly the same as the blind hole 20A for the stacked through hole structure. Therefore, regardless of whether or not it is used for the stacked through hole structure, the conditions of the laser processing and the conditions of the decontamination process in forming the blind hole can be made the same. As a result, according to the present embodiment, it is possible to ensure a large margin of processing and to improve productivity.

(Second embodiment)

Next, a build-up type multilayer printed wiring board according to the second embodiment will be described. One of the differences between the second embodiment and the first embodiment is that the build-up type multilayer printed wiring board of the second embodiment is provided on the flexible cable portion of the flexible insulating base material. An electroplated layer having an inner layer terminal and protecting the surface of the inner layer terminal is formed by the same electroplating process as the cap plating layer formed on the landfill through hole and the receiving island portion. By this, it is possible to reduce the number of projects and improve productivity.

A method of manufacturing a build-up type multilayer printed wiring board having a stacked via structure according to the present embodiment will be described with reference to FIGS. 2A to 2D. 2A to 2D are engineering cross-sectional views showing a method of manufacturing the build-up type multilayer printed wiring board of the embodiment.

Since the construction of the base material shown in Fig. 1A (3) of the first embodiment is the same as that of the first embodiment, the description thereof will be omitted, and the subsequent description will be made.

(1) As shown in Fig. 2A (1), electrolytic copper plating treatment is applied to both sides of the substrate, and electrolytic copper plating is formed on the copper foils 2a and 3a and the exposed landfill holes 6. Films 31 and 32 (each 2 μm thick).

(2) Next, as shown in Fig. 2A (2), on the electrolytic copper plating films 31 and 32, a resist layer 33 having a specific pattern for forming the inner layer circuit patterns 34A, 34B to be described later is formed. .

(3) Next, as shown in Fig. 2A (3), the electrolytic copper plating films 31, 32 and the copper foils 2a, 3a are etched by using the plating resist 33 to form a blind hole. The inner layer circuit patterns 34A and 34B of the island portion. Thereafter, the resist layer 33 is peeled off. In the etching of the present process, for example, an etchant using copper (II) chloride or iron (III) chloride can be used.

(4) Next, as can be seen from Fig. 2B (4), the plating resist 35 is formed on both sides of the substrate obtained by the above-described work. The plating resist layer 35 is provided with an opening 36b at the receiving island portion of the blind hole, and further has an opening 36c at a region where the inner layer terminal is formed. Further, as shown in FIG. 2B (4), the plating resist 35 may be provided with an opening 36a in a region where the landfill hole 6 is exposed. It is arbitrary whether or not this opening part 36a is provided.

(5) Next, as shown in Fig. 2B (4), electrolysis or electroless plating is performed by using the plating resist 35, and exposed at the openings 36a, 36b, 36c of the plating resist 35. On the electrolytic copper plating films 31 and 32, a cap plating layer 37 (0.5 μm thick) made of a silver plating layer was formed. Thereafter, the plating resist 35 is peeled off. Further, when there is a portion where the plating wire is not connected, electroless plating is performed. As can be seen from Fig. 2B (4), in the plating process of the present process, a part of the inner layer circuit pattern which is exposed to the opening portion 36c and which is an inner layer terminal is also formed as a terminal protective film. The silver plating layer (cover plating layer 37) completes the inner layer terminal 50.

The plating layer constituting the surface layer of the cap plating layer 37 is required to have resistance against an etchant of copper used in the subsequent roughening treatment. The silver plating layer satisfies this condition. Further, as the cap plating layer 37, instead of the copper plating layer 9a, a nickel plating layer obtained by electroless nickel plating or a gold plating layer obtained by electroless gold plating may be formed. Alternatively, as the cap plating layer 37, a nickel plating layer obtained by electroless nickel plating and a gold plating layer obtained by electroless gold plating may be sequentially formed. In this manner, the cap plating layer 37 can be formed under the condition that at least the surface layer is made of a material resistant to copper etchant such as silver (Ag), gold (Au), or nickel (Ni). The plating layers made of silver, gold, nickel, or the like are formed individually or in combination. In either case, it is not necessary to change the subsequent construction, and the same effect as in the case of forming the silver plating layer can be obtained. The configuration of the cap plating layer 37 is selected in consideration of the connection pattern of the inner layer terminals in addition to productivity and cost.

Through the work up to this point, the double-sided circuit substrate 38 shown in Fig. 2B (5) is obtained.

(6) Next, roughening is applied to the surfaces of the inner layer circuit patterns 34A and 34B in order to improve the adhesion to the bonding material (the bonding material layer 40 to be described later) used in the layering of the buildup layer. deal with. This roughening treatment can be carried out in the same manner as the method described in the first embodiment.

In the present embodiment, the cap plating layer 37 which is coated with the island portion irradiated with the laser light is formed by a silver plating layer having copper etchant resistance. Therefore, the cap plating layer 37 is not roughened by the roughening treatment of the present process. Therefore, the absorption rate of the carbon dioxide gas laser light at the island is not increased, but is maintained at a low absorption rate.

(7) Next, a cover layer 41 having an insulating film 39 (for example, 12 μm thick) made of polyimide or the like and an adhesive layer 40 formed on one surface of the insulating film 39 is prepared. The subsequent agent layer 40 is formed, for example, of an adhesive such as acrylic or epoxy. Then, lamination work of attaching the cover layer 41 to the double-sided circuit substrate 38 is performed using vacuum lamination or the like. Thereby, as shown in FIG. 2B (6), the inner layer circuit patterns 34A, 34B and the cap plating layer 37 at the component mounting portion are filled by the adhesive layer 40. As another method, after forming the adhesive layer 40 in which the inner layer circuit patterns 34A and 34B and the cap plating layer 37 are filled, the insulating film 39 may be formed on the adhesive layer 40.

The thickness of the adhesive layer 40 is determined in such a manner that the inner layer circuit pattern 34A (34B) and the cap plating layer 37 can be completely filled. The thickness of the thickest receiving island portion of the inner layer circuit pattern 34A (34B) is 7.5 μm (copper foil 2a (3a): 5 μm, electrolytic copper plating film 31 (32); 2 μm, cap plating layer 37: 0.5 Mm). Therefore, the thickness of the adhesive layer 40 can be set to a value (8 μm) which is greatly reduced compared with the prior art.

Through the work up to this point, the double-sided circuit substrate 42 shown in Fig. 2B (6) is obtained.

(8) Next, as is apparent from Fig. 2C (7), a copper foil 43b (12 μm thick) is provided on one surface of the flexible insulating base material 43a (for example, a polyimide film having a thickness of 25 μm). A single-sided copper laminated board 43. Then, in the same manner as in the first embodiment, a positive-working mask 44 (opening) for forming a blind hole is formed in the copper foil 43b of the one-side copper-clad laminate 43 by a photosensitive etching processing method.

(9) Next, as shown in Fig. 2C (7), a single-sided copper-clad laminate 43 having a positive mask 44 is formed in the same manner as in the first embodiment. The adhesive layer 45 made of an adhesive is laminated on the surface and the back surface of the double-sided core substrate 42.

(10) Next, as shown in Fig. 2C (8), in the same manner as in the first embodiment, the laser mask 44 is used to perform the laser processing to form the blind holes 46A and 46B (the common holes).

(11) Next, in order to remove the resin residue generated when the blind holes 46A and 46B are formed, a decontamination process is performed.

(12) Next, as shown in Fig. 2D (9), the inner wall (side and bottom) of the blind vias 46A, 46B and the cap plating layer 37 are applied by applying a conductive treatment and a subsequent electrolytic copper plating treatment. On top, an electrolytic copper plating film 47 is formed. The thickness of the electrolytic copper plating film 47 is set to be about 15 to 20 μm in order to ensure interlayer conduction. Thereby, blind holes 48A, 48B functioning as interlayer conduction paths are formed.

(13) Next, as shown in FIG. 2D (10), the conductive layer (copper foil 43b and electrolytic copper plating film 47 thereon) on the buildup layer is processed into a specific one by a photosensitive etching process. A pattern is formed to form an outer circuit pattern 49.

After that, although not shown, a photoresist layer for protection is formed in a portion where soldering is not required, and solder plating, nickel plating, gold is applied to the surface of the island or the like. Surface treatment such as plating. Thereafter, the outer shape processing is performed by punching or the like by the mold.

Through the above work, the build-up type multilayer printed wiring board 51 of the second embodiment is obtained. As shown in Fig. 2D (10), the build-up type multilayer printed wiring board 51 of the present embodiment is generally used. A stacked through hole structure composed of a landfill through hole 6 and a blind hole 48A is provided.

Further, as shown in FIG. 2D (10), the build-up type multilayer printed wiring board 51 is provided with a component mounting portion 51a in which a build-up layer is laminated on the double-sided core substrate 42, and is mounted from the component. The flexible cable portion 51b extending from the portion 51a. The flexible cable portion 51b is a portion of the double-sided core substrate 42 that is not provided with the build-up layer. At this flexible cable portion 51b, an inner layer terminal 50 exposed on the flexible insulating base material 1 is provided. On the surface of the inner layer terminal 50, a protective plating film made of the same material as the cap plating layer 37 is formed. Further, the inner layer terminal 50 may be formed in plural on the flexible insulating base material 1 to constitute a flexible connecting region.

Further, in the present embodiment, the buildup layer is provided on the front surface and the back surface of the double-sided core substrate 42, but the buildup layer may be provided only on one surface.

As described above, according to the present embodiment, the formation of the surface plating layer of the inner layer terminal 50 and the formation of the cap plating layer 37 can be simultaneously performed. By this, it is possible to reduce the number of projects and make it possible to improve productivity.

Further, according to the present embodiment, the following effects can be obtained.

First, as in the first embodiment, by thinning the cap plating layer 37, the adhesive layer 40 of the cap layer 41 can be greatly thinned compared to the prior art. Thereby, the blind holes 46A, 46B can be formed to be shallow. For example, compared to the prior art, it can be reduced by about 10 μm. Thereby, the electro-susceptibility of the electrolytic copper plating film 47 with respect to the inner walls of the blind holes 46A and 46B is improved. Further, the influence on the blind holes 48A, 48B due to the thermal expansion of the constituent members of the multilayer printed wiring board is lowered. Therefore, it is possible to reduce the thickness of the electrolytic copper plating film 47 required to improve the yield and ensure the reliability of the connection. As a result, according to the present embodiment, the layered outer layer circuit pattern 49 can be formed, and the build-up type multilayer printed wiring board 51 having the stacked via structure can be obtained which satisfies the requirements for high-density mounting.

Further, a cover plating layer 37 is provided on the receiving island portion for the blind hole 46B constituting the stacked through hole structure. Therefore, the structure of the blind hole 48B (the depth of the through hole, etc.) is slightly the same as the blind hole 48A for the stacked through hole structure. Therefore, regardless of whether or not it is used for the stacked through hole structure, the conditions of the laser processing and the conditions of the decontamination process in forming the blind hole can be made the same. As a result, according to the present embodiment, it is possible to ensure a large margin of processing and to improve productivity.

(Third embodiment)

Next, a build-up type multilayer printed wiring board according to the third embodiment will be described. One of the differences between the third embodiment and the second embodiment is that the cover layer is not provided inside the component mounting portion, but is provided on the component mounting portion of the printed wiring board and the flexible cable. At the boundary area between the line parts. As a result, since it is not necessary to consider the outflow of the adhesive for the inner layer circuit pattern of the component mounting portion, the selectivity to the adhesive is widened. Further, since the thickness of the printed wiring board at the component mounting portion can be reduced, the outer layer circuit pattern can be further miniaturized.

A method of manufacturing a build-up type multilayer printed wiring board having a stacked via structure according to the present embodiment will be described with reference to FIGS. 3A to 3C. 3A to 3C are engineering cross-sectional views showing a method of manufacturing the build-up type multilayer printed wiring board of the embodiment.

Since the construction of the base material shown in Fig. 2A (3) of the second embodiment is the same as that of the second embodiment, the description thereof will be omitted, and the subsequent description will be made.

(1) A cover layer 63 having an insulating film 61 (for example, 12 μm thick) made of polyimide or the like and an adhesive layer 62 (for example, 8 μm thick) formed on one surface of the insulating film 61 is prepared. The subsequent agent layer 62 is formed, for example, of an adhesive such as acrylic or epoxy. Then, as shown in Fig. 3A (1), a double-sided circuit substrate (formed at a boundary region between the component mounting portion 76a and the flexible cable portion 76b) is formed using a vacuum laminator or the like. The laminate having the cover layer 63 is attached to the substrate having the inner layer circuit patterns 34A, 34B. As another method, the adhesive layer 62 may be formed first at the boundary region, and then the insulating film 61 may be formed over the adhesive layer 62.

(2) Next, as can be seen from Fig. 3A (2), the plating resist 64 is formed in a region on the both sides of the substrate obtained by the above-described process as the component mounting portion 76a. The plating resist layer 64 is provided with an opening 65b at the receiving island portion of the blind hole. Further, as for the region in which the inner layer terminal is formed, as is apparent from FIG. 3A (2), the cover layer 63 is a plating resist. Further, as shown in FIG. 3A (2), the plating resist 64 may be provided with an opening 65a in a region where the landfill hole 6 is exposed. It is arbitrary whether or not this opening part 65a is provided.

(3) Next, as shown in FIG. 3A (2), electrolysis or electroless plating is performed by using the plating resist 64 and the cap layer 63, and exposed to the opening portion 65a of the plating resist 64, On the electrolytic copper plating films 31 and 32 at 65b, a cap plating layer 66 made of a silver plating layer (0.5 μm thick) was formed. Thereafter, the plating resist 64 is peeled off. Further, when there is a portion where the plating wire is not connected, electroless plating is performed. As can be seen from Fig. 3A (2), in general, a silver plating layer (a cap plating layer) serving as a terminal protective film is formed on the surface of the copper plating layer which becomes an inner layer terminal by the plating treatment of the present process. 66), while the inner terminal 67 is completed.

The plating layer constituting the surface layer of the cap plating layer 66 is required to have resistance against an etchant of copper used in the subsequent roughening treatment. The silver plating layer satisfies this condition. The cap plating layer 66 can be made of the same material and structure as the cap plating layer 37 in the second embodiment.

Through the work up to this point, the double-sided core substrate 68 shown in Fig. 3A (3) is obtained.

(4) Next, roughening is applied to the surfaces of the inner layer circuit patterns 34A and 34B in order to improve the adhesion to the bonding material (the bonding material layer 71 to be described later) used in the layering of the buildup layer. deal with. This roughening treatment can be carried out in the same manner as the method described in the first embodiment.

The cap plating layer 66 which is a portion which is irradiated with the laser light later is formed of a silver plating layer having copper etchant resistance as in the first embodiment. Therefore, the cap plating layer 66 is not roughened by the roughening treatment of the present process. Therefore, the absorption rate of the carbon dioxide gas laser light at the island is not increased, but is maintained at a low absorption rate.

(5) Next, the adhesive layer 71 of the inner layer circuit patterns 34A and 34B at the part mounting portion and the cap plating layer 66 is formed. When the adhesive layer 71 is formed, the cover layer 63 functions as a barrier dam for preventing the adhesive from flowing out of the component mounting region 76a to the flexible cable portion 76b. Therefore, in this work, in addition to a prepreg having a low fluidity form or an adhesive which has a small outflow of a sheet or the like, an adhesive which is excessively discharged may be used.

(6) Next, as shown in FIG. 3B (4), a copper foil 69b (12 μm thick) is provided on one surface of a flexible insulating base material 69a (for example, a polyimide film having a thickness of 25 μm). Single-sided copper laminated board 69. Then, in the same manner as in the first embodiment, a positive etching mask 70 (opening) for forming a blind hole is formed in the copper foil 69b of the single-sided copper laminated board 69 by a photosensitive etching processing method.

(7) Next, as shown in Fig. 3B (4), a single-sided copper-clad laminate 69 to which a positive mask 70 is formed is formed by an adhesive for interlayer formation. The material layer 71 is laminated to the surface and the back surface of the double-sided core substrate 68.

(8) Next, as shown in Fig. 3B (5), in the same manner as in the first embodiment, the laser processing is performed using the positive mask 70 to form blind holes 72A and 72B (guide holes).

(9) Next, in order to remove the resin residue generated when the blind holes 72A and 72B are formed, a decontamination process is performed.

(10) Next, as shown in Fig. 3C (6), the inner walls (side and bottom surfaces) of the blind via holes 72A, 72B and the cap plating layer 66 are applied by applying a conductive treatment and a subsequent electrolytic copper plating treatment. On top, an electrolytic copper plating film 73 is formed. The thickness of the electrolytic copper plating film 73 is set to be about 15 to 20 μm in order to ensure interlayer conduction. Thereby, blind holes 74A, 74B functioning as interlayer conduction paths are formed.

(11) Next, as shown in Fig. 3C (7), the conductive layer (copper foil 69b and electrolytic copper plating film 73 thereon) on the buildup layer is processed into a specific one by a photosensitive etching process. A pattern is formed to form an outer circuit pattern 75.

After that, although not shown, a photoresist layer for protection is formed in a portion where soldering is not required, and solder plating, nickel plating, gold is applied to the surface of the island or the like. Surface treatment such as plating. Thereafter, the outer shape processing is performed by punching or the like by the mold.

Through the above work, the build-up type multilayer printed wiring board 76 of the third embodiment is obtained. As shown in FIG. 3C (7), the build-up type multilayer printed wiring board 76 of the present embodiment is provided with a stacked via structure composed of a buried via 6 and a blind via 74A.

As shown in FIG. 3C (7), the build-up type multilayer printed wiring board 76 is provided with a component mounting portion 76a in which a build-up layer is laminated on the double-sided core substrate 68, and a component mounting portion 76a from the component mounting portion 76a. The flexible cable portion 76b extends. The flexible cable portion 76b is a portion of the double-sided core substrate 68 that is not provided with a build-up layer. At the flexible cable portion 76b, an inner layer terminal 67 exposed on the flexible insulating base material 1 is provided. Further, the inner layer terminal 67 may be formed in plural on the flexible insulating base material 1 to constitute a flexible connecting region.

Further, as shown in Fig. 3C (7), a cover layer 63 which is formed by sequentially laminating the adhesive layer 62 and the insulating film 61 is provided in the component mounting portion 76a and the flexible cable. Above the flexible insulating substrate 1 at the boundary region of the portion 76b.

The subsequent layer 71 is filled with the inner layer circuit patterns 34A and 34B at the component mounting portion 76a and the cap plating layer 66. The thickness of the adhesive layer 71 is required to be equal to or greater than the thickness of the cover layer 63, and is preferably the same as the thickness of the cover layer 63.

Further, in the present embodiment, the buildup layer is provided on the front surface and the back surface of the double-sided core substrate 68. However, it is also possible to provide the buildup layer only on one surface.

As described above, in the present embodiment, the cover layer 63 is provided at a boundary region between the component mounting portion 76a and the flexible cable portion 76b, and is not provided inside the component mounting portion 76a. Therefore, since it is not necessary for the adhesive of the inner layer circuit patterns 34A, 34B of the filling component mounting portion 76a to flow out of the flexible cable portion 76b, it is in the formation of the adhesive layer 71. The selectivity of the adhesive used is broadened. Further, since the thickness of the printed wiring board at the component mounting portion 76a can be reduced, the blind holes 72A, 72B can be made shallower. As a result, according to the present embodiment, the outer layer circuit pattern 75 can be formed to be finer.

Further, similarly to the first and second embodiments, in the present embodiment, the cover plating layer 66 is provided on the receiving island portion for the blind hole 72B constituting the stacked via structure. Therefore, the structure of the blind hole 72B (the depth of the through hole, etc.) is slightly the same as the blind hole 72A for the stacked via structure. Therefore, regardless of whether or not it is used for the stacked through hole structure, the conditions of the laser processing and the conditions of the decontamination process in forming the blind hole can be made the same. As a result, according to the present embodiment, it is possible to ensure a large margin of processing and to improve productivity.

Further, similarly to the second embodiment, the formation of the surface plating layer of the inner layer terminal 67 and the formation of the cap plating layer 66 can be simultaneously performed. By this, it is possible to reduce the number of projects and make it possible to improve productivity.

The above is a description of three embodiments of the present invention. In the above description, the wiring pattern and the plating film are made of copper. However, the present invention is not limited thereto, and may be, for example, aluminum or other metal such as silver.

Further, in the first and second embodiments, the cover layer is laminated on the substrate on which the inner layer circuit pattern is formed to form a double-sided core substrate, and then the build-up layer is laminated on the double-sided core substrate. In addition, the build-up type multilayer printed wiring board is produced, but the present invention is not limited thereto. That is, the build-up layer may be directly laminated on the substrate by filling the inner layer circuit pattern and the adhesive layer of the cap plating layer. For example, it is possible to use a cover layer provided with a copper foil on the surface. (a) of FIG. 5 is provided separately on the surface and the back surface of the insulating film 13 laminated on the double-sided circuit substrate 12 (see FIG. 1B (7)) described in the first embodiment. A cross-sectional view showing the state after the copper foil 15a and the cover layer 15X of the adhesive layer 14 are shown. (b) of FIG. 5 is provided separately on the surface and the back surface of the insulating film 39 laminated on the double-sided circuit substrate 38 (see FIG. 2B (5)) described in the second embodiment. A cross-sectional view showing a state in which the copper foil 41a and the cover layer 41X of the adhesive layer 40 are provided. According to this configuration, the thickness of the printed wiring board at the component mounting portion can be further reduced, and the outer layer circuit pattern can be further miniaturized.

According to the above description, the additional effects of the present invention or various modifications may be considered as long as the same person is considered. However, the aspect of the present invention is not limited to the above embodiments. The constituent elements covering the different embodiments may also be combined as appropriate. Various additions, modifications, and partial deletions may be made without departing from the spirit and scope of the invention.

1, 101. . . Flexible insulating substrate

2, 2a, 3, 3a, 102, 103. . . Copper foil

4, 104. . . Double-sided copper laminated board

5,105. . . Through hole

6A. . . Conductive paste

6, 106. . . Landfill through hole

7, 35, 64. . . Plating resist

8a, 8b, 36a, 36b, 36c, 65a, 65b. . . Opening

9, 37, 66, 107. . . Cover plating

9a. . . Copper plating

9b. . . Silver plating

10, 33. . . Resist layer

11A, 11B, 34A, 34B. . . Inner circuit pattern

12, 38. . . Double-sided circuit substrate

12, 38. . . Double-sided copper laminated board

13, 39, 61. . . Insulating film

14, 40, 62, 110. . . Subsequent layer

15, 41, 63, 111, 15X, 41X. . . Cover layer

15a, 41a. . . Copper foil

16, 42, 68, 112. . . Double-sided core substrate

17, 43, 69, 113. . . Single-sided copper laminated board

17a, 43a, 69a, 113a. . . Flexible insulating substrate

17b, 43b, 69b, 113b. . . Copper foil

18, 44, 70. . . Orthotropic mask

19, 45, 71, 114. . . Subsequent layer

20A, 20B, 46A, 46B, 72A, 72B, 115A, 115B. . . Blind hole (guide hole)

21, 31, 32, 47, 73. . . Electrolytic copper plating film

22A, 22B, 48A, 48B, 74A, 74B, 116A, 116B. . . Blind hole

23, 49, 75, 117. . . Outer circuit pattern

24, 51, 76, 118. . . Multilayer printed wiring board

24a, 51a, 76a, 118a. . . Parts mounting department

24b, 51b, 76b, 118b. . . Flexible cable section

50, 67. . . Inner terminal

108. . . Bear the island

109. . . Polyimine film

1A is an engineering sectional view showing a method of manufacturing a build-up type multilayer printed wiring board according to a first embodiment of the present invention.

[ Fig. 1B] Fig. 1B is a cross-sectional view showing the construction of a method for producing a build-up type multilayer printed wiring board according to a first embodiment of the present invention. However, (6) is a plan view corresponding to (5).

[ Fig. 1C] Fig. 1C is a cross-sectional view showing the construction of a method for producing a build-up type multilayer printed wiring board according to a first embodiment of the present invention.

1D is an engineering sectional view showing a method of manufacturing a build-up type multilayer printed wiring board according to a first embodiment of the present invention.

[ Fig. 2A] Fig. 2A is a cross-sectional view showing the construction of a method for producing a build-up type multilayer printed wiring board according to a second embodiment of the present invention.

Fig. 2B is a cross-sectional view showing the construction of a method for producing a build-up type multilayer printed wiring board according to a second embodiment of the present invention.

[ Fig. 2C] Fig. 2C is a cross-sectional view showing the construction of a method for producing a build-up type multilayer printed wiring board according to a second embodiment of the present invention.

2D is an engineering sectional view showing a method of manufacturing a build-up type multilayer printed wiring board according to a second embodiment of the present invention.

3A is an engineering sectional view showing a method of manufacturing a build-up type multilayer printed wiring board according to a third embodiment of the present invention.

Fig. 3B is a cross-sectional view showing the construction of a method for producing a build-up type multilayer printed wiring board according to a third embodiment of the present invention.

[ Fig. 3C] Fig. 3C is a cross-sectional view showing the construction of a method for producing a build-up type multilayer printed wiring board according to a third embodiment of the present invention.

[Fig. 4] An engineering sectional view for explaining a manufacturing method of a build-up type multilayer printed wiring board having a stacked via structure by a prior art.

Fig. 5 is a cross-sectional view showing the construction of a method for producing a build-up type multilayer printed wiring board according to a modification of the present invention.

6. . . Landfill through hole

9. . . Cover plating

16. . . Double-sided core substrate

17. . . Single-sided copper laminated board

17a. . . Flexible insulating substrate

17b. . . Copper foil

19. . . Subsequent layer

twenty one. . . Electrolytic copper plating film

22A, 22B. . . Blind hole

twenty three. . . Outer circuit pattern

twenty four. . . Multilayer printed wiring board

24a. . . Parts mounting department

24b. . . Flexible cable section

Claims (12)

A build-up type multilayer printed wiring board comprising: a double-sided circuit substrate, a flexible insulating base material, and a double-sided portion of the insulating base material and having an island portion An inner layer circuit pattern, and a buried via hole that penetrates the insulating base material in a thickness direction and electrically connects the inner layer circuit pattern of the surface of the insulating base material and the back surface; and build-up The layer is laminated on the double-sided circuit substrate via an insulating layer, and has an outer layer circuit pattern on the surface thereof. Further, the build-up type multilayer printed wiring board includes a blind hole. The surface layer is made of a material having resistance to an etchant constituting the metal of the inner layer circuit pattern, and the cap plating layer covering the island portion is formed, and is formed in the thickness direction to penetrate the increase The layer is formed on the bottom surface and the plating film at the inner wall of the blind hole of the cap plating layer is exposed, and the inner layer circuit pattern and the outer layer circuit pattern are electrically connected. The build-up type multilayer printed wiring board according to claim 1, wherein the inner layer circuit pattern is made of copper, and at least a surface layer of the cap plating layer is made of silver, gold or nickel. . The multilayer printed wiring board according to the first aspect of the invention, further comprising: an insulating film; and a coating layer of an adhesive layer formed on the insulating film, and a component mounting portion in which the buildup layer in the double-sided circuit substrate is laminated, and a flexible cable portion in the double-sided circuit substrate in which the build-up layer is not laminated A cover layer formed on the double-sided circuit substrate at the boundary region, wherein the insulating layer has a thickness equal to or greater than a thickness of the cover layer. The build-up type multilayer printed wiring board according to claim 3, wherein the inner layer circuit pattern is made of copper, and at least a surface layer of the cap plating layer is made of silver, gold or nickel. . A method for producing a build-up type multilayer printed wiring board, characterized in that a double-sided metal attaching laminate having a flexible insulating base material and a first metal foil provided on both sides thereof is prepared; Forming a through hole penetrating the double-sided metal attaching laminate in the thickness direction; filling the inside of the through hole with a conductive paste, and then curing the conductive paste to form a buried via; in a specific region a cap plating layer formed of a material having at least a surface layer resistant to an etchant of the first metal foil, and a resist layer having a specific pattern formed on the first metal foil; The resist layer and the cap plating layer are used as an etching resistant layer, and the first metal foil is etched, whereby an inner layer circuit pattern including an island portion covered by the cap plating layer is formed. Thereby, a double-sided circuit substrate is obtained; a roughening treatment is applied to the surface of the inner layer circuit pattern, and then a first adhesive layer including an insulating film and a single surface formed on the insulating film is formed. The cover layer is attached to the double-sided circuit substrate to obtain a double-sided core substrate, and the build-up layer including the second metal foil on the surface is laminated via the second adhesive layer. On the double-sided core substrate; by irradiating infrared laser light at a specific position of the build-up layer, forming a blind hole penetrating the build-up layer in the thickness direction and exposing the cap plating layer on the bottom surface; A plating film is formed on the inner wall of the blind hole and the second metal foil to form a blind hole electrically connecting the second metal foil and the inner layer circuit pattern. The method for producing a multilayer printed wiring board according to claim 5, wherein the first metal foil is a copper foil, and at least a surface layer of the cap plating layer is made of silver, gold or nickel. Made into. A method for producing a build-up type multilayer printed wiring board, characterized in that a double-sided metal attaching laminate having a flexible insulating base material and a first metal foil provided on both sides thereof is prepared; Forming a through hole penetrating the double-sided metal attaching laminate in the thickness direction; filling the inside of the through hole with a conductive paste, and then curing the conductive paste to form a buried via; a first plating film is formed on the metal foil and the exposed landfill via hole; a resist layer having a specific pattern is formed on the first plating film; and the resist layer is used as an etching resist layer. The first plating film and the first metal foil are etched to form an inner layer circuit pattern including the island portion, and at least the surface layer is made of an etchant with respect to the first metal foil. a cap plating layer made of a material having resistance is formed so as to cover the island portion, thereby obtaining a double-sided circuit substrate; applying a roughening treatment to the surface of the inner layer circuit pattern, and then performing a double-sided core substrate obtained by laminating a cover layer having an insulating film and a first adhesive layer formed on one surface of the insulating film on the double-sided circuit substrate; The buildup layer provided with the second metal foil on the surface layer is laminated on the double-sided core substrate via the second adhesive layer; and is formed by irradiating infrared laser light at a specific position of the buildup layer. a blind hole penetrating through the build-up layer in the thickness direction and exposing the cover plating layer on the bottom surface; and forming the second plating film on the inner wall of the blind hole and the second metal foil to form the second metal The foil and the aforementioned inner layer circuit pattern are electrically connected blind holes. The method for producing a multilayer printed wiring board according to claim 7, wherein the first metal foil is a copper foil, and at least a surface layer of the cap plating layer is made of silver, gold or nickel. Made into. The method for producing a build-up type multilayer printed wiring board according to the seventh aspect of the present invention, wherein a part of the inner layer circuit pattern serving as an inner layer terminal is formed by a plating process for forming the cap plating layer. A terminal protective film is formed at the portion. A method for producing a build-up type multilayer printed wiring board, characterized in that a double-sided metal attaching laminate having a flexible insulating base material and a first metal foil provided on both sides thereof is prepared; Forming a through hole penetrating the double-sided metal attaching laminate in the thickness direction; filling the inside of the through hole with a conductive paste, and then curing the conductive paste to form a buried via; a first plating film is formed on the metal foil and the exposed landfill via hole; a resist layer having a specific pattern is formed on the first plating film; and the resist layer is used as an etching resist layer. The first plating film and the first metal foil are etched, whereby an inner layer circuit pattern having an island portion is formed, thereby obtaining a double-sided circuit substrate, and insulating is provided. a film and a cover layer of the first adhesive layer formed on one surface of the insulating film are attached to a layer at a boundary region between the component mounting portion and the flexible cable portion on the double-sided circuit substrate Pressure engineering; at least the table The layer is a cap plating layer made of a material having resistance to the etchant of the first metal foil, and is formed so as to cover the island portion, thereby obtaining a double-sided core substrate; After the roughening treatment is applied to the surface of the inner layer circuit pattern, the build-up layer including the second metal foil on the surface is laminated on the double-sided layer via the second adhesive layer having a thickness equal to or greater than the thickness of the cover layer. a part of the component mounting portion on the core substrate; and irradiating infrared laser light at a specific position of the build-up layer to form a blind hole penetrating the build-up layer in a thickness direction and exposing the cover plating layer on a bottom surface; A second plating film is formed on the inner wall of the blind hole and the second metal foil to form a blind hole electrically connecting the second metal foil and the inner layer circuit pattern. The method for producing a multilayer printed wiring board according to claim 10, wherein the first metal foil is a copper foil, and at least a surface layer of the cap plating layer is made of silver, gold or nickel. Made into. The method for producing a build-up type multilayer printed wiring board according to claim 10, wherein a part of the inner layer circuit pattern serving as an inner layer terminal is formed by a plating process for forming the cap plating layer. A terminal protective film is formed at the portion.