TWI487451B - Manufacturing method of multilayer printed wiring board - Google Patents

Manufacturing method of multilayer printed wiring board Download PDF

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TWI487451B
TWI487451B TW100103651A TW100103651A TWI487451B TW I487451 B TWI487451 B TW I487451B TW 100103651 A TW100103651 A TW 100103651A TW 100103651 A TW100103651 A TW 100103651A TW I487451 B TWI487451 B TW I487451B
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hole
conductive film
plated
plating
sided
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TW100103651A
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TW201146123A (en
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Fumihiko Matsuda
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Nippon Mektron Kk
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/0959Plated through-holes or plated blind vias filled with insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias

Description

多層印刷配線板之製造方法Multilayer printed wiring board manufacturing method

本發明係關於多層印刷配線板之製造方法,更詳而言之,係關於積層(build-up)型之多層印刷配線板之製造方法。The present invention relates to a method of manufacturing a multilayer printed wiring board, and more particularly to a method of manufacturing a build-up type multilayer printed wiring board.

近年來,如行動電話等攜帶式資訊終端所代表,電子機器的小型化及高功能化不斷在進展。因此,對於電子機器所使用的印刷配線板的高密度化的要求不斷提高。In recent years, miniaturization and high functionality of electronic devices have been progressing, as represented by portable information terminals such as mobile phones. Therefore, there is an increasing demand for higher density of printed wiring boards used in electronic equipment.

因此,為了在印刷配線板高密度安裝電子零件等,積層型的多層可撓性印刷配線板不斷被研究開發(參照例如專利文獻1)。該積層型多層可撓性印刷配線板係以雙面可撓性印刷配線板或多層可撓性印刷配線板為核心基板,在該核心基板的雙面或單面形成1~2層程度的增層(build-up layer)者。在該積層型多層可撓性印刷配線板,為了將增層與內層的核心基板作電性連接,設置在有底型的通孔(導通用孔)的內壁施行鍍敷處理而得到層間導通的鍍敷通孔。Therefore, in order to mount an electronic component or the like at a high density on a printed wiring board, a laminated multilayer flexible printed wiring board has been researched and developed (see, for example, Patent Document 1). In the laminated multi-layer flexible printed wiring board, a double-sided flexible printed wiring board or a multilayer flexible printed wiring board is used as a core substrate, and one or two layers are formed on both sides or one side of the core substrate. Build-up layer. In the laminated multi-layer flexible printed wiring board, in order to electrically connect the build-up layer to the inner core substrate, a plating process is provided on the inner wall of the bottomed through hole (conductive hole) to obtain an interlayer. Conducted plated through holes.

但是,隨著該有底型的通孔變深,會產生以下問題。首先,由於印刷配線板的各構成構件作熱膨脹,鍍敷通孔容易被破壞。此外,為了獲得層間導通,當在有底型的通孔的內壁形成鍍敷皮膜時,鍍敷液變得容易滯留在通孔的底部,因此無法獲得所希望的鍍敷厚度。基於如上所示之理由,有底型通孔愈深,愈不易確保通孔配線的電氣可靠性。However, as the bottomed through hole becomes deep, the following problems occur. First, since the constituent members of the printed wiring board thermally expand, the plated through holes are easily broken. Further, in order to obtain interlayer conduction, when a plating film is formed on the inner wall of the bottomed through hole, the plating solution easily stays at the bottom of the through hole, so that a desired plating thickness cannot be obtained. For the reason shown above, the deeper the bottomed through hole, the more difficult it is to ensure the electrical reliability of the through hole wiring.

以該問題的對策而言,考慮在有底型的通孔的內壁形成充分厚的鍍敷皮膜。但是,若在形成在有底型通孔內壁的鍍敷皮膜的厚度增加,無法避免隨此形成在增層上的導體層的厚度亦變大。外層的電路圖案係藉由將增層上的導體層按照所希望的圖案進行濕式蝕刻而形成。因此,隨著導體層的厚度增加,愈不易將增層上的導體層微細加工。結果,以外層的電路圖案而言,無法形成微細的圖案,要在增層上高密度安裝電子零件變得困難。In view of the countermeasure against this problem, it is considered that a sufficiently thick plating film is formed on the inner wall of the bottomed through hole. However, if the thickness of the plating film formed on the inner wall of the bottomed through hole is increased, it is unavoidable that the thickness of the conductor layer formed on the buildup layer is also increased. The circuit pattern of the outer layer is formed by wet etching the conductor layer on the buildup layer in a desired pattern. Therefore, as the thickness of the conductor layer increases, it becomes less likely that the conductor layer on the buildup layer is finely processed. As a result, in the circuit pattern of the outer layer, a fine pattern cannot be formed, and it becomes difficult to mount the electronic component at a high density on the build-up layer.

如上所述,在習知的積層型多層可撓性印刷配線板,會有難以滿足高密度安裝要求的問題。As described above, in the conventional laminated type multilayer flexible printed wiring board, there is a problem that it is difficult to meet the high-density mounting requirements.

但是,積層型的多層可撓性印刷配線板之中,由高密度化及設計自由度的提升的觀點來看,尤其圖求一種具有所謂的堆疊通孔(stack via)構造的積層型多層可撓性印刷配線板。在此,堆疊通孔構造係指在由核心基板的鍍敷通孔所構成的層間連接部之上,重疊配置由增層的鍍敷通孔所構成的層間連接部的構造。However, among the laminated multi-layer flexible printed wiring boards, from the viewpoint of high density and improvement in design freedom, in particular, a laminated type multilayer having a so-called stacked via via structure can be obtained. Flexible printed wiring board. Here, the stacked via structure refers to a structure in which an interlayer connection portion formed by a plated through hole of a build-up layer is superposed on an interlayer connection portion formed by a plated through hole of a core substrate.

廉價且安定製造具有可高密度安裝的堆疊通孔構造的多層印刷配線板的方法被強烈期望。A method of inexpensively and stably manufacturing a multilayer printed wiring board having a stacked via structure capable of high density mounting is strongly desired.

以往已揭示一種手法是藉由雷射加工而總括形成所謂的階梯通孔構造的通孔(階梯通孔(step via))(參照專利文獻2、專利文獻3及專利文獻4)。藉由該等文獻所揭示的手法,可有效率地形成階梯通孔構造。但是,在該手法中,用以利用鍍敷皮膜來被覆階梯通孔的內壁的電解銅鍍敷通常是一次彙整進行。因此,會有形成在階梯通孔之下穴(小徑側)的側壁的鍍敷皮膜變薄的傾向。因此,會有不易充分確保層間連接可靠性的情形。In the past, a method has been disclosed in which a through-hole (step via) of a so-called stepped via structure is formed by laser processing (see Patent Document 2, Patent Document 3, and Patent Document 4). The stepped via structure can be efficiently formed by the techniques disclosed in these documents. However, in this method, electrolytic copper plating for coating the inner wall of the stepped through hole by the plating film is usually performed once. Therefore, there is a tendency that the plating film formed on the side wall of the hole (small diameter side) below the stepped through hole tends to be thin. Therefore, there is a case where it is difficult to sufficiently ensure the reliability of the interlayer connection.

接著,使用第3圖,詳加說明藉由習知技術所為之具有堆疊通孔構造的積層型多層印刷配線板之製造方法。第3圖係用以說明具有堆疊通孔構造之積層型多層印刷配線板之製造方法的工程剖面圖。Next, a method of manufacturing a laminated type multilayer printed wiring board having a stacked via structure by a conventional technique will be described in detail using FIG. Fig. 3 is an engineering sectional view for explaining a method of manufacturing a laminated type multilayer printed wiring board having a stacked via structure.

首先,準備聚醯亞胺等可撓性絕緣基底材101(例如25μm厚)、及在其雙面具有銅箔102及銅箔103(均為例如8μm厚)的雙面覆銅層積板104。First, a flexible insulating base material 101 (for example, 25 μm thick) such as polyimide or a double-sided copper clad laminate 104 having copper foil 102 and copper foil 103 (both of which are, for example, 8 μm thick) is prepared. .

接著,由第3圖(1)可知,對該雙面覆銅層積板104,藉由雷射加工法形成屬於有底型通孔的有底通孔105。在該有底通孔105的底部露出銅箔103。之後,藉由對銅箔102、103及有底通孔105施行導電化處理及繼之的電解鍍敷處理,在銅箔102、103上、及有底通孔105的內壁形成電解鍍敷皮膜。該電解鍍敷皮膜的厚度係被形成為用以確保通孔配線之連接可靠性的所需值(例如15μm左右)。經由至此為止的工程,形成有將可撓性絕緣基底材101的銅箔102與銅箔103作電性連接之屬於有底型層間導通部的鍍敷有底通孔106。Next, as is clear from Fig. 3 (1), the double-sided copper-clad laminate 104 is formed with a bottomed through-hole 105 belonging to the bottomed through hole by a laser processing method. The copper foil 103 is exposed at the bottom of the bottomed through hole 105. Thereafter, electrolytic plating is performed on the copper foils 102 and 103 and the inner wall of the bottomed through hole 105 by performing electroconductive treatment on the copper foils 102 and 103 and the bottomed via 105 and subsequent electrolytic plating treatment. Membrane. The thickness of the electrolytic plating film is formed to a desired value (for example, about 15 μm) for ensuring the connection reliability of the via wiring. Through the above-described work, a plated bottomed through hole 106 belonging to the bottomed type interlayer conduction portion that electrically connects the copper foil 102 of the flexible insulating base material 101 and the copper foil 103 is formed.

接著,由第3圖(1)可知,藉由感光蝕刻加工法(photofabrication),將可撓性絕緣基底材101的銅箔102與銅箔103按照預定的圖案進行蝕刻,藉此形成電路圖案(內層電路圖案)。更詳而言之,藉由由阻劑層的形成、曝光、顯影、銅箔的蝕刻及阻劑層的剝離等所構成的一連串工程,在可撓性絕緣基底材101的雙面形成電路圖案。Next, as is clear from Fig. 3 (1), the copper foil 102 and the copper foil 103 of the flexible insulating base material 101 are etched in a predetermined pattern by photofabrication to form a circuit pattern ( Inner layer circuit pattern). More specifically, a circuit pattern is formed on both sides of the flexible insulating base material 101 by a series of processes consisting of formation of a resist layer, exposure, development, etching of a copper foil, and peeling of a resist layer. .

接著,由第3圖(1)可知,準備在聚醯亞胺薄膜等絕緣薄膜107(例如12μm厚)上具有接著劑層108的覆蓋膜109。接著劑層108係由例如丙烯酸、環氧等接著劑所構成。接著,使用真空疊合機等,進行在形成有電路圖案的可撓性絕緣基底材101上黏貼覆蓋膜109的層疊工程。該接著材層108的厚度係被形成為可利用接著劑來完全填充鍍敷有底通孔106的內部的厚度(例如25μm)。經由至此為止的工程,取得第3圖(1)所示之雙面核心基板110。Next, as is clear from Fig. 3 (1), a cover film 109 having an adhesive layer 108 on an insulating film 107 (e.g., 12 μm thick) such as a polyimide film is prepared. The subsequent agent layer 108 is composed of an adhesive such as acrylic or epoxy. Next, a lamination process of adhering the cover film 109 to the flexible insulating base material 101 on which the circuit pattern is formed is performed using a vacuum laminator or the like. The thickness of the adhesive layer 108 is formed so that the thickness (for example, 25 μm) of the inside of the plated bottomed through hole 106 can be completely filled with an adhesive. The double-sided core substrate 110 shown in Fig. 3 (1) is obtained through the above-described processes.

接著,由第3圖(2)可知,準備在可撓性絕緣基底材(例如25μm厚的聚醯亞胺)的單面具有銅箔(例如厚度12μm)的單面覆銅層積板111。藉由前述的感光蝕刻加工法,在該單面覆銅層積板111的銅箔的預定部分形成開口部。將具有該開口部的銅箔形成為雷射遮光用的共型遮罩(Conformal Mask)(亦稱為金屬遮罩)。形成在銅箔的開口係用以藉由雷射加工來去除在該開口的底面所露出的可撓性絕緣基底材等的樹脂而形成通孔者。Next, as is clear from Fig. 3 (2), a single-sided copper clad laminate 111 having a copper foil (for example, a thickness of 12 μm) on one surface of a flexible insulating base material (for example, a polyimide having a thickness of 25 μm) is prepared. An opening is formed in a predetermined portion of the copper foil of the single-sided copper clad laminate 111 by the above-described photolithography etching method. The copper foil having the opening is formed into a conformal mask (also referred to as a metal mask) for laser shading. The opening formed in the copper foil is used to form a through hole by removing a resin such as a flexible insulating base material exposed on the bottom surface of the opening by laser processing.

接著,由第3圖(2)可知,使用用以在雙面核心基板110積層的接著材,將具有共型遮罩的單面覆銅層積板111、111透過接著劑層112、112而分別層積接著在雙面核心基板110的表面及背面。Next, as is apparent from Fig. 3 (2), the single-sided copper clad laminates 111 and 111 having the common mask are passed through the adhesive layers 112 and 112 by using the bonding material for laminating the double-sided core substrate 110. The layers are respectively laminated on the front and back surfaces of the double-sided core substrate 110.

接著,由第3圖(2)可知,使用單面覆銅層積板111的共型遮罩來進行雷射加工,藉此形成階梯通孔113A及通孔113B、113C。Next, as is clear from Fig. 3 (2), the laser processing is performed using the common mask of the single-sided copper clad laminate 111, thereby forming the stepped through holes 113A and the through holes 113B and 113C.

接著,由第3圖(3)可知,對單面覆銅層積板111的銅箔上、階梯通孔113A的內壁、及通孔113B、113C的內壁施行導電化處理及繼之的電解鍍敷處理,藉此形成電解鍍敷皮膜。該電解鍍敷皮膜的厚度係形成為例如25~30μm程度,俾以確保層間連接的可靠性。藉此,形成用以獲得核心基板與增層的層間導通的鍍敷積層通孔114A、114B、114C。鍍敷積層通孔114A係對階梯通孔113A的內壁施行鍍敷處理者,鍍敷積層通孔114B係對與階梯通孔113A相對向的通孔113B的內壁施行鍍敷處理者,鍍敷積層通孔114C係對通孔113C的內壁施行鍍敷處理者。Next, as is clear from Fig. 3 (3), the copper foil on the single-sided copper-clad laminate 111, the inner wall of the stepped through-hole 113A, and the inner walls of the through-holes 113B and 113C are subjected to a conductive treatment and subsequent The electrolytic plating treatment is performed to form an electrolytic plating film. The thickness of the electrolytic plating film is, for example, about 25 to 30 μm to ensure the reliability of interlayer connection. Thereby, plated through holes 114A, 114B, and 114C for obtaining conduction between the core substrate and the layer of the buildup layer are formed. The plated through hole 114A is plated to the inner wall of the stepped through hole 113A, and the plated through hole 114B is plated to the inner wall of the through hole 113B opposed to the stepped through hole 113A. The clad layer through hole 114C is a plating treatment for the inner wall of the through hole 113C.

接著,由第3圖(3)可知,使用感光蝕刻加工法,將單面覆銅層積板111、111的銅箔按照預定的圖案進行蝕刻,藉此形成外層電路圖案115、115。之後,視需要形成光阻焊層(未圖示),在電路圖案的端子施行焊料鍍敷、鎳鍍敷、金鍍敷等表面處理,藉由利用模具所為之鑽孔等來進行外形加工。Next, as is clear from Fig. 3 (3), the outer layer circuit patterns 115 and 115 are formed by etching the copper foil of the single-sided copper clad laminates 111 and 111 in a predetermined pattern by a photosensitive etching method. Thereafter, a photoresist layer (not shown) is formed as necessary, and surface treatment such as solder plating, nickel plating, or gold plating is applied to the terminals of the circuit pattern, and the outer shape processing is performed by drilling a hole or the like using a mold.

經由以上工程,獲得具有堆疊通孔構造的積層型多層印刷配線板116。由第3圖(3)可知,鍍敷積層通孔114A係形成在內層的雙面核心基板110的鍍敷有底通孔106的正上方,鍍敷有底通孔106與鍍敷積層通孔114A係形成堆疊通孔構造。在積層型多層印刷配線板116中,雙面核心基板110的表面與背面的層間連接係藉由鍍敷有底通孔106來進行。Through the above works, a laminated type multilayer printed wiring board 116 having a stacked via structure is obtained. As can be seen from Fig. 3 (3), the plated through-holes 114A are formed directly above the plated bottomed vias 106 of the inner core double-sided core substrate 110, and the plated through-holes 106 and the plated layers are plated. Hole 114A forms a stacked via configuration. In the laminated type multilayer printed wiring board 116, the interlayer connection between the front surface and the back surface of the double-sided core substrate 110 is performed by plating the bottomed through holes 106.

其中,由第3圖(3)可知,積層型多層印刷配線板116係具有:在雙面核心基板110層積有增層的零件安裝部116a、及由該零件安裝部116b延伸的可撓性線材部116b。該可撓性線材部116b係未設有增層的雙面核心基板110的一部分。In addition, as shown in FIG. 3 (3), the multilayer printed wiring board 116 has a component mounting portion 116a in which a build-up portion is laminated on the double-sided core substrate 110, and flexibility extending from the component mounting portion 116b. Wire portion 116b. The flexible wire portion 116b is not provided with a part of the double-sided core substrate 110 of the build-up layer.

經由上述工程,鍍敷有底通孔106內部係必須利用接著材來完全填充。但是,若與在貫穿雙面覆銅層積板104的通孔的內壁施行鍍敷處理所形成的鍍敷貫穿通孔相比,鍍敷有底通孔106係不易填充接著劑。此係基於鍍敷貫穿通孔係可由表面與背面的2方向填充,相對於此,有底鍍敷通孔僅可由1方向填充之故。因此,與以鍍敷貫穿通孔來進行雙面核心基板110的層間連接的情形相比,接著材層108的厚度會變得較厚的情形並無法避免。因此,積層通孔113會變深。如此一來,如前所述,用以確保層間連接可靠性的鍍敷厚度會變大。例如,如上所示在形成鍍敷積層通孔114A、114B、114C時,必須進行用以形成25~30μm程度的鍍敷皮膜的電解鍍敷。假設將在單面覆銅層積板111的銅箔(12μm厚)上進行該程度的電解鍍敷,單面覆銅層積板111上的導體層(銅箔+電解鍍敷皮膜)的厚度總計為37~42μm。導體層的圖案化係藉由濕式蝕刻來進行,因此不易良率佳地形成電路間距為100μm左右的微細電路圖案。Through the above works, the inside of the plated bottomed through hole 106 must be completely filled with the backing material. However, the plated bottomed through hole 106 is less likely to be filled with the adhesive than the plating through hole formed by performing the plating treatment on the inner wall of the through hole of the double-sided copper clad laminate 104. This is based on the fact that the plating through-via is filled in the two directions of the front and back surfaces. On the other hand, the bottom-plated through-holes can be filled only in one direction. Therefore, compared with the case where the interlayer connection of the double-sided core substrate 110 is performed by plating through the through holes, the case where the thickness of the subsequent material layer 108 becomes thick is unavoidable. Therefore, the laminated via 113 becomes deep. As a result, as described above, the plating thickness for ensuring the reliability of the interlayer connection becomes large. For example, when the plating via holes 114A, 114B, and 114C are formed as described above, electrolytic plating for forming a plating film of about 25 to 30 μm must be performed. It is assumed that the thickness of the conductor layer (copper foil + electrolytic plating film) on the single-sided copper clad laminate 111 is performed on the copper foil (12 μm thick) of the single-sided copper clad laminate 111. The total is 37 to 42 μm. The patterning of the conductor layer is performed by wet etching, so that it is difficult to form a fine circuit pattern having a circuit pitch of about 100 μm.

如以上說明所示,以往會有無法製造滿足高密度安裝要求的積層型多層印刷配線板的問題。其中,當然該問題即使在不具有可撓性線材116b的多層印刷配線板亦為相同。As described above, in the related art, there has been a problem that a laminated type multilayer printed wiring board that satisfies high-density mounting requirements cannot be manufactured. Of course, this problem is the same even in the multilayer printed wiring board which does not have the flexible wire 116b.

[先前技術文獻][Previous Technical Literature] [專利文獻][Patent Literature]

[專利文獻1]日本特開2004-200260號公報[Patent Document 1] Japanese Patent Laid-Open Publication No. 2004-200260

[專利文獻2]日本特開2008-235801號公報[Patent Document 2] Japanese Patent Laid-Open Publication No. 2008-235801

[專利文獻3]日本特開2008-288434號公報[Patent Document 3] Japanese Patent Laid-Open Publication No. 2008-288434

[專利文獻4]日本特開2009-026912號公報[Patent Document 4] Japanese Laid-Open Patent Publication No. 2009-026912

本發明係用以解決由於不易形成微細的外層電路圖案而無法獲得可高密度安裝的多層印刷配線板的上述問題者,目的在提供具有可高密度安裝的堆疊通孔構造的積層型多層印刷配線板之製造方法。The present invention is to solve the above problems in that a multilayer printed wiring board capable of high density mounting cannot be obtained because it is difficult to form a fine outer layer circuit pattern, and an object of the present invention is to provide a laminated type multilayer printed wiring having a stacked via structure capable of high density mounting. The manufacturing method of the board.

藉由本發明之一態樣,提供一種多層印刷配線板之製造方法,其特徵為:在表面及背面分別具有第1導電膜及第2導電膜的雙面覆導電膜層積板,形成將前述第1導電膜與前述第2導電膜作電性連接的鍍敷貫穿通孔及鍍敷有底通孔,將前述第1導電膜及前述第2導電膜按照預定的圖案進行蝕刻,藉此製作具有內層電路圖案的雙面可撓性基板,準備具有:絕緣薄膜、及形成在前述絕緣薄膜之單面的接著劑層的覆蓋膜,在藉由前述覆蓋膜的前述接著劑層熔融後的接著劑,使前述鍍敷貫穿通孔的內部被完全填充,而且在前述鍍敷有底通孔的內部容許發生未藉由前述接著劑予以填充的空氣空隙的條件下,進行將前述覆蓋膜黏貼在前述雙面可撓性基板之雙面的層疊工程,藉此製作雙面核心基板,在前述雙面核心基板的至少前述鍍敷有底通孔的開口面側,層積接著具有形成在單面的第3導電膜的增層;藉由雷射加工,去除前述鍍敷有底通孔內部的前述接著劑而使前述空氣空隙消滅,藉此,在底部露出前述鍍敷有底通孔,形成前述鍍敷有底通孔成為下穴的階梯通孔,藉由對前述第3導電膜及前述階梯通孔的內壁施行鍍敷處理,形成將前述第3導電膜與前述內層電路圖案作電性連接的鍍敷積層通孔,將被施行鍍敷處理的前述第3導電膜按照預定的圖案進行蝕刻,藉此形成外層電路圖案。According to an aspect of the invention, there is provided a method of manufacturing a multilayer printed wiring board, characterized in that a double-sided conductive film laminated plate having a first conductive film and a second conductive film on each of a front surface and a back surface is formed The first conductive film and the second conductive film are electrically connected to the through hole and the plated through hole, and the first conductive film and the second conductive film are etched in a predetermined pattern. A double-sided flexible substrate having an inner layer circuit pattern, comprising: an insulating film; and a cover film formed on an adhesive layer on one surface of the insulating film, after being melted by the adhesive layer of the cover film a subsequent agent that completely fills the inside of the through hole, and allows the cover film to be adhered under the condition that the air void not filled by the adhesive is allowed to be generated inside the plated bottomed through hole. a double-sided core substrate is formed on the double-sided laminated substrate of the double-sided flexible substrate, and at least the side of the open surface of the double-sided core substrate on which the bottom via hole is plated is laminated Forming a third conductive film on one side; removing the above-mentioned adhesive inside the plated through-hole by laser processing to eliminate the air void, thereby exposing the plating bottom at the bottom a through hole forming a stepped through hole in which the plated through hole is a lower hole, and plating the inner wall of the third conductive film and the stepped through hole to form the third conductive film and the inner portion The layer circuit pattern is electrically connected to the plating via hole, and the third conductive film subjected to the plating treatment is etched in a predetermined pattern to form an outer layer circuit pattern.

藉由該等特徵,本發明係達成如下所示之效果。With these features, the present invention achieves the effects as described below.

在本發明之一實施形態之具有堆疊通孔構造的積層型多層印刷配線板中,堆疊通孔構造係由:將雙面可撓性基板的表面與背面作電性連接的鍍敷有底通孔;及配置在該鍍敷有底通孔之上的鍍敷積層通孔所構成。該鍍敷積層通孔係將外層電路圖案與內層電路圖案作電性連接者,在將形成在雙面可撓性基板的有底通孔形成為小徑孔洞的階梯通孔的內壁形成有鍍敷皮膜者。藉此,形成由鍍敷有底通孔、及形成在其上的鍍敷積層通孔所構成的階梯通孔構造。In a laminated type multilayer printed wiring board having a stacked via structure according to an embodiment of the present invention, the stacked via structure is a plated through-hole through which the surface and the back surface of the double-sided flexible substrate are electrically connected a hole; and a plated through hole disposed on the plated bottomed through hole. The plated through hole is formed by electrically connecting the outer layer circuit pattern and the inner layer circuit pattern, and forms an inner wall of the stepped through hole formed in the bottomed through hole formed in the double-sided flexible substrate as a small diameter hole. Those who have a plating film. Thereby, a stepped via structure composed of a plated bottomed through hole and a plated through hole formed thereon is formed.

藉由如上所示之特徵,藉由本發明之一實施形態,在將覆蓋膜層疊時,並不需要在形成在雙面可撓性基板的鍍敷有底通孔的內部完全填充接著材。其係基於在形成前述階梯通孔時,鍍敷有底通孔內的接著劑會被去除之故。因此,在可在雙面可撓性基板的貫穿通孔內填充接著劑的範圍內,可儘可能減小接著材層的厚度。According to the feature as described above, according to an embodiment of the present invention, it is not necessary to completely fill the backing material in the inside of the plated through-hole formed in the double-sided flexible substrate when the cover film is laminated. This is based on the fact that the adhesive in the plated bottomed via is removed when the stepped via is formed. Therefore, the thickness of the adhesive layer can be made as small as possible within a range in which the adhesive can be filled in the through-holes of the double-sided flexible substrate.

結果,與習知技術相比,可使階梯通孔變得較淺。藉此,為了形成鍍敷積層通孔而進行電解鍍敷處理時,電沈積容易性會提升,並且因構成構件的熱膨脹所造成之對鍍敷積層通孔的影響受到減輕。As a result, the stepped via holes can be made shallower than in the prior art. Thereby, when the electrolytic plating treatment is performed in order to form the plated through-hole, the electrodeposition easiness is improved, and the influence on the plated through-holes due to the thermal expansion of the constituent members is alleviated.

因此,藉由本發明,可使良率提升,可儘可能減低用以確保通孔配線的連接可靠性所需之鍍敷厚。因此,藉由本發明,可使形成在增層的外層電路圖案更為微細。Therefore, with the present invention, the yield can be improved, and the plating thickness required for ensuring the connection reliability of the via wiring can be reduced as much as possible. Therefore, with the present invention, the outer layer circuit pattern formed in the buildup layer can be made finer.

此外,藉由本發明,在形成鍍敷積層通孔時,在雙面可撓性基板的鍍敷有底通孔之上亦形成有電解鍍敷皮膜。藉此,因非對稱的形狀而起,與鍍敷貫穿通孔相比,熱應力較易於集中的鍍敷有底通孔受到補強,可使連接可靠性提升。Further, according to the present invention, when the plating via hole is formed, an electrolytic plating film is formed on the plated bottom via hole of the double-sided flexible substrate. Thereby, due to the asymmetrical shape, the plated through-holes which are more easily concentrated in thermal stress than the through-holes are reinforced, and the connection reliability can be improved.

此外,如上所述鍍敷有底通孔受到補強,因此可使該鍍敷有底通孔的鍍敷厚薄至可確保鍍敷貫穿通孔之連接可靠性的程度。結果,可縮短鍍敷工程所需時間,可減低成本。此外,可將形成在雙面可撓性基板的內層電路圖案微細化。Further, since the plated through-holes are reinforced as described above, the plating of the plated bottom vias can be made thick to the extent that the connection reliability of the plating through-vias can be ensured. As a result, the time required for the plating process can be shortened, and the cost can be reduced. Further, the inner layer circuit pattern formed on the double-sided flexible substrate can be made fine.

如上所述,藉由本發明,提供一種廉價且安定製造具有可高密度安裝之堆疊通孔構造的積層型多層印刷配線板的方法。As described above, according to the present invention, there is provided a method of inexpensively and stably manufacturing a laminated type multilayer printed wiring board having a stacked via structure capable of high density mounting.

以下,一面參照圖示,一面針對具有本發明之實施形態之堆疊通孔構造的積層型多層印刷配線板之製造方法加以說明。Hereinafter, a method of manufacturing a laminated type multilayer printed wiring board having a stacked via structure according to an embodiment of the present invention will be described with reference to the drawings.

其中,對於具有同等功能的構成要素標註相同的元件符號,且省略詳加說明。此外,圖示為模式表示者,以實施形態之特徵部分為中心來顯示者,厚度與平面尺寸的關係、各層的厚度比率等係與現實者有所不同。Here, constituent elements having the same functions are denoted by the same reference numerals, and detailed description thereof will be omitted. In addition, the mode is shown as a model, and the display is centered on the characteristic portion of the embodiment, and the relationship between the thickness and the plane size, the thickness ratio of each layer, and the like are different from those of the actual person.

首先,使用第1A圖至第1C圖及第2圖,針對本發明之實施形態之具有堆疊通孔構造的積層型多層印刷配線板32之製造方法加以說明。First, a method of manufacturing the laminated type multilayer printed wiring board 32 having a stacked via structure according to an embodiment of the present invention will be described with reference to FIGS. 1A to 1C and 2 .

第1A圖至第1C圖係用以說明該積層型多層印刷配線板32之製造方法的工程剖面圖。第2圖係本實施形態之積層型多層印刷配線板32的剖面圖。1A to 1C are structural cross-sectional views for explaining a method of manufacturing the laminated type multilayer printed wiring board 32. Fig. 2 is a cross-sectional view showing a multilayer printed wiring board 32 of the present embodiment.

首先,由第1A圖(1)可知,準備在可撓性絕緣基底材1(例如25μm厚的聚醯亞胺)的雙面分別具有銅箔2及銅箔3(第1導電膜及第2導電膜)的雙面覆銅層積板4。銅箔2及銅箔3的厚度例如均為5μm。First, it is understood from the first FIG. 1 (1) that the copper foil 2 and the copper foil 3 (the first conductive film and the second) are provided on both sides of the flexible insulating base material 1 (for example, a polyimide having a thickness of 25 μm). A double-sided copper clad laminate 4 of a conductive film). The thickness of the copper foil 2 and the copper foil 3 is, for example, 5 μm.

接著,對該雙面覆銅層積板4,使用雷射加工法或樹脂蝕刻法等,形成貫穿雙面覆銅層積板4的貫穿通孔5、及有底通孔6。該有底通孔6由第1A圖(1)可知,係在底面露出銅箔3的有底型的通孔。其中,該貫穿通孔5及有底通孔6的加工直徑均為例如直徑70μm。Then, the double-sided copper clad laminate 4 is formed by a laser processing method, a resin etching method, or the like, and a through hole 5 penetrating through the double-sided copper clad laminate 4 and a bottomed through hole 6 are formed. As shown in Fig. 1A (1), the bottomed through hole 6 is a bottomed through hole in which the copper foil 3 is exposed on the bottom surface. The processing diameters of the through holes 5 and the bottomed through holes 6 are each, for example, 70 μm in diameter.

在本工程中使用雷射加工法時,係可選擇以下2個方法。第1方法係被稱為共型雷射加工法的方法。在該方法中,在銅箔2、3設置與通孔直徑相同直徑的開口部,而形成共型遮罩。之後,對共型遮罩照射雷射光而去除在開口部露出的絕緣樹脂。第2方法係被稱為直接雷射加工法的方法。在該方法中,未形成共型遮罩,而對銅箔上直接照射雷射光,來去除銅箔及其下方的絕緣樹脂。在本實施形態中,並非為必須進行藉由感光蝕刻加工法所為之銅箔蝕刻工程的共型雷射加工法,而是考慮到生產性,而選擇一種藉由二氧化碳雷射所為之直接雷射加工法。When using the laser processing method in this project, the following two methods can be selected. The first method is called a method of the co-type laser processing method. In this method, openings of the same diameter as the diameter of the through holes are provided in the copper foils 2, 3 to form a common type of mask. Thereafter, the common mask is irradiated with the laser light to remove the insulating resin exposed at the opening. The second method is called a method of direct laser processing. In this method, a common mask is not formed, and the copper foil is directly irradiated with laser light to remove the copper foil and the insulating resin therebelow. In the present embodiment, it is not necessary to perform a co-type laser processing method for etching a copper foil by a photolithography process, but a direct laser by a carbon dioxide laser is selected in consideration of productivity. Processing method.

在進行該直接雷射加工法之前,係對雙面覆銅層積板4的銅箔2、3施行表面處理。亦即,進行將被照射雷射光的銅箔面形成為低粗度的粗化處理。藉此,當使用二氧化碳雷射(波長:約9.8μm)進行雷射加工時,可使銅箔2、3的雷射光的吸收穩定提升。在本實施形態中,在該粗化處理使用日本MacDermid公司(股)的Multi-bond 150。藉此,可確保與在後工程中所形成的電解銅鍍敷皮膜7的密接性,並且可使銅箔的表面中的二氧化碳雷射光的吸收提升。確認出實際上在表面處理的前後,二氧化碳雷射光的吸收率由約20%提升至約30%。Before the direct laser processing method is performed, the copper foils 2, 3 of the double-sided copper clad laminate 4 are subjected to surface treatment. That is, the copper foil surface on which the laser light is irradiated is formed into a roughening treatment of a low thickness. Thereby, when laser processing is performed using a carbon dioxide laser (wavelength: about 9.8 μm), the absorption of the laser light of the copper foils 2, 3 can be stably improved. In the present embodiment, Multi-bond 150 of Japan MacDermid Co., Ltd. is used for the roughening treatment. Thereby, the adhesion to the electrolytic copper plating film 7 formed in the subsequent work can be ensured, and the absorption of the carbon dioxide laser light in the surface of the copper foil can be improved. It was confirmed that the absorption rate of carbon dioxide laser light was actually increased from about 20% to about 30% before and after the surface treatment.

其中,在本實施形態中,係將貫穿通孔5與有底通孔6同時加工。因此,對銅箔2的表面,係藉由進行上述粗化處理而容易進行銅箔2的加工。與此同時以在形成有底通孔6時不會貫穿銅箔3的方式,進行將銅箔面形成為低粗度的處理來作為銅箔3的背面處理,以使雷射光的吸收降低為佳。但是,在欲效率佳地形成貫穿通孔5時,以進行粗化處理來作為銅箔3的背面處理為佳。In the present embodiment, the through hole 5 and the bottomed through hole 6 are simultaneously processed. Therefore, the copper foil 2 can be easily processed on the surface of the copper foil 2 by performing the above-described roughening treatment. At the same time, the copper foil surface is formed to have a low thickness so as not to penetrate the copper foil 3 when the bottomed through hole 6 is formed, and the back surface of the copper foil 3 is treated so that the absorption of the laser light is reduced to good. However, when the through hole 5 is to be formed efficiently, it is preferable to perform the roughening treatment as the back surface treatment of the copper foil 3.

雙面覆銅層積板4的銅箔2、3愈薄,在雷射加工時,愈容易發生貫穿銅箔2、3。因此,若如本實施形態所示銅箔的厚度較薄,為10μm以下時,由於容易形成有底通孔6,因此以使用幾乎未施行粗化處理來作為背面處理的低粗度的銅箔3為佳。The thinner the copper foils 2, 3 of the double-sided copper clad laminate 4, the easier it is to penetrate the copper foils 2, 3 during laser processing. Therefore, when the thickness of the copper foil is as small as 10 μm or less as described in the present embodiment, since the bottomed through hole 6 is easily formed, a low-thickness copper foil which is treated as a back surface with almost no roughening treatment is used. 3 is better.

在此,詳加說明雷射加工方式。首先,敘述將有底通孔6進行加工的情形。在將銅箔2進行加工時,提高平均1發射(shot)的雷射光能量(設為功率P)。接著,較佳為以1發射結束銅箔2的加工。之後,在將可撓性絕緣基底材1的樹脂加工至露出銅箔3為止時,使平均1發射的雷射光能量降低至(1/2)P~(1/3)P,而以2~3發射完成樹脂加工。接著,針對貫穿通孔5的情形加以敘述。此時,使用將平均1發射的雷射光能量設為前述功率P的雷射光,將雙面的銅箔及樹脂進行加工。連續照射3~4發射,完成貫穿通孔5的加工。Here, the laser processing method will be described in detail. First, the case where the bottomed through hole 6 is processed will be described. When the copper foil 2 is processed, an average of 1 shot of laser light energy is set (set to power P). Next, it is preferable to finish the processing of the copper foil 2 by one emission. After that, when the resin of the flexible insulating base material 1 is processed until the copper foil 3 is exposed, the energy of the laser light emitted by the average one is reduced to (1/2) P to (1/3) P, and 2 to 2 3 launch complete resin processing. Next, the case of penetrating the through hole 5 will be described. At this time, the double-sided copper foil and the resin are processed using laser light having an average light emission of laser light energy of the above-described power P. Continuous irradiation of 3 to 4 is performed to complete the processing of the through hole 5.

在使用更薄的銅箔時,為了容易形成有底通孔6,先將成為有底通孔6之底部的銅箔3的背面(與基底材相接的面)形成為低粗度。伴隨此,在銅箔2的背面(與基底材相接的面)進行粗化處理。接著,貫穿通孔5係由銅箔3的表面加工形成。藉由該方法,可一面輕易形成有底通孔6,一面效率佳地形成貫穿通孔。此外,以其他方法而言,亦可由銅箔2的表面及銅箔3的表面的2方向進行雷射加工,而形成貫穿通孔5。此時,在銅箔2、3的表面係進行粗化處理,因此具有從任何方向均容易加工,並且不需要考慮銅箔的背面處理狀態(粗度的高低)的優點。When a thinner copper foil is used, in order to easily form the bottomed through hole 6, the back surface (the surface in contact with the base material) of the copper foil 3 which becomes the bottom of the bottomed through hole 6 is formed to have a low thickness. Along with this, the back surface of the copper foil 2 (the surface in contact with the base material) is roughened. Next, the through via 5 is formed by processing the surface of the copper foil 3. According to this method, the through-holes 6 can be easily formed while forming the through-holes efficiently. Further, in another method, the through hole 5 may be formed by performing laser processing from the surface of the copper foil 2 and the surface of the copper foil 3 in two directions. At this time, since the surfaces of the copper foils 2 and 3 are subjected to the roughening treatment, they are easy to process from any direction, and there is no need to consider the back surface treatment state (the thickness of the copper foil) of the copper foil.

接著,為了去除在形成貫穿通孔5及有底通孔6時所產生的污跡(樹脂殘渣),進行電漿處理及濕式蝕刻(去污跡處理)。對貫穿通孔5與有底通孔6的該電漿處理的最適條件係大致相同。另一方面,關於使用過硫酸鈉等的濕式蝕刻,在兩者之間,最適條件不同。亦即,濕式蝕刻對貫穿通孔5而言幾乎不需要。不如進行蝕刻,藉此銅箔2、3會後退,會有對之後的導電化處理造成不良影響的情形。另一方面,對有底通孔6,為了去除因背面處理所造成之銅箔3的背面的鎳、鉻等異種金屬,必須進行1~2μm的蝕刻。考慮到對貫穿通孔5的影響,以儘量以較少的蝕刻量來完成處理為佳。在本實施形態中,係進行1μm的蝕刻。Next, in order to remove the stain (resin residue) generated when the through hole 5 and the bottomed through hole 6 are formed, plasma treatment and wet etching (desmut treatment) are performed. The optimum conditions for the plasma treatment of the through-hole 5 and the bottomed through-hole 6 are substantially the same. On the other hand, regarding wet etching using sodium persulfate or the like, the optimum conditions are different between the two. That is, the wet etching is almost unnecessary for the through via 5. It is not preferable to perform etching so that the copper foils 2 and 3 are retracted, which may adversely affect the subsequent conductive treatment. On the other hand, in order to remove the dissimilar metal such as nickel or chromium on the back surface of the copper foil 3 caused by the back surface treatment, the bottomed via hole 6 is required to be etched by 1 to 2 μm. In view of the influence on the through-hole 5, it is preferable to complete the treatment with as little etching amount as possible. In the present embodiment, etching is performed at 1 μm.

接著,由第1A圖(2)可知,對銅箔2、3上、貫穿通孔5的內壁及有底通孔6的內壁施行導電化處理及繼之的電解銅鍍敷處理,藉此形成電解銅鍍敷皮膜7(約8μm厚)。藉此,形成銅箔2、3上的銅鍍敷層8、鍍敷貫穿通孔9、及鍍敷有底通孔10。該鍍敷貫穿通孔9係貫穿型的層間導電路,鍍敷有底通孔10係有底型的層間導電路。該等鍍敷通孔係均將可撓性絕緣基底材1的表面的銅箔2與背面的銅箔3作電性連接。Next, it can be seen from FIG. 1A (2) that the copper foils 2 and 3, the inner wall of the through-hole 5 and the inner wall of the bottomed through-hole 6 are subjected to a conductive treatment and an electrolytic copper plating treatment. This forms an electrolytic copper plating film 7 (about 8 μm thick). Thereby, the copper plating layer 8 on the copper foils 2, 3, the plating through-hole 9, and the plated through-hole 10 are formed. The plating penetrates through-holes 9 through the interlayer conduction circuit, and the plated through-holes 10 are provided with a bottom-type interlayer conduction circuit. Each of the plated through holes electrically connects the copper foil 2 on the surface of the flexible insulating base material 1 to the copper foil 3 on the back surface.

其中,上述導電化處理工程及電解銅鍍敷工程中的處理液的液體更新性,在貫穿通孔5與有底通孔6並不相同。亦即,與貫穿通孔5相比,有底通孔6的液體更新性較差。因此,基本上係進行以可處理有底通孔6的條件下的工程流動。關於電解銅鍍敷工程,對有底通孔6的底部附近的側壁到處附著容易變差。因此,電解銅鍍敷處理係以使用包含高濃度硫酸銅的鍍敷浴來進行為佳。Among them, the liquid renewability of the treatment liquid in the above-described conductive treatment process and electrolytic copper plating project is not the same as that of the through hole 5 and the bottomed through hole 6. That is, the liquid renewability of the bottomed through hole 6 is inferior to that of the through hole 5. Therefore, the engineering flow under the condition that the bottomed through hole 6 can be processed is basically performed. Regarding the electrolytic copper plating process, the adhesion of the side wall near the bottom of the bottomed through hole 6 is likely to be deteriorated. Therefore, the electrolytic copper plating treatment is preferably carried out using a plating bath containing a high concentration of copper sulfate.

接著,由第1A圖(3)可知,在銅鍍敷層8、8之上形成阻劑層11、11。在形成該阻劑層11時係使用乾式薄膜阻劑。該乾式薄膜阻劑係以使用可將鍍敷貫穿通孔9及鍍敷有底通孔10之二者進行蓋孔(tenting)的厚度(例如20μm)者為佳。藉此,防止阻劑進入至鍍敷貫穿通孔9及鍍敷有底通孔10內,可輕易進行之後進行的阻劑層11的剝離。其中,亦可使用液狀阻劑或電沈積阻劑來取代乾式薄膜阻劑。Next, as shown in Fig. 1(A), the resist layers 11 and 11 are formed on the copper plating layers 8 and 8. A dry film resist is used in forming the resist layer 11. The dry film resist is preferably a thickness (for example, 20 μm) which can be used for tenting through the through hole 9 and the plated bottomed through hole 10. Thereby, the resist is prevented from entering the plating through-hole 9 and the plated bottomed through hole 10, and the peeling of the resist layer 11 which is performed later can be easily performed. Among them, a liquid resist or an electrodeposition resist may be used instead of the dry film resist.

接著,由第1A圖(4)可知,藉由感光蝕刻加工法,藉由阻劑層11的曝光、顯影,將阻劑層11按照預定的圖案進行蝕刻,之後,將被圖案化的阻劑層11形成為遮罩,將銅鍍敷層8及銅箔2、3進行蝕刻。之後,將阻劑層11剝離。藉此,在可撓性絕緣基底材1的表面及背面分別形成內層電路圖案12A及12B。Next, as is understood from FIG. 1A (4), the resist layer 11 is etched in a predetermined pattern by exposure and development of the resist layer 11 by a photolithography process, and then the patterned resist is patterned. The layer 11 is formed as a mask, and the copper plating layer 8 and the copper foils 2, 3 are etched. Thereafter, the resist layer 11 is peeled off. Thereby, the inner layer circuit patterns 12A and 12B are formed on the front and back surfaces of the flexible insulating base material 1, respectively.

藉由至此為止的工程,獲得第1A圖(4)所示之雙面可撓性基板13。The double-sided flexible substrate 13 shown in Fig. 1A (4) is obtained by the above-described process.

接著,由第1B圖(5)可知,準備具有:聚醯亞胺薄膜等絕緣薄膜14(例如12μm厚)、及形成在絕緣薄膜14之單面的接著劑層15的覆蓋膜16。接著劑層15係由例如丙烯酸、環氧等接著劑所構成。接著,使用真空疊合機等,進行在雙面可撓性基板13的雙面黏貼覆蓋膜16的層疊工程。藉此,內層電路圖案12A、12B及鍍敷貫穿通孔9係藉由接著劑層15予以填充。Next, it is understood from FIG. 1B (5) that the cover film 16 having the insulating film 14 (for example, 12 μm thick) such as a polyimide film and the adhesive layer 15 formed on one surface of the insulating film 14 is prepared. The subsequent agent layer 15 is composed of an adhesive such as acrylic or epoxy. Next, a lamination process of the double-sided adhesive cover film 16 on the double-sided flexible substrate 13 is performed using a vacuum laminator or the like. Thereby, the inner layer circuit patterns 12A and 12B and the plating through via 9 are filled by the adhesive layer 15.

在本層疊工程中,並不需要利用接著劑而將鍍敷有底通孔10的內部完全填充。亦即,層疊工程係在藉由覆蓋膜16的接著劑層15熔融後的接著劑而使鍍敷貫穿通孔9的內部被完全填充,而且在鍍敷有底通孔10的內部容許發生未藉由接著劑層15熔融後的接著劑予以填充的空氣空隙15a的條件下來進行。如上所示,本實施形態中的接著材層15的厚度若可完全填充鍍敷貫穿通孔9即可,並不需要考慮鍍敷有底通孔10內部的填充狀態。因此,接著劑層15係在可完全填充鍍敷貫穿通孔9的範圍內儘可能變薄。在本實施形態中,接著劑層15的厚度係形成為15μm。如第1B圖(5)所示,會有在鍍敷有底通孔10內部發生空氣空隙15a的情形。但是,在後工程中藉由雷射加工,鍍敷有底通孔10內的接著劑會全部去除,因此該空氣空隙15a並不會成為問題。In the present laminating process, it is not necessary to completely fill the inside of the plated bottomed through hole 10 with an adhesive. In other words, in the lamination process, the inside of the plating through-hole 9 is completely filled by the adhesive which is melted by the adhesive layer 15 of the cover film 16, and the inside of the plated bottomed through hole 10 is allowed to occur. The air void 15a filled by the adhesive after the adhesive layer 15 is melted is carried out under the condition of the air void 15a filled. As described above, the thickness of the adhesive layer 15 in the present embodiment can be completely filled in the plating through-hole 9, and it is not necessary to consider the filling state inside the plated through-hole 10 . Therefore, the adhesive layer 15 is as thin as possible within a range in which the plating through-hole 9 can be completely filled. In the present embodiment, the thickness of the adhesive layer 15 is 15 μm. As shown in Fig. 1B (5), the air gap 15a may be generated inside the plated bottomed through hole 10. However, in the post-engineering, all of the adhesive in the plated through-hole 10 is completely removed by laser processing, so that the air void 15a does not become a problem.

以至此為止的工程,獲得第1B圖(5)所示之成為多層印刷配線板之核心基板的雙面核心基板17。In the above-mentioned work, the double-sided core substrate 17 which becomes the core substrate of the multilayer printed wiring board shown in FIG. 1B (5) is obtained.

接著,如第1B圖(6)所示,準備在可撓性絕緣基底材19(例如25μm厚的聚醯亞胺)的單面具有例如12μm厚的銅箔18(第3導電膜)的單面覆銅層積板20。接著,藉由感光蝕刻加工法,在單面覆銅層積板20的銅箔18形成開口部18a。更詳而言之,在銅箔18之上形成阻劑層(未圖示),藉由曝光及顯影將該阻劑層進行圖案化。接著,將被圖案化的阻劑層形成為遮罩,將銅箔18進行蝕刻。藉此,形成共型遮罩21。該開口部18a係用以在後工程中藉由雷射加工來去除基底材的樹脂而形成通孔者。Next, as shown in FIG. 1B (6), a single copper foil 18 (third conductive film) having a thickness of, for example, 12 μm is provided on one surface of the flexible insulating base material 19 (for example, a polyimide having a thickness of 25 μm). The copper clad laminate 20 is covered. Next, the opening 18a is formed in the copper foil 18 of the single-sided copper-clad laminate 20 by the photosensitive etching processing method. More specifically, a resist layer (not shown) is formed on the copper foil 18, and the resist layer is patterned by exposure and development. Next, the patterned resist layer is formed into a mask, and the copper foil 18 is etched. Thereby, the common type mask 21 is formed. The opening portion 18a is used to form a through hole by removing the resin of the base material by laser processing in a post-engineering process.

接著,由第1B圖(6)可知,使用用以積層的接著劑,將形成有共型遮罩21的單面覆銅層積板20、20,透過接著劑層22、22而層積接著在雙面核心基板17的雙面。以在此使用的接著材而言,以低流量類型(Low Flow type)的預浸體或接合片等流出較少者為佳。其中,亦可在將具有未加工的銅箔18的單面覆銅層積板20透過接著材層22而接著在雙面核心基板17後,將銅箔18按照預定的圖案進行蝕刻,來形成共型遮罩21。Next, it is understood from Fig. 1B (6) that the single-sided copper clad laminates 20 and 20 on which the common mask 21 is formed are laminated through the adhesive layers 22 and 22 by using an adhesive for laminating. On both sides of the double-sided core substrate 17. In the case of the backing material used herein, it is preferred that the low flow type (pre-dip type) or the bonding sheet or the like has a small outflow. Alternatively, the single-sided copper-clad laminate 20 having the unprocessed copper foil 18 may be passed through the subsequent material layer 22, and then the copper foil 18 may be etched in a predetermined pattern after the double-sided core substrate 17 is formed. Common type mask 21.

接著,由第1C圖(7)可知,使用共型遮罩21來進行雷射加工,形成階梯通孔23及通孔24A、24B。該階梯通孔23係貫穿可撓性絕緣基底材19、接著劑層22、絕緣薄膜14及接著劑層15,在底部露出鍍敷有底通孔10。在該雷射加工工程中,鍍敷有底通孔10內部的樹脂被全部去除,空氣空隙15a即會消滅。通孔24A、24B係貫穿可撓性絕緣基底材19、接著劑層22、絕緣薄膜14及接著劑層15,在其底部露出內層電路圖案12A、12B。Next, as is clear from the first FIG. 1 (7), the laser beam processing is performed using the common type mask 21 to form the stepped through holes 23 and the through holes 24A and 24B. The stepped through hole 23 penetrates through the flexible insulating base material 19, the adhesive layer 22, the insulating film 14, and the adhesive layer 15, and the plated bottomed through hole 10 is exposed at the bottom. In this laser processing project, the resin inside the plated through-hole 10 is completely removed, and the air void 15a is destroyed. The through holes 24A and 24B penetrate the flexible insulating base material 19, the adhesive layer 22, the insulating film 14, and the adhesive layer 15, and the inner layer circuit patterns 12A and 12B are exposed at the bottom.

其中,為了形成階梯通孔23,必須連位於鍍敷有底通孔10內部的樹脂亦去除。因此,應去除的樹脂材料的量係以階梯通孔23比通孔24A、24B還多。因此,在形成階梯通孔23時,係以增加雷射加工的發射數、或加長雷射光的脈衝寬幅為佳。以使用在該雷射加工的雷射而言,可選擇UV-YAG雷射、碳酸雷射、準分子雷射等。Among them, in order to form the stepped through hole 23, it is necessary to remove the resin which is inside the plated bottomed through hole 10. Therefore, the amount of the resin material to be removed is more than that of the through holes 23A, 24B. Therefore, in forming the stepped through hole 23, it is preferable to increase the number of shots of the laser processing or to increase the pulse width of the laser light. For the laser used in the laser processing, a UV-YAG laser, a carbonic acid laser, a pseudo-molecular laser, or the like can be selected.

接著,由第1C圖(8)可知,對銅箔18上、階梯通孔23的內壁及通孔24A、24B的內壁施行導電化處理及繼之的電解鍍敷處理,藉此形成電解鍍敷皮膜25。藉此,形成銅箔18上的銅鍍敷層26、及鍍敷積層通孔27、28、29。該等鍍敷通孔係均將內層電路圖案12A、12B、與銅箔18及銅鍍敷層26(之後的外層電路圖案30)作電性連接者。鍍敷積層通孔27係在階梯通孔23的內壁形成有鍍敷層者。鍍敷積層通孔28係在與階梯通孔23相對向的通孔24A的內壁形成有鍍敷層者。鍍敷積層通孔29係在通孔24B的內壁形成有鍍敷層者。Next, as is understood from FIG. 1C (8), the inner wall of the stepped through hole 23 and the inner walls of the through holes 24A and 24B are subjected to a conductive treatment and an electrolytic plating treatment to form an electrolysis. The coating film 25 is applied. Thereby, the copper plating layer 26 on the copper foil 18 and the plating via holes 27, 28, 29 are formed. The plated through holes are electrically connected to the inner layer circuit patterns 12A and 12B and the copper foil 18 and the copper plating layer 26 (the outer layer circuit pattern 30 thereafter). The plated through hole 27 is formed by forming a plating layer on the inner wall of the stepped through hole 23. The plated through hole 28 is formed with a plating layer on the inner wall of the through hole 24A opposed to the stepped through hole 23. The plated through hole 29 is formed by forming a plating layer on the inner wall of the through hole 24B.

該電解鍍敷皮膜25的厚度係形成為用以確保連接可靠性所需的值。在本實施形態中,相較於習知技術,使接著劑層15的厚度更為減低,藉此連電解鍍敷皮膜25的厚度亦比習知技術(例如25~30μm程度),可減薄至例如15μm~20μm程度。The thickness of the electrolytic plating film 25 is formed to a value required for ensuring connection reliability. In the present embodiment, the thickness of the adhesive layer 15 is further reduced as compared with the prior art, whereby the thickness of the electrolytic plating film 25 is also thinner than the conventional technique (for example, about 25 to 30 μm). To the extent of, for example, 15 μm to 20 μm.

由第1C圖(8)可知,藉由至此為止的工程,完成在鍍敷有底通孔10上形成有鍍敷積層通孔27的堆疊通孔構造。As is apparent from Fig. 1C (8), the stacked via structure in which the plated through-holes 27 are formed in the plated bottomed via 10 is completed by the above-described process.

接著,由第2圖可知,使用感光蝕刻加工法,將銅箔18及電解鍍敷皮膜25按照預定的圖案進行蝕刻,藉此形成外層電路圖案30。之後,視需要形成光阻焊層(未圖示),對電路圖案的端子施行焊料鍍敷、鎳鍍敷、金鍍敷等表面處理,藉由利用模具所進行的鑽孔等來進行外形加工。Next, as is apparent from Fig. 2, the outer layer circuit pattern 30 is formed by etching the copper foil 18 and the electrolytic plating film 25 in a predetermined pattern by a photosensitive etching method. After that, a photoresist layer (not shown) is formed as necessary, and a surface treatment such as solder plating, nickel plating, or gold plating is applied to the terminals of the circuit pattern, and the outer shape processing is performed by drilling using a mold or the like. .

經由以上工程,可得第2圖所示之本實施形態之具有堆疊通孔構造的積層型多層印刷配線板32。Through the above process, the laminated type multilayer printed wiring board 32 having the stacked via structure of the present embodiment shown in Fig. 2 can be obtained.

本實施形態之積層型多層印刷配線板32係在成為內層的雙面核心基板17的表面及背面,透過接著劑層22、22而層積外層的單面覆銅層積板20、20者。本實施形態並非侷限於此,亦可僅在雙面核心基板17的表面,亦即雙面核心基板17的鍍敷有底通孔10的開口面側,透過接著劑層22來層積外層的單面覆銅層積板20。藉此,可得僅在單面具備有增層的多層印刷配線板。The multilayer printed wiring board 32 of the present embodiment is a single-sided copper-clad laminate 20 or 20 which is formed on the front and back surfaces of the double-sided core substrate 17 which is an inner layer and which is formed by laminating the outer layers 22 and 22 . The present embodiment is not limited thereto, and the outer layer may be laminated on the surface of the double-sided core substrate 17, that is, the open surface side of the plated through-hole 10 of the double-sided core substrate 17, through the adhesive layer 22. Single-sided copper clad laminate 20. Thereby, it is possible to obtain a multilayer printed wiring board having a buildup layer on only one side.

內層電路圖案12A、12B係藉由鍍敷積層通孔27、28、29而與外層電路圖案30作電性連接。The inner layer circuit patterns 12A, 12B are electrically connected to the outer layer circuit pattern 30 by plating the via holes 27, 28, 29.

其中,藉由本實施形態之製造方法所得之積層型多層印刷配線板32係具有:在屬於可撓性印刷配線板的雙面核心基板17層積有增層31的零件安裝部32a;及在雙面核心基板17未層積有增層的可撓性線材部32b。亦即,可撓性線材部32b係由零件安裝部32a延伸的構成。本實施形態並非侷限於此,亦可製造雙面核心基板17未構成可撓性線材32b的多層印刷配線板。In the multilayer printed wiring board 32 obtained by the manufacturing method of the present embodiment, the component mounting portion 32a in which the buildup layer 31 is laminated on the double-sided core substrate 17 belonging to the flexible printed wiring board; The layered core substrate 17 is not laminated with the layered flexible wire portion 32b. That is, the flexible wire portion 32b is configured to extend from the component mounting portion 32a. This embodiment is not limited thereto, and a multilayer printed wiring board in which the double-sided core substrate 17 does not constitute the flexible wire member 32b can be manufactured.

此外,在本實施形態中,係針對可撓性多層印刷配線板之製造方法加以說明,但是本發明並非侷限於此。Further, in the present embodiment, a method of manufacturing the flexible multilayer printed wiring board will be described, but the present invention is not limited thereto.

此外,以雷射加工法而言,除了前述的共型雷射加工法或直接雷射加工法以外,亦有:在銅箔18形成比階梯通孔23的上穴直徑為更大的開口之後,照射與階梯通孔23的上穴直徑相同的光束直徑的雷射光的開大窗(large window)法等。可選擇的雷射加工法並非侷限於在上述實施形態的說明中所使用者,可按每個工程來任意選擇共型法、直接雷射法及開大窗法。其中,若使用直接雷射法,如本實施形態所示銅箔的厚度係以15μm以下為佳。Further, in the laser processing method, in addition to the aforementioned common-type laser processing method or direct laser processing method, there is also a case where the copper foil 18 is formed with an opening having a larger diameter than the upper hole of the stepped through hole 23. A large window method of irradiating laser light having the same beam diameter as that of the upper hole of the stepped through hole 23 is irradiated. The optional laser processing method is not limited to the user in the description of the above embodiment, and the common method, the direct laser method, and the large window method can be arbitrarily selected for each project. However, if the direct laser method is used, the thickness of the copper foil as shown in the present embodiment is preferably 15 μm or less.

此外,在本實施形態中,在雙面可撓性基板13的雙面層疊覆蓋膜16而製作出雙面核心基板17之後,在雙面核心基板17層積增層,但是本發明並非侷限於此,亦可使用附接著劑的單面覆銅層積板來取代覆蓋膜16,而在雙面可撓性基板13直接設置增層。此時,如下所述製作多層印刷配線板。首先,如前所述,製作出形成有鍍敷貫穿通孔9、鍍敷有底通孔10及內層電路圖案12A、12B的雙面可撓性基板13。之後,準備具有:絕緣基底材、形成在前述絕緣基底材的表面的導電膜(第3導電膜)、及形成在前述絕緣基底材背面的接著劑層的附接著劑層的單面覆導電膜層積板。接著,進行將附接著劑層的單面覆導電膜層積板黏貼在雙面可撓性基板13的雙面的層疊工程。該層疊工程係在藉由附接著劑層的單面覆導電膜層積板的接著劑層熔融後的接著劑而使鍍敷貫穿通孔9的內部被完全填充,而且在鍍敷有底通孔10的內部容許發生未藉由接著劑層熔融後的接著劑予以填充的空氣空隙的條件下進行。對如上所示所得的多層印刷配線板,藉由雷射加工,去除鍍敷有底通孔10內部的接著劑而使空氣空隙消滅,藉此,在底部露出鍍敷有底通孔10,形成鍍敷有底通孔10成為下穴的階梯通孔。之後,藉由對第3導電膜及階梯通孔的內壁施行鍍敷處理,形成將第3導電膜與內層電路圖案12A作電性連接的鍍敷積層通孔。接著,將已施行鍍敷處理的第3導電膜按照預定的圖案進行蝕刻,藉此形成外層電路圖案,而獲得積層型的多層印刷配線板。Further, in the present embodiment, after the cover film 16 is laminated on both surfaces of the double-sided flexible substrate 13 to form the double-sided core substrate 17, the double-sided core substrate 17 is laminated, but the present invention is not limited thereto. Alternatively, a single-sided copper-clad laminate with an adhesive may be used instead of the cover film 16, and a build-up layer may be directly provided on the double-sided flexible substrate 13. At this time, a multilayer printed wiring board was produced as follows. First, as described above, the double-sided flexible substrate 13 on which the plating through-holes 9, the plated bottom vias 10, and the inner layer circuit patterns 12A and 12B are formed is formed. After that, a single-sided conductive film having an insulating base material, a conductive film (third conductive film) formed on the surface of the insulating base material, and an adhesive layer formed on the adhesive layer on the back surface of the insulating base material is prepared. Laminated board. Next, a lamination process in which the single-sided conductive film laminate of the adhesive layer is adhered to both surfaces of the double-sided flexible substrate 13 is performed. In the lamination process, the inside of the plating through-hole 9 is completely filled by an adhesive which is melted by the adhesive layer of the single-sided conductive film laminated plate of the adhesive layer, and the plating is provided. The inside of the hole 10 is allowed to occur under the condition that an air gap which is not filled by the adhesive after the adhesive layer is melted occurs. The multilayer printed wiring board obtained as described above is subjected to laser processing to remove the adhesive inside the plated through-hole 10 to eliminate the air void, thereby exposing the plated bottomed via 10 at the bottom to form The plated through hole 10 is formed as a stepped through hole of the lower hole. Thereafter, by plating the inner walls of the third conductive film and the stepped via holes, a plated via hole for electrically connecting the third conductive film and the inner layer circuit pattern 12A is formed. Then, the third conductive film which has been subjected to the plating treatment is etched in a predetermined pattern to form an outer layer circuit pattern, thereby obtaining a laminated type multilayer printed wiring board.

如上所述,雙面核心基板17係具有用以將內層電路圖案12A與內層電路圖案12B作電性連接的鍍敷貫穿通孔9與鍍敷有底通孔10。堆疊通孔構造係由鍍敷有底通孔10、及配置在該鍍敷有底通孔10上的鍍敷積層通孔27所構成。該鍍敷積層通孔27係在將形成在雙面核心基板17的鍍敷有底通孔10形成為小徑孔洞的階梯通孔23的內壁形成有電解鍍敷皮膜者。此外,鍍敷貫穿通孔10係構成為僅進行雙面核心基板17的表面與背面的層間導通,外層電路圖案30與內層電路圖案12A、12B的層間導通並未進行者。As described above, the double-sided core substrate 17 has a plating through-hole 9 and a plated bottomed through hole 10 for electrically connecting the inner layer circuit pattern 12A and the inner layer circuit pattern 12B. The stacked via structure is composed of a plated bottomed through hole 10 and a plated through hole 27 disposed on the plated bottomed through hole 10. The plated through-hole 27 is formed by forming an electrolytic plating film on the inner wall of the stepped through hole 23 formed in the plated through-hole 10 formed in the double-sided core substrate 17 as a small-diameter hole. Further, the plating through-via 10 is configured to conduct only the interlayer between the front surface and the back surface of the double-sided core substrate 17, and the interlayer conduction between the outer layer circuit pattern 30 and the inner layer circuit patterns 12A and 12B is not performed.

根據上述特徵,藉由本實施形態可得以下效果。According to the above feature, the following effects can be obtained by the present embodiment.

在將覆蓋膜16層疊時,變得不需要利用接著材來完全填充鍍敷有底通孔10的內部。亦即,鍍敷有底通孔10的內部亦可利用接著劑而以不完全填充的狀態,而不存在有空氣空隙15a。因此,在可在鍍敷貫穿通孔9的內部完全填充接著劑的範圍內,儘可能減小覆蓋膜16的接著材層15的厚度。結果,可儘可能使階梯通孔23變淺(例如10μm左右),使得在階梯通孔23及通孔24A、24B的內壁施行電解鍍敷處理時的電沈積容易性提升。此外,鍍敷積層通孔27、28、29係形成為不易受到因印刷配線板的構成構件的熱膨脹所造成的影響等有利的構造。構成構件之中尤其構成接著劑層15的接著劑係熱膨脹率較大,因此因接著劑層15變薄所造成的效果較大。因此,可提升良率及減低用以確保連接可靠性所需的電解鍍敷皮膜25的厚度。結果,藉由本實施形態,可形成微細的外層電路圖案30。When the cover film 16 is laminated, it becomes unnecessary to completely fill the inside of the plated bottomed through hole 10 with the adhesive material. That is, the inside of the plated bottomed through hole 10 may be in an incompletely filled state by means of an adhesive, and there is no air void 15a. Therefore, the thickness of the adhesive layer 15 of the cover film 16 is minimized within a range in which the inside of the plating through-hole 9 can be completely filled with the adhesive. As a result, the stepped through holes 23 can be made shallower (for example, about 10 μm) as much as possible, so that the electrodeposition ease at the time of performing the electrolytic plating treatment on the inner walls of the stepped through holes 23 and the through holes 24A, 24B is improved. Further, the plated through-holes 27, 28, and 29 are formed to be advantageous in that they are not easily affected by thermal expansion of the constituent members of the printed wiring board. Among the constituent members, the adhesive agent constituting the adhesive layer 15 in particular has a large thermal expansion coefficient, and therefore the effect of the adhesive layer 15 being thinned is large. Therefore, the yield can be improved and the thickness of the electrolytic plating film 25 required for ensuring the connection reliability can be reduced. As a result, according to the present embodiment, the fine outer layer circuit pattern 30 can be formed.

此外,藉由本實施形態,在形成鍍敷積層通孔27時,在鍍敷有底通孔10之上亦形成有電解鍍敷皮膜26。藉此,因非對稱形狀而起,與鍍敷貫穿通孔9相比,熱應力較易於集中的鍍敷有底通孔10受到補強,可使連接可靠性提升。Further, according to the present embodiment, when the plating via hole 27 is formed, the electrolytic plating film 26 is formed on the plated bottom via hole 10. As a result, the plated through-holes 10 which are more easily concentrated in thermal stress than the through-holes 9 are reinforced by the asymmetric shape, and the connection reliability can be improved.

此外,藉由本實施形態,由於鍍敷有底通孔10受到補強,因此可使鍍敷有底通孔10的鍍敷厚(電解銅鍍敷皮膜7的厚度)薄至可確保鍍敷貫穿通孔9之連接可靠性的程度。結果,可縮短鍍敷工程所需時間,而可減低成本。此外,由於配合鍍敷有底通孔10的鍍敷厚度,銅鍍敷層8亦變得較薄,因此可將雙面核心基板17的內層電路圖案12微細化。Further, according to the present embodiment, since the plated bottomed through hole 10 is reinforced, the plating thickness of the plated through hole 10 (the thickness of the electrolytic copper plating film 7) can be made thin to ensure the penetration of the plating. The degree of connection reliability of the holes 9. As a result, the time required for the plating process can be shortened, and the cost can be reduced. Further, since the copper plating layer 8 is also made thinner by the plating thickness of the plated bottomed via 10, the inner layer circuit pattern 12 of the double-sided core substrate 17 can be made fine.

其中,在實施形態之說明中,配線圖案及鍍敷皮膜係由銅所構成者,但是本發明並非限定於此,亦可為例如鋁或銀等其他金屬。In the description of the embodiment, the wiring pattern and the plating film are made of copper. However, the present invention is not limited thereto, and may be other metals such as aluminum or silver.

根據上述記載,若為該領域熟習該項技術者,或許可思及本發明之追加效果或各種變形,惟本發明之態樣並非限定於上述實施形態。在未脫離由申請專利範圍所規定的內容及其均等物所導出的本發明之概念思想與趣旨的範圍內,可為各種追加、變更及局部刪除。According to the above description, those skilled in the art may appreciate the additional effects or various modifications of the present invention, but the aspects of the present invention are not limited to the above embodiments. Various additions, modifications, and partial deletions may be made without departing from the spirit and scope of the invention as set forth in the appended claims.

1、19、101...可撓性絕緣基底材1, 19, 101. . . Flexible insulating substrate

2、3、18、102、103...銅箔2, 3, 18, 102, 103. . . Copper foil

4、104...雙面覆銅層積板4, 104. . . Double-sided copper laminate

5...貫穿通孔5. . . Through hole

6、105...有底通孔6,105. . . Bottom through hole

7...電解銅鍍敷皮膜7. . . Electrolytic copper plating film

8、26...銅鍍敷層8, 26. . . Copper plating

9...鍍敷貫穿通孔9. . . Plating through the through hole

10、106...鍍敷有底通孔10, 106. . . Plated bottom via

11...阻劑層11. . . Resistive layer

12A、12B...內層電路圖案12A, 12B. . . Inner circuit pattern

13...雙面可撓性基板13. . . Double-sided flexible substrate

14、107...絕緣薄膜14,107. . . Insulating film

15、22、108、112...接著材層15, 22, 108, 112. . . Subsequent layer

15a...空氣空隙15a. . . Air gap

16、109...覆蓋膜16,109. . . Cover film

17、110...雙面核心基板17, 110. . . Double-sided core substrate

18...銅箔18. . . Copper foil

18a...開口部18a. . . Opening

20、111...單面覆銅層積板20, 111. . . Single-sided copper laminate

21...共型遮罩twenty one. . . Common mask

23、113A...階梯通孔23, 113A. . . Stepped through hole

24A、24B、113B、113C...通孔24A, 24B, 113B, 113C. . . Through hole

25...電解鍍敷皮膜25. . . Electrolytic plating film

27、28、29、114A、114B、114C...鍍敷積層通孔27, 28, 29, 114A, 114B, 114C. . . Plated through hole

30、115...外層電路圖案30, 115. . . Outer circuit pattern

31...積層通孔31. . . Laminated through hole

32、116...積層型多層印刷配線板32, 116. . . Multilayer printed wiring board

32a、116a...零件安裝部32a, 116a. . . Parts mounting department

32b、116b...可撓性線材部32b, 116b. . . Flexible wire section

第1A圖係用以說明本發明之實施形態之積層型多層印刷配線板之製造方法的工程剖面圖。Fig. 1A is a cross-sectional view showing the construction of a method of manufacturing a multilayer printed wiring board according to an embodiment of the present invention.

第1B圖係接續第1A圖,用以說明本發明之實施形態之積層型多層印刷配線板之製造方法的工程剖面圖。Fig. 1B is a cross-sectional view of the first embodiment of the present invention for explaining a method of manufacturing a multilayer printed wiring board according to an embodiment of the present invention.

第1C圖係接續第1B圖,用以說明本發明之實施形態之積層型多層印刷配線板之製造方法的工程剖面圖。1C is a cross-sectional view of the first embodiment of the present invention for explaining a method of manufacturing a multilayer printed wiring board according to an embodiment of the present invention.

第2圖係本發明之實施形態之積層型多層印刷配線板的剖面圖。Fig. 2 is a cross-sectional view showing a laminated type multilayer printed wiring board according to an embodiment of the present invention.

第3圖係藉由習知技術所得之具有堆疊通孔構造的積層型多層印刷配線板之製造方法的工程剖面圖。Fig. 3 is an engineering sectional view showing a method of manufacturing a laminated type multilayer printed wiring board having a stacked via structure obtained by a conventional technique.

1、19...可撓性絕緣基底材1, 19. . . Flexible insulating substrate

9...鍍敷貫穿通孔9. . . Plating through the through hole

10...鍍敷有底通孔10. . . Plated bottom via

14...絕緣薄膜14. . . Insulating film

15、22...接著材層15, 22. . . Subsequent layer

15a...空氣空隙15a. . . Air gap

16...覆蓋膜16. . . Cover film

17...雙面核心基板17. . . Double-sided core substrate

18...銅箔18. . . Copper foil

18a...開口部18a. . . Opening

20...單面覆銅層積板20. . . Single-sided copper laminate

21...共型遮罩twenty one. . . Common mask

Claims (3)

一種多層印刷配線板之製造方法,其特徵為:在表面及背面分別具有第1導電膜及第2導電膜的雙面覆導電膜層積板,形成將前述第1導電膜與前述第2導電膜作電性連接的鍍敷貫穿通孔及鍍敷有底通孔,將前述第1導電膜及前述第2導電膜按照預定的圖案進行蝕刻,藉此製作具有內層電路圖案的雙面可撓性基板,準備具有:絕緣薄膜、及形成在前述絕緣薄膜之單面的接著劑層的覆蓋膜,在藉由前述覆蓋膜的前述接著劑層熔融後的接著劑而使前述鍍敷貫穿通孔的內部被完全填充,而且在前述鍍敷有底通孔的內部容許發生未藉由前述接著劑予以填充的空氣空隙的條件下,進行將前述覆蓋膜黏貼在前述雙面可撓性基板之雙面的層疊工程,藉此製作雙面核心基板,在前述雙面核心基板的至少前述鍍敷有底通孔的開口面側,層積接著具有形成在單面的第3導電膜的增層;藉由雷射加工,去除前述鍍敷有底通孔內部的前述接著劑而使前述空氣空隙消滅,藉此,在底部露出前述鍍敷有底通孔,形成前述鍍敷有底通孔成為下穴的階梯通孔,藉由對前述第3導電膜及前述階梯通孔的內壁施行鍍敷處理,形成將前述第3導電膜與前述內層電路圖案作電性連接的鍍敷積層通孔,將被施行鍍敷處理的前述第3導電膜按照預定的圖案進行蝕刻,藉此形成外層電路圖案。A method for producing a multilayer printed wiring board, comprising: a double-sided conductive film laminated plate having a first conductive film and a second conductive film on a front surface and a back surface, wherein the first conductive film and the second conductive layer are formed The plating is electrically connected to the through hole and the plated through hole, and the first conductive film and the second conductive film are etched in a predetermined pattern to form a double layer having an inner layer circuit pattern. The flexible substrate is provided with a cover film having an insulating film and an adhesive layer formed on one surface of the insulating film, and the plating is passed through an adhesive which is melted by the adhesive layer of the cover film. The inside of the hole is completely filled, and the cover film is adhered to the double-sided flexible substrate under the condition that the inside of the plated bottomed through hole is allowed to occur in an air gap which is not filled by the above-mentioned adhesive agent. In the double-sided lamination process, a double-sided core substrate is produced, and at least the side of the open surface of the double-sided core substrate on which the bottom via hole is plated is laminated, and then the third conductive film formed on one side is laminated. a layer; the air gap is removed by laser processing to remove the adhesive in the bottom of the plated through hole, thereby exposing the plated bottomed through hole at the bottom portion to form the plated bottomed through hole a stepped via hole that is a lower hole, and a plating layer that electrically connects the third conductive film and the inner layer circuit pattern by plating the inner wall of the third conductive film and the stepped via hole The through hole is formed by etching the third conductive film subjected to the plating treatment in a predetermined pattern to form an outer layer circuit pattern. 一種多層印刷配線板之製造方法,其特徵為:在表面及背面分別具有第1導電膜及第2導電膜的雙面覆導電膜層積板,形成將前述第1導電膜與前述第2導電膜作電性連接的鍍敷貫穿通孔及鍍敷有底通孔,將前述第1導電膜及前述第2導電膜按照預定的圖案進行蝕刻,藉此製作具有內層電路圖案的雙面可撓性基板,準備具有:絕緣基底材、形成在前述絕緣基底材表面的第3導電膜、及形成在前述絕緣基底材背面的接著劑層的附接著劑層的單面覆導電膜層積板,在藉由前述接著劑層熔融後的接著劑,使前述鍍敷貫穿通孔的內部被完全填充,而且在前述鍍敷有底通孔的內部容許發生未藉由前述接著劑予以填充的空氣空隙的條件下,進行將前述附接著劑層的單面覆導電膜層積板黏貼在前述雙面可撓性基板之雙面的層疊工程,藉由雷射加工,去除前述鍍敷有底通孔內部的前述接著劑而使前述空氣空隙消滅,藉此,在底部露出前述鍍敷有底通孔,形成前述鍍敷有底通孔成為下穴的階梯通孔,藉由對前述第3導電膜及前述階梯通孔的內壁施行鍍敷處理,形成將前述第3導電膜與前述內層電路圖案作電性連接的鍍敷積層通孔,將被施行鍍敷處理的前述第3導電膜按照預定的圖案進行蝕刻,藉此形成外層電路圖案。A method for producing a multilayer printed wiring board, comprising: a double-sided conductive film laminated plate having a first conductive film and a second conductive film on a front surface and a back surface, wherein the first conductive film and the second conductive layer are formed The plating is electrically connected to the through hole and the plated through hole, and the first conductive film and the second conductive film are etched in a predetermined pattern to form a double layer having an inner layer circuit pattern. The flexible substrate is provided with a single-sided conductive film laminate having an insulating base material, a third conductive film formed on the surface of the insulating base material, and an adhesive layer formed on the adhesive layer on the back surface of the insulating base material. The inside of the through-hole is completely filled by the adhesive which is melted by the adhesive layer, and air which is not filled by the adhesive is allowed to be generated inside the plated bottomed through hole. Under the condition of voids, a single-sided conductive film laminate having the adhesive layer is adhered to the both sides of the double-sided flexible substrate, and the plating is removed by laser processing. Inside the hole The air gap is eliminated by the adhesive of the portion, whereby the plated bottomed through hole is exposed at the bottom portion, and the stepped through hole having the bottom hole through which the plated through hole is formed is formed, and the third conductive film is formed And plating the inner wall of the stepped through hole to form a plated through hole for electrically connecting the third conductive film and the inner layer circuit pattern, and the third conductive film subjected to the plating treatment is The predetermined pattern is etched, thereby forming an outer layer circuit pattern. 如申請專利範圍第1項或第2項之多層印刷配線板之製造方法,其中,前述雷射加工係藉由以下方法來進行:使用將前述第3導電膜進行蝕刻所形成的共型遮罩(conformal mask)所進行的共型雷射加工法;對前述第3導電膜直接照射雷射光的直接雷射加工法;或將比前述階梯通孔的上穴直徑還大的開口形成在前述第3導電膜,照射與前述上穴直徑相同光束直徑的雷射光的開大窗法(large window)。The method of manufacturing a multilayer printed wiring board according to the first or second aspect of the invention, wherein the laser processing is performed by using a common mask formed by etching the third conductive film. a conformal laser processing method performed by (conformal mask); a direct laser processing method in which the third conductive film is directly irradiated with laser light; or an opening larger than a diameter of an upper hole of the stepped through hole is formed in the foregoing 3 A conductive film that illuminates a large window of laser light having the same beam diameter as the above-mentioned upper hole diameter.
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