JP5066427B2 - Method for manufacturing printed wiring board - Google Patents

Description

  The present invention relates to a method of manufacturing a printed wiring board having a blind via hole with high connection reliability.

  There is no end to the demands for high performance, high functionality, miniaturization, and weight reduction of electronic devices, and an important factor to meet these demands is the further miniaturization and high density wiring of printed wiring boards.

  As an example of manufacturing a printed wiring board that achieves such miniaturization and high-density wiring, for example, there is one reported in “Patent Document 1”, and the manufacturing method is generally as follows.

  First, as shown in FIG. 10A, a core substrate 3a having wiring patterns 4 formed on both surfaces of an insulating substrate 1 is prepared, and then an interlayer insulating layer 16 and copper foil are formed on the front and back of the core substrate 3a. The metal foils 2 are sequentially laminated, or the resin-attached metal foil 17 in which the interlayer insulating layer 16 and the metal foil 2 are laminated in advance is laminated (see FIG. 10B).

  Next, a barrier metal layer 8 such as nickel having etching conditions different from those of the metal foil 2 is formed on the surface of the metal foil 2 by plating or the like, and then a blind via hole (hereinafter referred to as “BVH”). The metal foil 2 and the barrier metal layer 8 are removed to form the opening 18 (see FIG. 10C).

  Next, the wiring pattern 4 formed in the inner layer is removed by irradiating the opening 18 with a laser (for example, “carbon dioxide laser”) and removing the interlayer insulating layer 16 exposed from the opening 18. The reaching non-through hole 7 is drilled (see FIG. 10D).

  Next, after the inside of the non-through hole 7 is cleaned by desmear treatment, electroless plating (for example, “electroless copper plating”) is formed on the entire outer layer including the non-through hole 7, and then the electroless plating is performed. By performing electrolytic plating treatment (for example, “electrolytic copper plating treatment using a plating solution for filled vias”) as a power feeding layer, the plating 9 is filled in the non-through holes 7 and is also deposited on the outer layer (FIG. 10). (See (e)).

  Next, as shown in FIG. 10F, the plating 9 is removed by etching until the barrier metal layer 8 is exposed, and then the exposed barrier metal layer 8 is removed (see FIG. 10G).

  Finally, the multilayer printed wiring board MPa of FIG. 10H in which the wiring pattern 4a (including the land 5b of the BVH 12a) is formed on the outer layer by a general circuit forming means (for example, “subtractive method”) is used. obtain.

  As described above, by making the conductor thickness after forming BVH constant (that is, maintaining the thickness of the metal foil 2), fine wiring (fine pattern) can be formed. Incidentally, since the plating 9 is also deposited on the outer layer, the effect that the plating can be stably filled in the non-through holes 7 can be obtained as compared with the case where the plating is deposited only on the non-through holes 7.

  However, the above manufacturing method has the following problems.

  That is, the plating 9 deposited in the step of FIG. 10 (e) has a variation in thickness within the plane of the printed wiring board, and when the etching step of FIG. Overetching 19 occurs in the portion where the plating thickness on the through hole 7 (that is, the portion where the barrier metal layer 8 is not formed) is thin (the metal foil 2 exposed at the opening edge of the non-through hole 7 is also in the lateral direction). There is a risk that a connection failure may occur between the upper and lower wiring layers (see FIG. 11).

  Therefore, the present inventor has developed a technique for avoiding such a problem, and a patent application has already been filed for the technical content (see Patent Document 2).

  FIG. 12 shows a method of manufacturing a printed wiring board disclosed in Patent Document 2. First, as shown in FIG. 12A, a metal foil 2 such as a copper foil is formed on the front and back of the insulating substrate 1. Is prepared, and a barrier metal layer 8 made of nickel or the like having a different etching condition from the metal foil 2 is then formed on the entire surface of the metal foil 2.

  Next, a laser is directly irradiated onto the barrier metal layer 8 to punch the non-through hole 7 at a desired position, and a metal umbrella 5a protruding at the opening edge of the non-through hole 7 is formed (FIG. 12). (See (b)).

  Next, after the desmear process is performed with the metal umbrella 5a left, the electroless plating process and the electrolytic plating process are sequentially performed to fill the non-through holes 7 with plating 9 (for example, “copper plating”). At the same time, it is also deposited on the outer layer (see FIG. 12C).

  Next, as shown in FIG. 12 (d), the plating 9 is removed by alkali etching until the barrier metal layer 8 is exposed, and then the exposed barrier metal layer 8 is removed (see FIG. 12 (e)). .

  Finally, the circuit pattern of the metal foil 2 (for example, “subtractive method”) is used to form the wiring pattern 4 (including the land 5c of the BVH 12b) on the outer layer as shown in FIG. Pa is obtained.

  In this method, since the plating 9 is formed with the metal umbrella 5a protruding at the opening edge of the non-through hole 7 left, even when the excessively etched portion 19 as shown in FIG. 13 occurs. Further, since the connection between the land 5c and the plating 9 can be compensated for by the length of the metal umbrella 5a, a connection failure between the wiring layers can be suppressed.

  However, the above configuration also has the following problems.

That is, as shown in FIG. 14 (a) (enlarged cross-sectional view of the main part of FIG. 12 (c)), the metal umbrella 5a is covered with the barrier metal layer 8 only on the front surface Sf, and the other side surfaces Si and back surface. Since B is not covered, the metal foil 2 exposed at the opening edge of the non-through hole 7 is also removed at the same time during the etching removal process of the plating 9 as shown in FIG. As a result, the connection reliability between the wiring layers may be insufficient.
JP 2002-324975 A JP 2007-129180 A

  This invention makes it a subject to provide the manufacturing method of the printed wiring board which can form BVH with high connection reliability, even when the plating for BVH formation deposited on an outer layer is removed by etching.

The present invention according to claim 1 is a method for producing a printed wiring board for connecting different wiring patterns formed interlayer blind By A hole, at least, to the metal foil of the insulating substrate where the metal foil is laminated on the surface, A first step of forming a land having an opening in the center and other wiring patterns, and piercing a non-through hole reaching a desired wiring pattern formation layer by irradiating the land opening with a laser. A second step of forming a metal umbrella protruding at the opening edge of the hole, a third step of cleaning the non-through hole by a desmear process, and etching the wiring pattern on the exposed surface of the wiring pattern including at least the land The fourth step to form a barrier metal layer with different conditions and the plating process fills the non-through holes and deposits the outer layer as well A fifth step of forming an etching resist pattern on the plating located in the blind via hole forming portion, a seventh step of etching and removing the plating exposed from the etching resist pattern, and an etching resist pattern After peeling, there is an eighth step of removing the plating remaining in the blind via hole forming portion by soft etching , and a ninth step of removing the exposed barrier metal layer , and the sixth step is a blind via. Pressure-sensitive / photosensitive etching resist is left on the plating convex part formed on the hole and wiring pattern by pressing with a press plate, and etching of the blind via hole forming part among the etching resist remaining on the plating convex part resist selectively exposed to that comprising the step of performing development processing The method for manufacturing a printed wiring board, wherein is obtained by solving the above problems.

  Thereby, plating between fine patterns where etching residue (that is, plating residue) is likely to occur can be removed without worrying about excessive etching. In addition, since the BVH surface can be formed substantially smoothly, a stacked via for forming a plurality of BVHs on the same axis can be easily formed when the BVH is multilayered.

In addition, this allows the etching resist pattern to be formed without misalignment with the plating projections on the BVH, so that when the individual substrate is a large substrate with multiple faces, the land and the wiring formed in the vicinity of the land are provided. Etching residue (plating residue) can be prevented from occurring between patterns regardless of the location of the individual substrates.

According to a second aspect of the present invention, in the fourth step of the first aspect of the present invention, the barrier metal layer is also formed on the surface of the insulating substrate exposed from the wiring pattern. This solves the above problem.

As a result, when the plating deposited on the outer layer is removed by etching, there is no concern that the etchant will permeate from the boundary between the insulating substrate and the wiring pattern, and therefore there is no concern that a part of the wiring pattern will be dissolved. .

  According to the present invention, a printed wiring board having BVH with high connection reliability can be easily obtained.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS. In the present embodiment, the same reference numerals are used for portions common to FIGS. 10 to 14, and descriptions thereof are omitted as appropriate.

First, a first embodiment will be described with reference to FIGS.
First, as shown in FIG. 1A, a double-sided metal in which a metal foil 2 such as a copper foil is laminated on the front and back of an insulating substrate 1 (for example, “glass epoxy substrate” in which glass fiber is impregnated with an epoxy resin). A non-through hole reaching the metal foil 2 on the other side by preparing a foil-clad laminate 3 and then irradiating a laser (for example, “carbon dioxide laser”) from one side of the double-sided metal foil-clad laminate 3 7 and a metal umbrella 5a protruding at the opening edge of the non-through hole 7 is formed (see FIG. 1B).

  Here, as a method for drilling the non-through hole 7, a drilling example in which the metal foil 2 on one surface is directly irradiated with a laser is shown. However, an opening is provided in advance in the metal foil 2 where the BVH is to be formed, You may make it pierce by irradiating a laser to an opening part.

  The length of the metal umbrella 5a protruding from the non-through hole 7 is preferably 3 μm or more and 15 μm or less.

  The reason is that if it is shorter than 3 μm, there is almost no effect of improving the connection reliability of BVH12, and if it is longer than 15 μm, the BVH diameter must be increased in order to maintain the fluidity of the plating solution. It is because it becomes the hindrance of conversion.

  Next, with the metal umbrella 5a left, the non-through hole 7 is cleaned by desmearing treatment such as sodium permanganate or potassium permanganate, and then on the exposed surface of the metal foil 2 including the metal umbrella 5a. A barrier metal layer 8 (for example, “nickel”, “tin”, “silver”, etc.) having etching conditions different from those of the metal foil 2 is formed by, for example, substitutional electroless plating (FIG. 1C). Next, electroless plating treatment (for example, electroless copper plating treatment) and electrolytic plating treatment (for example, electrolytic copper plating treatment using a plating solution for filled vias) are sequentially performed to form the plating 9 in a non-through hole. 7 and deposited on the outer layer (see FIG. 1 (d)).

  Next, as shown in FIG. 1 (e), the plating 9 deposited on the outer layer is removed by etching (for example, removal by alkaline etching containing copper ammonia complex ions as a main component) to expose the barrier metal layer 8. Then, as shown in FIG. 1F, the exposed barrier metal layer 8 is removed by etching.

Next, a photosensitive etching resist is laminated on the front and back of the substrate in FIG. 1 (f) (the etching resist may be either liquid or dry film, but is dry from the viewpoint of work efficiency and fine pattern formation. An etching resist pattern 11 is formed on a portion where the land 5 and other wiring patterns 4 are formed by a known exposure / development means (see FIG. 1G).

  Finally, etching is performed with an etchant such as ferric chloride or cupric chloride to form the front and back wiring patterns 4 including the lands 5 of the BVH 12, and then the etching resist pattern 11 is peeled to remove the front and back surfaces. A printed wiring board P in FIG. 1H in which the wiring patterns 4 are connected by the BVH 12 is obtained.

  In addition, when multilayering the printed wiring board P of the said structure, an interlayer insulation layer and metal foil are laminated | stacked on the front and back of the printed wiring board P of FIG.1 (h), for example, FIG.1 (b)-FIG. By repeating step h) as many times as necessary, a multilayer printed wiring board MP as shown in FIG. 1 (i) can be easily obtained.

  What should be noted in the present embodiment is that not only the surface Sf of the metal umbrella 5a protruding at the opening edge of the non-through hole 7, but also the side surface Si and the back surface B thereof are coated with the barrier metal layer 8 and then plated 9 Is removed by etching (see FIG. 2A, which is an enlarged sectional view of the main part of FIG. 1D).

  As a result, when the plating 9 deposited on the outer layer (that is, the plating 9 deposited on the barrier metal layer 8) is removed by etching, the metal umbrella 5a is not removed and remains in its original shape. It is possible to prevent the plating 9 in the hole 7 from being excessively etched. Even if the excessively etched portion 19 as shown in FIG. 2B occurs, the connection area between the land 5 and the plating 9 deposited in the BVH 12 can be increased by the length of the metal umbrella 5a. The connection reliability of the BVH 12 can be ensured.

    Next, a second embodiment will be described with reference to FIGS. 3A to 3B are the same steps as those in FIGS. 1A to 1B, and the description thereof is omitted.

  First, as shown in FIG. 3C, a barrier metal layer 8 having a different etching condition from that of the metal foil 2 is formed on the entire surface including the non-through holes 7, and then the barrier metal layer 8 is used as a power supply layer. By performing an electrolytic plating process (for example, an electrolytic copper plating process using a plating solution for filled vias), the plating 9 is filled in the non-through holes 7 and also deposited on the outer layer (see FIG. 3D). .

  Next, as shown in FIG. 3 (e), the plating 9 deposited on the outer layer is removed by etching in the same manner as in the first embodiment to expose the barrier metal layer 8, and then FIG. 3 (f). As shown in FIG. 2, the exposed barrier metal layer 8 is removed by etching.

Next, a photosensitive etching resist is laminated on the front and back of the substrate of FIG. 3 (f), and then the etching resist pattern 11 is formed on a portion where the land 5 and other wiring patterns 4 are formed by a known exposure / development means. (See FIG. 3G).

  Finally, an etching process is performed to form the front and back wiring patterns 4 including the lands 5 of the BVH 12, and then the etching resist pattern 11 is peeled to connect the front and back wiring patterns 4 with the BVH 12. The printed wiring board P of (h) is obtained.

  In addition, when multilayering the printed wiring board P of the said structure, an interlayer insulation layer and metal foil are laminated | stacked on the front and back of the printed wiring board P of FIG.3 (h), for example, FIG.3 (b)-FIG.3 ( By repeating the step h) as many times as necessary, a multilayer printed wiring board MP as shown in FIG. 3I can be easily obtained.

What should be noted in the present embodiment is that the barrier metal layer 8 is formed on the inner wall of the non-through hole 7 in addition to the exposed surface (surface Sf, side surface Si, back surface B) of the metal umbrella 5a.

As a result, even if a considerably deep excessive etching portion 19 as shown in FIG. 4 occurs, the connection between the land 5 and the wiring pattern 4 on the bottom side of the BVH 12 is maintained by the barrier metal layer 8. Compared with the first embodiment, the connection reliability of the BVH 12 can be further ensured.

  Next, a third embodiment will be described with reference to FIG. 5A to 5D are the same steps as the steps in FIGS. 3A to 3D, and thus the description thereof is omitted.

  First, an etching resist pattern 11 is formed on the plating 9 located in the BVH formation portion of the substrate shown in FIG. 5D (see FIG. 5E), and then from the etching resist pattern 11 by an alkali etching process. The exposed plating 9 is removed by etching (see FIG. 5F).

  Next, as shown in FIG. 5G, after the etching resist pattern 11 is peeled off, the plating 9a remaining in the BVH formation portion is made of a soft etching solution (for example, formic acid or an amine complexing agent as a main component). Select by MEC soft etching "CZ8500, CZ8100", Rohm and Haas soft etching solution (circu bond) mainly composed of sulfuric acid and hydrogen peroxide, ammonium persulfate-based or sodium persulfate-based soft etching solution) Then, the barrier metal layer 8 exposed on the surface is removed (see FIG. 5 (i)).

  Next, as shown in FIG. 5 (j), the etching resist pattern 11 is formed, and then the etching process is performed to remove the metal foil 2 exposed from the etching resist pattern 11, and the BVH 12 The front and back wiring patterns 4 including the lands are formed.

  Finally, the etching resist pattern 11 is peeled off to obtain the printed wiring board P of FIG. 5 (k) in which the front and back wiring patterns 4 are connected by the BVH 12.

  In addition, when multilayering the printed wiring board P of the said structure, an interlayer insulation layer and metal foil are laminated | stacked on the front and back of the printed wiring board P of FIG.5 (k), for example, FIG.5 (b)-FIG. By repeating step k) as many times as necessary, a multilayer printed wiring board MP as shown in FIG. 5L can be easily obtained.

  What should be noted in the present embodiment is that not only the entire surface of the metal umbrella 5a is covered with the barrier metal layer 8 but also the removal of the plating 9 deposited on the outer layer of the substrate as a means for suppressing excessive etching. The first etching step for etching while leaving the forming portion and the second etching step for selectively removing the plating 9a of the BVH forming portion remaining in the first etching step with a soft etching solution having a slow etching speed. The point is to remove them separately.

  As a result, the excessively etched portion 19 as shown in FIGS. 2B and 4 is almost eliminated (that is, the BVH 12 and the land 5 can be formed substantially flat), so that the coaxial as shown in FIG. A multilayer printed wiring board MP having a stacked via formed by forming a plurality of BVHs 12 thereon can be easily obtained.

Next, a fourth embodiment will be described with reference to FIG.
First, as shown in FIG. 6A, double-sided metal foil tensioning in which a metal foil 2 such as a copper foil is laminated on the front and back of an insulating substrate 1 (for example, a glass epoxy substrate in which a glass fiber is impregnated with an epoxy resin). A laminate 3 is prepared. Next, a land 5 having an opening 6 at the center and other wiring patterns 4 are formed by a general subtractive method or the like (see FIG. 6B).

  Next, a laser (for example, “carbon dioxide laser”) having a diameter larger than that of the land opening 6 and smaller than that of the land 5 is irradiated to the land opening 6 to form the non-through hole 7 reaching the wiring pattern 4 on the back side. A metal umbrella 5a protruding at the opening edge of the non-through hole 7 is formed while drilling (see FIG. 6C).

  Next, with the metal umbrella 5a left, the non-through hole 7 is cleaned by the same desmear process as in the first embodiment, and then the barrier metal layer 8 (for example, “ Nickel ”,“ tin ”,“ silver ”, etc.) are formed on the exposed surface of the wiring pattern 4 including the metal umbrella 5a and the entire inner wall of the non-through hole 7 (see FIG. 6D).

  6D, the barrier metal layer 8 is deposited on the entire surface of the substrate. However, the barrier metal layer 8 may be deposited only on the exposed surface of the wiring pattern 4 by substitutional electroless plating. However, since there is a possibility that the etchant may permeate from the boundary between the insulating substrate 1 and the wiring pattern 4 and dissolve a part of the wiring pattern 4, it is preferable to form the entire surface as shown in FIG.

  Next, as shown in FIG. 6E, by performing an electrolytic plating process using the barrier metal layer 8 as a power feeding layer (for example, “electrolytic copper plating process using a plating solution for filled vias”), plating 9 is performed. Are filled in the non-through holes 7 and deposited on the outer layer, and then an etching resist 10 is laminated on both surfaces of the substrate on which the plating 9 is formed on the outer layer (see FIG. 6F).

  Next, as shown in FIG. 6G, an etching resist pattern 11 is formed on the plating 9 located in the BVH forming portion by performing known exposure / development processing, and then the etching resist pattern 11 Then, the plating 9 exposed from the substrate is removed by etching (for example, alkali etching containing copper ammonia complex ions as a main component), and then the etching resist pattern 11 is removed (see FIG. 4H).

  Next, as shown in FIG. 6I, the plating 9a remaining in the BVH formation portion is selectively removed with the same soft etching solution as in the third embodiment, and then exposed on the surface. By removing the barrier metal layer 8, the printed wiring board P of FIG. 6 (j) in which the wiring patterns 4 on the front and back sides are connected by the BVH 12 is obtained.

  In addition, when multilayering the printed wiring board P of the said structure, an interlayer insulation layer and metal foil are laminated | stacked on the front and back of the printed wiring board P of FIG.6 (j), for example, FIG.6 (b)-FIG.6 ( By repeating step j) as many times as necessary, a multilayer printed wiring board MP as shown in FIG. 6K can be easily obtained.

  What should be noted in the present embodiment is that the non-through hole 7 is formed in advance in the central portion of the land 5 as compared with the third embodiment in which the metal foil 2 is directly irradiated with a laser to form a hole. The opening 6 is irradiated with a laser to be perforated.

  Thereby, in addition to the effects obtained in the third embodiment, the land diameter can be reduced, that is, the wiring density can be increased (in the third embodiment, (1) laser processing It is necessary to form a land having a diameter that takes into account the machining deviation tolerance and (2) the pattern positional deviation tolerance during circuit formation. However, in the fourth embodiment, there is no positional deviation between the land and the non-through hole. When forming lands, it is only necessary to consider the pattern positional deviation tolerance during circuit formation, and as a result, the land diameter can be reduced).

  Further, as described in the third embodiment, the means for etching and removing the plating deposited on the outer layer twice (alkaline etching and soft etching) is the fourth method for depositing the plating on the outer layer on which the circuit has been formed. In the embodiment, the effect is more exhibited. That is, in the fourth embodiment, unlike the third embodiment, since the metal foil is formed in advance and then the plating for forming the BVH is deposited, the entire outer layer (including the BVH forming portion). If you attempt to remove the plating deposited at one time by alkaline etching, plating residue will occur in the narrow part of the adjacent wiring pattern, and conversely, the plating in the narrow part of the wiring pattern will be completely removed Attempting to do so would result in excessive etching of the plating in the non-through hole, but by performing the etching process in two steps as in the fourth embodiment, the plating residue and excessive etching were eliminated. Occurrence can be easily prevented.

  Next, a fifth embodiment will be described with reference to FIG. 7 (a) to 7 (e) are the same steps as the steps of FIGS. 6 (a) to 6 (e), description thereof will be omitted.

  First, an etching resist having both pressure sensitivity and photosensitivity (hereinafter referred to as “PF etching resist 13”) is disposed on the front and back of the substrate of FIG. (Refer FIG.7 (f)). In addition, the code | symbol 13a in a figure is a mold release material which consists of a PET (polyethylene terephthalate) film etc. which protect the PF etching resist 13, for example.

  This PF etching resist 13 has a function of transferring a portion to which pressure is applied to an object, and in the case of the press work shown in FIG. 7 (f), the plating projection 9c shown in FIG. 7 (e). Since pressure is applied at a portion (a step is formed on the plating 9 by the thickness of the land 5 or the wiring pattern 4), when the PF etching resist 13 is peeled off after press working, the PF etching resist 13 is only applied to the plating convex portion 9c. Is transferred (see FIG. 7G).

  Next, only the transferred PF etching resist 13 that has been transferred to the plating convex portion 9c on the BVH forming portion (plating convex portion 9c on the opening side of the non-through hole 7) is selectively exposed, and then developed. As a result, the etching resist pattern 15 is formed only in the BVH formation portion (see FIG. 7H).

  Next, the printed wiring board P of FIG. 7 (k) is obtained by performing the steps of FIGS. 7 (i) to 7 (k) in the same manner as the steps of FIGS. 6 (h) to 6 (j). .

  In addition, when multilayering the printed wiring board P of the said structure, an interlayer insulation layer and metal foil are laminated | stacked on the front and back of the printed wiring board P of FIG.7 (k), for example, FIG.7 (b)-FIG. By repeating the step k) as many times as necessary, a multilayer printed wiring board MP as shown in FIG. 7L can be easily obtained.

  What should be noted in the present embodiment is that a pressure-sensitive and photosensitive etching resist is used as the etching resist, and the etching resist pattern 15 is formed on the plating convex portion 9c without any positional deviation.

  Thereby, in addition to the effects obtained in the fourth embodiment, the following effects can be obtained. That is, FIG. 8 shows an example in which the wiring pattern 4 is formed in the vicinity of the land 5 in the fourth embodiment (see FIG. 8A). In the case of a large substrate, a large shift occurs in the etching resist pattern 11 depending on the location of the individual substrate (for example, outside the large substrate), and as shown in FIG. It may take up. In this state, the alkaline etching removal of the plating 9 (FIG. 8C), the removal of the plating 9a in the BVH forming portion with a soft etching solution (FIG. 8D), and the removal of the exposed barrier metal layer 8 are sequentially performed. In this case, the plating residue 9d as shown in FIG. 8E is generated between the land 5 and the wiring pattern 4, and there is a risk of short circuit failure. However, in the fifth embodiment, such a misregistration of the etching resist pattern can be prevented regardless of the arrangement position of the individual substrate, and thus the short circuit failure as shown in FIG. be able to.

Next, a sixth embodiment will be described with reference to FIG.
FIG. 9 shows a modification of the fourth embodiment shown in FIG. 6. First, as shown in FIG. 9A, a release layer 21 and a metal foil such as a copper foil are provided on one side. 9 is prepared, and then, as shown in FIG. 9 (b), the metal foil 2 is etched, and a land 5 having an opening 6 in the center and other wiring patterns are prepared. 4 is prepared (in order to transfer the wiring pattern to the front and back of the insulating adhesive layer 22, the transfer plate 20 prepares a pair of front and back transfer plates 20 as shown in FIG. 9B).

  Next, as shown in FIG. 9C, the wiring pattern forming surfaces of the pair of transfer plates 20 are opposed to each other, and an insulating adhesive layer 22 (for example, glass fiber with heat such as epoxy resin) is interposed therebetween. A semi-cured “prepreg” impregnated with a curable resin is disposed, and then laminated and pressed to embed the wiring pattern 4 (including the land 5) in the insulating adhesive layer 22 and the insulating adhesive layer. 22 is cured (see FIG. 9D).

  Next, as shown in FIG. 9 (e), the transfer plate 20 is peeled off together with the release layer 21, and then the land 5 is irradiated with a laser having a diameter smaller than the diameter of the land 5 and larger than the diameter of the opening 6. By doing so, the non-through hole 7 reaching the wiring pattern 4 on the back surface side is drilled, and the metal umbrella 5a protruding at the opening edge of the non-through hole 7 is formed (see FIG. 9F).

  Next, as shown in FIG. 9G, a desmear process is performed in the same manner as in the first embodiment with the metal umbrella 5a left, and then a barrier metal having different etching conditions from the wiring pattern 4 A layer 8a (for example, “nickel”, “tin”, “silver”, etc.) is formed on the exposed surface of the wiring pattern 4 (including the land 5 and the metal umbrella 5a) (in the present embodiment, a replacement type) Although an example in which the barrier metal layer 8a is formed by electroless plating is shown, it may be provided on the entire surface including the non-through holes 7 as in the fourth and fifth embodiments.

  Next, after electroless plating (for example, “electroless copper plating”) is formed on the entire surface of the outer layer including the non-through holes 7, electrolytic plating treatment using the electroless plating as a power feeding layer (for example, “filled via plating”). By performing an electrolytic copper plating process using a solution ”), the plating 9 is filled in the non-through holes 7 and also deposited on the outer layer, and then an etching resist pattern 11 is formed on the plating 9 in the BVH forming portion ( (Refer FIG.9 (h)).

  Next, as shown in FIG. 9 (i), the plating 9 exposed from the etching resist pattern 11 is removed by alkali etching (for example, alkali etching containing copper ammonia complex ions as a main component), and then the etching is performed. The resist pattern 11 is peeled, and then the plating 9a remaining in the BVH formation portion is removed with the same soft etching solution as in the third embodiment, so that the plating 9 filled in the non-through holes 7 (BVH12) is land 5 (see FIG. 9 (j)).

  Finally, by removing the barrier metal layer 8a exposed on the surface, the printed wiring board P of FIG. 9 (k) having the BVH 12 connecting the front and back wiring patterns 4 is obtained.

  In addition, when multilayering the printed wiring board P of the said structure, after arrange | positioning an insulating adhesive layer on the front and back of the printed wiring board P of FIG.9 (k), for example, after FIG.9 (c)-FIG.9 (k) The multilayer printed wiring board MP as shown in FIG. 9 (l) can be obtained by repeating the step ()) as many times as necessary.

  In the present embodiment, in addition to the effects obtained in the fourth embodiment, since the wiring pattern is embedded so as to be smooth with the surface of the insulating layer, the printed wiring board P and the printed wiring board P are The multilayered multilayer printed wiring board MP can be thinned.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional process explanatory diagram illustrating a first embodiment of a method for producing a printed wiring board of the present invention. The principal part expanded sectional view for demonstrating the effect of 1st embodiment. The schematic cross-sectional process explanatory drawing which shows 2nd embodiment of the manufacturing method of this invention printed wiring board. The principal part expanded sectional view for demonstrating the effect of 2nd embodiment. Schematic cross-sectional process explanatory drawing which shows 3rd embodiment of the manufacturing method of this invention printed wiring board. The schematic cross-sectional process explanatory drawing which shows 4th Embodiment of the manufacturing method of this invention printed wiring board. The schematic cross-sectional process explanatory drawing which shows 5th embodiment of the manufacturing method of this invention printed wiring board. Schematic cross-sectional explanatory drawing which shows the effect of 5th embodiment. The schematic cross-sectional process explanatory drawing which shows 6th Embodiment of the manufacturing method of this invention printed wiring board. Schematic cross-sectional process explanatory drawing which shows the manufacturing method of the conventional multilayer printed wiring board. FIG. 11 is a schematic cross-sectional explanatory diagram showing a BVH structure of a multilayer printed wiring board obtained by the manufacturing method of FIG. 10. Schematic cross-sectional process explanatory drawing which shows the manufacturing method of the other conventional multilayer printed wiring board. FIG. 13 is a schematic cross-sectional explanatory view showing a BVH structure of a printed wiring board obtained by the manufacturing method of FIG. The principal part expanded sectional view which shows the BVH structure of the printed wiring board obtained by the manufacturing method of FIG.

Explanation of symbols

1: Insulating substrate 2: Metal foil 3: Double-sided metal foil-clad laminate 3a: Core substrate 4, 4a: Wiring patterns 5, 5b, 5c: Land 5a: Metal umbrella 6, 18: Opening 7: Non-through hole 8, 8a: barrier metal layers 9, 9a, 9b: plating 9c: plating projection 9d: plating residue 10, 13: etching resist 11, 15: etching resist pattern 12, 12a, 12b: blind via hole (BVH)
13a: Release material 14: Press plate 16: Interlayer insulating layer 17: Metal foil with resin 19: Excess etching portion 20: Transfer plate 21: Release layer 22: Insulating adhesive layer P, Pa: Printed wiring board MP, MPa: Multilayer printed wiring board Sf: Metal umbrella surface Si: Metal umbrella side surface B: Metal umbrella back surface

Claims (2)

A method for manufacturing a printed wiring board for connecting different wiring patterns formed interlayer blind By A hole, at least, to the metal foil of the insulating substrate where the metal foil is laminated on the surface, and lands having an opening in the central portion The first step of forming other wiring patterns, and a metal projecting at the opening edge of the non-through hole while drilling a non-through hole reaching the desired wiring pattern forming layer by irradiating the land opening with a laser forming a second step of forming an umbrella, a third step of cleaning the non-through hole by desmear treatment, a different barrier metal layer etching conditions with the wiring pattern on the exposed surface of the wiring pattern including at least the land a fourth step, a fifth step of depositing the plating in the outer layer to fill the plated blind holes by plating, Bly A sixth step of forming an etching resist pattern on the plating located in the via hole forming portion, a seventh step of etching and removing the plating exposed from the etching resist pattern, and after removing the etching resist pattern, a blind via And an eighth step of removing the plating remaining in the hole forming portion by soft etching and a ninth step of removing the exposed barrier metal layer , and the sixth step is performed on the blind via hole and the wiring pattern. A pressure sensitive / photosensitive etching resist is left on the formed plating convex part by pressing with a press plate, and the etching resist in the blind via hole forming part is selectively exposed from the etching resist remaining on the plating convex part. printed circuit, characterized by comprising the step of performing development processing and The method of production. The method for manufacturing a printed wiring board according to claim 1 , wherein in the fourth step , the barrier metal layer is also formed on the surface of the insulating substrate exposed from the wiring pattern .